MC100EP16VS 3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing Description The MC100EP16VS is a differential receiver with variable output amplitude. The device is functionally equivalent to the 100EP16 with an input pin that controls the amplitude of the outputs. The VCTRL input pin controls the output amplitude of the EP16VS and is referenced to VCC. (See Figure 4.) The operational range of the VCTRL input is from ≤ VBB (max output amplitude) to VCC (min output amplitude). (See Figure 3.) A variable resistor between the VCC and VBB pins, with the wiper driving VCTRL, can control the output amplitude. Typical application circuits and a VCTRL Voltage vs. Output Amplitude graph are described in this data sheet. When left open, the VCTRL pin will be internally pulled down to VEE and operate as a standard EP16, with 100% output amplitude. The VBB pin, an internally generated voltage supply, is available to this device only. For single−ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 F capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. http://onsemi.com MARKING DIAGRAMS* 8 8 1 SOIC−8 D SUFFIX CASE 751 1 8 KEP62 ALYW G 8 1 TSSOP−8 DT SUFFIX CASE 948R 1 KP62 ALYWG G Features • • • • 220 ps Propagation Delay Maximum Frequency > 4 GHz Typical (See Graph) The 100 Series Contains Temperature Compensation PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = −3.0 V to −5.5 V Open Input Default State Q Output Will Default LOW with Inputs Open or at VEE Pb−Free Packages are Available 3H MG G • • • • DFN8 MN SUFFIX CASE 506AA A L Y W M G 1 4 = Assembly Location = Wafer Lot = Year = Work Week = Date Code = Pb−Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. © Semiconductor Components Industries, LLC, 2008 August, 2008 − Rev. 6 1 Publication Order Number: MC100EP16VS/D MC100EP16VS Table 1. PIN DESCRIPTION VCTRL D D 1 8 2 VCC 7 3 Q Q 6 PIN FUNCTION D*, D** ECL Data Inputs 2, 3 Q, Q ECL Data Outputs 6, 7 VCTRL* Output Swing Control 1 VBB Reference Voltage Output 4 VCC Positive Supply 8 VEE Negative Supply 5 NC No Connect EP VBB 4 5 VEE Figure 1. 8−Lead Pinout (Top View) and Logic Diagram (DFN8 only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GND) or leave unconnected, floating open. * Pins will default LOW when left open. ** Pins will default to VCC/2 when left open. Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 k Internal Input Pullup Resistor ESD Protection 37.5 k Human Body Model Machine Model Charged Device Model Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC−8 TSSOP−8 DFN8 Flammability Rating Oxygen Index: 28 to 34 Transistor Count > 4 kV > 200 V > 2 kV Pb Pkg Pb−Free Pkg Level 1 Level 1 Level 1 Level 1 Level 3 Level 1 UL 94 V−0 @ 0.125 in 140 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. http://onsemi.com 2 − MC100EP16VS Table 3. MAXIMUM RATINGS Symbol Rating Unit VCC PECL Mode Power Supply Parameter VEE = 0 V Condition 1 6 V VEE NECL Mode Power Supply VCC = 0 V −6 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 −6 V V Iout Output Current Continuous Surge 50 100 mA mA IBB VBB Sink/Source ± 0.5 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C JA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm 8 SOIC 8 SOIC 190 130 °C/W °C/W JC Thermal Resistance (Junction−to−Case) Standard Board 8 SOIC 41 to 44 °C/W JA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm 8 TSSOP 8 TSSOP 185 140 °C/W °C/W JC Thermal Resistance (Junction−to−Case) Standard Board 8 TSSOP 41 to 44 ± 5% °C/W JA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm DFN8 DFN8 129 84 °C/W °C/W Tsol Wave Solder <2 to 3 sec @ 248°C <2 to 3 sec @ 260°C 265 265 °C JC Thermal Resistance (Junction−to−Case) 35 to 40 °C/W Pb Pb−Free (Note 2) Condition 2 VI ≤ VCC VI ≥ VEE DFN8 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power) http://onsemi.com 3 MC100EP16VS Table 4. DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 3) −40°C Symbol Characteristic IEE Power Supply Current VOH Output HIGH Voltage (Max Swing) (Note 4) VCC ≥ VCTRL ≥ VEE VOL Output LOW Voltage (Max Swing) (Note 4) VCTRL ≤ VBB 85°C Typ Max Min Typ Max Min Typ Max Unit 30 36 42 31 38 44 32 40 48 mA 2405 2155 2405 2155 2405 mV 1605 1355 1605 1355 2155 1355 VCC ≥ VCTRL > VBB VCTRL = VCC (Min Swing) 25°C Min 1490 See Fig.2 2105 2230 1520 See Fig.2 2355 2095 2220 1520 1605 mV See Fig.2 2345 2065 2190 2315 VIH D, D Input HIGH Voltage (Single−Ended) 2075 2420 2075 2420 2075 2420 mV VIL D, D Input LOW Voltage (Single−Ended) 1355 1675 1355 1675 1355 1675 mV VBB Output Voltage Reference 1805 2005 1805 2005 1805 2005 mV VCTRL Input Voltage (VCTRL) VEE VCC VEE VCC VEE VCC mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 5) 2.0 2.9 2.0 2.9 2.0 2.9 V IIH Input HIGH Current 150 A IIL Input LOW Current 1905 150 D D 0.5 −150 1905 150 0.5 −150 0.5 −150 1905 A NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V. 4. All loading with 50 to VCC − 2.0 V. VOH does not change with VCTRL. VOL changes with VCTRL. VCTRL is referenced to VCC. 5. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. http://onsemi.com 4 MC100EP16VS Table 5. DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 6) −40°C Symbol Characteristic IEE Power Supply Current VOH Output HIGH Voltage (Note 7) VCC > VCTRL > VEE VOL Output LOW Voltage (Max Swing) (Note 7) VCTRL ≤ VBB 85°C Typ Max Min Typ Max Min Typ Max Unit 30 36 42 31 38 44 32 40 48 mA 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV 3055 3190 3305 3055 3220 3305 3055 3220 3305 mV VCC ≥ VCTRL > VBB VCTRL = VCC (Min Swing) 25°C Min See Fig.2 3805 3930 See Fig.2 4055 3795 3920 See Fig.2 4045 3765 3890 4015 VIH D, D Input HIGH Voltage (Single−Ended) 3775 4120 3775 4120 3775 4120 mV VIL D, D Input LOW Voltage (Single−Ended) 3055 3375 3055 3375 3055 3375 mV VCTRL Input Voltage (VCTRL) VEE VCC VEE VCC VEE VCC mV VBB Output Voltage Reference 3505 3705 3505 3705 3505 3705 mV VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 8) 4.6 2.0 4.6 2.0 4.6 V IIH Input HIGH Current 150 A IIL Input LOW Current 3605 2.0 150 D D 0.5 −150 3605 150 0.5 −150 0.5 −150 3605 A NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V. 7. All loading with 50 to VCC − 2.0 V. VOH does not change with VCTRL. VOL changes with VCTRL. VCTRL is referenced to VCC. 8. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. http://onsemi.com 5 MC100EP16VS Table 6. DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 9) −40°C Symbol Characteristic IEE Power Supply Current VOH Output HIGH Voltage (Note 10) VCC > VCTRL > VEE VOL Output LOW Voltage (Max Swing) (Note 10) VCTRL ≤ VBB 25°C Typ Max Min Typ Max Min Typ Max Unit 30 36 42 31 38 44 32 40 48 mA −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV −1945 −1810 −1695 −1945 −1780 −1695 −1945 −1780 −1695 mV VCC ≥ VCTRL > VBB See Fig.2 VCTRL = VCC (Min Swing) −1195 VIH D, D Input HIGH Voltage (Single−Ended) VIL See Fig.2 −945 −1205 −1225 −880 D, D Input LOW Voltage (Single−Ended) −1945 VBB Output Voltage Reference −1525 VCTRL Input Voltage (VCTRL) −1070 VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 11) IIH Input HIGH Current IIL Input LOW Current −1425 −1235 −1225 −880 −1225 −880 mV −1625 −1945 −1625 −1945 −1625 mV −1325 −1525 −1325 −1525 −1325 mV VCC VEE VCC VEE VCC mV −0.4 V 150 A VEE+2.0 −0.4 −1080 See Fig.2 −955 VEE −1425 VEE+2.0 −0.4 150 D D 85°C Min −1110 −1425 VEE+2.0 150 0.5 −150 0.5 −150 −985 0.5 −150 A NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. Input and output parameters vary 1:1 with VCC. 10. All loading with 50 to VCC − 2.0 V. VOH does not change with VCTRL. VOL changes with VCTRL. VCTRL is referenced to VCC. 11. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 7. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 12) −40°C Symbol Characteristic Min fmax Maximum Toggle Frequency (See Figure 6. Fmax/JITTER) tPLH, tPHL Propagation Delay to Output Differential Max Swing Min Swing tSKEW Typ 25°C Max Min >4 Max Min >4 Typ Max >4 Unit GHz ps 220 150 280 210 Duty Cycle Skew (Note 13) 5.0 tJITTER Cycle−to−Cycle Jitter (See Figure 6. Fmax/JITTER) VPP Input Voltage Swing (Differential Configuration) (Note 14) tr tf Output Rise/Fall Times (20% − 80%) Max Swing Q Min Swing Typ 85°C 150 90 150 90 220 150 280 210 20 5.0 0.2 <1 150 800 1200 70 30 120 80 170 130 160 100 240 160 300 220 20 5.0 20 ps 0.2 <1 0.2 <1 ps 150 800 1200 150 800 1200 mV 80 20 130 70 180 120 100 20 150 70 200 120 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 12. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 to VCC − 2.0 V. 13. Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. 14. VPP(min) is minimum input swing for which AC parameters are guaranteed. http://onsemi.com 6 MC100EP16VS 100 90 80 VSWING (%) 70 60 50 40 30 20 10 0 0.0 0.5 1.0 1.5 2.0 VOLTS (V) VPK−PK Figure 2. VCC − VCTRL (pin #1) VOH Min Swing Max Swing VOL 0.0 0.5 1.0 1.3 1.5 2.0 VOLTS (V) Figure 3. VCC − VCTRL VCTRL + 1 8 D 2 7 D 3 6 VCTRL VCC VSWING (pk−pk) Q Q 50 VBB 4 5 VEE VCC−2 V Figure 4. Voltage Source Implementation http://onsemi.com 7 50 MC100EP16VS +5 V 1 8 D 2 7 D 3 6 VCTRL VCC VSWING (pk−pk) Q Q 470 VBB 4 470 5 VEE 1000 10 900 9 VOUTpp (mV) 800 2.00 V Below VCC 700 8 7 1.25 V Below VCC 600 6 1.00 V Below VCC 500 5 0.75 V Below VCC 400 4 300 3 200 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0.25 V Below VCC 100 0 (JITTER) 0 500 1000 1500 2000 2500 3000 3500 2 1 4000 FREQUENCY (MHz) Figure 6. Fmax/Jitter Q Zo = 50 D Receiver Device Driver Device Q D Zo = 50 50 50 VTT VTT = VCC − 2.0 V Figure 7. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) http://onsemi.com 8 JITTEROUT ps (RMS) Figure 5. Alternative Implementation É É MC100EP16VS ORDERING INFORMATION Package Shipping† SOIC−8 98 Units / Rail MC100EP16VSDG SOIC−8 (Pb−Free) 98 Units / Rail MC100EP16VSDR2 SOIC−8 2500 / Tape & Reel MC100EP16VSDR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel MC3100EP16VSDT TSSOP−8 100 Units / Rail MC3100EP16VSDTG TSSOP−8 (Pb−Free) 100 Units / Rail MC100EP16VSDTR2 TSSOP−8 2500 / Tape & Reel MC100EP16VSDTR2G TSSOP−8 (Pb−Free) 2500 / Tape & Reel MC100EP16VSMNR4 DFN8 1000 / Tape & Reel DFN8 (Pb−Free) 1000 / Tape & Reel Device MC100EP16VSD MC100EP16VSMNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 9 MC100EP16VS PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AH −X− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N DIM A B C D G H J K M N S X 45 _ SEATING PLANE −Z− 0.10 (0.004) H D 0.25 (0.010) M Z Y S X M J S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 10 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 MC100EP16VS PACKAGE DIMENSIONS TSSOP−8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R−02 ISSUE A 8x 0.15 (0.006) T U 0.10 (0.004) S 2X L/2 L 8 5 1 PIN 1 IDENT 0.15 (0.006) T U K REF M T U S V 0.25 (0.010) B −U− 4 M A −V− S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S F DETAIL E C 0.10 (0.004) −T− SEATING PLANE D −W− G DETAIL E http://onsemi.com 11 DIM A B C D F G K L M MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_ MC100EP16VS PACKAGE DIMENSIONS DFN8 CASE 506AA−01 ISSUE D D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. A B PIN ONE REFERENCE ÇÇÇ ÇÇÇ ÇÇÇ ÇÇÇ 2X 0.10 C 2X TOP VIEW 0.10 C 0.08 C SEATING PLANE MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 −−− 0.25 0.35 A 0.10 C 8X DIM A A1 A3 b D D2 E E2 e K L E (A3) SIDE VIEW A1 C D2 e e/2 4 1 8X L E2 K 8 5 8X b 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 12 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC100EP16VS/D