AK5730VQ

ASAHI KASEI
[AKD5730-A]
AKD5730-A
AK5730VQ Evaluation Board Rev.2
GENERAL DESCRIPTION
The AKD5730-A is an evaluation board for AK5730VQ which have a 4-channel differential ADC with SAR
ADC for DC measurement. It is possible to control the setting of the board via an USB port. Stereo mini
jack supports inputs of Line and Microphone. This board also has a digital interface and can achieve the
interface with a digital audio system through an optical connector.
„ Ordering guide
AKD5730-A ---
Evaluation board for AK5730VQ
USB cable and control software are packed with this board
FUNCTION
† Analog audio input: Stereo-mini jack (x4)
† Digital audio output: Optical (x1), External (x1)
† USB port for the board control
AGND
AVDD DVDD
+5V
IN1P
IN1N
T2
(LDO 3.3V)
512fs
256fs
MCLK
AIN2
IN2P
IN2N
DGND
DVDD
AVDD
VSS1
AIN1
VSS2
T1
(LDO 3.3V)
D3.3V
AK5730
AIN3
IN3P
IN3N
AIN4
BICK
BICK
LRCK
LRCK
DIT
(AK4118A)
SDTO1
PORT2
DOUT(OPT)
DAUX
IN4P
IN4N
SCL
SDA
SDTO2
X’tal
PORT3
(USB)
PIC4550
PORT1
DOUT(DSP)
T3
(LDO 3.3V)
figure 1.AKD5730-A Block Diagram
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
Board Outline Chart
„Outline Chart
figure 2. Outline Chart
„ Description
(1) J1,J2,J3,J4（Analog data ）
Stereo-mini jack. Used for Analog audio input.
(2) J6,J7,J8,J9,J10(Power supply)
The AK5730 can be powered by external power supply or by Regulator (T1,T2) on the evaluation board.
(3) PORT1/PORT2（Digital Data）
PORT1：DSP output connector
PORT2：Optical output connector
(4) PORT3（USB Port）
A computer can control AK5730 with the AK5730 control software through this USB port.
(5) U1(AK5730)
4-Channel Differential Audio ADC for Mic & Line Inputs
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
(6) U2（AK4118A）
AK4118A is DIT, which transmits digital data of AK5730.
(7) U5(PIC18F4550)
USB control chip. It is possible to set up the registers of AK5730 with PC via the USB port.
(8) SW1(Toggle switch)
“H” ：PDN of AK5730 is Hi
“L” ：PDN of AK5730 is Lo
(9) SW2(Toggle switch)
“H” ：PDN of AK4118A is Hi
“L” ：PDN of AK4118A is Lo
(10) SW3(Dip switch)
Setting of AK5730 and AK4118A
Refer to Table4.
(11) LE1(Red LED)
LE1 is the sign of output for INT pin.
“H”：Turn off
“L”：Turn on
KM110002
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ASAHI KASEI
[AKD5730-A]
Evaluation Board Manual
„ Operation Sequence
1) Set up the Power Supply Lines.
2) Setup the Audio I/F Evaluation Mode.
(1) Evaluation of A/D using DIT of AK4118A.
(1-1) Slave Mode (Default)
(1-2) Master Mode
(1-3) PLL Slave Mode
(2) Evaluation of A/D using DSP.
(2-1) Slave Mode
(2-2) Master Mode
(2-3) PLL Slave Mode
3) Jumper pins and SW Setting.
(1) Setting of other jumper pins.
(2) Setting of SW.
4) Power on.
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
1) Set up the power Supplies
(1) When AVDD, DVDD, and D3.3V are supplied from the regulator. <Default>
JP14
DVDD
JP13
AVDD
T1
JP15
+D3.3V
T2
When using a T1：1-2 short
When using a T2：2-3 short (default)
Set up the power supply lines.
Name
Color
Setting
Comments
+5V
Yellow
+5V
Power supply for the regulator.
AVDD
Red
Open
Not used. Supplied through regulator
DVDD
Red
Open
Not used. Supplied through regulator
+D3.3V
Red
Open
Not used. Supplied through regulator
AGND
Black
0V
Ground for AK5730
DGND
Black
0V
Digital ground for Logic circuit.
Table 1 Setup of power supply
(2) When AVDD, DVDD, and D3.3V are supplied from the power supply connectors.
JP14
DVDD
JP13
AVDD
T1
JP15
+D3.3V
T2
Set up the power supply lines.
Name
Color
Setting
Comments
+5V
Yellow
Open
Not used.
AVDD
Red
+3.3V
Power supply for AVDD of AK5730
DVDD
Red
+3.3V
Power supply for DVDD of AK5730.
+D3.3V
Red
+3.3V
Power supply for logic circuit
AGND
Black
0V
Ground for AK5730
DGND
Black
0V
Digital ground for Logic circuit.
Table 2 Setup of power supply
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
2) Setup the Audio I/F Evaluation Mode.
In case of using the AK4118A when evaluating the AK5730, the audio interface format of the AK5730 and
AK4118A must be matched.
Refer to the datasheet for audio interface format of AK5730, and audio interface format of AK4118A. (Table 4)
The AK4118A operates at sampling frequency of 32 kHz or more. If the sampling frequency is lower than 32 kHz,
please use other mode.
Refer to the datasheet for register setting of the AK5730.
(1) Evaluation of A/D using DIT of AK4118A.
(1-1) Slave Mode. (Default).
PORT2 (TOTX) is used.
・PORT1: Open
・AK5730: Slave mode
・AK4118A: Master mode
・SW3(4118-DIF/ 5730-MSN) : “Lo”
L
EXT
256fs
512fs
EXT
H
256fs
JP10
512fs
SW3
/ 5730-MSN
4118-DIF1
MCLK, BICK and LRCK are supplied from AK4118A to AK5730. PORT2 outputs optical data of AK5730
through AK4118A. MCLK can be selected between 512fs and 256fs by JP10.
SDTO1 and SDTO2 can be selected by JP11.
JP11
OR
OR
STDO1
Master/Slave Select
STDO1
SDTO2
SDTO2
SDTO Select
MCLK Select
(1-2) Master Mode
PORT2 (TOTX) is used.
・PORT1: Open
・AK5730: Master mode
・AK4118A: Slave mode
・SW3(4118-DIF/ 5730-MSN) : “Hi”
L
EXT
256fs
512fs
EXT
256fs
512fs
EXT
256fs
H
JP10
512fs
SW3
/ 5730-MSN
4118-DIF1
MCLK is supplied from AK4118A or X1 to AK5730. LRCK, BICK, SDTO1 and SDTO2 of AK5730 are
outputs to AK4118A. PORT2 outputs optical data of AK5730 through AK4118A. MCLK can be selected
between 512fs and 256fs by JP10. SDTO1 and SDTO2 can be selected by JP11.
JP11
OR
OR
OR
ST DO1
Master/Slave Select
SDT O2
ST DO1
SD TO2
SDT O Select
M CLK Select
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
(1-3) PLL Slave Mode (BICK 64fs input mode only)
PORT2 (TOTX) is used.
・PORT1: Open
・AK5730: PLL slave mode
・AK4118A: Master mode
・SW3(4118-DIF/ 5730-MSN) : “Lo”
EXT
H
256fs
JP10
512fs
SW3
/ 5730-MSN
4118-DIF1
BICK and LRCK are supplied from AK4118A to AK5730. PORT2 outputs optical data of AK5730 through
AK4118A. MCLK is generated from BICK. SDTO1 and SDTO2 can be selected by JP11.
JP11
L
OR
STDO1
Master/Slave Select
SDTO2
STDO1
SDTO2
SDTO Select
MCLK Select
(2) Evaluation of A/D using PORT1 (DSP)
(2-1)
Slave Mode.
PORT1 (DSP) is used.
・SW2: “Lo” (AK4118A is not used)
・AK5730: Slave mode
・SW3(4118-DIF/ 5730-MSN) : “Lo”
4118-PDN
Master/Slave Select
MCLK
BICK
LRCK
SDTO1
5
6
PDN of AK4118A
KM110002
GND
10
GND
L
GND
H
L
GND
H
SDTO2
SW2
PORT1
TDMI
SW3
/ 5730-MSN
4118-DIF1
MCLK, BICK and LRCK are supplied from PORT1 to AK5730. SDTO1 and SDTO2 of AK5730 are outputs
to PORT1.
2012/02
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ASAHI KASEI
(2-2)
[AKD5730-A]
Master Mode.
PORT1 (DSP) is used.
・SW2: “Lo” (AK4118A is not used)
・AK5730: Master mode
・SW3(4118-DIF/ 5730-MSN) : “Hi”
MCLK
LRCK
BICK
SDTO1
SDTO2
5
6
GND
PDN of AK4118A
GND
10
GND
L
GND
H
L
PORT1
TDMI
SW2
H
Master/Slave Select
(2-3)
4118-PDN
SW3
/ 5730-MSN
4118-DIF1
MCLK is supplied from PORT1. LRCK, BICK , SDTO1 and SDTO2 of AK5730 are outputs to PORT1.
.
PLL Slave Mode.
PORT1 (DSP) is used.
・SW2: “Lo” (AK4118A is not used)
・AK5730: PLL slave mode
・SW3(4118-DIF/ 5730-MSN) : “Lo”
4118-PDN
Master/Slave Select
MCLK
BICK
LRCK
SDTO1
5
6
PDN of AK4118A
KM110002
GND
10
GND
L
GND
H
L
GND
H
SDTO2
SW2
PORT1
TDMI
SW3
/ 5730-MSN
4118-DIF1
BICK and LRCK are supplied from PORT1. SDTO1 and SDTO2 of AK5730 are outputs to PORT1.
MCLK is generated from BICK.
2012/02
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ASAHI KASEI
[AKD5730-A]
3) Jumper pins and SW Setting.
(1) Setting of other jumper pins.
JP1, JP2 (AIN1 selector): The selection of input signal to IN1P pin and IN1N pin.
・JP1 dif : Full differential mode. < Default >
sin : Single-ended mode.
・JP2 open : Full differential mode. < Default >
short : Single-ended mode.
JP3, JP4 (AIN2 selector): The selection of input signal to IN2P pin and IN2N pin.
・JP3 dif : Full differential mode. < Default >
sin : Single-ended mode.
・JP4 dif : Full differential mode. < Default >
sin : Single-ended mode.
JP5, JP6 (AIN3 selector): The selection of input signal to IN3P pin and IN3N pin.
・JP5 dif : Full differential mode. < Default >
sin : Single-ended mode.
・JP6 open : Full differential mode. < Default >
short : Single-ended mode.
JP7, JP8 (AIN4 selector): The selection of input signal to IN4P pin and IN4N pin.
・JP7 dif : Full differential mode. < Default >
sin : Single-ended mode.
・JP8 dif : Full differential mode. < Default >
sin : Single-ended mode.
JP9 (TDM selector): The selection of TDM mode.
・JP9 open : When using TDM-mode .
short : When not using TDM-mode. < Default >
(2) Setting of SW.
Upper-side is “ON(H)” and lower-side is “OFF(L)”.
[SW3] (SW DIP-6): Mode setting for AK5730 and AK4118A.
No.
1
2
3
4
5
6
Name
ON (“H”)
OFF (“L”)
5730-SPI
SPI
I2C
Reserved
4118DIF1/
See Table 4
5730-MSN
See Table 5
4118-DIF0
4118-OCKS0
See Table 6
4118-OCKS1
Table 3. Mode setting for AK5730 and AK4118A
KM110002
Default
OFF
OFF
OFF
ON
OFF
ON
2012/02
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ASAHI KASEI
[AKD5730-A]
Mode
DIF1
DIF0
DAUX
SDTO
0
1
2
3
4
5
L
L
H
H
L
L
L
H
L
H
L
H
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, I2S
16bit, Right justified
18bit, Right justified
20bit, Right justified
24bit, Right justified
24bit, Left justified
24bit, I2S
LRCK
I/O
H/L
O
H/L
O
H/L
O
H/L
O
H/L
O
L/H
O
6
H
L
24bit, Left justified
24bit, Left justified
H/L
I
7
H
H
24bit, I2S
24bit, I2S
L/H
I
BICK
I/O
64fs
O
64fs
O
64fs
O
64fs
O
64fs
O
64fs
O
64
-128
I
fs
64
-128
I
fs
(Default)
Table 4.Audio I/F Format Setting for AK4118A
No.
Name
ON (“H”)
1
4118DIF/
5730-MSN
OFF (“L”)
AK5730 ： “Master Mode”
AK5730 ： “Slave Mode”
AK4118A： “Slave Mode”
AK4118A： “Master Mode”
Table 5.Master Clock setting for AK4118A
No.
OCKS1
OCKS0
0
1
2
3
0
0
1
1
0
1
0
1
MCKO1
MCKO2
X’tal
256fs
256fs
256fs
256fs
128fs
256fs
512fs
256fs
512fs
128fs
64fs
128fs
Table 6.Master Clock setting for AK4118A
Default
OFF
fs (max)
96 kHz
96 kHz
48 kHz
192 kHz
(default)
4) Power on.
Upper-side is “H” and lower-side is “L”.
[SW1] (5730-PDN)
: The AK5730 should be reset once bringing “L” upon power-up.
Keep “H” during normal operation.
[SW2] (4118-PDN)
: The AK4118A should be reset once bringing “L” upon power-up.
Keep “H” during normal operation.
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
Control Soft Manual
■ Evaluation Board and Control Soft Settings
1. Set an evaluation board properly.
2. Connect Evaluation board to PC with USB cable.
USB control is recognized as HID (Human Interface Device) on the PC.
When it can not be recognized correctly please reconnect Evaluation board to PC with USB cable.
3. Proceed evaluation by following the process below.
[Support OS]
Windows XP / Vista / 7 (32bit) (XP compatible mode is recommended for Vista / 7)
64bit OS’s are not supported
■ Operation Screen
1. Start up the control program following the process above.
2. After the evaluation board’s power is supplied, the AK5730 must be reset once bring S1 (AK5730-PDN) “L” to “H”.
3. The operation screen is shown below
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
■ Operation Overview
Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs.
Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching
tab window. Refer to the “■ Dialog Boxes” for details of each dialog box setting.
1. [Port Reset]: For when connecting to PC with USB cable
Click this button after the control soft starts up when connecting to PC with USB cable.
2. [Write Default]: Register Initializing
When the device is reset by a hardware reset, use this button to initialize the registers.
3. [All Write]: Executing write commands for all registers displayed.
4. [All Read]: Executing read commands for all registers displayed.
5. [Save]: Saving current register settings to a file.
6. [Load]: Executing data write from a saved file.
7. [All Reg Write]: [All Reg Write] dialog box is popped up.
8. [Data R/W]: [Data R/W] dialog box is popped up.
9. [Read]: Reading current register settings and display on to the Register area (on the right of the main window).
This is different from [All Read] button, it does not reflect to a register map, only displaying hexadecimal.
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
■ Tab Functions
1. [REG]: Register Map
This tab is for a register writing and reading.
Each bit on the register map is a push-button switch.
Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)
Grayout registers are Read Only registers. They can not be controlled.
The registers which is not defined in the datasheet are indicated as “---”.
Figure 3. Window of [ REG]
KM110002
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ASAHI KASEI
[AKD5730-A]
1-1. [Write]: Data Writing Dialog
It is for when changing two or more bits on the same address at the same time.
Click [Write] button located on the right of the each corresponded address for a pop-up dialog box.
When the checkbox is checked, the data will be “H” or “1”. When the checkbox is not checked, the data will be “L”
or “0”. Click [OK] to write setting values to the registers, or click [Cancel] to cancel this setting.
figure 4. Window of [ Register Set ]
1-2. [Read]: Data Read
Click [Read] button located on the right of the each corresponded address to execute a register read.
After register reading, the display will be updated regarding to the register status.
Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Button Up indicates “L” or “0” and the bit name is in blue (when read only it is in gray)
Please be aware that button statuses will be changed by a Read command.
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
2. [Tool]: Testing Tools
Evaluation testing tools are available in this tab.
Click buttons for each testing tool.
Figure 5. Window of [ Tool ]
KM110002
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ASAHI KASEI
[AKD5730-A]
2-1. [Repeat Test]: Repeat Test Dialog
Click [Repeat Test] button in the Test tab to open a repeat test dialog shown below.
Repeat writing test can be executed by this dialog.
Figure 6. Window of [ Repeat Test ]
[Start] Button
: Starts the repeat test.
A dialog for saving a file of the test result will open when clicking this button.
Name the file.
Test will start after specifying a saving file.
[Close] Button
: Closes this dialog and finishes the process.
[Address] Box
: Data writing address in hexadecimal numbers.
[Start Data] Box
: Start data in hexadecimal numbers.
[End Data] Box
: End data in hexadecimal numbers.
[Step] Box
: Data write step interval.
[Repeat Count] Box : Repeat count of the test writing.
[Up and Down] Box : Data write flow is changed as below.
• Checked: Writes in step interval from the start data to the end data and turn back from the end data to
the start data.
[Example]
Start Data = 00, End Data = 05, Step = 1, [ ]…for 1 count.
Data flow:
[00→01→02→03→04→05→05→04→03→02→01→00] x Repeat Count Number
• Not checked: Writes in step interval from the start data to the end data and finishes writing.
[Example]
Start Data = 00, End Data = 05, Step = 1, [ ]…for 1 count.
Data flow:
[00→01→02→03→04→05] x Repeat Count Number
[Sampling Frequency] Box: Selects sampling frequency 44.1kHz/48kHz
[Count] Box
: Indicates the count number during a repeat test.
[Lch Level] Box
: Indicates the Lch Level during a repeat test.
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
2-2. [Loop Setting]: Loop Dialog
Click [Loop Setting] button in the Tool tab to open loop setting dialog as shown below.
Writing test can be executed.
Figure 7. Window of [ Loop ]
[ OK ] Button
[ Cancel ] Button
[ Address ] Box
[ Start Data ] Box
[ End Data ] Box
[ Interval ] Box
[ Step ] Box
[ Mode Select ] Box
: Starts the test.
: Closes the dialog and finishes the process.
: Data writing address in hexadecimal numbers.
: Start data in hexadecimal numbers.
: End data in hexadecimal numbers.
: Data write interval time.
: Data write step interval.
: Mode select check box.
• Checked:
Writes in step interval from the start data to the end data and turn back from the end data
to the start data.
[Example]
Start Data = 00, End Data = 05, Step = 1
Data flow: 00→01→02→03→04→05→05→04→03→02→01→00
• Not Checked: Writes in step interval from the start data to the end data and finishes writing.
[Example]
Start Data = 00, End Data = 05, Step = 1
Data flow:
00→01→02→03→04→05
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
■ Dialog Boxes
1. [All Req Write]: All Reg Write dialog box
Click [All Reg Write] button in the main window to open register setting files.
Register setting files saved by [SAVE] button can be applied.
Figure 8. Window of [ All Reg Write ]
[Open (left)]: Selects a register setting file (*.akr).
[Write]: Executes register writing by the setting of selected file.
[Write All]: Executes all register writings.
Selected files are executed in descending order.
[Help]: Opens a help window.
[Save]: Saves a register setting file assignment. The file name is “*.mar”.
[Open (right)]: Opens a saved register setting file assignment “*. mar”.
[Close]: Closes the dialog box and finish the process.
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
~ Operating Suggestions ~
1.
2.
Those files saved by [Save] button and opened by [Open] button on the right of the dialog “*.mar” should be
stored in the same folder.
When register settings are changed by [Save] button in the main window, re-read the file to reflect new register
settings.
2. [Data R/W]: Data R/W Dialog Box
Click the [Data R/W] button in the main window for data read/write dialog box.
Data write is available to specified address.
Figure 9. Window of [ Data R/W ]
[Address] Box: Input data address in hexadecimal numbers for data writing.
[Data] Box : Input data in hexadecimal numbers.
[Mask] Box : Input mask data in hexadecimal numbers.
This is “AND” processed input data.
[Write]: Writs the data generated from Data and Mask values to the address specified by “Address” box.
[Read]: Reads data from the address specified by “Address” box.
The result will be shown in the Read Data Box in hexadecimal numbers.
[Close]: Closes the dialog box and finishes the process.
Data writing can be cancelled by this button instead of executing a write command.
*The register map will be updated after executing [Write] or [Read] commands.
KM110002
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ASAHI KASEI
[AKD5730-A]
MEASUREMENT RESULT
[Measurement condition]
• Measuring instrument: Audio Precision System Two Cascade
• MCLK
: 512fs
• BICK
: 64fs
• fs
: 48 kHz
• Bit
: 24bit
• Power Supply（REG）: AVDD = 3.3V, DVDD = 3.3V
• Measurement mode : Slave mode
• Temperature
: Room temperature
[Measurement result]
min
typ
max
ADC1
ADC2
ADC
3
ADC4
Units
S/(N+D) ( 0.5dBFS Differential.)
S/(N+D) ( 0.5dBFS Single-ended. )
S/(N+D) ( 0.5dBFS Gain mode.)
86
86
86
92
92
92
-
93.6
92.0
93.1
93.1
93.0
93.2
94.0
92.8
93.5
94.0
93.0
93.4
dB
dB
dB
D-Range ( 60dBFS, A-weighted Differential.)
D-Range ( 60dBFS, A-weighted
Single-ended.)
D-Range ( 60dBFS, A-weighted Gain mode.)
93
92
100
99
-
100.0
100.3
100.2
100.0
dB
99.1
99.2
99.7
99.2
dB
92
98
-
99.0
99.1
99.0
99.0
dB
S/N (A-weighted Differential.)
S/N (A-weighted Single-ended. )
S/N (10mVrms input, A-weighted Gain mode.)
93
92
57
100
99
63
-
100.0
99.2
63.9
100.3
99.3
64.2
100.1
99.7
64.1
100.3
99.3
63.9
dB
dB
dB
KM110002
2012/02
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ASAHI KASEI
[AKD5730-A]
[ADC Plots]
■Differential mode
Red ：IN1P/ IN1N→ADC1→SDTO1
Blue：IN2P/ IN2N→ADC2→SDTO1
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
FFT (fin=1 kHz, Input level = ‐0.5dBFS)
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
Hz
FFT (fin=1 kHz, Input level = ‐60dBFS)
KM110002
2012/02
- 21-
ASAHI KASEI
[AKD5730-A]
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
FFT (fin=1 kHz, Input level = No Input)
-50
-55
-60
-65
-70
-75
d
B
F
S
-80
-85
-90
-95
-100
-105
-110
-115
-120
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
THD+N VS. Input level (fin=1 kHz)
KM110002
2012/02
- 22-
ASAHI KASEI
[AKD5730-A]
-50
-55
-60
-65
-70
-75
d
B
F
S
-80
-85
-90
-95
-100
-105
-110
-115
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
THD+N VS. Input Freq (Input level = -0.5dBFS)
+0
T TTT T TT
TT
-10
-20
-30
-40
-50
d
B
F
S
-60
-70
-80
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Linearity (fin=1 kHz)
KM110002
2012/02
- 23-
ASAHI KASEI
[AKD5730-A]
+0
-0.1
-0.2
-0.3
-0.4
d
B
F
S
-0.5
-0.6
-0.7
-0.8
-0.9
-1
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Frequency Response (Input level = ‐0.5dBFS)
-60
T TTTT
T TTT
TT TT TT T TT
T
-65
-70
-75
-80
-85
-90
-95
-100
d
B
-105
-110
-115
-120
-125
-130
-135
-140
-145
-150
20
50
100
200
500
1k
2k
Hz
Crosstalk (Input level = -0.5dBFS)
KM110002
2012/02
- 24-
ASAHI KASEI
[AKD5730-A]
■Single-ended mode
Red ：IN1P→ADC1→SDTO1
Blue：IN2P→ADC2→SDTO1
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
FFT (fin=1 kHz, Input level = -0.5dBFS)
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
Hz
FFT (fin=1 kHz, Input level = ‐60dBFS)
KM110002
2012/02
- 25-
ASAHI KASEI
[AKD5730-A]
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
FFT (fin=1 kHz, Input level = No Input)
-50
-55
-60
-65
-70
-75
d
B
F
S
-80
-85
-90
-95
-100
-105
-110
-115
-120
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
THD+N VS. Input level (fin=1 kHz)
KM110002
2012/02
- 26-
ASAHI KASEI
[AKD5730-A]
-50
-55
-60
-65
-70
-75
d
B
F
S
-80
-85
-90
-95
-100
-105
-110
-115
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
THD+N VS. Input Freq (Input Level = -0.5dBFS)
+0
T T
T T
-10
-20
-30
-40
-50
d
B
F
S
-60
-70
-80
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Linearity (fin=1 kHz)
KM110002
2012/02
- 27-
ASAHI KASEI
[AKD5730-A]
+0
-0.1
-0.2
-0.3
-0.4
d
B
F
S
-0.5
-0.6
-0.7
-0.8
-0.9
-1
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Frequency Response (Input level = -0.5dBFS)
-60
TTT
TTTTTTTT
T TTTTT
TTTTTTTTT
T TTTT TTTT
TT TTTTTTT
TTTT T T
TT T
-65
-70
-75
-80
-85
-90
-95
-100
d
B
-105
-110
-115
-120
-125
-130
-135
-140
-145
-150
20
50
100
200
500
1k
2k
Hz
Crosstalk (Input level = -0.5dBFS)
KM110002
2012/02
- 28-
ASAHI KASEI
[AKD5730-A]
■Gain mode
Red ：IN1P/ IN1N→ADC1→SDTO1
Blue：IN2P/ IN2N→ADC2→SDTO1
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
FFT (fin=1 kHz, Input level = -0.5dBFS)
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
Hz
FFT (fin=1 kHz, Input level = －6０dBFS)
KM110002
2012/02
- 29-
ASAHI KASEI
[AKD5730-A]
+0
-10
-20
-30
-40
-50
-60
d
B
F
S
-70
-80
-90
-100
-110
-120
-130
-140
-150
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
FFT (fin=1 kHz, Input level =10mVrms)
-50
-55
-60
-65
-70
-75
d
B
F
S
-80
-85
-90
-95
-100
-105
-110
-115
-120
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
dBr
THD+N VS. Input level (fin=1 kHz)
KM110002
2012/02
- 30-
ASAHI KASEI
[AKD5730-A]
-50
-55
-60
-65
-70
-75
d
B
F
S
-80
-85
-90
-95
-100
-105
-110
-115
-120
20
50
100
200
500
1k
2k
5k
10k
20k
Hz
THD+N VS. Input Freq (Input Level = -0.5dBFS)
+0
T
T T TT
-10
-20
-30
-40
-50
d
B
F
S
-60
-70
-80
-90
-100
-110
-120
-130
-140
-140
-130
-120
-110
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
+0
dBr
Linearity (fin=1 kHz)
KM110002
2012/02
- 31-
ASAHI KASEI
[AKD5730-A]
+0
-0.1
-0.2
-0.3
-0.4
d
B
F
S
-0.5
-0.6
-0.7
-0.8
-0.9
-1
20
50
100
200
500
1k
2k
5k
10k
20k
5k
10k
20k
Hz
Frequency Response (Input level = -0.5dBFS)
-60
TTT
TTT
T TT
TTT
TT
T
T
-65
-70
-75
-80
-85
-90
-95
-100
d
B
-105
-110
-115
-120
-125
-130
-135
-140
-145
-150
20
50
100
200
500
1k
2k
Hz
Crosstalk (Input level = -0.5dBFS)
KM110002
2012/02
- 32-
ASAHI KASEI
[AKD5730-A]
Revision History
Date
(yy/mm/dd)
12/02/02
Manual
Revision
KM11000
Board
Revision
0
Reason
Page
Contents
First Edition
12/11/15
KM11001
1
Change
Device revision was changed. Rev. A Æ Rev. B
13/01/28
KM11002
2
Change
Device revision was changed. Rev. B Æ Rev. C
IMPORTANT NOTICE
z These products and their specifications are subject to change without notice.
When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei
Microdevices Corporation (AKM) or authorized distributors as to current status of the products.
z Descriptions of external circuits, application circuits, software and other related information contained in this
document are provided only to illustrate the operation and application examples of the semiconductor products. You
are fully responsible for the incorporation of these external circuits, application circuits, software and other related
information in the design of your equipments. AKM assumes no responsibility for any losses incurred by you or third
parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent,
intellectual property, or other rights in the application or use of such information contained herein.
z Any export of these products, or devices or systems containing them, may require an export license or other official
approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange,
or strategic materials.
z AKM products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or
other hazard related device or systemNote2), and AKM assumes no responsibility for such use, except for the use
approved with the express written consent by Representative Director of AKM. As used here:
Note1) A critical component is one whose failure to function or perform may reasonably be expected to result,
whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and
which must therefore meet very high standards of performance and reliability.
Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety
or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or
perform may reasonably be expected to result in loss of life or in significant injury or damage to person or
property.
z It is the responsibility of the buyer or distributor of AKM products, who distributes, disposes of, or otherwise places
the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer
or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all
claims arising from the use of said product in the absence of such notification.
KM110002
2012/02
- 33-
2
1
IN1N
IN1P
3
IN2P
4
IN2N
5
2k
R4
IN4P-MPWR
2k
R3
IN3P-MPWR
2k
R2
IN2P-MPWR
1
2k
R1
820k
R12
IN1P-MPWR
2
3
4
5
360k
D
C7
R22
2.2u
VSS2
37
VSS1
38
2.2u
40
C6
41
1u
C2
39
0
R10
1u
C5
42
R21
44
VSS1
43
C1
VSS1
0
820k
R9
360k
1u
R20
45
C4
46
R18
open
1u
C3
47
VSS1
48
R19
1u
open
R11
820k
R8
IN1N-MPWR
0
R7
360k
360k
R16
R15
R14
R13
R17
CN2
IN1P-MPWR
6
7
8
9
10
IN2P-MPWR
11
IN2N-MPWR
0
IN1N-MPWR
R6
IN2N-MPWR
2k
820k
IN3N-MPWR
2k
R5
IN4N-MPWR
2k
D
2k
12
CN1
48pin_1
CN3
1
1
VSS1
R23
R24
2
C
CP2
CVP2
NC
INM1P
IN1P
IN1N
INM1N
VREF
INM2P
IN2P
IN2N
INM2N
VSS1
C8
VREFL
MPWR
36
12
DVDD
11
DVDD
10
DVDD
9
DVDD
8
DVDD
7
DVDD
6
VSS2
5
VSS2
1uF
360k
2
820k
INM3P
NC
U1
VSS1
35
C
IN3P-MPWR
C10
C9
IN3P
R25
3
3
0
IN3P
CVP1
34
1u
2.2u
R26
open
C11
IN3N
R27
4
VSS2
4
0
IN3N
CP1
INM3N
CN1
33
1u
IN3N-MPWR
R28
5
5
820k
R29
C12
2.2u
32
360k
R30
5730-MSN
6
6
R31
7
R32
820k
R33
0
AK5730
MSN
360k
7
DVDD
31
(Short)
C13
0.1u
INM4P
VSS2
+ C14
10u
30
IN4P-MPWR
C15
IN4P
8
8
IN4P
NC
29
VSS2
1u
B
B
R34
open
C16
IN4N
R35
9
9
0
VSS1
R36
10
10
820k
R37
VSS1
IN4N
CN2
28
4
VSS2
3
VSS2
1u
IN4N-MPWR
INM4N
NC
27
360k
11
11
VSS1
SCL / CCLK
26
2
SCL/CCLK
1
SDA/CDTI
TP1
C17
0.1u
25
24
INT
SDTO2
23
SDTO1
22
LRCK
21
BICK
20
19
TDMI
MCLK
SDA / CDTI
18
CAD1 / CDTO
17
48pin_1
16
13
R39
360k
PDN
VBATM
15
12
2M
SPI
R38
CAD0 / CSN
VBAT
14
12
AVDD
VSS1
VSS1
48pin_1
R40
R48
R44
51
R45
51
R46
51
R47
51
7
8
9
10
11
12
BICK
LRCK
SDTO1
SDTO2
INT
6
TDMI
MCLK
5
A
CAD1/CDTO
2
AVDD
R43
51
10K
4
1
AVDD
A
R42
51
CAD0/CSN
+
R41
open
3
open
5730-PDN
10u
5730-SPI
C18
VSS1
CN4
48pin_1
Title
ADK5730-A
- 34-
Size
A2
Date:
5
4
3
2
Document Number
Rev
AK5730
2
Wednesday, January 30, 2013
1
Sheet
1
of
6
5
4
3
IN1P
J1
1
AGND
JP1
D
5
DIFF
2
1
SIN
IN1N
D
GND
AGND
AGND
MJ-352W-0
JP2
AIN1
2
AGND
J2
JP3
5
DIFF
2
1
SIN
IN2P
AIN2 MJ-352W-0
JP4
DIFF
C
AGND
C
IN2N
SIN
IN3P
J3
JP5
5
DIFF
2
1
SIN
IN3N
AIN3 MJ-352W-0
B
JP6
AGND
B
AGND
J4
JP7
5
DIFF
2
1
SIN
IN4P
AIN4 MJ-352W-0
JP8
DIFF
AGND
IN4N
SIN
A
A
Title
ADK5730-A
- 35-
Size
A4
Date:
5
4
3
2
Document Number
Rev
2
AIN
Wednesday, January 30, 2013
Sheet
2
1
of
6
5
4
3
2
1
D3.3V
D
D
+
C19
10u
C20
DGND
0.1u
R49
10k
C21
5
4118-DIF1
6
7
OCKS1/CCLK/SCL
TEST2
CM1/CDTI/SDA
DIF1/RX6
CM0/CDTO/CAD1
U2
VSS1
PDN
AK4118A
DIF2/RX7
34
4118-OCKS1
XTO
BICK
LRCK
SDTO1
SDTO2
TP4
TP5
TP6
33
32
10PIN-PORT
DGND
D3.3V
31
30
29
10
9
8
7
6
4118-PDN
JP10
EXT
XTL256fs
XTL512fs
10p
10
P/SN
DAUX
XTL0
MCKO2
28
TDMI
C
R50
10k
JMP2x3
C23
9
AGND
2
IPS1/IIC
MCLK
PORT1
1
2
3
4
5
MCLK
BICK
LRCK
SDTO1
SDTO2
X1
24.576MHz
8
TP3
4118-OCKS0
C22
XTI
TP2
38
37
INT1
R
AVDD
39
40
VCOM
41
VSS3
42
RX0
43
NC
44
RX1
45
TEST1
46
RX2
47
DIF0/RX5
35
TDM-SEL
4
OCKS0/CSN/CAD0
JP9
3
4118-DIF0
NC
36
DAUX-SEL
C
INT0
JP11
2
IPS0/RX4
1
1
VSS4
RX3
48
0.47u
10p
AGND
DGND
27
B
B
C25
0.1u
0.1u
C26
10u
C27
10u
26
LRCK
25
24
MCKO1
23
22
VSS2
DVDD
C24
+
21
VOUT/GP7
20
UOUT/GP6
19
COUT/GP5
18
17
TX1/GP3
16
15
14
13
SDTO
+
D3.3V
TX0/GP2
VIN/GP0
BOUT/GP4
BICK
TVDD
12
XTL1
NC/GP1
11
AGND
A
A
DGND
AGND
PORT2
IN
VCC
GND
3
2
C28
1
D3.3V
Title
0.1u
AKD5730-A
- 36-
Size
A3
TOTX
Date:
DGND
5
4
3
2
Document Number
Rev
2
DIT
Wednesday, January 30, 2013
Sheet
1
3
of
6
5
4
3
2
1
DVDD
A
D1
HSU119
10k
1
2
3
4
5
6
7
1
3
H
SW1
2
C30
0.1u
5730-PDN
5730-PDN
U3
D
L
0
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
14
13
12
11
10
9
8
DVDD
AVDD
C29
0.1u
D
DVDD
4118-PDN
H
6
5
4
3
2
1
K
R51
R52
SW3
SW DIP-6
74HC14
L
7
8
9
10
11
12
AGND
AGND
DVDD
K
5730-SPI
A
D2
HSU119
3
1
R53
4118-DIF0
4118-DIF1
5730-MSN
4118-OCKS0
4118-OCKS1
10k
C
L
6
5
4
3
2
1
SW2
C31
2
4118-PDN
C
H
AGND
0.1u
AGND
RP1
R-PACK6R
B
B
R54
LE1
DVDD
Red
AGND
INT
1k
INT
AGND
A
A
Title
AKD5730-A
- 37-
Size
A4
Date:
5
4
3
2
Document Number
Rev
2
LOGIC
Wednesday, January 30, 2013
Sheet
4
1
of
6
AGND
AGND
DGND
DGND
DGND
DGND
AVDD
AVDD
AVDD
DVDD
DVDD
DVDD
TP9
TP10
TP19
TP20
TP21
TP22
TP11
TP12
TP13
TP14
TP15
TP16
1
AGND
2
TP8
3
AGND
4
TP7
5
D
D
+5V
AGND
AVDD
DGND
DVDD
JP12
+
AGND
C32
GND
DGND
AGND
47u
AVDD
VSS2
T1
LM1117IDTX-3.3
IN
OUT
JP13
AVDD
L1
(short)
3
1
2
AGND
AVDD
DGND
1
1
GND
AGND
VSS1
2
C
C34
10u
C35
0.1u
C36
0.1u
+
C37
10u
+5V
1
J5
2
+
C
+
C33
47u
+5V
AGND
AVDD
1
J6
DVDD
JP14
1
DVDD
2
DVDD
DVDD
DVDD
+
2
C38
47u
1
J7
1
AGND
AVDD
L2
(short)
1
J8
AGND
B
B
AGND
AGND
IN
OUT
D3.3V
JP15
D3.3V
L3
(short)
3
1
D3.3V
2
D3.3V
2
D3.3V
C40
10u
C41
0.1u
C42
0.1u
+
+
C39
47u
C43
10u
1
J9
2
+
1
J10
1
1
GND
T2
LM1117IDTX-3.3
DGND
DGND
DGND
A
A
DGND
Title
AKD5730-A
- 38-
Size
A4
Date:
5
4
3
2
Document Number
Rev
2
Power Supply
Wednesday, January 30, 2013
Sheet
5
1
of
6
5
4
3
2
1
D
D
R55
C44
10
8
6
4
2
4.7k
2.2u
(open)
PORT4
9
7
5
3
1
CSN
SCL/CCLK
SDA/CDTI
CDTO
10pin-CTRL
51(open)
51(open)
51(open)
+
+
C45
10u
C
DGND
SILK-SCREEN
1:VDD
2:MCLR
3:PGD
4:PGC
5:GND
17
16
15
14
11
10
9
8
38
39
40
41
2
3
4
5
B
PORT3
VUSB
DD+
GND
USB(B type)
1
2
3
4
R67
R68
0
0
42
43
44
1
10k
TP17
TP18
SDL
SDA
C
NC/ICCK/ICPGC
NC/ICDT/ICPGD
NC/ICRST_N/ICVpp
NC/ICPORTS
PIC18F4550
TQFP 44-PIN
RD0/SPP0
RD1/SPP1
RD2/SPP2
RD3/SPP3
RD4/SPP4
RD5/SPP5/P1B
RD6/SPP6/P1C
RD7/SPP7/P1D
U5
RC0/T1OSO/T13CKI
RC1/T1OSI/CCP2/UOE_N
RC2/CCP1/P1A
RC4/D-/VM
RC5/D+/VP
RC6/TX/CK
RC7/RX/DT/SDO
51
R62
51
SCL/CCLK
SDA/CDTI
VDD0
6
VSS0
VDD1
MCLR_N/Vpp/RE3
RB7/KBI3/PGD
RB6/KBI2/PGC
RB5/KBI1/PGM
RB4/AN11/KBI0/CSSPP
RB3/AN9/CPP2/VPO
RB2/AN8/INT2/VMO
RB1/AN10/INT1/SCK/SCL
RB0/AN12/INT0/FLT0/SDI/SDA
R61
CAD1/CDTO
OSC1/CLKI
OSC2/CLKO/RA6
RE0/AN5/CK1SPP
RE1/AN6/CK2SPP
RE2/AN7/OESPP
VUSB
32
35
36
R60
10k
7
0.1u
28
C48
0.1u
29
C47
VSS1
1
2
3
4
5
R59
DGND
1u
JP16
CAD0/CSN
DVDD
C46
10u
DGND
C49
R56
R57
R58
NC
NC
Vin
Vout
Vcont PCL
NC
GND
T3
5V => 3.3V
DGND
8
7
6
5
TK73633AME
1
2
3
4
DGND
18
USB-RST
12
13
33
34
30
31
C50
R63
0.1u
100k
XTI
XTO
25
26
27
C52
22p
X2
20MHz
C53
22p
B
37
C54
470n
19
20
21
22
23
24
R72
R64
R65
R66
51
51
51
51
DGND
RA0/AN0
RA1/AN1
RA2/AN2/Vref-/CVref
RA3/AN3/Vref+
RA4/T0CKI/C1OUT/RCV
RA5/AN4/SS_N/HLVDIN/C2OUT
CAD0/CSN
SCL/CCLK
SDA/CDTI
CAD1/CDTO
DGND
PIC18F4550
A
A
Title
AKD5730-A
- 39-
Size
A3
Date:
5
4
3
2
Document Number
Rev
2
uP-I/F
Wednesday, January 30, 2013
Sheet
1
6
of
6
- 40-
- 41-
- 42-
- 43-
- 44-
- 45-