[AP1029ADN] AP1029ADN 32V H-Bridge DC Motor Driver IC 1. General Description The AP1029ADN is a 1ch H-Bridge motor driver that corresponds to an operating voltage of 32V. Four drive modes, which are forward, reverse, brake, and standby are available. An N-ch MOSFET is located at low side and a P-ch MOSFET is located at high side of the output block. The output voltage can be controlled externally or by PWM input signal. Since the AP1029ADN utilizes internal regulator outputs as control power, it can be operated by a single power supply so that external components are able to be reduced. It also features an under voltage lockout circuit, a thermal shutdown circuit and an over-current protection circuit. 2. Features Operating Temperature Range Motor Driver Operating Voltage Range Maximum Output Current (DC) H-Bridge On Resistance Switchable output voltage control function Built-in Start-up Function Built-in 4.5V Output Regulator Anomaly Detection Output pin (FLG pin) Built-in Under Voltage Lockout Circuit Built-in Thermal Shutdown Circuit Built-in Over Current Protection Circuit Package -40°C ~ 85°C 5.5V ~ 32V 1.2 A (Ta=25°C) 1.0Ω@Ta=25°C Input Signal Control, External Voltage Control Hard-start and Soft-start functions (selectable) 4.5V(typ) 175°C(typ) 1.5A(min) 16-pin QFN (3mm×3mm) 015009487-E-00 2015/09 -1- [AP1029ADN] 3. Table of Contents 1. 2. 3. 4. General Description ................................................................................................................................... 1 Features ...................................................................................................................................................... 1 Table of Contents ....................................................................................................................................... 2 Block Diagram and Functions ................................................................................................................... 3 ■ Functions .................................................................................................................................................... 4 5. Ordering Guide .......................................................................................................................................... 4 6. Pin Configurations and Functions .............................................................................................................. 5 ■ Pin Configurations ..................................................................................................................................... 5 ■ Functions .................................................................................................................................................... 5 7. Absolute Maximum Ratings ...................................................................................................................... 6 8. Recommended Operating Conditions ........................................................................................................ 7 9. Electrical Characteristics ........................................................................................................................... 7 10. Functional Descriptions ....................................................................................................................... 10 10.1 Output Voltage ............................................................................................................................. 10 10.2 Control Logic ............................................................................................................................... 10 10.3 Start-up Function .......................................................................................................................... 11 10.4 Operation Description After Enable Input Level Trasition .......................................................... 13 10.5 Protection Circuits ........................................................................................................................ 14 11. Recommended External Circuits.......................................................................................................... 15 12. Package ................................................................................................................................................ 16 ■ Outline Dimensions.................................................................................................................................. 16 ■ Marking .................................................................................................................................................... 16 13. Revise History ...................................................................................................................................... 17 IMPORTANT NOTICE .............................................................................................................................. 18 015009487-E-00 2015/09 -2- [AP1029ADN] 4. Block Diagram and Functions OUTA OUTB VM VDC LDO VDUTY DUTY CTRL PGND OSC OCP UVLO TSD Control circuit TEST FLG EN INA INB M0 EP M1 POL GND Figure 1. Block Diagram 015009487-E-00 2015/09 -3- [AP1029ADN] ■ Functions 4.5V Output LDO (LDO) Generate a voltage of 4.5V from VM = 5.5 ~ 32V, and then output to the external terminal (VDC). Oscillator(OSC) 50kHz oscillator. It is used as clock of the PWM chopper frequency. VM Under Voltage Lockout (UVLO) It is an under Voltage Lockout circuit for VM with hysteresis. Thermal Shutdown (TSD) It is an internal Thermal Shutdown detection circuit with hysteresis. Over Current Protection (OCP) It is an output stage overcurrent detection circuit for the OUTB and the OUTA pins. If the detected over current lasts for 10us, the OUTA and the OUTB become Hi-Z state for a certain period (350us) by this circuit. Hi-Z status will be released after 350us. PWM Duty Control (DUTYCTRL) It is a PWM duty circuit. It generates the PWM duty ratio that corresponds to the ratio of VM voltage and VDUTY voltage. The duty ration can be adjusted by setting the M0 and the M1 pins. H-Bridge Driver It consists of an N-ch LDMOS at low side and a P-ch LDMOS at high-side. ・ Anomaly Detection Output FLG pin is an open drain output pin. It outputs “H” signal by connecting to an external pull-up resistor. During normal operation, it outputs “L”. During standby state, overheat detection (TSD), over-current detection (OCP) or VM low voltage detection (UVLO) operation, it outputs “H” signal. 5. AP1029ADN -40°C ~+85°C Ordering Guide 16-pin QFN 015009487-E-00 2015/09 -4- [AP1029ADN] 6. ■ 2 INB 3 FLG 4 M1 M0 TEST 14 13 (Top View) Exposed Pad 5 6 7 12 PGND 11 OUT 10 VM 9 OUTA 8 PGND INA 15 VDC 1 16 GND EN POL Pin Configurations VDUTY ■ Pin Configurations and Functions Functions Pin Number Name I/O (Note 1) 1 EN I Enable signal input 200kΩ Pull-down 2 INA I Control signal input 200kΩ Pull-down 3 INB I Control signal input 200kΩ Pull-down 4 FLG O Flag Output N-ch open-drain output 5 VDUTY I/O 6 GND P Ground 7 VDC O Internal 4.5V regulator output 8 PGND P Power GND 9 OUTA O Motor driver output 10 VM P Motor driver power supply 11 OUTB O Motor driver output 12 PGND P Power GND 13 TEST I TEST Pin (Note 2) 14 M0 I Output ratio Control 200kΩ Pull-up 15 M1 I Output ratio Control 200kΩ Pull-up 16 POL I Soft Start polarity 200kΩ Pull-up Function Condition Output Duty Setting (Note 2) Exposed Pad EP P Heat Dissipation (Note 2) Note 1. I(Input pin), O(Output pin), P(Power pin), I/O(Input / Output pin) Note 2. The exposed pad must be connected to GND. Note 3. Let M0, M1, POL pin open or connect VDC pin when make their signals “H”. 015009487-E-00 2015/09 -5- [AP1029ADN] 7. Parameter Motor Power Supply Voltage VDC, EN, INA, INB, FLG Terminal POL, VDUTY, M0, M1 Terminal VM Level Terminal (OUTA, OUTB) GND-PGND Between Output Current Absolute Maximum Ratings Symbol VM min -0.5 max 40 Unit V Condition Vterm1 -0.5 5.5 V Vterm2 -0.5 VDC+0.5 V VDC+0.5≦5.5V Vterm3 -0.5 VM+VF V VM+VF≦40V Iload -0.3 0.3 V 1.2 A OUTA、OUTB 2 W Ta=25°C (Note 5) Power Dissipation PD 1 W Ta=85°C (Note 5) Junction Temperature Tj 150 °C Storage Temperature Tstg -50 150 °C Note 4. All above voltages are with respect to GND=PGND=0V. GND and PGND must be connected to a ground plane. Note 5. The rating calculated by θJA=60°C /W. The exposed pad must be connected to ground. The exposed pad must be connected to GND. WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. Figure 2. Maximum Power Dissipation 015009487-E-00 2015/09 -6- [AP1029ADN] 8. Recommended Operating Conditions Parameter Motor Driver Supply Voltage Symbol VM min 5.5 typ 12.0 Max 32.0 Unit V Input Frequency Range Operating Temperature Range Fin Ta -40 - 200 85 kHz °C VDUTY Input Voltage Range VDUTY 0.5 Note 6. All above voltages are with respect to GND=PGND=0V. 4.0 V 9. Condition M0=M1=”H” Electrical Characteristics (Ta = -40~85°C, VM=5.5~32V, unless otherwise specified.) Parameter Symbol Condition min typ max Unit Quiescent Current VM Quiescent Current at Power-OFF IVMOFF EN= “L” - - 10 uA IVM EN= “H” - 1.7 2.6 mA Driver On Resistance (High Side+Low Side) RON1 Iload=±100mA, Ta=25°C - 0.8 1.5 Ω Driver On Resistance (High Side+Low Side) RON2 Iload=±1.0A, Ta=25°C - 1.0 1.5 Ω Driver On Resistance (High Side+Low Side) RON3 Iload=±100mA - 0.8 1.5 Ω IF=100mA - 0.8 1.2 V 25 50 95 kHz VM Input Current at Operation H-Bridge Circuit Body Diode Forward Voltage PWM Chopper Frequency VF fPWM M0=M1= “L” (Note 7) H-Bridge Output Delay Time (“L”→”H”) tPDLHHB tr=tf=10ns (Note 8) - - 1.0 us H-Bridge Output Delay Time (“H”→”L”) tPDHLHB tr=tf=10ns (Note 8) - - 1.0 us 0.6 0.9 - us H-Bridge Output Pulse Width tPWOHB M0=M1= “H”, INA=200kHz, PWL=1us, tr=tf=10ns Output Duty Ratio 1 DUTY1 VM=12V, VDUTY=1.5V M0=M1= “L” 20 25 30 % Output Duty Ratio 2 DUTY2 VM=12V, VDUTY=1.5V M0= “H”, M1= “L” 40 50 60 % Output Duty Ratio 3 DUTY3 VM=12V, VDUTY=1.5V M0= “L”, M1= “H” 80 - - % 015009487-E-00 2015/09 -7- [AP1029ADN] Parameter Symbol Condition min typ max Unit 4.5V Output Regulator Internal Regulator Output Voltage VDC IDC=0.1mA 4.0 4.5 5.0 V Control Logic Input High Level Voltage VIH 2.0 - - V Input Low Level Voltage VIL - - 0.8 V Input Pulse Rise Time tR M0=M1= “H” - - 1.0 us Input Pulse Fall Time tF M0=M1= “H” - - 1.0 us Input High Level Current (EN, INA, INB) IIH1 VIH=3.0V 7.5 15 30 uA Input High Level Current (M0, M1, POL) IIH1 VIH=VDC -1 - 1 uA Input Low Level Current (EN, INA, INB) IIL2 VIL=0V -1 - 1 uA Input Low Level Current (M0, M1, POL) IIL2 VDC=4.5V, VIL=0V 11.25 22.5 45 uA Output High Level Voltage(VDUTY) VOH INA=INB=“L”, POL=“H”, M1=“L” or M0=“L”, Io=-1mA VDC-0.4 - - V INA=INB=“L”, POL=“L”, M1=“L” or M0= “L”, Io=+1mA - - 0.4 V - - 500 Ω 4.0 4.5 5.0 V 150 175 200 °C - 30 - °C 1.5 - - A Output Low Level Voltage(VDUTY) FLG-On Resistance VOL RONFLG Io=+1mA Protection Circuit VM Under Voltage Detect Voltage Thermal Shutdown Temperature Temperature Hysteresis Over Current Protection Note 7. Refer to Figure 4. Note 8. Refer to Figure 3. Note 9. Not tested in production. VMUV TTSD (Note 9) TTSDHYS (Note 9) IOCP 015009487-E-00 2015/09 -8- [AP1029ADN] INA H 50% INA 50% INB INB tPDHLHB H tPDHLHB tPDLHHB OUTA tPDLHHB L 90% OUTA 90% 50% OUTB tPWOHB tPWOHB 10% OUTB 10% L Brake 50% CW Brake Brake CCW Brake (b) Reverse operation (a) Forward operation Figure 3. Output delay time timing chart (EN=”H”) tF tR 90% OUTA:INA=H, INB=L (OUTB:INA=L, INB=H) M0=M1≠H 50% 50% 10% fPWM Figure 4. Output Rise /Fall Timing Chart (PWM Control Mode, EN=”H”) 015009487-E-00 2015/09 -9- [AP1029ADN] 10. Functional Descriptions 10.1 Output Voltage Output voltage (Vout), is controlled by the PWM control mode that depends on the external reference voltage input to the VDUTY pin. However, Vout never exceeds VM. Vout is affected by on-resistance, load current and etc. under loaded condition. Vout = VDUTY × N (under no-load condition) "N" is set by the M1 and the M0 pins as follows. However, in the case of M0 pin = M1 pin = "H", the AP1029ADN will not be in PWM control mode but be in Input control mode according to the INA and the INB inputs. Start-up function does not work at this time. When the AP1029ADN is used in input control mode, make sure that the VDUTY pin and the POL pin are Open. For example, Vout will be 3V by setting M1 = M0 pins = “L” when VDUTY is 1.5V, and It will be 6V by setting M0 = “H” and M1 = “L” when VDUTY is 1.5V. Table 1. Output Voltage Setting Table M1 M0 Mode of operation L L N=2、PWM control mode L H N=4、PWM control mode H L N=8、PWM control mode Input control mode H H (INA and INB Inputs response operation) Start-up function On On On Off 10.2 Control Logic The relationship between the input and output of each mode are shown below. Table 2. Truth Table Input Output Function EN INA INB OUTA OUTB H L L Hi-Z Hi-Z Standby(idle) H L H L H(PWM) Reverse H H L H(PWM) L Forward H H H L L Brake(stop) L Hi-Z Hi-Z Stop Note 10. See Figure 8 and Figure 9 for timing chart of Standby and Stop. See Figure 3 for timing chart of Brake. 015009487-E-00 2015/09 - 10 - [AP1029ADN] 10.3 Start-up Function The AP1029ADN has a start-up function. The VDUTY pin is used to set the Duty of the PWM control mode. In addition, by connecting the RDT1 and the RDT2 capacitances and the CDT resistance as shown in Figure 5, the AP1029ADN will execute a start-up operation. Start-up operation can be switched by setting the POL pin. Hard-start operation will be executed when the POL pin = “L” and Soft-start operation will be executed when the POL pin = “H”. Hard-start operation is for the situation when motor torque is needed at start-up. Soft-start operation is for the situation when motor needs to rotate slowly at start-up. Start-up function works in the following cases. ① INA or INB becomes “H” from standby mode. (Note that the initial mode should be standby, not brake.) ② the IC recovers from protection status. Table 3. Start-up settings INA INB L L L L H H POL L H - VDUTY pin status H(Duty=100%) L(Duty=0%) Hi-Z Hi-Z How to use start-up function is shown below. When the POL pin= “L", the EN pin= “H" and the INA = INB pins = “L", High side of the VDUTY pin output (MP1) is turned on, therefore the external capacitor (CDT) is charged by the VDC voltage. High side of the VDUTY pin output (MP1) will be turned off and capacity of the CDT is discharged by the RDT2 external resistor if INA = INB ≠ “L" is input, and then hard-start operation is executed. The VDUTY pin voltage is determined and stabilized by the RDT1 and the RDT2 external resistors. (Refer to Figure 6) Figure 5. Start-up Circuit Example 015009487-E-00 2015/09 - 11 - [AP1029ADN] Figure 6. Start-up Operation Example (Hard Start: POL = “L", pull-up power supply = VDC) Figure 7. Start-up Operation Example (Soft-Start: POL = “H", pull-up power supply = VDC) VDUTY voltage after certain time(t) can be calculated as follows. Soft-start: VDUTY (V ) =VDC − RDT 1*VDC RDT 2 RDT 1 + RDT 2 exp − * t 1 + RDT 1 + RDT 2 RDT 1 CDT * RDT 1* RDT 2 Hard-start: VDUTY (V ) = RDT 2 *VDC RDT 1 RDT 1 + RDT 2 1 + exp − * t RDT 1 + RDT 2 RDT 2 CDT * RDT 1* RDT 2 Sample Calculation: (Condition; VDC=4.5V, RDT1=RDT2=1MΩ, CDT=1nF) VDUTY after 500us In case of Soft start :1.422V In case of Hard start :3.078V VDUTY after 5ms In case of Soft start :2.250V In case of Hard start:2.250V 015009487-E-00 2015/09 - 12 - [AP1029ADN] 10.4 Operation Description After Enable Input Level Trasition 4.5V LDO output will rise by applying a 5.5V voltage or more to the VM pin and setting the EN pin = “H”. Input the INA and the INB signals 3ms (t1 period) after the EN pin = “H”, waiting for the stabilization of the VDC output. After the certain stabilization time of VDC output (t1 period), The IC becomes Stanby and INA and INB input become valid. Figure 8 is timing chart from VM power supply to INA, INB input is valid. When using start-up function, stabilization time may take more than 3ms depends on the value of the external resistance and capacitor connected to the VDUTY pin. In this case, input timing of INA and INB should be after stabilization of VDUTY pin voltage. 4.5V LDO output stops after inputting “L” to EN pin. Within 100ms(t2 period), OUTA and OUTB become Hi-Z(Stop). Do not change input levels of INA and INB, because OUTA and OUTB changes according to input level of INA and INB during t2 period. Figure 9 is timing chart from IN=”H” becomes “L” to OUTA=OUTB = Hi-Z. 5.5V~32V 5.5V t1=3ms VM EN VDC INA, INB INA,INB 入力有効 input valid FLG Hi-Z VDUTY Hi-Z OUTA OUTB Hi-Z Standby スタンバイ状態 Figure 8. Timing Chart of EN voltage input after power-up H EN L INA H INB L H Hi-Z OUTA OUTB Hi-Z L t2=100ms 停止状態 Stop Figure 9. Timing Chart from EN=”H” becomes “L” to OUTA= OUTB=Hi-Z 015009487-E-00 2015/09 - 13 - [AP1029ADN] 10.5 Protection Circuits VM Under Voltage Lockout The OUTA and the OUTB outputs are set to Hi-Z state when the VM voltage becomes 4.5V (typ) or less to prevent malfunction of the IC. The FLG pin becomes Hi-Z state at the same time. Thermal Shutdown When an abnormal high temperature 175°C (typ) is detected, the OUTA and the OUTB outputs are set to Hi-z state to prevent getting damages by self-heating. The internal 4.5V LDO is stopped and the FLG pin becomes Hi-Z state at the same time. The AP1029ADN restarts when the temperature drops to under 145°C (typ). Over Current protection The AP1029ADN integrates an over current protection circuit that protects the device from damages caused by output short of H-bridge driver, short-to-ground and short-to-supply. When a MOSFET current more than 1.5A lasts for 10us, the OUTA and the OUTB outputs are set to Hi-Z state for 350us. The FLG pin becomes Hi-Z state at the same time. After 350us, the AP1029ADN returns to normal operation automatically. 015009487-E-00 2015/09 - 14 - [AP1029ADN] 11. Recommended External Circuits Figure 10. Recommended External Circuit Table 4. Recommended External Components Item min typ max Unit Note 1.0 Ceramic Capacitor µF CVM 47 Electrolytic Capacitor µF CVDC 1.0 Ceramic Capacitor µF RDT1 0.2 MΩ (Note 11) RDT2 0.1 MΩ (Note 11) RFLG 1.0 MΩ CDT 100 nF Note 11. RDT1+RDT2 must be 100kΩ or more. Note 12. Above values are examples. Please choose appropriate external components for your system board. Note 13. Connection capacitance of CVM and CVC should be determined in consideration of the load current profile, the load capacitance, the line resistance and etc. of the actual system board. Note 14. Use resistive divider in case external voltage is applied to the VDUTY pin. 015009487-E-00 2015/09 - 15 - [AP1029ADN] 12. Package ■ Outline Dimensions Expansion of part A ■ Marking 29ADN ABCD Market No. Date code ● Pin#1 Indication A B,C D :Year code (Last 1 digit) :Week code :Management code 015009487-E-00 2015/09 - 16 - [AP1029ADN] 13. Revise History Date (YY/MM/DD) 15/09/01 Revision 00 Page - Contents First Edition 015009487-E-00 2015/09 - 17 - [AP1029ADN] IMPORTANT NOTICE 0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information contained in this document without notice. When you consider any use or application of AKM product stipulated in this document (“Product”), please make inquiries the sales office of AKM or authorized distributors as to current status of the Products. 1. All information included in this document are provided only to illustrate the operation and application examples of AKM Products. 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This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent of AKM. 015009487-E-00 2015/09 - 18 -