NX3L1G66-Q100 Low-ohmic single-pole single-throw analog switch Rev. 1 — 28 October 2013 Product data sheet 1. General description The NX3L1G66-Q100 is a low-ohmic single-pole single-throw analog switch. It has two input/output terminals (Y and Z) and an active HIGH enable input pin (E). When E is LOW, the analog switch is turned off. Schmitt trigger action at the enable input (E) makes the circuit tolerant to slower input rise and fall times. The NX3L1G66-Q100 allows signals with amplitude up to VCC to be transmitted from Y to Z; or from Z to Y. Its low ON resistance (0.5 ) and flatness (0.13 ) ensures minimal attenuation and distortion of transmitted signals. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Wide supply voltage range from 1.4 V to 4.3 V Very low ON resistance (peak): 1.6 (typical) at VCC = 1.4 V 1.0 (typical) at VCC = 1.65 V 0.55 (typical) at VCC = 2.3 V 0.50 (typical) at VCC = 2.7 V 0.50 (typical) at VCC = 4.3 V High noise immunity ESD protection: MIL-STD-883, method 3015 Class 3A exceeds 7500 V HBM JESD22-A114F Class 3A exceeds 7500 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) CDM AEC-Q100-011 revision B exceeds 1000 V IEC61000-4-2 contact discharge exceeds 4000 V for switch ports CMOS low-power consumption Latch-up performance exceeds 100 mA per JESD 78 Class II Level A Direct interface with TTL levels at 3.0 V Control input accepts voltages above supply voltage High current handling capability (350 mA continuous current under 3.3 V supply) NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 3. Applications Cell phone PDA Portable media player 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name 40 C to +125 C NX3L1G66GW-Q100 Description Version TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 5. Marking Table 2. Marking codes[1] Type number Marking code NX3L1G66GW-Q100 DL [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram Y E Z Z Y E 001aah372 001aag487 Fig 1. Logic symbol Fig 2. Logic diagram 7. Pinning information 7.1 Pinning 1;/*4 < = *1' 9&& ( DDD Fig 3. Pin configuration SOT353-1 (TSSOP5) NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 2 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 7.2 Pin description Table 3. Pin description Symbol Pin Description Y 1 independent input or output Z 2 independent output or input GND 3 ground (0 V) E 4 enable input (active HIGH) n.c. - not connected VCC 5 supply voltage 8. Functional description Table 4. Function table[1] Input E Switch L OFF-state H ON-state [1] H = HIGH voltage level; L = LOW voltage level. 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Max Unit 0.5 +4.6 V [1] 0.5 +4.6 V [2] 0.5 VCC + 0.5 V VI input voltage VSW switch voltage IIK input clamping current VI < 0.5 V 50 - mA ISK switch clamping current VI < 0.5 V or VI > VCC + 0.5 V - 50 mA ISW switch current VSW > 0.5 V or VSW < VCC + 0.5 V; source or sink current - 350 mA VSW > 0.5 V or VSW < VCC + 0.5 V; pulsed at 1 ms duration, < 10 % duty cycle; peak current - 500 mA 65 +150 C - 250 mW Tstg enable input E Min storage temperature total power dissipation Ptot Tamb = 40 C to +125 C [3] [1] The minimum input voltage rating may be exceeded if the input current rating is observed. [2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not exceed 4.6 V. [3] For TSSOP5 package: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 3 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 10. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter VCC supply voltage VI input voltage Conditions enable input E [1] VSW switch voltage Tamb ambient temperature t/V [2] VCC = 1.4 V to 4.3 V input transition rise and fall rate Min Max Unit 1.4 4.3 V 0 4.3 V 0 VCC V 40 +125 C - 200 ns/V [1] To avoid sinking GND current from terminal Z when switch current flows in terminal Y, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current flows from terminal Y. In this case, there is no limit for the voltage drop across the switch. [2] Applies to control signal levels. 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Tamb = 25 C Conditions Min VIH VIL HIGH-level input voltage LOW-level input voltage Min Max Max (85 C) (125 C) VCC = 1.4 V to 1.95 V 0.65VCC - - 0.65VCC - - V 1.7 - - 1.7 - - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - - V VCC = 3.6 V to 4.3 V 0.7VCC - - 0.7VCC - - V VCC = 1.4 V to 1.95 V - - 0.35VCC - VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 0.8 V VCC = 3.6 V to 4.3 V - - 0.3VCC - 0.3VCC - - - - 0.5 1 A VCC = 1.4 V to 3.6 V - - 5 - 50 500 nA VCC = 3.6 V to 4.3 V - - 10 - 50 500 nA VCC = 1.4 V to 3.6 V - - 5 - 50 500 nA VCC = 3.6 V to 4.3 V - - 10 - 50 500 nA VCC = 3.6 V - - 100 - 690 6000 nA VCC = 4.3 V - - 150 - 800 7000 nA input leakage current enable input E; VI = GND to 4.3 V; VCC = 1.4 V to 4.3 V IS(OFF) OFF-state leakage current Y port; see Figure 4 ON-state leakage current Z port; see Figure 5 ICC Max Unit VCC = 2.3 V to 2.7 V II IS(ON) Typ Tamb = 40 C to +125 C 0.35VCC 0.35VCC V 0.3VCC V supply current VI = VCC or GND; VSW = GND or VCC NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 4 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch Table 7. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground 0 V). Symbol Parameter Tamb = 25 C Conditions Tamb = 40 C to +125 C Min Typ Max Min Unit Max Max (85 C) (125 C) CI input capacitance - 1.0 - - - - pF CS(OFF) OFF-state capacitance - 35 - - - - pF CS(ON) ON-state capacitance - 110 - - - - pF 11.1 Test circuits VCC VCC nE VIL nZ VI nE VIH nY IS GND IS nZ GND VI VO nY 001aag488 001aag489 VI = 0.3 V or VCC 0.3 V; VO = VCC 0.3 V or 0.3 V. Fig 4. Test circuit for measuring OFF-state leakage current VO VI = 0.3 V or VCC 0.3 V; VO = open circuit. Fig 5. Test circuit for measuring ON-state leakage current 11.2 ON resistance Table 8. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 7 to Figure 13. Symbol RON(peak) Parameter ON resistance (peak) Tamb = 40 C to +85 C Conditions Product data sheet Min Max Min Max - 1.6 3.7 - 4.1 VI = GND to VCC; ISW = 100 mA; see Figure 6 VCC = 1.4 V NX3L1G66_Q100 Tamb = 40 C to +125 C Unit Typ[1] VCC = 1.65 V - 1.0 1.6 - 1.7 VCC = 2.3 V - 0.55 0.8 - 0.9 VCC = 2.7 V - 0.5 0.75 - 0.9 VCC = 4.3 V - 0.5 0.75 - 0.9 All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 5 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch Table 8. ON resistance …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 7 to Figure 13. Symbol RON(flat) Parameter ON resistance (flatness) Tamb = 40 C to +85 C Conditions Tamb = 40 C to +125 C Unit Min Typ[1] Max Min Max VCC = 1.4 V - 1.0 3.3 - 3.6 VCC = 1.65 V - 0.5 1.2 - 1.3 VCC = 2.3 V - 0.15 0.3 - 0.35 VCC = 2.7 V - 0.13 0.3 - 0.35 VCC = 4.3 V - 0.2 0.4 - 0.45 [2] VI = GND to VCC; ISW = 100 mA [1] Typical values are measured at Tamb = 25 C. [2] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature. 11.3 ON resistance test circuit and graphs 001aag564 1.6 RON (Ω) 1.2 VSW (1) 0.8 VCC (2) E VIH (3) Z VI GND (4) 0.4 Y (5) (6) ISW 0 0 1 2 RON = VSW / ISW. 3 4 5 VI (V) 001aah375 (1) VCC = 1.5 V. (2) VCC = 1.8 V. (3) VCC = 2.5 V. (4) VCC = 2.7 V. (5) VCC = 3.3 V. (6) VCC = 4.3 V. Measured at Tamb = 25 C. Fig 6. Test circuit for measuring ON resistance NX3L1G66_Q100 Product data sheet Fig 7. Typical ON resistance as a function of input voltage All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 6 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 001aag565 1.6 001aag566 1.0 RON (Ω) RON (Ω) 0.8 1.2 (1) (2) (3) (4) 0.6 (1) (2) (3) (4) 0.8 0.4 0.4 0.2 0 0 0 1 2 3 0 1 2 VI (V) (1) Tamb = 125 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 8. ON resistance as a function of input voltage; VCC = 1.5 V 001aag567 1.0 3 VI (V) RON (Ω) Fig 9. ON resistance as a function of input voltage; VCC = 1.8 V 001aag568 1.0 RON (Ω) 0.8 0.8 0.6 0.6 (1) (2) (3) (4) 0.4 0.4 0.2 0.2 0 (1) (2) (3) (4) 0 0 1 2 3 0 VI (V) (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 10. ON resistance as a function of input voltage; VCC = 2.5 V Product data sheet 2 3 VI (V) (1) Tamb = 125 C. NX3L1G66_Q100 1 Fig 11. ON resistance as a function of input voltage; VCC = 2.7 V All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 7 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 001aag569 1.0 001aaj896 1.0 RON (Ω) RON (Ω) 0.8 0.8 0.6 0.6 (1) (2) (3) (4) 0.4 (1) (2) (3) (4) 0.4 0.2 0.2 0 0 0 1 2 3 4 0 1 2 3 4 VI (V) 5 VI (V) (1) Tamb = 125 C. (1) Tamb = 125 C. (2) Tamb = 85 C. (2) Tamb = 85 C. (3) Tamb = 25 C. (3) Tamb = 25 C. (4) Tamb = 40 C. (4) Tamb = 40 C. Fig 12. ON resistance as a function of input voltage; VCC = 3.3 V Fig 13. ON resistance as a function of input voltage; VCC = 4.3 V 12. Dynamic characteristics Table 9. Dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit, see Figure 15. Symbol Parameter enable time ten Tamb = 25 C Conditions disable time [1] Unit Min Max Min Max (85 C) Max (125 C) - 27 41 - 43 48 ns E to Z or Y; see Figure 14 VCC = 1.4 V to 1.6 V tdis Tamb = 40 C to +125 C Typ[1] VCC = 1.65 V to 1.95 V - 22 33 - 34 36 ns VCC = 2.3 V to 2.7 V - 17 26 - 27 30 ns VCC = 2.7 V to 3.6 V - 14 23 - 24 26 ns VCC = 3.6 V to 4.3 V - 14 23 - 24 26 ns VCC = 1.4 V to 1.6 V - 9 18 - 19 21 ns VCC = 1.65 V to 1.95 V - 7 13 - 15 16 ns VCC = 2.3 V to 2.7 V - 4 8 - 9 10 ns VCC = 2.7 V to 3.6 V - 4 8 - 8 9 ns VCC = 3.6 V to 4.3 V - 4 8 - 8 9 ns E to Z or Y; see Figure 14 Typical values are measured at Tamb = 25 C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively. NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 8 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 12.1 Waveform and test circuits VI E input VM GND ten Y output OFF to HIGH HIGH to OFF tdis VOH VX VX GND switch disabled switch enabled switch disabled 001aah875 Measurement points are given in Table 10. Logic level: VOH is the typical output voltage that occurs with the output load. Fig 14. Enable and disable times Table 10. Measurement points Supply voltage Input Output VCC VM VX 1.4 V to 4.3 V 0.5VCC 0.9VOH VCC E Y/Z G VI V VO RL Z/Y CL VEXT = 1.5 V 001aah377 Test data is given in Table 11. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. VEXT = External voltage for measuring switching times. Fig 15. Load circuit for switching times Table 11. Test data Supply voltage Input Load VCC VI tr, tf CL RL 1.4 V to 4.3 V VCC 2.5 ns 35 pF 50 NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 9 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 12.2 Additional dynamic characteristics Table 12. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise specified); tr = tf 2.5 ns. Tamb = 25 C Symbol Parameter Conditions THD fi = 20 Hz to 20 kHz; RL = 32 ; see Figure 16 total harmonic distortion Min Typ Max VCC = 1.4 V; VI = 1 V (p-p) - 0.15 - % VCC = 1.65 V; VI = 1.2 V (p-p) - 0.10 - % [1] VCC = 2.3 V; VI = 1.5 V (p-p) - 0.02 - % VCC = 2.7 V; VI = 2 V (p-p) - 0.02 - % - 0.02 - % - 60 - MHz - 90 - dB VCC = 1.4 V to 3.6 V - 0.2 - V VCC = 3.6 V to 4.3 V - 0.2 - V VCC = 1.5 V - 3 - pC VCC = 1.8 V - 3 - pC VCC = 2.5 V - 3 - pC VCC = 3.3 V - 3 - pC VCC = 4.3 V - 6 - pC VCC = 4.3 V; VI = 2 V (p-p) f(3dB) 3 dB frequency response RL = 50 ; see Figure 17 iso isolation (OFF-state) fi = 100 kHz; RL = 50 ; see Figure 18 crosstalk voltage charge injection Qinj [1] [1] VCC = 1.4 V to 4.3 V VCC = 1.4 V to 4.3 V Vct Unit [1] between digital inputs and switch; fi = 1 MHz; CL = 50 pF; RL = 50 ; see Figure 19 fi = 1 MHz; CL = 0.1 nF; RL = 1 M; Vgen = 0 V; Rgen = 0 ; see Figure 20 fi is biased at 0.5VCC. NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 10 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 12.3 Test circuits VCC 0.5VCC E VIH RL Y/Z Z/Y D fi 001aah378 Fig 16. Test circuit for measuring total harmonic distortion VCC 0.5VCC E VIH RL Y/Z Z/Y dB fi 001aah379 To obtain 0 dBm level at output, adjust fi voltage. Increase fi frequency until dB meter reads 3 dB. Fig 17. Test circuit for measuring the frequency response when channel is in ON-state 0.5VCC RL VCC VIL 0.5VCC E Y/Z RL Z/Y dB fi 001aah380 To obtain 0 dBm level at input, adjust fi voltage. Fig 18. Test circuit for measuring isolation (OFF-state) NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 11 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch VCC E Y/Z G VI Z/Y RL RL 0.5VCC 0.5VCC V CL VO 001aah383 a. Test circuit logic input (E) off on off VO Vct 001aah381 b. Input and output pulse definitions Fig 19. Test circuit for measuring crosstalk voltage between digital inputs and switch NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 12 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch VCC E Y/Z G VI V VO RL Z/Y Rgen CL Vgen GND 001aah385 a. Test circuit logic input (E) off on off VO VO 001aah384 b. Input and output pulse definitions Definition: Qinj = VO CL. VO = output voltage variation. Rgen = generator resistance. Vgen = generator voltage. Fig 20. Test circuit for measuring charge injection NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 13 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.46 0.21 0.3 0.1 0.1 0.60 0.15 7° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC JEITA MO-203 SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19 Fig 21. Package outline SOT353-1 (TSSOP5) NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 14 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 14. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged-Device Model CMOS Complementary Metal-Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model PDA Personal Digital Assistant TTL Transistor-Transistor Logic 15. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes NX3L1G66_Q100 v.1 20131028 Product data sheet - - NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 15 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. NX3L1G66_Q100 Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 16 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] NX3L1G66_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 October 2013 © NXP B.V. 2013. All rights reserved. 17 of 18 NX3L1G66-Q100 NXP Semiconductors Low-ohmic single-pole single-throw analog switch 18. Contents 1 2 3 4 5 6 7 7.1 7.2 8 9 10 11 11.1 11.2 11.3 12 12.1 12.2 12.3 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 5 ON resistance test circuit and graphs. . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveform and test circuits . . . . . . . . . . . . . . . . 9 Additional dynamic characteristics . . . . . . . . . 10 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Contact information. . . . . . . . . . . . . . . . . . . . . 17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2013. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 28 October 2013 Document identifier: NX3L1G66_Q100