USER GUIDES

Application Note 1845
ISL1904DEMO1Z: Offline Triac Dimmable Isolated LED Driver
Introduction
Design Specifications
The ISL1904DEMO1Z demo board converts a high line AC
input voltage to a 18V, 700mA DC output. It is implemented
with Intersil’s critical conduction mode (CrCM) LED driver
controller, the ISL1904. It demonstrates the fundamental
functions of ISL1904, including soft-start, dimming,
over-voltage protection, short circuit protection, etc. The circuit
operates in CrCM with variable frequency and allows near
zero-voltage switching (ZVS). Typical efficiency is about 81% at
full load. The ISL1904DEMO1Z demo board supports phase
dimming and is compatible with wide variety of leading and
trailing edge dimmers available in the market. This application
note covers the performance data, critical waveforms,
extensive dimming data, schematics, layout and bill of
materials.
• Input voltage VIN: 176V to 264V
• Output voltage VO: 12V to 20V
• Output current IO: 700mA (14W)
• Board dimensions: 68×26×15mm3 (L×W×H)
• Input power factor greater than 0.93 at nominal
• Total harmonic distortion less than 7% at nominal
• Peak efficiency at full load: 81%
• 0-100% flicker free dimming with leading and trailing edge
dimmers
1200mH
PA2517NL
L5
LED Driver with Triac Dimming
Rclamp
R36
JP1
C14
R1
L1
C34
176V-264V,
50Hz
499k
1206
ac1
~
47nF,
400V
5.4mH
450V
100nF, 10%
47nF,
400V
DNP
Vdrain
D14
D2
NEUTRAL
13V
Zener
650V, 7A
TK5P60V
21.5k
0603
D10
G
499O
0603
D16
600V
1A
1.3O
1206
50V
100pF, 5%
R37
R38
1.5O
1206
1.58k
0603
MCL4448
C18
4.99k
0603
DNP
0603
C33
R33
MCL4448
D18
C20
400V
2200pF, 20%
R10
Q1
R29
DHC
R41
LED 10O
0805
BAV70
70V, 0.2A
R30
R44
25V
1µF, 10%
2SK3471
102O
1206
47k
0603
LED
Load
10O
0603
R17
300O
2512
25V
680µF, 20%
G
680
2512
499k
1206
R39
Q2
~
_
R34
R2
25V
680µF, 20%
Dclamp
220k
1206
C28
C10
Cout1
DNP
DNP
400O
RES100
R8
D1
+
450V
330nF, 10%
Cclamp
Cout3
R7
600V, 0.5A
MB6S
Cout2
400O
RES100
Rsense1
L2
10mH
JP2
R9
220k
1206
Rsense
R4
10O
LED +
300V, 2A
PDS3200-13-T
10mH,
0.13A
LINE
18V, 660mA
D15
T1
Q3
500V
0.38A
16V
100nF, 10%
OUT 16
1 VDD
2 OFFREF PWMOUT 15
ISL1904DEMO1Z Rev D
R19
R40
C6
R21
4.99k
0603
DNP
DHC 14
4 IOUT
GND 13
2Meg
0805
R14
NC
DHC
ac1
AC 12
5 CS+
510k
0603
DNP
3 VREF
6 OC
OVP 11
7 FB
RAMP 10
8 DELADJ
VERR 9
ISL1904
16V
100nF, 10%
R20
R22
1k
0603
C31
C30
C29
25V
33µF, 20%
C12
R13
C4
R16
16V
0.1µF, 10%
51k
0603
91k
0603
C5
C17 R15
R3
C2
50V
1000pF, 5%
16V
0.1µF, 10%
50V
100pF, 5%
25V
220µF, 20%
90k
0603
4.02k
0603
FIGURE 1. ISOLATED FLYBACK CONVERTER APPLICATION SCHEMATIC
ISL1904DEMO1ZD
ISL1904DEMO1ZD
LINE
LINE
LED Driver
Dimmer
AC LINE
V OUT
V IN
LED
LOAD
AC LINE
V IN
LED NEUTRAL
LED Driver
LED +
LED +
VOUT
LED
LOAD
LED NEUTRAL
FIGURE 2. TEST SETUP WITH AND WITHOUT DIMMING
August 28, 2013
AN1845.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
Application Note 1845
FIGURE 3. TOP/BOTTOM VIEW OF THE EVALUATION BOARD
Schematic Description
General Description of ISL1904
The ISL1904 is a high-performance, critical conduction mode
(CrCM), single-ended flyback LED driver controller. It supports
single-stage conversion of the AC mains to a constant current
source with power factor correction (PFC). It also may be used
with DC input converters. The ISL1904 also supports boost, Cuk,
sepic and buck-boost converters. Operation in CrCM allows near
zero-voltage switching (ZVS) for improved efficiency while
maximizing magnetic core utilization. The ISL1904 LED driver
provides all of the features required for high-performance
dimmable LED driver designs.
Input EMI Filtering
Fusible resistor R4 provides protection from components failure.
Input EMI filtering is provided by differential inductors L2, L5 and
capacitors C14 and C28. The switching current generated by the
power-train to the AC line is filtered by the input filter network.
Start-up Network
A linear regulator startup network is used for initial startup. R7,
R8, R9, R36, Q2 and D2 constitute the linear startup circuit.
Once the energy is built and voltage is generated on the aux
winding, the linear regulator circuit is disabled and the aux
winding supplies the voltage and current to the controller IC.
Power Stage
The primary current loop encompasses the transformer primary
winding, MOSFET Q1 and the current sense resistors Rsense and
Rsense1.
Near zero voltage switching (ZVS) or quasi-resonant switching, as
it is sometimes referred to, can be achieved by delaying the next
switching cycle after the inductor current decays to zero. The
delay allows the inductance and parasitic capacitance to
oscillate, causing the switching FET drain-source voltage to ring
down to minima. If the FET is turned on at this minima, the
2
1
capacitive switching losses ⎛⎝ --- CV ⎞⎠ are greatly reduced.
2
Inductor zero-crossing is detected using the transformer aux
winding. R29, R12 scales down the sensed zero crossing voltage
and is delivered to the IC. Deladj sets the delay before a new
switching cycles starts. This adjustment allows the user to delay
the next switching cycle until the switching FET drain-source
2
voltage reaches a minimum value to allow quasi-ZVS (Zero
Voltage Switching) operation. Resistor R16 to ground programs
the delay.
DELAY TIME SETTING
In order to reduce electromagnetic interference and switching
loss, ISL1904 can insert a delay between the off period and the
on period. A resistor connected from deladj pin to ground will
program the delay time according to the equation below. The
optimal delay time depends on the resonance between the
inductance, drain-source capacitance (Coss) and parasitic
capacitance on the drain node. Circuit designers should optimize
the delay according to the following equation:
1
fsw = ----------------------------------------------------------------2π Lp ( Coss + Cstray )
After determining the delay time, the resistor can be chosen
according to the following equation:
Tdel – 73.33 ) kΩ
Rdel = (-------------------------------------10.2
Resistor R16 programs this delay in the application schematic.
Feedback
The ISL1904 is designed to regulate the LED current by
monitoring the primary switch current at the OC pin through
resistors Rsense and Rsense1. The peak primary switch current
is captured, processed, and output on IOUT as a PWM voltage
signal modulated in proportion to the LED current. The IOUT PWM
frequency is the same as the converter switching frequency and
its amplitude is equivalent to 4x the peak switch current during
the previous ON-time. Resistor R19 scales the signal before
being input to the control loop at the FB pin. The OC pin also
provides cycle-by-cycle overcurrent protection. The ON-time is
terminated if OC exceeds 0.6V nominal. There is ~120ns of
leading edge blanking (LEB) on OC to minimize or eliminate
external filtering.
Output Rectification
Transformer secondary winding voltage is rectified by diode D15
and filtered by capacitors Cout1, Cout2 and Cout3. The
capacitors are connected in parallel as the combination has a
lower parasitic inductance and resistance compared to a single
capacitor.
AN1845.0
August 28, 2013
Application Note 1845
Overvoltage Protection
Primary Inductance:
ISL1904 has an independent overvoltage protection accessed
through the OVP pin. There is a nominal 20µA switched current
source to create hysteresis. The current source is active only
during an OV fault; otherwise, it is inactive and does not affect
the node voltage.
Bias voltage: Vbias = 12V
46.3μH
Ls
Lp = -------------- = -------------------- = 2.89mH
2
2
0.11
Nsp
Aux voltage is: Vaux = Vbias + 0.7 = 12.7V
Aux winding inductance is:
2
VREF
MONITORED
VOLTAGE
20µA
Peak secondary current (avg) is:
R1
1
R3
0
+
1.5V
C OPT
Vaux
Laux = Ls ---------------------------------------------- = 16.9μH
2
( Nsp × Vf + Vd )
_
R2
Vout ( 1 – Dmax )
18 ( 1 – 0.4 )
Ispk = --------------------------------------------- = --------------------------------------------------------------- = 2.75A
3
–6
f × Ls
100 × 10 × 46.3 × 10
Peak primary current (avg) is:
Ippk = Ispk × Nsp = 2.75 × 0.11 = 0.344A
Maximum peak primary current is:
FIGURE 4. OV HYSTERESIS
( R1 + R2 )
V = 1.5 --------------------------- V
R2
Vminpk × Ton × 2
Ippkmax = ----------------------------------------------------- = 0.49A
Lp
Maximum peak secondary current is
Hysteresis is given by: ΔV = 20x10 xR1 V
Ippkmax
Ispkmax = ------------------------- = 3.88A
Nsp
DESIGN EXAMPLE
1
Time period is: Ts = ----- = 10μs
–6
Flyback converter Inductance calculation
TABLE 1.
Delay time to program partial zero voltage switching:
PARAMETER
VALUE
Vmin(rms)
176V
Min rms input voltage
π Lp ( Coss + Cother ) )
Tdelay = ----------------------------------------------------------------- = 1005ns
2
Vmax(rms)
264V
Max rms input voltage
Worst case minimum frequency is
Efficiency
1
fmin = -------------------------------------------------------------------- = 80.09kHz
Ton + Toffmax + Tdelay
η
fmin(avg)
DESCRIPTION
fs
Maximum ON time is Tonmax = Dmax × Ts = 4μs
100kHz Frequency when VIN = min VIN(rms)
Dmax
0.4
Maximum duty cycle
VOUT
18V
Output voltage
IOUT
0.7
LED current
Ispk
OFFREF control:
REFIN ( off ) = OFFREF – 0.1
REFIN ( on ) = OFFREF – 0.05
Peak secondary current - avg
Ippk
1
Peak primary current - avg
Ispkmax
Peak secondary current - max
Ippkmax
Peak primary current - max
Coss
VDD
2
24
23
3
O FFREF
22
4
VREF
21
R3
IS L 1 9 0 2
MOSFET drain-source capacitance
Cother
Parasitic capacitance on drain node
R4
Secondary inductance is calculated as:
2
FIGURE 5.
2
18 ( 1 – 0.4 )
Vo ( 1 – Dmax )
Ls = ------------------------------------------ = -------------------------------------------------- = 46.3μH
3
2 × f × Iout
2 × 100 × 10 × 0.7
Primary to sec turns ratio:
R4
OFFREF = ---------------------- Vref
R3 + R4
Vo ( 1 – Dmax )
18 ( 1 – 0.4 )
Nsp = --------------------------------------------- = -------------------------------------- = 0.11
Vminpk × Dmax
176 × 2 × 0.4
3
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August 28, 2013
Application Note 1845
Performance Data
TABLE 2. PERFORMANCE DATA WITH VARIATION IN TEMPERATURE
TEMP (°C)
VIN (V)
VOUT (V)
IOUT (mA)
POUT (W)
PIN (W)
EFF (%)
PF (%)
THD (%)
-35
220
18.57
709.21
16.86
13.17
78.13
90.97
7.704
-20
220
18.57
703.74
16.71
13.07
78.24
90.88
7.69
5
220
18.42
714.72
16.40
13.16
80.25
90.68
8.22
25
220
18.47
704.50
16.31
13.01
79.80
90.68
8.19
50
220
18.61
705.02
16.27
13.12
80.66
90.89
7.87
75
220
18.51
709.35
16.07
13.13
81.72
90.89
7.86
105
220
18.46
692.26
15.81
12.78
80.82
90.75
7.56
125
220
18.40
664.58
15.46
12.23
79.09
90.22
7.61
720
90
700
EFFICIENCY (%)
LED CURRENT (mA)
710
690
680
80
70
670
660
650
-60
-40
-20
0
20
40
60
80
100
120
60
-60
140
-40
-20
0
20
40
60
80
100
FIGURE 6. VARIATION OF LED CURRENT WITH AMBIENT
TEMPERATURE
FIGURE 7. VARIATION OF EFFICIENCY WITH AMBIENT
TEMPERATURE
100
10
95
90
85
-60
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
FIGURE 8. VARIATION OF POWER FACTOR WITH AMBIENT
TEMPERATURE
4
120
140
120
140
TEMPERATURE (°C)
TOTAL HARMONIC DISTORTION (%)
POWER FACTOR (V/V)
TEMPERATURE (°C)
140
8
6
4
2
0
-60
-40
-20
0
20
40
60
80
100
TEMPERATURE (°C)
FIGURE 9. VARIATION OF THD WITH AMBIENT TEMPERATURE
AN1845.0
August 28, 2013
Application Note 1845
TABLE 3. PERFORMANCE DATA WITH 5 LED LOAD
VRMS (V)
VPK (V)
AVERAGE
IN (mA)
VOUT (V)
IOUT (mA)
PIN (W)
POUT (W)
PLOSS (W)
EFFI (%)
PF (%)
ATHD (%)
69.10
15.37
683.93
13.43
10.52
2.92
78.27
89.94
9.70
170.10
240.60
81.25
15.36
685.02
13.39
10.52
2.87
78.56
96.92
8.02
180.08
254.70
77.66
15.37
703.22
13.39
10.81
2.58
80.74
95.75
8.44
190.10
268.80
74.69
15.39
686.58
13.41
10.57
2.84
78.80
94.45
8.90
200.08
283.00
72.09
15.41
687.77
13.45
10.60
2.85
78.79
93.23
9.15
210.10
297.10
69.85
15.40
700.54
13.50
10.79
2.71
79.92
91.99
9.45
220.11
311.30
67.86
15.40
696.67
13.52
10.73
2.79
79.35
90.52
9.76
230.11
325.40
66.06
15.38
695.25
13.51
10.69
2.82
79.13
88.87
10.25
240.03
339.50
64.45
15.36
679.63
13.47
10.44
3.04
77.47
87.09
10.36
250.10
353.70
63.05
15.37
669.18
13.44
10.28
3.16
76.52
85.22
10.62
260.14
367.90
61.81
15.34
658.98
13.37
10.11
3.26
75.62
83.13
10.89
264.19
373.60
61.36
15.35
660.37
13.33
10.14
3.19
76.07
82.20
10.83
VRMS (V)
VPK (V)
IN (mA)
VOUT (V)
IOUT (mA)
PIN (W)
POUT (W)
PLOSS (W)
EFFI (%)
PF (%)
ATHD (%)
78.391
18.35
684.48
15.70
12.56
3.14
80.01
92.52
8.37
92.10
18.32
669.43
15.32
12.27
3.05
80.08
97.77
7.04
TABLE 4. PERFORMANCE DATA WITH 6 LED LOAD
AVERAGE
170.12
240.60
180.08
254.70
87.81
18.35
673.88
15.30
12.36
2.94
80.80
96.77
7.39
190.11
268.90
84.24
18.32
679.84
15.32
12.46
2.87
81.30
95.68
7.75
200.09
283.00
81.25
18.36
679.71
15.40
12.48
2.92
81.02
94.72
8.12
210.10
297.10
78.75
18.33
676.66
15.52
12.40
3.12
79.91
93.81
8.34
220.12
311.30
76.66
18.36
683.45
15.65
12.55
3.11
80.16
92.76
8.67
230.11
325.40
74.91
18.35
693.90
15.79
12.73
3.06
80.63
91.61
8.82
240.04
339.50
73.40
18.36
698.04
15.93
12.82
3.11
80.46
90.42
8.94
250.11
353.70
72.05
18.34
690.84
16.07
12.67
3.40
78.83
89.19
8.98
260.15
367.90
70.80
18.37
694.93
16.17
12.76
3.41
78.93
87.80
8.99
264.20
373.60
70.33
18.35
688.61
16.19
12.63
3.56
78.01
87.15
9.05
TABLE 5. PERFORMANCE DATA WITH 7 LED LOAD
VRMS (V)
VPK (V)
AVERAGE
IN (mA)
VOUT (V)
IOUT (mA)
PIN (W)
POUT (W)
PLOSS (W)
EFFI (%)
PF (%)
ATHD (%)
86.76
21.36
662.70
17.64
14.16
3.48
80.28
93.98
7.35
170.11
240.60
103.45
21.38
652.23
17.32
13.95
3.37
80.549
98.39
6.35
180.08
254.70
98.39
21.38
649.51
17.28
13.89
3.39
80.37
97.53
6.69
190.10
268.80
93.96
21.37
650.78
17.24
13.91
3.34
80.66
96.57
7.00
200.07
282.90
90.17
21.39
651.76
17.27
13.94
3.33
80.70
95.76
7.23
210.11
297.10
87.05
21.38
659.59
17.38
14.10
3.27
81.16
95.02
7.50
220.14
311.30
84.45
21.36
665.39
17.50
14.21
3.29
81.20
94.13
7.74
230.11
325.40
82.28
21.39
671.36
17.64
14.35
3.29
81.37
93.16
7.63
240.03
339.50
80.49
21.34
671.95
17.81
14.34
3.47
80.52
92.17
7.71
250.11
353.70
79.03
21.34
667.17
18.03
14.24
3.79
78.98
91.21
7.68
260.14
367.90
77.81
21.33
673.70
18.25
14.37
3.88
78.76
90.15
7.67
264.19
373.60
77.37
21.35
676.25
18.33
14.44
3.89
78.78
89.66
7.67
5
AN1845.0
August 28, 2013
Application Note 1845
90
100
7 LEDs
6 LEDs
7 LEDs
80
5 LEDs
75
70
6 LEDs
95
POWER FACTOR (%)
EFFICIENCY (%)
85
5 LEDs
90
85
65
60
150
180
210
240
80
150
270
180
LINE VOLTAGE (V)
FIGURE 10. EFFICIENCY WITH LINE VOLTAGE AT DIFFERENT
LOADS
210
LINE VOLTAGE (V)
240
270
FIGURE 11. POWER FACTOR WITH LINE VOLTAGE AT DIFFERENT
LOADS
15
760
740
LED CURRENT (mA)
6 LEDs
5 LEDs
THD (%)
10
7 LEDs
5
720
6 LEDs
5 LEDs
700
680
7 LEDs
660
640
620
0
150
180
210
240
270
LINE VOLTAGE (V)
FIGURE 12. THD WITH LINE VOLTAGE AT DIFFERENT LOADS
600
150
180
210
240
270
LINE VOLTAGE (V)
FIGURE 13. LED CURRENT WITH LINE VOLTAGE AT DIFFERENT
LOADS
Critical Waveforms
WAVEFORM SHOWING LINE VOLTAGE AND LINE CURRENT: PF = 0.92
LINE VOLTAGE AND CURRENT DURING STARTUP
LINE VOLTAGE
LINE VOLTAGE
LINE CURRENT
LINE
CURRENT
FIGURE 14. TRACE 3 - INPUT VOLTAGE [200V/DIV); TRACE 4 - INPUT
CURRENT [60mA/DIV)
6
FIGURE 15. INPUTS DURING STARTUP; TRACE 3 - INPUT VOLTAGE
[200V/DIV); TRACE 4 - INPUT CURRENT [60mA/DIV)
AN1845.0
August 28, 2013
Application Note 1845
Critical Waveforms
(Continued)
WAVEFORM DEPICTING SOFT-START
LED VOLTAGE
WAVEFORM SHOWING LED RIPPLE CURRENT - 35% PK-AVG RIPPLE
LED VOLTAGE
LED CURRENT
LED CURRENT
FIGURE 16. TRACE 3 - OUTPUT VOLTAGE [10V/DIV); TRACE 4 - LED
CURRENT [200mA/DIV)
FIGURE 17. TRACE 3 - OUTPUT VOLTAGE [10V/DIV); TRACE 4 - LED
CURRENT [200mA/DIV); LED CURRENT RIPPLE: 35%
PK-AVG OR 1.35 CREST FACTOR
SWITCHING WAVEFORMS
RECTIFIED
AC
LED
CURRENT
WAVEFORM SHOWING DRAIN-SOURCE VOLTAGE
RECTIFIED AC
VDRAIN
GATE
VDRAIN
GATE
FIGURE 18. TRACE 1 - DRAIN VOLTAGE [100V/DIV); TRACE 2 - GATE
[10V/DIV); TRACE 3 - RECTIFIED AC [200V/DIV); TRACE
4 - LED CURRENT [1A/DIV)
WAVEFORM SHOWING ZERO VOLTAGE SWITCHING BEHAVIOR
FIGURE 19. TRACE 1 - DRAIN VOLTAGE [100V/DIV); TRACE 2 - GATE
[10V/DIV); SWITCHING WAVEFORMS
WAVEFORM SHOWING OC (MOSFET CURRENT) WAVEFORM
OC
VDRAIN
VDRAIN
GATE
GATE
FIGURE 20. TRACE 1 - DRAIN VOLTAGE [100V/DIV); TRACE 2 - GATE
[10V/DIV); TDELAY = 1.07µs; PARTIAL ZVS
7
FIGURE 21. TRACE 1 - DRAIN VOLTAGE [100V/DIV); TRACE 2 - GATE
[10V/DIV); TRACE 3 - DRAIN CURRENT OR OC
[300mV/DIV)
AN1845.0
August 28, 2013
Application Note 1845
Dimming Compatibility
Dimming Curve
The requirement to provide output dimming with low cost, TRIAC
based, leading-edge phase dimmers introduced a number of
trade-offs in the design.
To overcome these issues, an active dimmer current holding
circuit (DHC pin, R17), passive bleeder circuit (C14, R34) and an
active damping circuit (Q3, D18, R44, C33 and R41) are
incorporated into the design. These circuits result in increased
power dissipation and hence reduce electrical efficiency and
overall lamp efficacy. For non-dimming applications, these
circuits can be omitted.
700
LED CURRENT (mA)
Due to the much lower power consumed by LED based lighting,
the current drawn by the lamp during dimming is below the
holding current of the TRIAC within many dimmers. This causes
undesirable behavior - limited dimming range and/or flickering
when the TRIAC fires inconsistently. The relatively large
impedance presented to the line by the LED driver allows
significant ringing to occur due to the inrush current charging the
input capacitance when the TRIAC turns on. This effect can cause
similar undesirable behavior, as the ringing may cause the TRIAC
current to fall to zero and turn off prematurely.
800
600
500
DIMMER SLIDER FROM
HIGH TO LOW - DIMMING
400
300
DIMMER SLIDER FROM
LOW TO HIGH
200
100
0
0
20
40
60
80
100
AC CONDUCTION ANGLE (%)
FIGURE 22. DIMMING CURVE - RAMPING DOWN AND RAMPING UP
THE DIMMER; DIMMER USED: LEADING EDGE 600VA
CHINESE DIMMER
TABLE 6. DIMMING DATA
CONDUCTION ANGLE
(%)
LED CURRENT
(mA)
% OF LED CURRENT MEASURED
(%)
% OF LIGHT PERCEIVED
BY HUMAN EYE
100
685
100
100
91
685
100
100
80
685
100
100
70
651
95.04
97.49
60
556
81.17
90.09
50
444
64.82
80.51
40
325
47.45
68.88
30
222
32.41
56.93
20
122
17.81
42.2
10
21
3.07
17.51
8
4
0.58
7.64
8
AN1845.0
August 28, 2013
Application Note 1845
Dimming Waveforms
WAVEFORM SHOWING LINE VOLTAGE AND CURRENT;
CONDUCTION ANGLE: 90.6%
WAVEFORM SHOWING LINE VOLTAGE AND CURRENT;
CONDUCTION ANGLE: 80%
LINE VOLTAGE
LINE VOLTAGE
LINE CURRENT
LINE CURRENT
FIGURE 23. TRACE 3 - LINE VOLTAGE [300V/DIV); TRACE 4 - LINE
CURRENT [80mA/DIV); 90.6% CONDUCTION ANGLE
WAVEFORM SHOWING LINE VOLTAGE AND CURRENT;
CONDUCTION ANGLE: 50%
FIGURE 24. TRACE 3 - LINE VOLTAGE [300V/DIV); TRACE 4 - LINE
CURRENT [80mA/DIV); 80% CONDUCTION ANGLE
WAVEFORM SHOWING LINE VOLTAGE AND CURRENT;
CONDUCTION ANGLE: 30%
LINE VOLTAGE
LINE VOLTAGE
LINE CURRENT
LINE CURRENT
FIGURE 25. TRACE 3 - LINE VOLTAGE [300V/DIV); TRACE 4 - LINE
CURRENT [80mA/DIV); 50% CONDUCTION ANGLE
WAVEFORM SHOWING LINE VOLTAGE AND CURRENT;
CONDUCTION ANGLE: 10%
LINE VOLTAGE
LINE CURRENT
FIGURE 27. TRACE 3 - LINE VOLTAGE [300V/DIV); TRACE 4- LINE
CURRENT [80mA/DIV); 10% CONDUCTION ANGLE
9
FIGURE 26. TRACE 3 - LINE VOLTAGE [300V/DIV); TRACE 4 - LINE
CURRENT [80mA/DIV); 30% CONDUCTION ANGLE
WAVEFORM SHOWING LINE VOLTAGE AND CURRENT;
CONDUCTION ANGLE: 6.25%
LINE VOLTAGE
LINE CURRENT
FIGURE 28. TRACE 3 - LINE VOLTAGE [300V/DIV); TRACE 4- LINE
CURRENT [80mA/DIV); 6.95% CONDUCTION ANGLE
AN1845.0
August 28, 2013
Application Note 1845
Overvoltage Protection
OPEN CIRCUIT PROTECTION
LED CURRENT
VDD
OVP
FIGURE 29. TRACE 1 - V DD [20V/DIV); TRACE 2- OVP [900mV/DIV); TRACE 4 - LED CURRENT [400mA/DIV)
EMI Results - Cispr 22 Class B
QUASI PEAK
AVERAGE
FIGURE 30. LINE AT 230V, 50Hz
QUASI PEAK
AVERAGE
FIGURE 31. NEUTRAL AT 230V, 50Hz
10
AN1845.0
August 28, 2013
Application Note 1845
TABLE 7. QUASI PEAK AND AVERAGE READINGS
CLASS B
FREQUENCY (MHz)
LEVEL (dBµV)
AC LINE
LIMIT
MARGIN
3.513
45.5
Line 1
56
-10.5
0.268
49.3
Neutral
61.2
-11.9
2.61
44.1
Neutral
56
-11.9
3.009
43.6
Neutral
56
-12.4
3.535
43.6
Neutral
56
-12.4
3.134
43.5
Neutral
56
-12.5
0.284
47.9
Neutral
60.7
-12.8
3.41
43
Line 1
56
-13
3.008
42.2
Line 1
56
-13.8
2.612
41.2
Line 1
56
-14.8
0.262
46.3
Line 1
61.4
-15.1
3.513
30.8
Line 1
46
-15.2
3.535
30.7
Neutral
46
-15.3
0.28
44.5
Line 1
60.8
-16.3
3.41
29.4
Line 1
46
-16.6
3.134
29.4
Neutral
46
-16.6
3.009
29.2
Neutral
46
-16.8
2.61
28.2
Neutral
46
-17.8
3.008
27.7
Line 1
46
-18.3
0.268
32.9
Neutral
51.2
-18.3
2.612
25.9
Line 1
46
-20.1
0.262
30.6
Line 1
51.4
-20.8
0.284
27.8
Neutral
50.7
-22.9
0.28
25.6
Line 1
50.8
-25.2
11
AN1845.0
August 28, 2013
Application Note 1845
Temperature Mapping
FIGURE 32. TOP SIDE TEMPERATURE SNAPSHOT DURING 100%
CONDUCTION AND FULL LOADING
FIGURE 33. BOTTOM SIDE TEMPERATURE SNAPSHOT DURING 100%
CONDUCTION AND FULL LOADING
FIGURE 34. TOP SIDE TEMPERATURE SNAPSHOT DURING DEEP
DIMMING
FIGURE 35. BOTTOM SIDE TEMPERATURE SNAPSHOT DURING DEEP
DIMMING
12
AN1845.0
August 28, 2013
Application Schematic
1200mH
PA2517NL
L5
LED Driver with Triac Dimming
600V, 0.5A
MB6S
10mH
JP1
13
C34
176V-264V,
50Hz
499k
1206
ac1
+
47nF,
400V
R2
499k
1206
R34
450V
100nF, 10%
47nF,
400V
_
Dclamp
R39
DNP
D14
D2
NEUTRAL
650V, 7A
TK5P60V
21.5k
0603
R30
D10
16V
100nF, 10%
499O
0603
D18
D16
1.5O
1206
1.3O
1206
50V
100pF, 5%
R37
R38
400V
2200pF, 20%
1.58k
0603
MCL4448
C18
4.99k
0603
DNP
0603
C33
R33
MCL4448
G
C20
R10
Q1
R29
DHC
R41
LED 10O
0805
BAV70
70V, 0.2A
Application Note 1845
13V
Zener
600V
1A
Cout3
Vdrain
102O
1206
47k
0603
25V
1µF, 10%
G
R17
R44
LED
Load
2SK3471
680
2512
300O
2512
25V
680µF, 20%
10O
0603
Q2
~
25V
680µF, 20%
220k
1206
C28
C10
450V
330nF, 10%
~
5.4mH
R8
D1
C14
R1
L1
Cout1
DNP
DNP
400O
RES100
Rsense1
10O
Cclamp
Rclamp
R36
Cout2
400O
RES100
R7
L2
JP2
R9
220k
1206
Rsense
R4
LED +
300V, 2A
PDS3200-13-T
10mH,
0.13A
LINE
18V, 660mA
D15
T1
Q3
500V
0.38A
1 VDD
OUT 16
2 OFFREF PWMOUT 15
ISL1904DEMO1Z Rev D
R19
R40
C6
R21
DNP
DHC 14
4 IOUT
GND 13
5 CS+
510k
0603
DNP
3 VREF
4.99k
0603
2Meg
0805
R14
NC
DHC
ac1
AC 12
6 OC
OVP 11
7 FB
RAMP 10
8 DELADJ
VERR 9
ISL1904
16V
100nF, 10%
R20
R22
1k
0603
C31
C30
C29
25V
33µF, 20%
C12
R13
C4
16V
0.1µF, 10%
25V
220µF, 20%
R16
51k
0603
91k
0603
C5
C17 R15
R3
C2
50V
1000pF, 5%
16V
0.1µF, 10%
50V
100pF, 5%
90k
0603
4.02k
0603
AN1845.0
August 28, 2013
Application Note 1845
Electrical Bill of Materials
TABLE 8. BOM FOR ISL1904DEMO1Z REV. D
QTY
REFERENCE DESIGNATOR
TYPE/MOUNT/PACKAGE/VOL/TOL/MAT
MANUFACTURER
PANASONIC
MANUFACTURER PART #
2
C10, C34
Cap, TH, CAPR_190x90_200, 47n, 400V, 10%, X7R
ECQ-E4473KF
3
C2, C4, C6
Cap, SM, 0603, 100n, 16V, 10%, MKT
H1045-00104-16V10
1
C5
Cap, SM, 1000p, 50V, 5%, MKT
H1045-00102-50V5
1
C12
Cap, TH, CAPR_248x354_100_P, 220µ, 25V, 20%
RUBYCON
25PX220MEFC6.3X11
1
C14
Cap, TH, CAPR_472x248_400, 0.33µ, 450V, 10%
PANASONIC
ECW-F2W334JAQ
1
C17
Cap, SM, 0603, 100p, 50V, 10%
1
C18
Cap, SM, 0603, 10p, 50V, 5%, C0G
1
C20
Cap, TH, CAPR_394x500_160, 2200p, 400V
VISHAY
440LD22-R
1
C28
Cap, TH, CAPR_472x248_400, 0.1µ, 400V, 10%
PANASONIC
ECQ-E4104KF
3
C29, C30, C31
Cap, SM, 1206, 33µ, 25V, 20%
1
C33
Cap, SM, 0805, 100n, 25V, 10%
1
Cclamp
Cap, SM, 1206, DNP
2
Cout1, Cout2
Cap, TH, CAPR_393x630_200_P, 680µ, 25V, ALUM
1
Cout3
Cap, SM, 1206, 1µ, 25V, 10%
1
DB
Diode, SMD, DIO_MCC_MBS, 600V, 05A
1
Dclamp
Diode, SMA, DNP
1
D2
2
H1045-00101-50V10
H1065-00336-25V20-T
PANASONIC
EEUFR1E681
MICRO COM
MB6D-TP-T
Diode, SM, SOD123FL, 13V, zener
MICRO COM
BZX84C20/MMSZ5243BTP
D10, D16
Diode, SM, MCL4448, 75V, 200mA, general purpose
VISHAY
MCL4448
1
D14
Diode, SM, SOT23, 75V, 150mA, switching
NXP
BAV70-TP
1
D15
Diode, SM, SOD123FL, 600V, 1A, ultra fast
DIODES INC
PDS3200-13-T
1
D18
Diode, SM, DIO_POWERD1-5, 200V, 3A, ultra fast
MICRO COM
SM4005PL-TP
1
F1
RES, TH, RES100, 10 Ohms, fusible
YAGEO
FKN1WSJR-52-10R
1
L1
IND, TH, 11x17x17mm, 5.4mH, common mode
WURTH
744862056
2
L2, L5a
IND, TH, 10mH, Radial
RENCO
1
Q1
MOSFET, TH, TO251, 600V, 7.5A
TOSHIBA
TK5Q60V
1
Q2
MOSFET, SMD, SOT89, 500V, 0.5A
TOSHIBA
2SK3471
1
Q3
MOSFET, TH, TO92, 500V, 0.38A
FAIRCHILD
FQN1N50CTA
1
Rclamp
Res, SM, 1206, DNP
1
Rsense
Res, SM, 1206, 1.5, 1%, Thick Film
1
Rsense1
Res, SM, 1206, 1.2, 1%, Thick Film
-
2
R1, R2
Res, SM, 1206, 499k, 1%, Thick Film
H2511-04993-1/8W1
1
R3
Res, SM, 0603, 4.02k, 1%, Thick Film
H2511-04021-1/16W1
2
R7, R8
Res, SM, 1206, 220k, 1%, Thick Film
H2513-02203-1/8W5
2
R9, R36
Res, SM, 1210, 499, 1%, Thick Film
2
R10, R39
Res, SM, 0805, 10, 1%, Thick Film
H2512-00100-1/10W1
1
R13
Res, SM, 0603, 43k, 1%, Thick Film
H2511-04302-1/16W5
1
R14
Res, SM, 0805, 2Meg, 1%, Thick Film
2
R15, R16
Res, SM, 0603, 91k, 1%, Thick Film
14
H2511-09112-1/16W1
AN1845.0
August 28, 2013
Application Note 1845
TABLE 8. BOM FOR ISL1904DEMO1Z REV. D (Continued)
QTY
REFERENCE DESIGNATOR
TYPE/MOUNT/PACKAGE/VOL/TOL/MAT
MANUFACTURER
MANUFACTURER PART #
1
R17
Res, SM, 1206, 102, 1% ,Thick Film
H2513-01020-1/8W1
1
R19
Res, SM, 0603, 510k, 1%, Thick Film
H2511-05103-1/16W5
2
R20, R37
Res, SM, 0603, 4.99k, 1%, Thick Film
H2511-04991-1/16W1
2
R21, R40
Res, SM, 0603, DNP
1
R22
Res, SM, 0603, 1k, 1%, Thick Film
1
R29
Res, SM, 0603, 21.5k, 1%, Thick Film
1
R30
Res, SM, 0603, 499, 1%, Thick Film
1
R33
Res, SM, 0603, 1.58k, 1%, Thick Film
1
R34
Res, SM, 2512, 680, 1%, Thick Film
1
R38
Res, SM, 0603, DNP
1
R41
Res, SM, 2512, 300, 1%, Thick Film
1
R44
Res, SM, 1206, 47k, 1%, Thick Film
1
T1
xfmr, TH, 1.2mH, 8:1 turns ratio
PULSE
PA2517NL
1
U1
IC, SM, QSSOP, ISL1904FAZ
INTERSIL
ISL1904FAZ
15
H2511-02152-1/16W1
H2511-04990-1/16W1
AN1845.0
August 28, 2013
Application Note 1845
Assembly Drawing
FIGURE 36. SILKSCREEN TOP
FIGURE 37. SILKSCREEN BOTTOM
16
AN1845.0
August 28, 2013
Application Note 1845
PCB Layout
FIGURE 38. ASSEMBLY TOP
FIGURE 39. ASSEMBLY BOTTOM
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
17
AN1845.0
August 28, 2013