TLE4966V-1K In Plane Sensing with Vertical Dual Hall Effect Latch for Automotive Applications Data Sheet Revision 1.0, 2014-05-13 Sense & Control Edition 2014-05-13 Published by Infineon Technologies AG 81726 Munich, Germany © 2014 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. TLE4966V-1K Revision History Page or Item Subjects (major changes since previous revision) Revision 1.0, 2014-05-13 Trademarks of Infineon Technologies AG AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2011-02-24 Data Sheet 3 Revision 1.0, 2014-05-13 TLE4966V-1K Table of Contents Table of Contents Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1 1.1 1.2 Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Target Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 2.1 2.2 2.3 2.4 2.5 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin Configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Start-up Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 3.1 3.2 3.3 3.4 3.5 Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Magnetic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electro Magnetic Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Timing Diagrams for the Speed and Direction Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Data Sheet 4 14 14 15 16 17 18 Revision 1.0, 2014-05-13 TLE4966V-1K List of Figures List of Figures Figure 1-1 Figure 1-2 Figure 2-1 Figure 2-2 Figure 2-3 Figure 2-4 Figure 2-5 Figure 2-6 Figure 2-7 Figure 3-1 Figure 4-1 Figure 4-2 Figure 4-3 Figure 5-1 Figure 5-2 Figure 5-3 Figure 5-4 Figure 5-5 Figure 5-6 Image of TLE4966V in the PG-TSOP6-6-5 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Target Application (top and side view): Sensing Direction parallel to target wheel . . . . . . . . . . . . . 7 Target Application: Side view and top view for In-Plane Sensing. . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Magnetic field signal with the corresponding speed & direction output including the definition of the direction signal 9 PG-TSOP6-6-5 Pin Configuration and sensitive area (d = 1.25mm) (see table 2-2) . . . . . . . . . . . 10 Functional Block Diagram of the TLE4966V-1K . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Start-up behavior of the at different magnetic start conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Basic Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Enhanced Application Circuit for very high ESD robustness on system level . . . . . . . . . . . . . . . . 13 EMC test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Timing Diagram TLE4966V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 TLE4966V - Output Voltage Signal over applied magnetic Field . . . . . . . . . . . . . . . . . . . . . . . . . . 19 TLE4966V - Definition of the direction signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Image of TLE4966V in the PG-TSOP6-6-5 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 PG-TSOP6-6-5 Package Outline (All dimensions in mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 PG-TSOP6-6-5 Packing (All dimensions in mm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Footprint of PG-TSOP-6-6-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Distance between chip and package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Marking of TLE4966V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Data Sheet 5 Revision 1.0, 2014-05-13 TLE4966V-1K List of Tables List of Tables Table 1-1 Table 2-1 Table 2-2 Table 3-1 Table 3-2 Table 3-3 Table 3-4 Table 3-5 Table 3-6 Table 3-7 Table 4-1 Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Output Pin Q1 Direction Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Pin Description PG-TSOP6-6-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Absolute Maximum Rating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 ESD Protection (TA = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Operating Conditions Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 General Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Magnetic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Magnetic Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Electro Magnetic Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Output Pin Q1 Direction Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Data Sheet 6 Revision 1.0, 2014-05-13 TLE4966V-1K Product Description 1 Product Description 1.1 Target Applications The TLE4966V-1K is specifically designed to detect the rotation direction and the rotation speed of a pole wheel.The sensing direction is in-plane to the sensor surface. Even at high distances to the hall elements the direction will be detected correctly. Figure 1-1 Image of TLE4966V in the PG-TSOP6-6-5 package Hall Elements N S S N S S N 3 5 2 6 1 S N S N Rotation Direction N 4 N S N S N S S N Branded Side of IC Magnetic Encoder Figure 1-2 Target Application (top and side view): Sensing Direction parallel to target wheel 1.2 • • • • • • • • • • • • • Features In-Plane Sensing for parallel mounting of magnetic encoder and sensor Low current consumption Direction Detection Speed output for index counting applications 3.5V to 32V operating supply voltage Operating from unregulated power supply Reverse polarity protection (-18V) Over voltage capability up to 42V without external resistor Output over current and over temperature protection High robustness to mechanical stress by Active Error Compensation Low drift of magnetic thresholds Low jitter (typ. 0.3us) SMD package PG-TSOP6-6-5 Table 1-1 Ordering Information Product Name Product Type Ordering Code Package TLE4966V-1K Dual Vertical Hall Latch SP000997990 TSOP6-6-5 Data Sheet 7 Revision 1.0, 2014-05-13 TLE4966V-1K Functional Description 2 Functional Description The TLE4966V-1K is specifically designed to detect the direction and rotational speed of a pole wheel as shown in Figure 1-2. 2.1 General The new Infineon Vertical Double Hall Switch TLE4966V-1K has integrated the functionality of detecting speed and direction of a rotating magnet, commonly known as pole wheel. Note: Completely new is the in plane field direction which will be detected with the TLE4966V-1K shown in Figure 2-1 which enables completely new application layouts. 2 1 1 5 S 6 6 S N 4 Branded Side Pin6 GND Pin3 Q1 Direction 3 Pin4 VDD V-Hall elements Centered N Pin1 Q2 Speed Figure 2-1 Target Application: Side view and top view for In-Plane Sensing The sensor provides a speed output at Q2 with the status (high or low) corresponding to the magnetic field value. For positive magnetic fields (south pole) exceeding the threshold BOP the output is low, whereas for negative magnetic fields (north pole) lower than BRP the output switches to high. The output Q1 can be either high or low depending on the direction of rotation of the pole wheel. This direction information is calculated internally. (see Table 2-2) Designed in a new technology, this device offers high voltage capabilities with very small current consumption. The product can be operated from unregulated power supplies which offers our customers unique freedom of design for their system. This product is AEC Q100 certified and enables our customers to build systems for the highest automotive quality requirements. The product has a TSOP6 package, which is RoHs compliant and fulfills the usual automotive environmental guidelines. Application Examples are: • • • Window lifter (index counting) Power closing (index counting) All applications with the need of speed and direction detection. Figure 2-2 and Table 2-1 show the mapping of a pole wheel with the two corresponding output signals of the device. Data Sheet 8 Revision 1.0, 2014-05-13 TLE4966V-1K Functional Description N S N S N S N S N S N S N Signal @ Element1 BOP1 & B OP2 BRP1 & B RP2 Signal @ Element2 Speed Signal Q2 Direction Signal Q1 Direction Change Figure 2-2 Magnetic field signal with the corresponding speed & direction output including the definition of the direction signal Table 2-1 Output Pin Q1 Direction Signals Rotation direction State of direction output Q1 Counterclockwise Low Clockwise High Data Sheet 9 Revision 1.0, 2014-05-13 TLE4966V-1K Functional Description 2.2 Pin Configuration (top view) d 6 5 4 h speed direction 2 3 1 PG-TSOP6-6-5 Figure 2-3 PG-TSOP6-6-5 Pin Configuration and sensitive area (d = 1.25mm) (see table 2-2) Table 2-2 Pin Description PG-TSOP6-6-5 Pin No. Symbol Function 1 Q2 Speed 2 GND Recommended connection to GND 3 Q1 Direction 4 VDD Supply voltage 5 GND Recommended connection to GND 6 GND Ground The sensitive elements are placed in an optimized distance (d) to guarantee the direction detection. To compensate package stress the sensitive elements are placed in the middle of the package (h). Data Sheet 10 Revision 1.0, 2014-05-13 TLE4966V-1K Functional Description 2.3 Block Diagram V DD Voltage Regulator (reverse polarity protected) ESD GND Oscillator & Sequencer Bias and Compensation Circuits Q2 (=Speed) Control Overtemperature & short-circuit protection Speed & Direction Detection Q1 (=Direction) Control Chopped Hall Probe Amplifier Filter Comparator with Hysteresis Overtemperature & short-circuit protection Figure 2-4 Functional Block Diagram of the TLE4966V-1K The chopped Dual Hall IC switch comprises a Hall probe, bias generator, compensation circuits, oscillator and output transistor. The bias generator provides currents for the Hall probe and the active circuits. Compensation circuits stabilize the temperature behavior and reduce influence of technology variations. The active error compensations (chopping technique) rejects offsets in the signal path. Therefore the influence of mechanical stress to the Hall elements caused by molding and soldering processes and other thermal stress in the package is minimized. The chopped measurement principle together with the threshold generator and the comparator ensures highly accurate and temperature stable magnetic thresholds. The output transistor has an integrated over current and over temperature protection to prevent the device from destruction. Data Sheet 11 Revision 1.0, 2014-05-13 TLE4966V-1K Functional Description 2.4 Start-up Behavior The magnetic threshold exhibit a hysteresis Bhys = Bop - Brp. In case of a power-on with a magnetic field B within hysteresis (Brp < B < Bop) the output of the sensor is set to the pull up voltage level “Vq” per default. After the first crossing of Bop or Brp of the magnetic field the internal decision logic is set to the corresponding magnetic input value. VDDA is the internal supply voltage which is following the external supply voltage VDD. This means for B > Bop the output is switching for B > Brp and Bop > B > Brp the output stays at VQ VDDA tPon 3.5V The device always applies VQ level at start -up Power on ramp VQ t independent from the applied magnetic field ! Magnetic field above threshold B > BOP t VQ Magnetic field below threshold B < BRP t VQ Magnetic field in hysteresis BOP > B > BRP t Figure 2-5 Start-up behavior of the at different magnetic start conditions Data Sheet 12 Revision 1.0, 2014-05-13 TLE4966V-1K Functional Description 2.5 Application Circuit The Figure 2-6 below shows the basic option of an application circuit. The Resistor Rq has to be in a dimension to match the applied Vs to keep Iq limited to the operating range of maximal 10mA. For example: Vs = 12V, Iq = 10mA --> R = 12V / 0.01A = 1.2kΩ. In Figure 2-7 the additional ESD Diodes are optional to achieve an increased ESD robustness at the Q pins. Additional with the (optional) 47nF between Vdd and GND a high system level robustness is achieved. VS RQ TLE4966V RQ Q1 Q2 GND Figure 2-6 Basic Application Circuit RQ RQ RS = 100Ω RQ = 1.2kΩ RS VS TLE4966V VDD CDD = 47nF GND Q1 Q2 TVS diodes e.g. ESD24VS2U Figure 2-7 Enhanced Application Circuit for very high ESD robustness on system level Data Sheet 13 Revision 1.0, 2014-05-13 TLE4966V-1K Specification 3 Specification 3.1 Absolute Maximum Ratings Table 3-1 Absolute Maximum Rating Parameters Parameter Symbol Supply voltage VDD Limit Values Unit Min. Max. -18 32 42 V 32 V Note / Test Condition 10h, no external resistor required Output voltage VQ -0.5 Reverse output current IQ -35 Junction temperature TJ -40 155 165 175 °C Storage temperature TS -40 150 °C Thermal resistance Junction ambient RthJA 200 K/W for PG-TSOP6-6-5 Thermal resistance Junction lead RthJL 100 K/W for PG-TSOP6-6-5 mA for 2000h (not additive) for 1000h (not additive) for 168h (not additive) Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Calculation of the dissipated power PDIS and junction temperature TJ of the chip (TSPOP6 example): e.g for: VDD = 12 V, IS = 10mA, VQSAT = 0.5 V, IQ = 10mA Power dissipation: PDIS = 12 V x 10mA + 2 x (0.5 V x 10mA) = 120mW + 10mW = 130mW Temperature ∆T = RthJA x PDIS = 200K/W x 130mW = 26K For TA = 100°C: TJ = TA + ∆T = 100°C + 26K = 126°C Table 3-2 ESD Protection1) (TA = 25°C) Parameter Symbol 2) ESD voltage (HBM) System level test VESD Limit Values Unit Note / Test Condition Min. Max. -2 +2 kV R = 1.5kΩ, C = 100pF -6 +6 kV Figure 2-7 3) 1) Characterization of ESD is carried out on a sample basis. 2) Human Body Model (HBM) tests according to EIA/JESD22-A114 3) Gun test (2kΩ/330pF or 330Ω/150pF) according to ISO 10605-2008 Data Sheet 14 Revision 1.0, 2014-05-13 TLE4966V-1K Specification 3.2 Operating Range Attention: The following operating conditions must not be exceeded in order to ensure correct operation of the TLE4966V-1K. All parameters specified in the following sections refer to these operating conditions unless otherwise mentioned. Table 3-3 Operating Conditions Parameters Parameter Symbol Values Min. Typ. Unit Max. Supply voltage VDD 3.5 321) V Output voltage VQ -0.3 32 V Junction temperature Tj -40 150 °C IQ 0 10 mA fmag 0 5 kHz Output current Magnetic signal input frequency 2) Note / Test Condition 1) Latch-up test with factor 1.5 is not covered. Please see max ratings also. 2) For operation at the maximum switching frequency the magnetic input signal must be 1.4 times higher than for static fields. This is due to the -3dB corner frequency of the internal low-pass filter in the signal path. Data Sheet 15 Revision 1.0, 2014-05-13 TLE4966V-1K Specification 3.3 Electrical Characteristics Table 3-4 General Electrical Characteristics Parameter Symbol Values Unit Min. Typ. Max. Note / Test Condition Supply current IS 3.9 5.8 7.5 mA Reverse current ISR - 0.05 1 mA for VDD = -18V Output saturation voltage VQSAT - 0.2 0.5 V IQ = 10mA Output leakage current IQLEAK - - 5.0 μA T=150°C, 12V Output current limitation IQLIMIT 20 30 40 mA internally limited & thermal shutdown Output fall time1) tf 0.1 0.2 1 μs 1.2kΩ2)/ 50pF, see Figure 4-1 Output rise time1) tr 0.1 0.2 1 μs 1.2kΩ2)/ 50pF, see Figure 4-1 Output jitter3)1) tQJ 0.3 1 μs For square wave signal with 1kHz Effective noise value of the magnetic switching points4)1) BNeff 45 Delay time5)1) td 8 20 30 μs Bpeak=10mT, Ramp=500mT/s; see Figure 4-1 Signal Count Delay1) tdc 50 400 1000 ns 1.2kΩ/50pF @ Vq=12V, Direction before Speed Signal, 50% to 50% Power-on time6)1) tPON 48 84 120 μs VDD = 3.5 V, B ≤ BRP - 0.5 mT or B ≥ BOP + 0.5 mT Chopper frequency1) fOSC 1300 μTRMS kHz 1) 2) 3) 4) Not subject to production test, verified by design/characterization Current limitation has to be taken into consideration for Vs > 12V in order not to exceed 10mA Output jitter is the 1σ value of the output switching distribution. The magnetic noise is normal distributed and can be assumed as nearly independent to frequency without sampling noise or digital noise effects. The typical value represents a the rms-value and corresponds therefore to a 1 σ probability of normal distribution. Consequently a 3 σ value corresponds to 0.3% probability of appearance. 5) Systematic delay between magnetic threshold reached and output switching. 6) Time from applying VDD = 3.0 V to the sensor until the output is valid. Data Sheet 16 Revision 1.0, 2014-05-13 TLE4966V-1K Specification 3.4 Magnetic Characteristics Table 3-5 Magnetic Characteristics Parameter Operating point Release point Hysteresis Magnetic Matching Magnetic Offset Temperature Compensation1) Symbol T (°C) BOP BRP BHys BMatch BOff TC Values Unit Min. Typ. Max. -40 1.1 2.8 4.5 25 0.9 2.5 4.1 150 0.4 1.9 3.3 -40 -4.5 -2.8 -1.1 25 -4.1 -2.5 -0.9 150 -3.3 -1.9 -0.4 -40 3.6 5.3 7.4 25 3.4 5.0 6.8 150 2.5 3.7 5.2 Note / Test Condition mT mT mT -1.0 +1.0 -1.5 +1.5 -1.0 +1.0 mT (Bop + Brp) / 2; -40..125°C -1.5 +1.5 mt (Bop + Brp) / 2; -40..150°C ppm/K ferrite magnet -1700 mT for (Bop1 - Bop2) and (Brp1 - Brp2); -40..125°C -40..150°C 1) Not subject to production test, verified by design/characterization The initial status of Q1 and Q2 after power on is Vq high (=OFF)! Data Sheet 17 Revision 1.0, 2014-05-13 TLE4966V-1K Specification 3.5 Electro Magnetic Compatibility Characterization of Electro Magnetic Compatibility is carried out on a sample basis from one qualification lot. Not all specification parameters have been monitored during EMC exposure. VQ = 5V VS RQ RQ R Q=1.2kΩ RS RS = 100Ω TLE4966V-X VDD CDD = 47nF GND Q1 Q2 TVS diodes e.g. ESD24VS2U Figure 3-1 EMC test circuit Ref: ISO 7637-2 (Version 2004), test circuit Figure 3-1 (with external resistor, Rs = 100Ω) Table 3-6 Magnetic Compatibility Parameter Symbol Level / Type Status Testpulse 1 Testpulse 2a1) Testpulse 2b Testpulse 3a Testpulse 3b Testpulse 42) Testpulse 5b3) VEMC -90V 60V/110V 10V -150V 100V -7V / -5.5V US = 86.5 V / US* = 28.5 V C A/C C A A A A 1) ISO 7637-2 (2004) describes internal resistance = 2Ω (former 10Ω). 2) According to 7637-2 for test pulse 4 the test voltage shall be 12 V +/- 0.2 V. 3) A central load dump protection of 42 V is used. US* = 42 V-13.5V. Ref: ISO 7637-2 (Version 2004), test circuit Figure 3-1 (without external resistor, RS = 0Ω) Table 3-7 Electro Magnetic Compatibility Parameter Symbol Level / Type Status Testpulse 1 Testpulse 2a1) Testpulse 2b Testpulse 3a Testpulse 3b Testpulse 42) Testpulse 5b3) VEMC -50V 45V 10V -150V 100V -7V / 5.5 V US = 86.5 V / US* = 28.5 V C A C A A A A 1) ISO 7637-2 (2004) describes internal resistance = 2Ω (former 10Ω). 2) According to 7637-2 for test pulse 4 the test voltage shall be 12 V +/- 0.2 V. 3) A central load dump protection of 42 V is used. US* = 42 V-13.5V. Data Sheet 18 Revision 1.0, 2014-05-13 TLE4966V-1K Timing Diagrams for the Speed and Direction Output 4 Timing Diagrams for the Speed and Direction Output Applied Magnetic Field BOP BRP td td tf VQ tr 90% 10% Figure 4-1 Timing Diagram TLE4966V VQ B BRP 0 BOP Figure 4-2 TLE4966V - Output Voltage Signal over applied magnetic Field Data Sheet 19 Revision 1.0, 2014-05-13 TLE4966V-1K Timing Diagrams for the Speed and Direction Output N S S N S N S N Rotation Direction N S N S N S S N Branded Side of IC Figure 4-3 TLE4966V - Definition of the direction signal Table 4-1 Output Pin Q1 Direction Signals Rotation direction State of direction output Q1 Counterclockwise Low Clockwise High Data Sheet 20 Revision 1.0, 2014-05-13 TLE4966V-1K Package Information 5 Package Information Figure 5-1 Image of TLE4966V in the PG-TSOP6-6-5 package Figure 5-2 PG-TSOP6-6-5 Package Outline (All dimensions in mm) Data Sheet 21 Revision 1.0, 2014-05-13 TLE4966V-1K Package Information Figure 5-3 PG-TSOP6-6-5 Packing (All dimensions in mm) 2.9 1.9 0.5 0.95 Remark: Wave soldering possible dep. on customers process conditions HLG09283 Figure 5-4 Footprint of PG-TSOP-6-6-5 Data Sheet 22 Revision 1.0, 2014-05-13 TLE4966V-1K Package Information d2 d1 Branded Side d1 = 0.59 ± 0.1 mm d2 = 0.45 ± 0.1 mm s 6V y m Figure 5-5 Distance between chip and package Year (y) = 0...9 Month (m) = 1... 9, O ‐ October N ‐ November D ‐ December Figure 5-6 Marking of TLE4966V Data Sheet 23 Revision 1.0, 2014-05-13 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG