Radiation Hardened 3.3V Quad Differential Line Drivers HS-26CLV31RH, HS-26CLV31EH Features The Intersil HS-26CLV31RH, HS-26CLV31EH are radiation hardened 3.3V quad differential line drivers designed for digital data transmission over balanced lines, in low voltage, RS-422 protocol applications. CMOS processing assures low power consumption, high speed, and reliable operation in the most severe radiation environments. • Electrically screened to SMD # 5962-96663 The HS-26CLV31RH, HS-26CLV31EH accept CMOS level inputs and converts them to differential outputs. Enable pins allow several devices to be connected to the same data source and addressed independently. These devices have unique outputs that become high impedance when the driver is disabled or powered-down, maintaining signal integrity in multi-driver applications. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-96663. A “hot-link” is also provided on our homepage for downloading. • QML qualified per MIL-PRF-38535 requirements • 1.2 micron radiation hardened CMOS - Total dose . . . . . . . . . . . . . . . . . . . . . . . . . 300 krad(Si)(max) - Single event upset LET . . . . . . . . . . . . . 100MeV/mg/cm2) - Single event latch-up immune • Extremely low stand-by current . . . . . . . . . . . . . 100µA (max) • Operating supply range . . . . . . . . . . . . . . . . . . . . . 3.0V to 3.6V • CMOS level inputs . . . . . . . .VIH > (0.7)(VDD); VIL < (0.3)(VDD) • Differential outputs . . . . . . . . . . . . . . . VOH > 1.8V; VOL < 0.5V • High impedance outputs when disabled or powered down • Low output impedance . . . . . . . . . . . . . . . . . . . . . .10Ω or less • Full -55°C to +125°C military temperature range • Pb-Free (RoHS Compliant) Applications • Line transmitter for MIL-STD-1553 serial data bus Ordering Information ORDERING NUMBER (Note) INTERNAL MKT. NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE (RoHS Compliant) PKG. DWG. # 5962F9666302QEC HS1-26CLV31RH-8 Q 5962F96 66302QEC -55 to +125 16 Ld SBDIP D16.3 5962F9666302QXC HS9-26CLV31RH-8 Q 5962F96 66302QXC -55 to +125 16 Ld FLATPACK K16.A 5962F9666302VEC HS1-26CLV31RH-Q Q 5962F96 66302VEC -55 to +125 16 Ld SBDIP D16.3 5962F9666302VXC HS9-26CLV31RH-Q Q 5962F96 66302VXC -55 to +125 16 Ld FLATPACK K16.A 5962F9666302V9A HS0-26CLV31RH-Q -55 to +125 Die HS1-26CLV31RH/PROTO HS1-26CLV31RH/PROTO HS1-26CLV31RH/PROTO -55 to +125 16 Ld SBDIP D16.3 HS9-26CLV31RH/PROTO HS9-26CLV31RH/PROTO HS9-26CLV31RH/PROTO -55 to +125 16 Ld FLATPACK K16.A 5962F9666304VEC HS1-26CLV31EH-Q Q 5962F96 66304VEC -55 to +125 16 Ld SBDIP D16.3 5962F9666304VXC HS9-26CLV31EH-Q Q 5962F96 66304VXC -55 to +125 16 Ld FLATPACK K16.A 5962F9666304V9A HS0-26CLV31EH-Q -55 to +125 Die HS0-26CLV31RH/SAMPLE HS0-26CLV31RH/SAMPLE -55 to +125 Die NOTE: These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. December 12, 2012 FN4898.3 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc.2000, 2008, 2009, 2012. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. HS-26CLV31RH, HS-26CLV31EH Pin Configurations HS9-26CLV31RH, HS9-26CLV31EH (16 LD FLATPACK) CDFP4-F16 TOP VIEW HS1-26CLV31RH, HS1-26CLV31EH (16 LD SBDIP) CDIP2-T16 TOP VIEW AIN 1 16 VDD AIN 1 16 VDD AO 2 15 DIN AO 2 15 DIN AO 3 14 DO AO 3 14 DO ENABLE 4 13 DO BO 5 12 ENABLE BO 6 11 CO BIN 7 10 CO GND 8 9 CIN 13 DO ENABLE 4 BO 5 12 ENABLE BO 6 11 CO BIN 7 10 CO GND 8 9 CIN Logic Diagram ENABLE ENABLE DIN CIN BIN AIN DO DO CO CO BO BO AO AO For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 2 FN4898.3 December 12, 2012 HS-26CLV31RH, HS-26CLV31EH Die Characteristics DIE DIMENSIONS: Substrate: 96.5 mil x 195 mils x 21 mils (2450 x 4950) AVLSI1RA Backside Finish: INTERFACE MATERIALS: Silicon Glassivation: ASSEMBLY RELATED INFORMATION: Type: PSG (Phosphorus Silicon Glass) Thickness: 8kÅ ±1kÅ Substrate Potential (Powered Up): VDD Metallization: ADDITIONAL INFORMATION: Bottom: Mo/TiW Thickness: 5800Å ±1kÅ Top: AlSiCu (Top) Thickness: 10kÅ ±1kÅ Worst Case Current Density: <2.0 x 105A/cm2 Bond Pad Size: 110µm x 100µm Metallization Mask Layout HS-26CLV31RH, HS-26CLV31EH (15) DIN (16) VDD (16) VDD (1) AIN TABLE 1. HS-26CLV31RH, HS-26CLV31EH PAD COORDINATES AO (2) RELATIVE TO PIN 1 PIN NUMBER PAD NAME 1 AIN 0 0 2 A0 0 -570.7 3 A0 0 -1483.5 4 ENABLE 0 -2124.8 5 B0 0 -2873.5 6 B0 0 -3786.3 7 BIN 0 -4357 8 GND 852.4 -4357 8 GND 1062.4 -4357 9 CIN 1912.8 -4357 10 C0 1912.8 -3786.3 11 C0 1912.8 -2873.5 12 ENABLE 1912.8 -2124.8 13 D0 1912.8 -1483.5 14 D0 1912.8 -570.7 15 DIN 1912.8 0 16 VIN 1062.4 0 16 VIN 852.4 0 X COORDINATES Y COORDINATES (14) DO AO (3) (13) DO (12) ENABLE ENABLE (4) (11) CO BO (5) BO (6) (10) CO 3 CIN (9) GND (8) GND (8) BIN (7) NOTE: Dimensions in microns FN4898.3 December 12, 2012