FUJITSU SEMICONDUCTOR DATA SHEET DS704-00001-0v02-E 16-bit Proprietary Microcontroller CMOS 2 F MC-16FX MB96670 Series MB96F673/F675* DESCRIPTION MB96670 series is based on Fujitsu’s advanced 16FX architecture (16-bit with instruction pipeline for RISC-like performance). The CPU uses the same instruction set as the established 16LX series - thus allowing for easy migration of 16LX Software to the new 16FX products. 16FX improvements compared to the previous generation include significantly improved performance even at the same operation frequency, reduced power consumption and faster start-up time. For high processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 32MHz operation frequency from an external 4MHz resonator. The result is a minimum instruction cycle time of 31.2ns going together with excellent EMI behavior. The emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU voltage. A flexible clock tree allows selecting suitable operation frequencies for peripheral resources independent of the CPU speed. *: These devices are under development and specification is preliminary. These products under development may change its specification without notice. Note: F2MC is the abbreviation of Fujitsu Flexible Microcontroller. For the information for microcontroller supports, see the following website. http://edevice.fujitsu.com/micom/en-support/ Copyright©2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.4 r2.0 MB96670 Series FEATURES z Technology 0.18μm CMOS z CPU 2 F MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction execution queue Signed multiply (16-bit × 16-bit) and divide (32-bit/16-bit) instructions available z System clock On-chip PLL clock multiplier (×1 to ×8, ×1 when PLL stop) 4 MHz to 8 MHz external crystal oscillator clock (maximum frequency when using ceramic resonator depends on Q-factor) Up to 16 MHz external clock for devices with fast clock input feature 32.768 kHz subsystem quartz clock 100kHz/2MHz internal RC clock for quick and safe startup, oscillator stop detection, watchdog Clock source selectable from mainclock oscillator, subclock oscillator and on-chip RC oscillator, independently for CPU and 2 clock domains of peripherals The subclock oscillator is enabled by the Boot ROM program controlled by a configuration marker after a Power or External reset Low Power Consumption - 13 operating modes (different Run, Sleep, Timer modes, Stop mode) z On-chip voltage regulator Internal voltage regulator supports reduced internal MCU voltage, offering low EMI and low power consumption figures z Low voltage reset Reset is generated when supply voltage is below minimum z Code Security Protects Flash Memory content from unintended read-out z DMA Automatic transfer function independent of CPU, can be assigned freely to resources z Interrupts Fast Interrupt processing 8 programmable priority levels Non-Maskable Interrupt (NMI) 2 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series z CAN Supports CAN protocol version 2.0 part A and B ISO16845 certified Bit rates up to 1 Mbit/s 32 message objects Each message object has its own identifier mask Programmable FIFO mode (concatenation of message objects) Maskable interrupt Disabled Automatic Retransmission mode for Time Triggered CAN applications Programmable loop-back mode for self-test operation z USART Full duplex USARTs (SCI/LIN) Wide range of baud rate settings using a dedicated reload timer Special synchronous options for adapting to different synchronous serial protocols LIN functionality working either as master or slave LIN device Extended support for LIN-Protocol to reduce interrupt load z I2C Up to 400 kbps Master and Slave functionality, 7-bit and 10-bit addressing z A/D converter SAR-type 8/10-bit resolution Signals interrupt on conversion end, single conversion mode, continuous conversion mode, stop conversion mode, activation by software, external trigger, reload timers and PPGs Range Comparator Function Scan Disable Function ADC Pulse Detection Function z Source Clock Timers Three independent clock timers (23-bit RC clock timer, 23-bit Main clock timer, 17-bit Sub clock timer) z Hardware Watchdog Timer Hardware watchdog timer is active after reset Window function of Watchdog Timer is used to select the lower window limit of the watchdog interval z Reload Timers 16-bit wide 1 2 3 4 5 6 Prescaler with 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 of peripheral clock frequency Event count function z Free Running Timers Signals an interrupt on overflow 1 2 3 4 5 6 7 8 Prescaler with 1, 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 , 1/2 of peripheral clock frequency z Input Capture Units 16-bit wide Signals an interrupt upon external event Rising edge, Falling edge or Both (rising&falling) edges sensitive DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 3 MB96670 Series z Programmable Pulse Generator 16-bit down counter, cycle and duty setting registers Can be used as 2 × 8-bit PPG Interrupt at trigger, counter borrow and/or duty match PWM operation and one-shot operation Internal prescaler allows 1, 1/4, 1/16, 1/64 of peripheral clock as counter clock or of selected Reload timer underflow as clock input Can be triggered by software or reload timer Can trigger ADC conversion Timing point capture z Stepper Motor Controller Stepper Motor Controller with integrated high current output drivers Four high current outputs for each channel Two synchronized 8/10-bit PWMs per channel Internal prescaling for PWM clock: 1, 1/4, 1/5, 1/6, 1/8, 1/10, 1/12, 1/16 of peripheral clock Dedicated power supply for high current output drivers z LCD Controller LCD controller with up to 4 COM × 24SEG Internal or external voltage generation Duty cycle: Selectable from options: 1/2, 1/3 and 1/4 Fixed 1/3 bias Programmable frame period Clock source selectable from four options (main clock, peripheral clock, subclock or RC oscillator clock) On-chip drivers for internal divider resistors or external divider resistors On-chip data memory for display LCD display can be operated in Timer Mode Blank display: selectable All SEG, COM and V pins can be switched between general and specialized purposes z Sound Generator 8-bit PWM signal is mixed with tone frequency from 16-bit reload counter PWM clock by internal prescaler: 1, 1/2, 1/4, 1/8 of peripheral clock z Real Time Clock Operational on main oscillation (4MHz), sub oscillation (32kHz) or RC oscillation (100kHz/2MHz) Capable to correct oscillation deviation of Sub clock or RC oscillator clock (clock calibration) Read/write accessible second/minute/hour registers Can signal interrupts every half second/second/minute/hour/day Internal clock divider and prescaler provide exact 1s clock z External Interrupts Edge or Level sensitive Interrupt mask and pending bit per channel Each available CAN channel RX has an external interrupt for wake-up Selected USART channels SIN have an external interrupt for wake-up 4 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series z Non Maskable Interrupt Disabled after reset, can be enabled by Boot-ROM depending on ROM configuration block Once enabled, can not be disabled other than by reset High or Low level sensitive Pin shared with external interrupt 0 z I/O Ports Most of the external pins can be used as general purpose I/O 2 All push-pull outputs (except when used as I C SDA/SCL line) Bit-wise programmable as input/output or peripheral signal Bit-wise programmable input enable One input level per GP-IO-pin (either Automotive or CMOS-Schmitt trigger) Bit-wise programmable pull-up resistor z Built-in OCD (On Chip Debugger) One-wire debug tool interface Break function: - Hardware break: 6 points (shared with code event) - Software break: 4096 points Event function - Code event: 6 points (shared with hardware break) - Data event: 6 points - Event sequencer: 2 levels Execution time measurement function Trace function: 42 branches Security function z Flash Memory Dual operation flash allowing reading of one Flash bank while programming or erasing the other bank Command sequencer for automatic execution of programming algorithm and for supporting DMA for programming of the Flash Memory Supports automatic programming, Embedded Algorithm Write/Erase/Erase-Suspend/Resume commands A flag indicating completion of the algorithm Erase can be performed on each sector individually Sector protection Flash Security feature to protect the content of the Flash Low voltage detection during Flash erase DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 5 MB96670 Series PRODUCT LINEUP Features Product type Subclock Dual Operation Flash memory 64.5KB + 32KB 128.5KB + 32KB MB96F67x RAM 4KB 4KB Package DMA USART with automatic LIN-Header transmisstion/reception with 16 byte RX- and TX-FIFO MB96F673 MB96F675 LQFP-64 FPT-64P-M23/M24 2ch 2ch LIN-USART 0/1 Yes (only 1ch) LIN-USART 0 No 2 IC 10-bit A/D Converter with Data Buffer with Range Comparator with Scan Disable with ADC Pulse Detection 1ch 12ch No Yes Yes Yes 16-bit Reload Timer (RLT) 3ch 16-bit Free-Running Timer (FRT) 16-bit Input Capture Unit (ICU) 8/16-bit Programmable Pulse Generator (PPG) with Timing point capture with Start delay with Ramp 2ch 4ch (2 channels for LIN-USART) 4ch (16-bit) / 8ch (8-bit) PPG 0/1/2/3 Yes No No 1ch Stepping Motor Controller (SMC) External Interrupts (INTerrupt) Non-Maskable Interrupt (NMI) Sound generator (SG) 2ch 7ch 1ch 1ch 4 COM × 24 SEG LCD Controller I/O Ports Clock Calibration Unit (CAL) Clock Output Function CAN 0 32 Message Buffers SMC 0/1 INT 0/1/2/3/4/6/7 SG 0 COM 0 to 3 SEG 3 to 6/8 to 11/ 19 to 21/23/30/36 to 39/42/45 to 47/54 to 56 1ch 48 (Dual clock mode) 50 (Single clock mode) 1ch 2ch Low Voltage Reset Yes Hardware Watchdog Timer On-chip RC-oscillator On-chip Debugger Yes Yes Yes Notes: 2 IC0 AN 8/9/12/13/16 to 23 RLT 1/2/6 Only RLT6 can be used as PPG clock source. FRT 0/1 ICU 0/1/4/5 ICU 0/1 for LIN-USART CAN Interface Real Time Clock (RTC) Remark Flash product Subclock can be set by software Low voltage reset can be disabled by software All signals of the peripheral function in each product cannot be allocated by limiting the pins of package. It is necessary to use the port relocate function of the General I/O port according to your function use. 6 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series These devices are under development and specification is preliminary. These products under development may change its specification without notice. DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 7 MB96670 Series BLOCK DIAGRAM DEBUG I/ F CKOT0_R, CKOT1 CKOTX0 X0, X1 X0A, X1A RSTX MD NMI Interrupt Controller 16FX CPU OCD Flash Memory A Clock & Mode Controller 16FX Core Bus (CLKB) Periphe ral Bus Bridge Watchdo g SDA0 SCL0 AVCC AVSS AVRH AN8, AN9 I2 C 1 ch. 10-bit ADC 12 ch. AN12, AN13 AN16 to AN23 ADTG TOT1, TOT1_R, TOT2_R IN0_R, IN1, IN1_R IN4_R, IN5_R INT0 to INT4 INT6, INT7 INT1_R, INT2_R COM0 to COM3 SEG3 to SEG6,SEG8 to SEG11 SEG19 to SEG21,SEG23 SEG30,SEG36 to SEG39 SEG42,SEG45 to SEG47 SEG54 to SEG56 I/O Timer 0 FRT 0 ICU 0/1 I/O Timer 1 FRT 1 ICU 4/5 External Interrupt 7 ch. Boot ROM RAM CAN Interface 1 ch. TX0 Soun d Gene rator 1 ch. SGO0 USART 2 ch. 16-bit Reload Timer 2 ch. Peripheral Bus 1 (CLKP1) TIN1, TIN1_R, TIN2_R Periphe ral Bus Bridge Peripheral Bus 2 (CLKP2) DMA Controller PPG 4 ch. (16-bit)/ 8 ch. (8-bit) RLT6 Voltage Regu lator VCC VSS C RX0 SGA0 SIN0, SIN1 SOT0, SOT1 SCK0, SCK1 TTG1 PPG0_R, PPG1_R, PPG2_R, PPG3 PPG0_B, PPG1_B, PPG2_B, PPG3_B Steppe r Motor Controller 2 ch. PWM1P0, PWM1P1 PWM1M0, PWM1M1 PWM2P0, PWM2P1 PWM2M0, PWM2M1 DVCC DVSS Real Time Clock WOT_R LCD controller/ driver 4COM × 24SEG V0 to V3 8 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series PIN ASSIGNMENTS 38 P04_5 / SCL0* 2 39 DEBUG I/F 40 P17_0 41 X0 42 MD RSTX P11_7 / SEG3 / IN0_R 43 X1 44 Vss 45 P11_0 / COM0 P11_1 / COM1 / PPG0_R P11_2 / COM2 / PPG1_R 46 P04_0 / X0A* 3 47 P04_1 / X1A* 3 48 P11_3 / COM3 / PPG2_R P12_0 / SEG4 / IN1_R (Top view) 37 36 35 34 33 P12_1 / SEG5 / TIN1_R / PPG0_B 49 32 P04_4 / PPG3 / SDA0* 2 P12_2 / SEG6 / TOT1_R / PPG1_B 50 31 P13_6 / SCK0 / CKOTX0 / SEG47* 1 P12_4 / SEG8 51 30 P13_5 / SOT0 / ADTG / INT7 / SEG46 P12_5 / SEG9 / TIN2_R / PPG2_B 52 29 P13_4 / SIN0 / INT6 / SEG45* 1 P12_6 / SEG10 / TOT2_R / PPG3_B 53 28 P08_7 / PWM2M1/ AN23 P12_7 / SEG11 / INT1_R 54 27 P08_6 / PWM2P1 / AN22 P01_1 / SEG21 / CKOT1 55 26 P08_5 / PWM1M1 / AN21 P01_3 / SEG23 56 25 P08_4 / PWM1P1 / AN20 P03_0 / SEG36 / V0 57 24 DVss P03_1 / SEG37 / V1 58 23 DVcc P03_2 / SEG38 / V2 59 22 P08_3 / PWM2M0 / AN19 P03_3 / SEG39 / V3 60 21 P08_2 / PWM2P0 / AN18 P03_4 / RX0 / INT4* 1 61 20 P08_1 / PWM1M0 / AN17 P03_5 / TX0 62 19 P08_0 / PWM1P0 / AN16 P03_6 / INT0 / NMI 63 18 P05_5 / AN13 Vcc 64 17 P05_4 / AN12 / INT2_R / WOT_R 12 13 14 15 16 AVcc AVRH AVss P06_5 / IN1 / SEG54 / TTG1 11 P05_1 / AN9 P02_2 / SEG30 / CKOT0_R 10 P05_0 / AN8 9 P06_6 / TIN1 / SEG55 / IN4_R 8 P06_7 / TOT1 / SEG56 / IN5_R 7 P01_0 / SEG20 / SGA0 1 6 P00_7 / SEG19 / SGO0 5 P13_1 / INT3 / SCK1 / SEG42* 4 P13_0 / INT2 / SOT1 C 3 1 2 P03_7 / INT1 / SIN1* 1 Vss LQFP - 64 (FPT-64P-M23/M24) *1: CMOS input level only 2 *2: CMOS input level only for I C *3: Please set Rom Configuration Block (RCB) to use the subclock. All other general-purpose pins have only Automotive input level. DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 9 MB96670 Series PIN FUNCTION DESCRIPTION Pin name Feature Description ADTG ANn AVcc AVRH AVss C CKOTn CKOTn_R CKOTXn COMn DVcc DVss INn INn_R INTn INTn_R MD NMI Pnn_m PPGn PPGn_R PPGn_B PWMn RSTX RXn SCKn SCLn SDAn SEGn SGAn SGOn SINn SOTn TINn TINn_R TOTn TOT_R TTGn TXn Vn Vcc Vss WOT_R X0 ADC ADC Supply ADC Supply Voltage regulator Clock output function Clock output function Clock output function LCD Supply Supply ICU ICU External Interrupt External Interrupt Core External Interrupt GPIO PPG PPG PPG SMC Core CAN USART 2 IC 2 IC LCD Sound Generator Sound Generator USART USART Reload Timer Reload Timer Reload Timer Reload Timer PPG CAN LCD Supply Supply RTC Clock A/D converter trigger input A/D converter channel n input Analog circuits power supply A/D converter high reference voltage input Analog circuits power supply Internally regulated power supply stabilization capacitor pin Clock Output function n output Relocated Clock Output function n output Clock Output function n inverted output LCD Common driver SMC pins power supply SMC pins power supply Input Capture Unit n input Relocated Input Capture Unit n input External Interrupt n input Relocated External Interrupt n input Input pin for specifying the operating mode Non-Maskable Interrupt input General purpose I/O Programmable Pulse Generator n output (16bit/8bit) Relocated Programmable Pulse Generator n output (16bit/8bit) Programmable Pulse Generator n output (8bit) SMC PWM high current output Reset input CAN interface n RX input USART n serial clock input/output 2 I C interface n clock I/O input/output 2 I C interface n serial data I/O input/output LCD Segment driver SG amplitude output SG sound/tone output USART n serial data input USART n serial data output Reload Timer n event input Relocated Reload Timer n event input Reload Timer n output Relocated Reload Timer n output Programmable Pulse Generator n trigger input CAN interface n TX output LCD voltage reference Power supply Power supply Relocated Real Time clock output Oscillator input 10 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series Pin name Feature X0A X1 X1A DEBUG I/F Clock Clock Clock OCD Description Subclock Oscillator input Oscillator output Subclock Oscillator output On Chip Debugger input/output DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 11 MB96670 Series PIN CIRCUIT TYPE Pin no. I/O circuit type* Pin name 1 Supply Vss 2 F C 3 M P03_7 / INT1 / SIN1 4 H P13_0 / INT2 / SOT1 5 P P13_1 / INT3 / SCK1 / SEG42 6 J P00_7 / SEG19 / SGO0 7 J P01_0 / SEG20 / SGA0 8 J P02_2 / SEG30 / CKOT0_R 9 J P06_5 / IN1 / SEG54 / TTG1 10 J P06_6 / TIN1 / SEG55 / IN4_R 11 J P06_7 / TOT1 / SEG56 / IN5_R 12 K P05_0 / AN8 13 K P05_1 / AN9 14 Supply AVcc 15 G AVRH 16 Supply AVss 17 K P05_4 / AN12 / INT2_R / WOT_R 18 K P05_5 / AN13 19 R P08_0 / PWM1P0 / AN16 20 R P08_1 / PWM1M0 / AN17 21 R P08_2 / PWM2P0 / AN18 22 R P08_3 / PWM2M0 / AN19 23 Supply DVcc 24 Supply DVss 25 R P08_4 / PWM1P1 / AN20 26 R P08_5 / PWM1M1 / AN21 27 R P08_6 / PWM2P1 / AN22 28 R P08_7 / PWM2M1 / AN23 29 P P13_4 / SIN0 / INT6 / SEG45 30 J P13_5 / SOT0 / ADTG / INT7 / SEG46 31 P P13_6 / SCK0 / CKOTX0 / SEG47 32 N P04_4 / PPG3 / SDA0 12 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series Pin no. I/O circuit type* Pin name 33 N P04_5 / SCL0 34 O DEBUG I/F 35 H P17_0 36 C MD 37 A X0 38 A X1 39 Supply Vss 40 B P04_0 / X0A 41 B P04_1 / X1A 42 C RSTX 43 J P11_7 / SEG3 / IN0_R 44 J P11_0 / COM0 45 J P11_1 / COM1 / PPG0_R 46 J P11_2 / COM2 / PPG1_R 47 J P11_3 / COM3 / PPG2_R 48 J P12_0 / SEG4 / IN1_R 49 J P12_1 / SEG5 / TIN1_R / PPG0_B 50 J P12_2 / SEG6 / TOT1_R / PPG1_B 51 J P12_4 / SEG8 52 J P12_5 / SEG9 / TIN2_R / PPG2_B 53 J P12_6 / SEG10 / TOT2_R / PPG3_B 54 J P12_7 / SEG11 / INT1_R 55 J P01_1 / SEG21 / CKOT1 56 J P01_3 / SEG23 57 L P03_0 / SEG36 / V0 58 L P03_1 / SEG37 / V1 59 L P03_2 / SEG38 / V2 60 L P03_3 / SEG39 / V3 61 M P03_4 / RX0 / INT4 62 H P03_5 / TX0 63 H P03_6 / INT0 / NMI 64 Supply Vcc *: Please refer to “ ■ I/O CIRCUIT TYPE” for details on the I/O circuit types. DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 13 MB96670 Series I/O CIRCUIT TYPE Type Circuit Remarks A X1 R 0 1 FCI X0 X out High-speed oscillation circuit: Programmable between oscillation mode (external crystal or resonator connected to X0/X1 pins) and Fast external Clock Input (FCI) mode (external clock connected to X0 pin) Feedback resistor = approx. 1.0 MΩ. Feedback resistor is grounded in the center when the oscillator is disabled or in FCI mode The amplitude: 1.8V±0.15V to operate by the internal supply voltage FCI or osc disable 14 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series Type Circuit Remarks B Pull-up control P-ch P-ch N-ch Standby control for input shutdown Pout Nout R Low-speed oscillation circuit shared with GPIO functionality: Feedback resistor = approx. 5.0 MΩ. Feedback resistor is grounded in the center when the oscillator is disabled GPIO functionality selectable (CMOS hysteresis input with input shutdown function, IOL = 4mA, IOH = -4mA, Programmable pull-up resistor) Hysteresis input X1A R X out 0 1 FCI X0A FCI or Osc disable Pull-up control P-ch Standby control for input shutdown P-ch N-ch Pout Nout R Hysteresis input C CMOS hysteresis input pin R Hysteresis inputs DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 15 MB96670 Series Type Circuit Remarks Power supply input protection circuit F P-ch N-ch G ANE P-ch AVR N-ch ANE H Pull-up control P-ch A/D converter ref+ (AVRH) power supply input pin with protection circuit Without protection circuit against VCC for pins AVRH P-ch N-ch Pout CMOS level output (IOL = 4mA, IOH = -4mA) Automotive input with input shutdown function Programmable pull-up resistor Nout R Automotive input Standby control for input shutdown J Pull-up control P-ch P-ch Pout N-ch Nout R CMOS level output (IOL = 4mA, IOH = -4mA) Automotive input with input shutdown function Programmable pull-up resistor SEG or COM output Automotive input Standby control for input shutdown SEG or COM output 16 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series Type Circuit Remarks K Pull-up control P-ch P-ch Pout N-ch CMOS level output (IOL = 4mA, IOH = -4mA) Automotive input with input shutdown function Programmable pull-up resistor Analog input Nout R Automotive input Standby control for input shutdown Analog input L Pull-up control P-ch P-ch Pout N-ch Nout R CMOS level output (IOL = 4mA, IOH = -4mA) Automotive input with input shutdown function Programmable pull-up resistor Vx input or SEG output Automotive input Standby control for input shutdown Vx input or SEG output M Pull-up control P-ch P-ch N-ch R Pout CMOS level output (IOL = 4mA, IOH = -4mA) CMOS hysteresis input with input shutdown function Programmable pull-up resistor Nout Hysteresis input Standby control for input shutdown DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 17 MB96670 Series Type Circuit Remarks N Pull-up control P-ch P-ch Pout N-ch Nout* R CMOS level output (IOL = 3mA, IOH = -3mA) CMOS hysteresis input with input shutdown function Programmable pull-up resistor *: N-channel transistor has slew 2 rate control according to I C spec, irrespective of usage. Hysteresis input Standby control for input shutdown O IOL: 25mA @ 2.7V TTL input Nout N-ch R Standby control for input shutdown TTL input P Pull-up control P-ch P-ch N-ch Pout CMOS level output (IOL = 4mA, IOH = -4mA) CMOS hysteresis inputs with input shutdown function Programmable pull-up resistor SEG or COM output Nout R Hysteresis input Standby control for input shutdown SEG or COM output 18 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series Type Circuit Remarks R Pull-up control P-ch N-ch P-ch Pout N-ch Nout CMOS level output (programmable IOL = 4mA, IOH = -4mA and IOL = 30mA, IOH = -30mA) Automotive input with input shutdown function Programmable pull-up / pull-down resistor Analog input Pull-down control R Automotive input Standby control for input shutdown Analog input DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 19 MB96670 Series MEMORY MAP MB96F67x FF:FFFF H USER ROM* 1 DE:0000 H DD:FFFF H Reserved 10:0000 H 0F:E000 0E:9000 Boot-ROM H Peripheral H Reserved 01:0000 00:8000 H ROM/RAM MIRROR H RAMSTART0* 2 Internal RAM bank0 Reserved 00:0C00 H Peripheral 00:0380 H 00:0180 H GPR* 3 00:0100 H DMA 00:00F0 H Reserved 00:0000 H Peripheral *1: For details about USER ROM area, see the “ USER ROM MEMORY MAP FOR FLASH DEVICES” on the following pages. *2: For RAMSTART/END addresses, please refer to the table on the next page. *3: Unused GPR banks can be used as RAM area. The DMA area is only available if the device contains the corresponding resource. The available RAM and ROM area depends on the device. 20 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series RAMSTART ADDRESSES Devices Bank 0 RAM size RAMSTART0 MB96F673 MB96F675 4KByte 00:7200H DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 21 MB96670 Series USER ROM MEMORY MAP FOR FLASH DEVICES MB96F673 MB96F675 Flash size 128.5KB + 32KB SA39 - 64KB Alternative mode CPU address Flash memory mode address Flash size 64.5KB + 32KB FF:FFFF H FF:0000 H FE:FFFF H FE:0000 H FD:FFFF H 3F:FFFF H 3F:0000 H 3E:FFFF H 3E:0000 H SA39 - 64KB Bank A of Flash A SA38 - 64KB Reserved Reserved DF:A000 H DF:9FFF H DF:8000 H DF:7FFF H DF:6000 H DF:5FFF H DF:4000 H DF:3FFF H DF:2000 H DF:1FFF H DF:0000 H DE:FFFF H DE:0000 H 1F:9FFF H 1F:8000 H 1F:7FFF H 1F:6000 H 1F:5FFF H 1F:4000 H 1F:3FFF H 1F:2000 H 1F:1FFF H 1F:0000 H SA4 - 8KB SA4 - 8KB SA3 - 8KB SA3 - 8KB SA2 - 8KB SA2 - 8KB SA1 - 8KB SA1 - 8KB SAS - 512B* Reserved SAS - 512B* Bank B of Flash A Bank A of Flash A Reserved *: Phiysical address area of SAS-512B is from DF:0000H to DF:01FFH. Others (from DF:0200H to DF:1FFFH) are all ROM Mirror area for SAS-512B. Sector SAS contains the ROM configuration block RCBA at CPU address DF:0000H -DF:01FFH. 2 SAS can not be used for E PROM emulation. 22 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series SERIAL PROGRAMMING COMMUNICATION INTERFACE USART pins for Flash serial programming (MD = 0, DEBUG I/F = 0, Serial Communication mode) MB96F67x Pin Number USART Number 29 30 Normal Function SIN0 USART0 SOT0 31 SCK0 3 SIN1 4 USART1 5 DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL SOT1 SCK1 23 MB96670 Series INTERRUPT VECTOR TABLE Vector number Offset in vector table 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 3FC 3F8 3F4 3F0 3EC 3E8 3E4 3E0 3DC 3D8 3D4 3D0 3CC 3C8 3C4 3C0 3BC 3B8 3B4 3B0 3AC 3A8 3A4 3A0 39C 398 394 390 38C 388 384 380 37C 378 374 370 36C 368 364 360 35C Vector name Cleared by DMA Index in ICR to program No No No No No No No No No No No No No No No No No Yes Yes Yes Yes Yes Yes Yes No Yes Yes Yes 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 CALLV0 CALLV1 CALLV2 CALLV3 CALLV4 CALLV5 CALLV6 CALLV7 RESET INT9 EXCEPTION NMI DLY RC_TIMER MC_TIMER SC_TIMER LVDI EXTINT0 EXTINT1 EXTINT2 EXTINT3 EXTINT4 EXTINT6 EXTINT7 CAN0 PPG0 PPG1 PPG2 24 FUJITSU SEMICONDUCTOR CONFIDENTIAL Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Non-Maskable Interrupt Delayed Interrupt RC clock timer Main Clock Timer Sub Clock Timer Low Voltage Detector External Interrupt 0 External Interrupt 1 External Interrupt 2 External Interrupt 3 External Interrupt 4 Reserved External Interrupt 6 External Interrupt 7 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved CAN Controller 0 Reserved Reserved Reserved Reserved Programmable Pulse Generator 0 Programmable Pulse Generator 1 Programmable Pulse Generator 2 DS704-00001-0v02-E MB96670 Series Vector number Offset in vector table Vector name Cleared by DMA Index in ICR to program 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 358 354 350 34C 348 344 340 33C 338 334 330 32C 328 324 320 31C 318 314 310 30C 308 304 300 PPG3 RLT1 RLT2 - Yes Yes Yes - 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 2FC PPGRLT Yes 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 2F8 2F4 2F0 2EC 2E8 2E4 2E0 2DC 2D8 2D4 2D0 2CC 2C8 2C4 2C0 2BC ICU0 ICU1 ICU4 ICU5 - Yes Yes Yes Yes - 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Description Programmable Pulse Generator 3 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reload Timer 1 Reload Timer 2 Reserved Reserved Reserved Reload Timer 6 can be used as PPG clock source Input Capture Unit 0 Input Capture Unit 1 Reserved Reserved Input Capture Unit 4 Input Capture Unit 5 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved 25 MB96670 Series Vector number Offset in vector table 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 2B8 2B4 2B0 2AC 2A8 2A4 2A0 29C 298 294 290 28C 288 284 280 27C 278 274 270 26C 268 264 260 25C 258 254 250 24C 248 244 240 23C 238 234 230 22C 228 224 220 21C Vector name Cleared by DMA Index in ICR to program FRT0 FRT1 RTC0 CAL0 SG0 IIC0 ADC0 LINR0 LINT0 LINR1 LINT1 - Yes Yes No No No Yes Yes Yes Yes Yes Yes - 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 26 FUJITSU SEMICONDUCTOR CONFIDENTIAL Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Free Running Timer 0 Free Running Timer 1 Reserved Reserved Real Time Clock Clock Calibration Unit Sound Generator 0 I2C interface0 Reserved A/D Converter Reserved Reserved LIN USART 0 RX LIN USART 0 TX LIN USART 1 RX LIN USART 1 TX Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved DS704-00001-0v02-E MB96670 Series Vector number Offset in vector table 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 218 214 210 20C 208 204 Vector name 1F8 1F4 1F0 1EC 1E8 1E4 1E0 FLASHA - 1DC 1D8 1D4 1D0 1CC 1C8 1C4 1C0 ADCRC0 ADCPD0 - 200 1FC Cleared by DMA Index in ICR to program Description Yes No No - 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Flash memory A interrupt Reserved Reserved Reserved Reserved Reserved A/D Converter 0 - Range Comparator A/D Converter 0 - Pulse detection Reserved Reserved Reserved DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 27 MB96670 Series HANDLING DEVICES Special care is required for the following when handling the device: • Latch-up prevention • Unused pins handling • External clock usage • Notes on PLL clock mode operation • Power supply pins (VCC/VSS) • Crystal oscillator circuit • Turn on sequence of power supply to A/D converter and analog inputs • Pin handling when not using the A/D converter • Notes on Power-on • Stabilization of power supply voltage • SMC power supply pins • Serial communication 1. Latch-up prevention CMOS IC chips may suffer latch-up under the following conditions: • A voltage higher than VCC or lower than VSS is applied to an input or output pin. • A voltage higher than the rated voltage is applied between VCC pins and VSS pins. • The AVCC power supply is applied before the VCC voltage. Latch-up may increase the power supply current dramatically, causing thermal damages to the device. For the same reason, extra care is required to not let the analog power-supply voltage (AVCC, AVRH) exceed the digital power-supply voltage. 2. Unused pins handling Unused input pins can be left open when the input is disabled (corresponding bit of Port Input Enable register PIER = 0). Leaving unused input pins open when the input is enabled may result in misbehavior and possible permanent damage of the device. They must therefore be pulled up or pulled down through resistors. To prevent latch-up, those resistors should be more than 2 kΩ. Unused bidirectional pins can be set either to the output state and be then left open, or to the input state with either input disabled or external pull-up/pull-down resistor as described above. 3. External clock usage The permitted frequency range of an external clock depends on the oscillator type and configuration. See AC Characteristics for detailed modes and frequency limits. Single and opposite phase external clocks must be connected as follows: 1. Single phase external clock for Main oscillator • When using a single phase external clock for the Main oscillator, X0 pin must be driven and X1 pin left open. And supply 1.8V power to the external clock. 28 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series 2. Single phase external clock for Sub oscillator • When using a single phase external clock for the Sub oscillator, ‘External clock mode’ must be selected and X0A/GP04_0 must be driven. X1A/GP04_1 must be configured as GPIO. 4. Notes on PLL clock mode operation If the PLL clock mode is selected and no external oscillator is operating or no external clock is supplied, the microcontroller attempts to work with the free oscillating PLL. Performance of this operation, however, cannot be guaranteed. 5. Power supply pins (VCC/VSS) It is required that all VCC-level as well as all VSS-level power supply pins are at the same potential. If there is more than one VCC or VSS level, the device may operate incorrectly or be damaged even within the guaranteed operating range. VCC and VSS must be connected to the device from the power supply with lowest possible impedance. As a measure against power supply noise, it is required to connect a bypass capacitor of about 0.1 μF between Vcc and Vss as close as possible to Vcc and Vss pins. 6. Crystal oscillator and ceramic resonator circuit Noise at X0, X1 pins or X0A, X1A pins might cause abnormal operation. It is required to provide bypass capacitors with shortest possible distance to X0, X1 pins and X0A, X1A pins, crystal oscillator (or ceramic resonator) and ground lines, and, to the utmost effort, that the lines of oscillation circuit do not cross the lines of other circuits. It is highly recommended to provide a printed circuit board art work surrounding X0, X1 pins and X0A, X1A pins with a ground area for stabilizing the operation. It is highly recommended to evaluate the quartz/MCU or resonator/MCU system at the quartz or resonator manufacturer, especially when using low-Q resonators at higher frequencies. 7. Turn on sequence of power supply to A/D converter and analog inputs It is required to turn the A/D converter power supply (AVCC, AVRH) and analog inputs (ANn) on after turning the digital power supply (VCC) on. It is also required to turn the digital power off after turning the A/D converter supply and analog inputs off. In this case, the voltage must not exceed AVRH or AVCC (turning the analog and digital power supplies simultaneously on or off is acceptable). 8. Pin handling when not using the A/D converter It is required to connect the unused pins of the A/D converter as AVCC = VCC, AVSS = AVRH = VSS. 9. Notes on Power-on To prevent malfunction of the internal voltage regulator, supply voltage profile while turning the power supply on should be slower than 50μs from 0.2V to 2.7V. 10. Stabilization of power supply voltage If the power supply voltage varies acutely even within the operation safety range of the Vcc power supply voltage, a malfunction may occur. The Vcc power supply voltage must therefore be stabilized. As stabilization guidelines, the power supply voltage must be stabilized in such a way that Vcc ripple fluctuations (peak to peak value) in the commercial frequencies (50 Hz to 60 Hz) fall within 10% of the standard Vcc power supply voltage and the transient fluctuation rate becomes 0.1V/μs or less in instantaneous fluctuation for power supply switching. DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 29 MB96670 Series 11. SMC power supply pins All DVSS pins must be set to the same level as the VSS pins. The DVCC power supply level can be set independently of the VCC power supply level. However note that the SMC I/O pin state is undefined if DVCC is powered on and VCC is below 3V. To avoid this, we recommend to always power VCC before DVCC. 12. Serial communication There is a possibility to receive wrong data due to noise or other causes on the serial communication. Therefore, design a printed circuit board so as to avoid noise. Consider receiving of wrong data when designing the system. For example apply a checksum and retransmit the data if an error occurs. 30 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings Parameter Power supply voltage*1 Analog power supply voltage*1 Analog reference voltage*1 SMC Power supply*1 LCD power supply voltage*1 Input voltage*1 Output voltage*1 Maximum Clamp Current Total Maximum Clamp Current "L" level maximum output current Condition Vcc - Vss - 0.3 Vss + 6.0 V AVcc - Vss - 0.3 Vss + 6.0 V Vcc = AVcc*2 AVRH - Vss - 0.3 Vss + 6.0 V AVCC ≥ AVRH, AVRH ≥ AVSS DVcc - Vss - 0.3 Vss + 6.0 V V0 to V3 - Vss - 0.3 Vss + 6.0 V VI VO - Vss - 0.3 Vss - 0.3 Vss + 6.0 Vss + 6.0 V V ICLAMP - -4.0 +4.0 mA Σ|ICLAMP| - - 14 mA IOL ΣIOL TA=-40°C TA=+25°C TA=+85°C TA=+105°C TA=-40°C TA=+25°C TA=+85°C TA=+105°C - - 15 52 39 32 30 4 40 30 25 23 34 mA mA mA mA mA mA mA mA mA mA mA Normal outputs ΣIOLSMC - - 180 mA High current outputs ΣIOLAV - - 17 mA Normal outputs ΣIOLSMCAV - - 90 mA High current outputs IOH - -15 -52 -39 -32 -30 -4 -40 -30 -25 -23 -34 mA mA mA mA mA mA mA mA mA mA mA Normal outputs ΣIOH TA=-40°C TA=+25°C TA=+85°C TA=+105°C TA=-40°C TA=+25°C TA=+85°C TA=+105°C - ΣIOHSMC - - -180 mA High current outputs ΣIOHAV - - -17 mA Normal outputs ΣIOHSMCAV - - -90 mA High current outputs IOLSMC IOLAV "L" level average output current "L" level maximum overall output current "L" level average overall output current "H" level maximum output current IOLAVSMC IOHSMC IOHAV "H" level average output current "H" level maximum overall output current "H" level average overall output current Rating Min Max Symbol IOHAVSMC DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Unit Remarks V0 to V3 must not exceed Vcc VI ≤ (D)VCC + 0.3V*3 VO ≤ (D)VCC + 0.3V*3 Applicable to general purpose I/O pins *4 Applicable to general purpose I/O pins *4 Normal outputs High current outputs Normal outputs High current outputs High current outputs Normal outputs High current outputs Normal outputs 31 MB96670 Series Parameter Symbol Condition Min Rating Max Unit Remarks Power PD TA=+105°C 255 *6 mW consumption*5 Operating ambient TA -40 105 °C temperature Storage temperature TSTG -55 150 °C *1: This parameter is based on VSS = AVSS = DVSS = 0V. *2: AVCC and VCC must be set to the same voltage. It is required that AVCC does not exceed VCC and that the voltage at the analog inputs does not exceed AVCC when the power is switched on. *3: VI and VO should not exceed VCC + 0.3 V. VI should also not exceed the specified ratings. However if the maximum current to/from an input is limited by some means with external components, the ICLAMP rating supersedes the VI rating. Input/output voltages of standard ports depend on VCC. *4: • Applicable to all general purpose I/O pins (Pnn_m). • Use within recommended operating conditions. • Use at DC voltage (current). • The +B signal should always be applied a limiting resistance placed between the +B signal and the microcontroller. • The value of the limiting resistance should be set so that when the +B signal is applied the input current to the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods. • Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input potential may pass through the protective diode and increase the potential at the VCC pin, and this may affect other devices. • Note that if a +B signal is input when the microcontroller power supply is off (not fixed at 0V), the power supply is provided from the pins, so that incomplete operation may result. • Note that if the +Binput is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the Power reset (except devices with persistent low voltage reset in internal vector mode). 32 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series • Sample recommended circuits: Protective diode VCC P-ch Limiting resistance +B input (0 V to 16 V) N-ch R *5: The maximum permitted power dissipation depends on the ambient temperature, the air flow velocity and the thermal conductance of the package on the PCB. The actual power dissipation depends on the customer application and can be calculated as follows: PD = PIO + PINT PIO = Σ (VOL × IOL + VOH × IOH) (I/O load power dissipation, sum is performed on all I/O ports) PINT = VCC × (ICC + IA) (internal power dissipation) ICC is the total core current consumption into VCC as described in the “DC characteristics” and depends on the selected operation mode and clock frequency and the usage of functions like Flash programming. IA is the analog current consumption into AVCC. *6: Worst case value for a package mounted on single layer PCB at specified TA without air flow. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 33 MB96670 Series 2. Recommended Operating Conditions (VSS = AVSS = DVSS = 0V) Parameter Power supply voltage Smoothing capacitor at C pin Symbol Vcc, DVcc CS Min Value Typ Max 2.7 - 5.5 0.5 1.0 1.5 Unit Remarks V μF (Target value) 1.0µF (Allowance within ± 50%) Please use the ceramic capacitor or the capacitor of the frequency response of this level. The smoothing capacitor at VCC must use the one of a capacity value that is larger than Cs. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. 34 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series 3. DC Characteristics 1. Current rating of MB96F670 (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol Pin name Conditions Vcc PLL Run mode with CLKS1/2 = CLKB = CLKP1/2 = 32MHz (CLKRC and CLKSC stopped) Main Run mode with CLKS1/2 = CLKB = CLKP1/2 = 4MHz (CLKPLL, CLKSC and CLKRC stopped) Sub Run mode with CLKS1/2 = CLKB = CLKP1/2 = 32kHz (CLKMC, CLKPLL and CLKRC stopped) PLL Sleep mode with CLKS1/2 = CLKP1/2 = 32MHz (CLKRC and CLKSC stopped) Main Sleep mode with CLKS1/2 = CLKP1/2 = 4MHz (CLKPLL, CLKRC and CLKSC stopped) Sub Sleep mode with CLKS1/2 = CLKP1/2 = 32kHz, (CLKMC, CLKPLL and CLKRC stopped) ICCPLL Power supply current in Run modes*1 ICCMAIN ICCSUB ICCSPLL Power supply current in Sleep modes*1 ICCSMAIN ICCSSUB DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Min Value Typ Max - 25 - mA TA = +25°C - - 45 mA TA = +105°C (Target value) - 3.5 - mA TA = +25°C - - 9 mA TA = +105°C (Target value) - 0.1 - mA TA = +25°C - - 6 mA TA = +105°C (Target value) - 6.5 - mA TA = +25°C - - 15 mA TA = +105°C (Target value) - 1.0 - mA TA = +25°C - - 7 mA TA = +105°C (Target value) - 0.08 - mA TA = +25°C - - 4 mA TA = +105°C (Target value) Unit Remarks 35 MB96670 Series (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol ICCTMAIN Power supply current in Timer modes*2 ICCTRCH ICCTRCL ICCTSUB Power supply current in Stop mode*3 ICCH Pin name Conditions Main Timer mode with CLKMC = 4MHz (CLKPLL, CLKRC and CLKSC stopped) RC Timer mode with CLKRC = 2MHz RC Timer mode with CLKRC = 100kHz Sub Timer mode with CLKSC = 32kHz Vcc (CLKMC, CLKPLL and CLKRC stopped) Min Value Typ Max Unit Remarks - 285 325 μA TA = +25°C - - 1055 μA TA = +105°C (Target value) - 160 210 μA - - 970 μA - 30 70 μA - - 820 μA - 25 55 μA TA = +25°C - - 800 μA TA = +105°C (Target value) - 20 55 μA TA = +25°C - - 800 μA TA = +105°C (Target value) - TA = +25°C TA = +105°C (Target value) TA = +25°C TA = +105°C (Target value) Power supply current for active Low voltage 5 15 μA ICCLVD Low detector enabled Voltage detector*4 Flash Write/ Erase 12.5 20 mA ICCFLASH current*5 *1: The power supply current is measured with a 4MHz external clock connected to the Main oscillator and a 32kHz external clock connected to the Sub oscillator. See chapter “Standby mode and voltage regulator control circuit” of the Hardware Manual for further details about voltage regulator control. Power supply for "On Chip Debugger" part is not included. Power supply current in Run mode does not include Flash Write / Erase current. *2: The power supply current in Timer mode is the value when Flash is in Power-down / reset mode. The power supply current is measured with a 4MHz external clock connected to the Main oscillator and a 32kHz external clock connected to the Sub oscillator. *3: The power supply current in Stop mode is the value when Flash is in Power-down / reset mode. *4: When low voltage detector is enabled, ICCLVD must be added to Power supply current. *5: When Flash Write / Erase program is executed, ICCFLASH must be added to Power supply current. 36 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series 2. Pin characteristics (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol Pin name VIH "H" level input voltage "L" level input voltage External clock in "oscillation mode" External clock in "oscillation mode" VIHX0S X0 VIHX0AS X0A VIHR RSTX - VIHM MD - VIHD DEBUG I/F - VIL Port inputs Pnn_m External clock in "oscillation mode" External clock in "oscillation mode" VILX0S X0 VILX0AS X0A VILR RSTX - VILM MD - VILD DEBUG I/F - VOH4 "H" level output voltage* Port inputs Pnn_m Conditions VOH30 VOH3 4mA type High Drive type 3mA type 4.5V ≤ Vcc ≤ 5.5V IOH = -4mA 2.7V ≤ Vcc < 4.5V IOH = -1.5mA 4.5V ≤ Vcc ≤ 5.5V IOH = -52mA 2.7V ≤ Vcc < 4.5V IOH = -18mA 4.5V ≤ Vcc ≤ 5.5V IOH = -39mA 2.7V ≤ Vcc < 4.5V IOH = -16mA 4.5V ≤ Vcc ≤ 5.5V IOH = -32mA 2.7V ≤ Vcc < 4.5V IOH = -14.5mA 4.5V ≤ Vcc ≤ 5.5V IOH = -30mA 2.7V ≤ Vcc < 4.5V IOH = -14mA 4.5V ≤ Vcc ≤ 5.5V IOH = -3mA 2.7V ≤ Vcc < 4.5V IOH = -1.5mA DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Min VCC × 0.7 VCC × 0.8 VD × 0.8 Vcc × 0.8 Vcc × 0.8 Vcc - 0.3 2.0 Vss - 0.3 Vss - 0.3 Vss Vss - 0.3 Vss - 0.3 Vss - 0.3 Vss - 0.3 (D)Vcc - 0.5 Value Typ Max - VCC + 0.3 VCC + 0.3 VD Vcc + 0.3 Vcc + 0.3 Vcc + 0.3 Vcc + 0.3 VCC × 0.3 VCC × 0.5 VD × 0.2 Vcc × 0.2 VCC × 0.2 Vss + 0.3 Unit V V V Remarks CMOS Hysteresis input AUTOMOTIVE Hysteresis input VD=1.8V±0.15V V V V V V V V CMOS Hysteresis input CMOS Hysteresis input TTL Input CMOS Hysteresis input AUTOMOTIVE Hysteresis input VD=1.8V±0.15V V V V - 0.8 V - (D)Vcc V CMOS Hysteresis input CMOS Hysteresis input TTL Input TA = -40°C TA = +25°C DVcc - 0.5 - DVcc V TA = +85°C TA = +105°C Vcc - 0.5 - Vcc V 37 MB96670 Series Parameter Symbol Pin name VOL4 "L" level output voltage* VOL30 VOL3 Input leak current Total LCD leak current Internal LCD divide resistance Pull-up resistance value Pull-down resistance value 4mA type High Drive type 3mA type Conditions 4.5V ≤ Vcc ≤ 5.5V IOL = +4mA 2.7V ≤ Vcc < 4.5V IOL = +1.7mA 4.5V ≤ Vcc ≤ 5.5V IOL = +52mA 2.7V ≤ Vcc < 4.5V IOL = +22mA 4.5V ≤ Vcc ≤ 5.5V IOL = +39mA 2.7V ≤ Vcc < 4.5V IOL = +18mA 4.5V ≤ Vcc ≤ 5.5V IOL = +32mA 2.7V ≤ Vcc < 4.5V IOL = +14mA 4.5V ≤ Vcc ≤ 5.5V IOL = +30mA 2.7V ≤ Vcc < 4.5V IOL = +13.5mA 2.7V ≤ Vcc < 5.5V IOL = +3mA Min - Value Typ Max - 0.4 Unit V TA = -40°C TA = +25°C - - 0.5 V TA = +85°C TA = +105°C - - 0.4 V Pnn_m Vss < VI < Vcc AVss < VI < AVcc, AVRH -1 - 1 μA P08_m DVSS < VI < DVCC AVSS < VI < AVCC, AVRH -3 - 3 μA IIL Σ|IILCD| All SEG/ COM pin Vcc = 5.0V - 0.5 10 μA RLCD Between V3 and V2, V2 and V1, V1 and V0 Vcc = 5.0V 6.25 12.5 25 kΩ RPU Pnn_m Vcc = 5.0V ±10% 25 50 100 kΩ RDOWN P08_m Vcc = 5.0V ±10% 25 50 100 kΩ - - 5 15 pF - - 15 30 pF Other than Vcc, Vss, AVcc, Input CIN AVss, capacitance AVRH, P08_m P08_m *: IOH and IOL are target value. 38 FUJITSU SEMICONDUCTOR CONFIDENTIAL Remarks Single port pin except high current output I/O for SMC Maximum leakage current of all LCD pins DS704-00001-0v02-E MB96670 Series 4. AC Characteristics (1) Main Clock Input Characteristics (VCC = AVCC = DVCC = 2.7V to 5.5V, VD=1.8V±0.15V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Input frequency Input frequency Symbol fC fFCI Pin name Min Value Typ Max 4 - 8 MHz - - 8 MHz 4 - 8 MHz - - 16 MHz 4 - 16 MHz X0, X1 Unit X0 Input clock cycle tCYLH - 62.5 - - ns Input clock pulse width PWH, PWL - 30 - 70 % Remarks When using a crystal oscillator, PLL off When using an opposite phase external clock, PLL off When using a crystal oscillator or opposite phase external clock, PLL on When using a single phase external clock in “Fast Clock Input mode”, PLL off When using a single phase external clock in “Fast Clock Input mode”, PLL on tCYLH Reference value: 1.8V±0.15V The amplitude changes by resistance, capacity which added outside or the difference of the device. DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 39 MB96670 Series (2) Sub Clock Input Characteristics (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol Min Value Typ Max - - 32.768 - kHz - - - 100 kHz X0A - - - 50 kHz Pin Conditions name X0A, X1A Input frequency FCL Unit Input clock cycle tCYLL - - 10 - - μs Input clock pulse width - - PWH/tCYLL PWL/tCYLL 30 - 70 % Remarks When using an oscillation circuit When using an opposite phase external clock When using a single phase external clock tCYLL 0.8×Vcc X0A 0.8×Vcc 0.8×Vcc 0.2×Vcc PWH 0.2×Vcc P WL (3) Built-in RC Oscillation Characteristics (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Clock frequency Symbol Min Value Typ Max 50 100 200 kHz 1 2 4 MHz Unit FRC Remarks When using slow frequency of RC oscillator When using fast frequency of RC oscillator (4) Internal Clock timing (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol Value Min Max Unit Internal System clock frequency (CLKS1 and CLKS2) fCLKS1, fCLKS2 - 54 MHz Internal CPU clock frequency (CLKB), Internal peripheral clockfrequency (CLKP1) fCLKB, fCLKP1 - 32 MHz Internal peripheral clock frequency (CLKP2) fCLKP2 - 32 MHz 40 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series (5) Operating Conditions of PLL (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol Value Unit Min Typ Max PLL oscillation stabilization wait time (LOCK UP time) tLOCK 1 - 4 ms PLL input clock frequency PLL macro oscillation clock frequency fPLLI fPLLO 4 56 - 16 108 MHz MHz Remarks Time from when the PLL starts operating until the oscillation stabilizes (6) Reset Input Characteristics (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Reset input time Rejection of reset input time Symbol Pin name TRSTL RSTX Value Unit Min Max 10 - μs 1 - μs (7) Power-on Reset Timing (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol Power on rise time Power off time Tr Toff Tr Min Value Typ Max 0.05 1 - 30 - Unit ms ms Toff 2.7V 0.2V 0.2V 0.2V If the power supply is changed too rapidly, a power-on reset may occur. We recommend a smooth startup by restraining voltages when changing the power supply voltage during operation, as shown in the figure below. 2.7V DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Rising edge of 50 mV/ms maximum is allowed 41 MB96670 Series (8) USART Timing (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol Serial clock cycle time 4.5V ≤ Vcc < 5.5V Pin Conditions Min Max name tSCYC SCKn SCKn tSLOVI SOTn SCKn Internal shift tOVSHI clock SOTn operation SCKn tIVSHI SINn SCKn tSHIXI SINn SCK ↓ → SOT delay time SOT → SCK ↑ delay time SIN → SCK ↑ setup time SCK ↑ → SIN hold time Serial clock "L" pulse width tSLSH SCKn Serial clock "H" pulse width tSHSL SCKn 2.7V ≤ Vcc < 4.5V Min Max Unit 4 tCLKP1 - 4 tCLKP1 - ns - 20 + 20 - 30 + 30 ns - ns - ns - ns - ns - ns N×tCLKP1 – 20* tCLKP1 + 45 0 tCLKP1 + 10 tCLKP1 + 10 - N×tCLKP1 – 30* tCLKP1 + 55 0 tCLKP1 + 10 tCLKP1 + 10 SCKn 2 tCLKP1 2 tCLKP1 ns External shift SOTn + 45 + 55 clock SCKn tCLKP1/2 tCLKP1/2 operation ns tIVSHE SIN → SCK ↑ setup time SINn + 10 + 10 SCKn tCLKP1 tCLKP1 tSHIXE ns SCK ↑ → SIN hold time SINn + 10 + 10 SCK fall time tF SCKn ns 20 20 SCK rise time tR SCKn ns 20 20 Notes: • The above characteristics apply to CLK synchronous mode. • CL is the load capacity value of pins when testing. • Depending on the used machine clock frequency, the maximum possible baud rate can be limited by some parameters. These parameters are shown in “MB96670 series HARDWARE MANUAL” • tCLKP1 indicates the peripheral clock 1 (CLKP1), Unit: ns • These characteristics only guarantee the same relocate port number. For example, the combination of SCLKn_0 and SOTn_1 is not guaranteed. SCK ↓ → SOT delay time tSLOVE *: Parameter N depends on tSCYC and can be calculated as follows: • If tSCYC = 2 × k × tCLKP1, then N = k, where k is an integer > 2 • If tSCYC = (2 × k + 1) × tCLKP1, then N = k + 1, where k is an integer > 1 Examples: tSCYC N 4 × tCLKP1 2 5 × tCLKP1, 6 × tCLKP1 3 7 × tCLKP1, 8 × tCLKP1 4 ... ... 42 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series tSCYC VOH SCK VOL tSLOVI VOH SOT VOL tIVSHI tSHIXI VIH VIH VIL VIL SIN MS bit = 0 tSHSL tSLSH SCK VIH VIH VIL VIL tR tF SOT tSLOVE VOH VOL tIVSHE SIN tSHIXE VIH VIH VIL VIL MS bit = 1 DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 43 MB96670 Series (9) External input timing (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol Value Min Max Pin name Unit Remarks Pnn_m General Purpose I/O A/D converter trigger ADTG 2tCLKP1 +200 input (t = ns CLKP1 TINn, TINn_R Reload Timer tINH 1/fCLKP1)* Input pulse width TTGn tINL PPG Trigger input INn, INn_R Input capture INTn, INTn_R, External interrupt 200 ns NMI NMI *: tCLKP1 indicates the peripheral clock1 (CLKP1) cycle time except stop when in stop mode. tINH VILS tINL VILS 44 FUJITSU SEMICONDUCTOR CONFIDENTIAL VIHS VIHS DS704-00001-0v02-E MB96670 Series 2 (10) I C timing (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol Conditions Typical mode Min Max High-speed mode*4 Min Max Unit SCL clock frequency fSCL 0 100 0 400 kHz (Repeated) START condition hold time tHDSTA 4.0 0.6 μs SDA ↓ → SCL ↓ SCLclock "L" width tLOW 4.7 1.3 μs SCLclock "H" width tHIGH 4.0 0.6 μs (Repeated) START setup time tSUSTA 4.7 0.6 μs SCL ↑ → SDA ↓ CL = 50pF, Data hold time 1 tHDDAT R = (Vp/IOL)* 0 3.45*2 0 0.9*3 μs SCL ↓ → SDA ↓ ↑ Data setup time tSUDAT 250 100 ns SDA ↓ ↑ → SCL ↑ STOP condition setup time tSUSTO 4.0 0.6 μs SCL ↑ → SDA ↑ Bus free time between "STOP condition" and tBUS 4.7 1.3 μs "START condition" *1: R and C represent the pull-up resistance and load capacitance of the SCL and SDA lines, respectively. Vp indicates the power supply voltage of the pull-up resistance and IOL indicates VOL guaranteed current. *2: The maximum tHDDAT must satisfy that it doesn't extend at least "L" period (tLOW) of device's SCL signal. *3: A high-speed mode I2C bus device can be used on a standard mode I2C bus system as long as the device satisfies the requirement of "tSUDAT ≥ 250 ns". *4: tCLKP1 is the peripheral clock1 (CLKP1) cycle time. To use I2C, set the peripheral bus clock at 6 MHz or more. SDA tSUDAT tLOW tSUSTA tBUS SCL tHDSTA tHDDAT tHIGH DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL tHDSTA tSUSTO 45 MB96670 Series z 10bit A/D Converter Electrical characteristics for the A/D converter (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Symbol Pin name Min Value Typ Max Unit Resolution - - - - 10 bit Total error - - - 3.0 - + 3.0 LSB Nonlinearity error - - - 2.5 - + 2.5 LSB - - - 1.9 - + 1.9 LSB VOT ANx Typ - 20 Typ + 20 mV VFST ANx Typ - 20 Typ + 20 mV Compare time - - Sampling time - - 5.0 8.0 3.1 μs μs μs μs mA Differential Nonlinearity error Zero transition voltage Full transition voltage Power supply current Reference power supply current (between AVRH to AVSS) IA IAH IR 1.0 2.2 0.5 1.2 - AVSS + 0.5LSB AVRH - 1.5LSB 2.0 - - 3.3 μA - 520 810 μA A/D Converter active - - 1.0 μA A/D Converter not operated - - 15.5 pF Normal outputs - - 17.4 pF High current outputs -1 - +1 μA -3 - +3 μA AVSS < VAIN < AVCC, AVRH AVRH IRH Analog input capacity CVIN Analog port input current IAIN Analog input voltage Reference voltage range AVCC AN 8, 9, 12, 13 AN 16 to 23 AN 8, 9, 12, 13 AN 16 to 23 Remarks VAIN ANx AVSS - AVRH V - AVRH AVCC - 0.1 - AVCC V 46 FUJITSU SEMICONDUCTOR CONFIDENTIAL 4.5V ≤ ΑVCC ≤ 5.5V 2.7V ≤ ΑVCC < 4.5V 4.5V ≤ ΑVCC ≤ 5.5V 2.7V ≤ ΑVCC < 4.5V A/D Converter active A/D Converter not operated DS704-00001-0v02-E MB96670 Series Accuracy and setting of the A/D Converter sampling time If the external impedance is too high or the sampling time too short, the analog voltage charged to the internal sample and hold capacitor is insufficient, adversely affecting the A/D conversion precision. To satisfy the A/D conversion precision, a sufficient sampling time must be selected. The required sampling time depends on the external driving impedance Rext, the board capacitance of the A/D converter input pin Cext and the AVcc voltage level. The following replacement model can be used for the calculation: MCU Rext Analog input RVIN Source Comparetor Cext CVIN Sampling switch Rext: External driving impedance Cext: Capacitance of PCB at A/D converter input CVIN: Capacitance of MCU input pin (I/O, analog switch and ADC are contained) 15.5pF (Normal outputs), 17.4pF (High current outputs) RVIN: Analog input impedance (I/O, analog switch and ADC are contained) 1450Ω (4.5V ≤ AVcc ≤ 5.5V), 2700Ω (2.7V ≤ AVcc < 4.5V) The following approximation formula for the replacement model above can be used: Tsamp [min] = 7.62 × (Rext × Cext + (Rext + RVIN) × CVIN) Do not select a sampling time below the absolute minimum permitted value. (0.5μs for 4.5V ≤ AVcc ≤ 5.5V, 1.2 μs for 2.7V ≤ AVcc < 4.5V) If the sampling time cannot be sufficient, connect a capacitor of about 0.1 μF to the analog input pin. A big external driving impedance also adversely affects the A/D conversion precision due to the pin input leakage current IIL (static current before the sampling switch) or the analog input leakage current IAIN (total leakage current of pin input and comparator during sampling). The effect of the pin input leakage current IIL cannot be compensated by an external capacitor. The accuracy gets worse as |AVRH - AVSS| becomes smaller. DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 47 MB96670 Series • Definition of 10-bit A/D Converter Terms Resolution Linearity error : Analog variation that is recognized by an A/D converter. : Deviation of the line between the zero-transition point (0b0000000000←→ 0b0000000001) and the full-scale transition point (0b1111111110 ←→ 0b1111111111) from the actual conversion characteristics. Differential linearity error : Deviation from the ideal value of the input voltage that is required to change the output code by 1 LSB. Total error : Difference between the actual value and the theoretical value. The total error includes zero transition error, full-scale transition error, and linearity error. Linearity error 0x3FF Actual conversion characteristics 0x3FE Actual conversion characteristics 0x(N+1) {1 LSB(N-1) + VOT} VFST VNT 0x004 (Actuallymeasured value) (Actually-measured value) 0x003 Digital output Digital output 0x3FD Differential linearity error Actual conversion characteristics Ideal characteristics 0x002 0x001 0xN Ideal characteristics (Actually-measured value) VNT (Actually-measured value) 0x(N-2) VOT (Actually-measured value) AVss V(N+1)T 0x(N-1) Actual conversion characteristics AVRH AVss AVRH Analog input Linearity error of digital output N = Analog input VNT - {1LSB × (N - 1) + VOT} 1LSB’ Differential linearity error of digital output N = 1LSB = N VOT VFST VNT : : : : V(N + 1) T - VNT 1LSB [LSB] - 1 [LSB] VFST - VOT 1022 A/D converter digital output value. Voltage at which the digital output changes from 0x000 to 0x001. Voltage at which the digital output changes from 0x3FE to 0x3FF. Voltage at which the digital output changes from 0x(N − 1) to 0xN. 48 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series Total error 0x3FF 1.5 LSB' Digital output 0x3FE Actual conversion characteristics 0x3FD {1 LSB'(N-1) + 0.5 LSB'} 0x004 VNT 0x003 (Actually-measured value) Actual conversion characteristics Ideal characteristics 0x002 0x001 0.5 LSB' AVss AVRH Analog input 1LSB' (Ideal value) = AVRH - AVSS 1024 Total error of digital output N = [V] VNT - {1LSB' × (N - 1) + 0.5LSB'} 1LSB' N : A/D converter digital output value. VNT : Voltage at which the digital output changes from 0x(N + 1) to 0xN. VOT' (Ideal value) = AVSS + 0.5LSB[V] VFST' (Ideal value) = AVRH - 1.5LSB[V] DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 49 MB96670 Series z High current output slew rate (VCC = AVCC = 2.7V to 5.5V, DVCC = 4.5V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Rise time / Fall time Symbol Pin name tR2, tF2 P08_0 to P08_7 Min Value Typ Max 15 - 75 Voltage Unit Remarks ns CL=85pF VH=VOL2+0.9 × (VOH30-VOL30) VL=VOL2+0.1 × (VOH30-VOL30) VH VH VL VL tR2 tF2 Time z Low voltage detection characteristics (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Min Value Typ Max CILCR:LVL = 0000B CILCR:LVL = 0001B CILCR:LVL = 0010B CILCR:LVL = 0011B CILCR:LVL = 0100B CILCR:LVL = 0111B CILCR:LVL = 1001B 2.70 2.79 2.98 3.26 3.45 3.73 3.91 2.90 3.00 3.20 3.50 3.70 4.00 4.20 3.10 3.21 3.42 3.74 3.95 4.27 4.49 - -0.004 - - Symbol Conditions Detected voltage VDL0 VDL1 VDL2 VDL3 VDL4 VDL5 VDL6 Change ration of power supply voltage dV/dt Unit Remarks V V V V V V V Detected voltage V/μs (VDL) must be within standards. Voltage Vcc VDLx, max VDLx, min dV dt Time 50 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series z Flash Memory Write/Erase Characteristics (VCC = AVCC = DVCC = 2.7V to 5.5V, VSS = AVSS = DVSS = 0V, TA = - 40°C to + 105°C) Parameter Sector erase time Large Sector Min Value Typ Max - 0.6 Small Sector Unit Remarks 3.1 s 0.3 1.6 s Excludes write time prior to internal erase Half word (16 bit) write time - 25 400 μs Chip erase time - 2.7 14.2 s Not including system-level overhead time. Excludes write time prior to internal erase Erase / write cycles and data hold time (targeted value) Erase / write cycles (cycle) Data hold time (year) 1,000 20 * 10,000 10 * 100,000 5* *: This value comes from the technology qualification (using Arrhenius equation to translate high temperature measurements into normalized value at + 85°C). DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 51 MB96670 Series ORDERING INFORMATION MCU with CAN controller Part number MB96F673RAPMC-GSE1* MB96F673RAPMC-GSE2* MB96F673RAPMC1-GSE1* MB96F673RAPMC1-GSE2* MB96F675RAPMC-GSE1* MB96F675RAPMC-GSE2* MB96F675RAPMC1-GSE1* MB96F675RAPMC1-GSE2* Flash memory Flash A (96.5KB) Flash A (160.5KB) Package 64-pin plastic LQFP (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M24) 64-pin plastic LQFP (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M24) MCU without CAN controller Part number MB96F673AAPMC-GSE1* MB96F673AAPMC-GSE2* MB96F673AAPMC1-GSE1* MB96F673AAPMC1-GSE2* MB96F675AAPMC-GSE1* MB96F675AAPMC-GSE2* MB96F675AAPMC1-GSE1* MB96F675AAPMC1-GSE2* Flash Package Flash A (96.5KB) 64-pin plastic LQFP (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M24) Flash A (160.5KB) 64-pin plastic LQFP (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M24) *: These devices are under development and specification is preliminary. These products under development may change its specification without notice. 52 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series PACKAGE DIMENSION 64-pin plastic LQFP Lead pitch 0.65 mm Package width × package length 12.0 × 12.0 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.47 g Code (Reference) P-LQFP64-12×12-0.65 (FPT-64P-M23) 64-pin plastic LQFP (FPT-64P-M23) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 14.00±0.20(.551±.008)SQ *12.00±0.10(.472±.004)SQ 48 0.145±0.055 (.006 ±.002) 33 49 32 0.10(.004) Details of "A" part +0.20 1.50 –0.10 +.008 (Mounting height) .059 –.004 0.25(.010) INDEX 0~8° 64 17 1 0.65(.026) C "A" 16 0.32 ±0.05 (.013 ±.002) 0.50 ±0.20 (.020 ±.008) 0.60 ±0.15 (.024 ±.006) 0.10 ±0.10 (.004 ±.004) (Stand off) 0.13(.005) M 2003-2010 FUJITSU SEMICONDUCTOR LIMITED F64034S-c-1-4 Dimensions in mm (inches). Note: The values in parentheses are reference values Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 53 MB96670 Series 64-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 10.0 × 10.0 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.32 g Code (Reference) P-LFQFP64-10×10-0.50 (FPT-64P-M24) 64-pin plastic LQFP (FPT-64P-M24) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 12.00±0.20(.472±.008)SQ * 10.00±0.10(.394±.004)SQ 48 0.145±0.055 (.006±.002) 33 32 49 0.08(.003) Details of "A" part +0.20 1.50 –0.10 +.008 (Mounting height) .059 –.004 INDEX 0°~8° 17 64 0.10±0.10 (.004±.004) (Stand off) "A" LEAD No. 1 16 0.50(.020) C 0.20±0.05 (.008±.002) 0.08(.003) M 2005-2010 FUJITSU SEMICONDUCTOR LIMITED F64036S-c-1-3 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.25(.010) Dimensions in mm (inches). Note: The values in parentheses are reference values Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ 54 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E MB96670 Series REVISION HISTORY Revision Date Prelim 2 4-Apl-2011 Modification Creation DS704-00001-0v02-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 55 MB96670 Series FUJITSU SEMICONDUCTOR LIMITED Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome, Kohoku-ku Yokohama Kanagawa 222-0033, Japan Tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/ For further information please contact: North and South America FUJITSU SEMICONDUCTOR AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://us.fujitsu.com/micro/ Asia Pacific FUJITSU SEMICONDUCTOR ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fujitsu.com/sg/services/micro/semiconductor/ Europe FUJITSU SEMICONDUCTOR EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/semiconductor/ FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD. Rm. 3102, Bund Center, No.222 Yan An Road (E), Shanghai 200002, China Tel : +86-21-6146-3688 Fax : +86-21-6335-1605 http://cn.fujitsu.com/fss/ Korea FUJITSU SEMICONDUCTOR KOREA LTD. 902 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fsk/ FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel : +852-2377-0226 Fax : +852-2376-3269 http://cn.fujitsu.com/fsp/ Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU SEMICONDUCTOR or any third party or does FUJITSU SEMICONDUCTOR warrant non-infringement of any third-party's intellectual property right or other right by using such information. FUJITSU SEMICONDUCTOR assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited: Sales Promotion Department 56 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS704-00001-0v02-E