TSL1301 102 × 1 LINEAR SENSOR ARRAY WITH HOLD SOES031A – NOVEMBER 1996 – REVISED MAY 1997 D D D D D 102 × 1 Sensor-Element Organization 300 Dots-Per-Inch (DPI) Sensor Pitch High Sensitivity Output Referenced to Ground Excellent High-Temperature Dark Signal Characteristics Operation to 2 MHz Single 5-V Supply D D (TOP VIEW) SI CLK AO VDD 1 8 2 7 3 6 4 5 NC GND GND NC NC – No internal connection description The TSL1301 linear sensor array consists of a 102 × 1 array of photodiodes, associated charge amplifier circuitry, and a pixel data-hold function that provides simultaneous-integration start and stop times for all pixels. The pixels measure 85 µm by 77 µm with 85-µm center-to-center spacing and 8-µm spacing between pixels. Operation is simplified by internal control logic that requires only a serial-input pulse (SI) and a clock. The TSL1301 is intended for use in a wide variety of applications including mark and code reading, OCR and contact imaging, edge detection and positioning, and optical encoding. functional block diagram Pixel 1 Integrator Reset Pixel 2 Pixel 3 Pixel 102 VDD Analog Bus 4 Output Amplifier + _ 3 Sample/Hold/ Output 6,7 Switch Control Logic Hold CLK SI 2 Q1 Q2 AO RL (External Load) Gain Trim Q3 Q102 102-Bit Shift Register 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TSL1301 102 × 1 LINEAR SENSOR ARRAY WITH HOLD SOES031A – NOVEMBER 1996 – REVISED MAY 1997 Terminal Functions TERMINAL DESCRIPTION NAME NO. AO 3 Analog output CLK 2 Clock. The clock controls charge transfer, pixel output, and reset. GND 6, 7 Ground (substrate). All voltages are referenced to the substrate. NC 5, 8 No internal connection SI 1 Serial input. SI defines the start of the data-out sequence. VDD 4 Supply voltage. Supply voltage for both analog and digital circuits. detailed description The sensor consists of 102 photodiodes, also called pixels, arranged in a linear array. Light energy impinging on a pixel generates photocurrent, which is then integrated by the active integration circuitry associated with that pixel. During the integration period, a sampling capacitor connects to the output of the integrator through an analog switch. The amount of charge accumulated at each pixel is directly proportional to the light intensity and the integration time. The output and reset of the integrators is controlled by a 102-bit shift register and reset logic. An output cycle is initiated by clocking in a logic 1 on SI. This causes all 102 sampling capacitors to be disconnected from their respective integrators and starts an integrator reset period. As the SI pulse is clocked through the shift register, the charge stored on the sampling capacitors is sequentially connected to a charge-coupled output amplifier that generates a voltage on analog output AO. The integrator reset period ends 18 clock cycles after the SI pulse is clocked in. Then the next integration period begins. Note that a total 103 clock cycles are required, the 103rd cycle being necessary to terminate the output of pixel 102 and return the output to a high-impedance state, and to clear the internal shift register. AO is driven by a source follower that requires an external pulldown resistor. When the output is not in the output phase, it is in a high-impedance state. The output is nominally 0 V for no light input and 2 V for a nominal full-scale output. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TSL1301 102 × 1 LINEAR SENSOR ARRAY WITH HOLD SOES031A – NOVEMBER 1996 – REVISED MAY 1997 absolute maximum ratings† Supply voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Digital input current range, II . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 20 mA to 20 mA Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 25°C to 85°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions (see Figure 1 and Figure 2) Supply voltage, VDD Input voltage, VI MIN NOM 4.5 5 0 VDD × 0.7 0 High-level input voltage, VIH Low-level input voltage, VIL Wavelength of light source, λ 5 Sensor integration time, tint 0.0515 Setup time, serial input, tsu(SI) 5 5.5 V V 0 Operating free-air temperature, TA 0 V V nm 2000 kHz 100 ms 20 Hold time, serial input, th(SI) (see Note 1) UNIT VDD VDD VDD × 0.3 700 400 Clock frequency, fclock MAX ns ns 70 °C NOTE 1: SI must go low before the rising edge of the next clock pulse. CLK SI Internal Reset 18 Clock Cycles Integration Not Integrating Integrating ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ 102 Clock Cycles AO Hi-Z Hi-Z Figure 1. Timing Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TSL1301 102 × 1 LINEAR SENSOR ARRAY WITH HOLD SOES031A – NOVEMBER 1996 – REVISED MAY 1997 electrical characteristics at fclock = 200 kHz, VDD = 5 V, TA = 25°C, λp = 565 nm, tint = 5 ms, RL = 330 Ω, Ee = 800 nW/cm2 (unless otherwise noted) (see Note 2) PARAMETER TEST CONDITIONS Analog output voltage (white, average over 102 pixels) Analog output voltage (dark, average over 102 pixels) PRNU Pixel response nonuniformity Ee = 0 Pixels 2–101, Nonlinearity of analog output voltage See Note 4 Output noise voltage Ee = 0, VDD = 4.5 V See Note 5 VDD = 4.5 V, All pixels, See Note 6 RL = 330 Ω Saturation exposure Analog output saturation voltage MIN TYP MAX 1.8 2 2.2 V 0 0.3 0.4 V ± 10% See Note 3 ± 0.5% Ee = 0 3 5.45 7 3 3.5 DSNU Dark signal nonuniformity IL Image lag See Note 7 1% IDD IIH Supply current RL = 330 Ω 2.5 High-level input current IIL Ci Low-level input current VI = VDD VI = 0 Input capacitance UNIT 0.04 5 mVrms nJ/cm2 V 0.12 V 4 mA 10 µA 10 µA pF NOTES: 2. Clock duty cycle is assumed to be 50%. 3. PRNU is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of the device under test when the array is uniformly illuminated. 4. Nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent of analog output voltage (white). 5. RMS noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period. 6. DNSU is the difference between the maximum and minimum of dark-current voltage. 7. Image lag is a residual signal left in a pixel from a previous exposure. It is defined as a percent of white-level signal remaining after a pixel is exposed to a white condition followed by a dark condition: IL 4 +V V AO –V AO(dark) * VAO(dark) AO(white 100 ) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TSL1301 102 × 1 LINEAR SENSOR ARRAY WITH HOLD SOES031A – NOVEMBER 1996 – REVISED MAY 1997 operating characteristics over recommended ranges of supply voltage and operating free-air temperature (see Figure 2) PARAMETER tw(H) tw(L) Clock pulse duration (high) ts Analog output settling time to ± 1% TEST CONDITIONS 1 TYP 50 Clock pulse duration (low) tw MIN 2 CL = 50 pF 102 UNIT ns 50 RL = 330 Ω, MAX ns 350 103 ns 5V 2.5 V CLK 0V tsu(SI) SI 5V 50% 0V th(SI) ts AO ts Pixel 1 Pixel 102 Figure 2. Operational Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TSL1301 102 × 1 LINEAR SENSOR ARRAY WITH HOLD SOES031A – NOVEMBER 1996 – REVISED MAY 1997 APPLICATIONS INFORMATION This clear-plastic dual-in-line package consists of a circuit mounted on a lead frame and encapsulated with an electrically nonconductive clear plastic compound. Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 0.430 (10,92) 0.410 (10,41) SI CLK AO VDD NC GND GND NC 0.390 (9,91)‡ Centerline of Pin 1 Nominally Lies Between Pixels 7 and 8 8 5 0.310 (7,87) 0.290 (7,37) C L (pixel) C L 0.021 (0,53) 0.310 (7,87) 0.290 (7,37) 0.260 (6,60) 0.240 (6,10) 0.075 (1,91) 0.060 (1,52) 1 0.030 (0,76) D NOM 0.175 (4,45) 0.155 (3,94) 10° TYP 0.060 (1,52) 0.040 (1,02) 8 Places 4 0.020 (0,51) R NOM 4 Places 8° MAX TYP 0.053 (1,35) 0.043 (1,09) Seating Plane 0.020 (0,51) R MAX 4 Places 105° 90° 8 Places 0.012 (0,30) 0.008 (0,20) 0.016 (0,41) 0.014 (0,36) 0.067 (1,70) 0.053 (1,35) 0.150 (3,81) 0.125 (3,18) 0.025 (0,64) 0.015 (0,38) 0.100 (2,54) T.P.† Figure 3. Packaging Configuration † True position when unit is installed ‡ Minimum flat-optical-surface length NOTES: A. All linear dimensions are in inches and parenthetically in millimeters. B. This drawing is subject to change without notice. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 8-Apr-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing TSL1301 OBSOLETE OPTO NU Pins Package Eco Plan (2) Qty 8 TBD Lead/Ball Finish Call TI MSL Peak Temp (3) Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2005, Texas Instruments Incorporated