Application Note 1651 Single-Event Effects (SEE) Testing of the ISL705xRH/EH and ISL706xRH/EH Radiation Hardened Supervisory Circuits Introduction SEE Summary The intense heavy ion environment encountered in space applications can cause a variety of transient and destructive effects in analog circuits, including single-event latch-up (SEL), single-event transient (SET) and single-event breakdown (SEB). These effects can lead to system-level failures including disruption and permanent damage. For predictable, reliable system operation, these components have to be formally designed and fabricated for SEE hardness, followed by detailed SEE testing to validate the design. This report discusses the results of SEE testing of Intersil’s ISL705xRH/EH and ISL706xRH/EH family of microprocessor supervisory circuits. • No SEL/SEB at LET 86.4 MeV•cm2/mg with VDD = 6.5V • No SET events indicating false RESETs with VDD ≥ VRST max • No SET events on PFO when PFI input > VPFI max Reference Documents • ISL705ARH, ISL705BRH, ISL705CRH, ISL706ARH, ISL706BRH, ISL706CRH Data Sheet Product Description The Intersil ISL705x and ISL706x are microprocessor supervisory circuits that monitor power supply voltage and battery functions in microprocessor systems. The ISL705x series is ideal for 5V systems while the ISL706x series is geared toward 3.3V systems. Both are offered in 3 reset options, the A versions have an active low reset option; the B versions have active high reset option and the C version offers an active low open drain reset. All circuits provide the following functions: 1. A reset output during power-up, power-down, and brownout conditions. 2. A precision 4.65V (ISL705x)/3.08V (ISL706x) power supply voltage monitor. 3. A watchdog timer that switches to the LOW state if the timer input has not been toggled within 1.0 second (min). 4. A 1.25V (ISL705x)/0.6V (ISL706x) threshold detector to monitor an auxiliary power supply voltage. 5. An active-low manual-reset input. The supervisory circuits are fabricated on a 0.6μm BiCMOS junction isolated process optimized for power management applications. This integrated circuit was hardened by design to achieve a Total Ionizing Dose (TID) rating of at least 100krads(Si) at the standard 50 to 300rad(Si)/s high dose rate as well as the standard <10mrad(Si)/s low dose rate. Well known TID hardening methods were employed such as closed geometry NMOS devices to reduce leakage and optimized bias levels for bipolar devices to compensate for gain reduction. This family of supervisory circuits were also hardened by design to a Linear Energy Transfer (LET) of 86.4MeV/mg/cm2 by employing various SEE hardening techniques such as proper device sizing, filtering and special layout constraints. August 5, 2014 AN1651.1 1 SEE Test Objective The objectives of SEE testing of the ISL705xRH/EH and ISL706xRH/EH were to evaluate its susceptibility to single-event latch-up and single-event burnout and characterize its SET behavior. SEE Test Facility Testing was performed at the Texas A&M University (TAMU) Cyclotron Institute heavy ion facility. This facility is coupled to a K500 super-conducting cyclotron, which is capable of generating a wide range of test particles with the various energy, flux and fluence levels needed for advanced radiation testing. SEE Test Procedure The part was tested for single-event effects using Au ions (LET = 86.4MeV/mg/cm2). A schematic of the SEE test circuit is shown in Figure 1. VDD SUPPLY ISL705A RH/EH C1 0.1µF 1 MR WDO 8 2 VDD RST 7 3 GND WDI 6 4 PFI PFO 5 WDO I/O RST WDI SUPPLY PFI SUPPLY R1 R2 DNP C2 0.1µF C3 0.1µF PFO FIGURE 1. ISL705A, ISL706A SEE TEST SCHEMATIC The device under test was mounted in the beam line and irradiated with heavy ions of the appropriate species. The parts were assembled in dual in-line packages with the metal lid removed for beam exposure. The beam was directed on to the exposed die and the beam flux, beam fluence and errors in the device outputs were measured. The tests were controlled remotely from the control room. All input power was supplied from portable power supplies connected via cable to the device under test (DUT). The supply currents were monitored along with the device outputs. All currents were measured with digital ammeters, while all the output waveforms were monitored on a digital oscilloscope for ease of identifying the different types of SEE which the part displayed. Events were captured by triggering on changes in the output in time, such as changes in duty cycle or phase shifts. CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2011, 2014. All Rights Reserved. Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. Application Note 1651 Single-Event Latch-up and Burnout Results Unlike the other Intersil space products, these supervisory circuits are built in a junction-isolated process in which latch-up is at least a theoretical possibility; other Intersil Space Products use various dielectrically isolated (DI) processes in which latch-up is not possible. Accordingly, the first testing sequence looked at destructive effects. No burnout or latch-up was observed using Au ions (LET = 86.4MeV/mg/cm2) at 0° incidence from perpendicular. Testing was performed on four parts at +125°C (case temperature) and up to the maximum voltage (VDD = 6.5V). The first part (part ID 5) commenced testing with VDD = 5.5V and on subsequent tests VDD voltage was increased to 6V, 6.2V and 6.5V. All other parts were tested with a VDD of 6.2V and 6.5V. All test runs were run to a fluence of 1x107/cm2. The WDI and PFI inputs were toggled from 0V to VDD at 1kHz. The MR input was tied to VDD during SEL and SEB testing. Functionality of all outputs was verified after exposure. IDD was recorded pre and post exposure, under continuous power; results are shown in Table 1. No destructive effects of any kind were encountered in these tests. It is also important to note that SEL/SEB testing was done only on the ISL705A. From a design perspective the ISL705A and the ISL706A are exactly the same; however the ISL706 series of supervisors were internally biased to different voltage levels to achieve the 3.3V specifications. The voltage thresholds, even though they are different values, are produced the same way and trimmed through a resistor ladder network. They are built in the same process and functionality is equivalent. Therefore, all ISL705A SEL/SEB results are applicable to the ISL706A. TABLE 1. IDD PRE AND POST SEL/SEB TESTING PRE EXPOSURE POST EXPOSURE Single-Event Transient Testing Transient on the outputs (RST, WDO, PFO) were counted for various supply voltages for both the ISL705A (RH/EH) and the ISL706A (RH/EH). Single-event transients (SET) are defined as a digital state change in the output based on crossing the VOH threshold for a low-high-low (LHL) transient and VOL threshold for a high-low-high (HLH) transient. Testing was performed using the same test configuration as described previously for SEB/SEL testing. Au ions with an LET of 86.4MeV/mg/cm2 were used during testing and all tests were performed at +25°C. All tests were performed on 4 parts and the results are summarized in the following sections. ISL705A Reset Results The first test set VDD at 4.5V and MR at VDD; under these conditions, Reset should be low (as VDD is below the nominal VDD reset threshold of 4.65V). Using a fluence of 2x106/cm2, no transients were observed during this test on any of the 4 parts. This was an encouraging result, as it means that during a low VDD condition there would be no false signals sent from Reset indicating that VDD is within tolerances. The second test set VDD at 4.75V and MR at VDD, hence Reset should be high (as VDD is above the nominal VDD reset threshold of 4.65V). Each part was run to a fluence of 2 x 106/cm2 each and no HLH transients were observed on Reset. VDD was then raised to 5V, a more typical application, and still no transients were observed. Lastly, VDD was then raised to 5.5V and no transients were observed. In all cases where VDD was above the threshold voltage, no false signals were sent from Reset indicating that VDD was below the threshold voltage, when in reality, it wasn’t. When Reset was driven low by setting MR = 0V (VDD was returned to 5V) there were no transients with Au ions. The test was redone with VDD at 5.5V and again no transients were seen on the Reset output. Observing no transients was not a surprising result, as the SET would have to last longer than the 200ms reset timer period to get a false transition to a “1” level. PART ID VDD (V) TEMPERATURE (⁰C) IDD (µA) IDD (µA) 5 5.5 +125 509 509 5 6.0 +125 536 535 5 6.2 +125 546 545 5 6.5 +125 563 562 6 6.2 +125 551 551 ISL705A WDO Results 6 6.5 +125 565 565 7 6.2 +125 555 555 7 6.5 +125 573 572 8 6.2 +125 552 552 8 6.5 +125 570 570 WDO has many modes of operation, depending on whether VDD is below 4.5V or above 4.75V, the state of MR and whether WDI is toggling, DC low, DC high or floating. Table 2 shows these results. With the largest cross section observed in any WDO test being 3.9x10-6 cm2, natural space transients will be hundreds to thousands of years apart. When used as a low line indicator, ISL706A (WDO left floating) transients were only seen when VDD was below the reset threshold. Transients observed were in the range of 2μs to 20μs (see Figures 2 and 3). The only other time transients occurred was when WDI was toggling, but again, VDD was below the reset threshold and the cross section is 2.5x10-6cm2 (see Figure 4). Submit Document Feedback 2 In summary, the part has no Reset LHL transients when VDD is less than 4.75V or is held low by MR input being held low. This means the system will not have any false Reset signal telling it that VDD is within tolerance when it isn’t, or that it can operate while the MR (manual reset) is being applied. When VDD > 4.75V and MR = “1” there are no HLH transients that would cause the system to go through an unnecessary reset cycle. AN1651.1 August 5, 2014 Application Note 1651 Additional testing at lower LET levels was done on the WDO output in the conditions that experienced SETs, e.g., VDD = 4.4V with WDI toggling and VDD = 4.5V with WDI floating. Table 3 shows the cross section versus the different LET levels tested. Note that the fluence was increased as the LET levels were lowered and that the SET events only occurred when VDD is equal or slightly below the RESET threshold voltage. A typical application would not hold the supply voltage in this range. TABLE 2. WDO TRANSIENTS vs MODE OF OPERATION (MR = VDD unless noted otherwise) LET (MeV/mg/cm2) WDI STATE VDD (V) EXPECTED WDO STATE LHL TRANSITIONS HLH TRANSITIONS FLUENCE (/cm2) CROSS SECTION (cm2) 86.4 Toggle 4.4 0 20 N/A 8 x 106 2.5 x 10-6 Toggle MR = 0 5 1 N/A 0 8 x 106 Float 4.75 1 N/A 0 8 x 106 Float 4.5 0 31 N/A 8 x 106 5V 5 0 0 N/A 8 x 106 0V 5 0 0 N/A 8 x 106 3.9 x 10-6 TABLE 3. WDO TRANSIENTS vs LET (MR = VDD unless noted otherwise) LET (MeV/mg/cm2) WDI STATE VDD (V) EXPECTED WDO STATE LHL TRANSITIONS HLH TRANSITIONS FLUENCE (/cm2) CROSS SECTION (cm2) 86.4 Toggle 4.4 0 20 N/A 8 x 106 2.5 x 10-6 43 Toggle 4.4 0 4 N/A 1.6 x 107 2.5 x 10-7 28 Toggle 4.4 0 0 N/A 4 x 107 8.5 Toggle 4.4 0 0 N/A 8 x 107 86.4 Float 4.5 0 31 N/A 8 x 106 3.9 x 10-6 43 Float 4.5 0 37 N/A 1.6 x 107 2.3 x 10-6 28 Float 4.5 0 15 N/A 4 x 107 3.8 x 10-7 8.5 Float 4.5 0 0 N/A 8 x 107 Submit Document Feedback 3 AN1651.1 August 5, 2014 Application Note 1651 RST WDO PFO FIGURE 2. TRANSIENTS ON WDO, VDD = MR = 4.5V, PFI = 1.15V, WDI IS FLOATING WDO FIGURE 3. SAME WDO TRANSIENT AS Figure 2 WITH 10µs PER DIVISION TIME SCALE Submit Document Feedback 4 AN1651.1 August 5, 2014 Application Note 1651 RST WDO WDI FIGURE 4. TRANSIENT ON WDO (VDD = MR = 4.4V, PFI = 1.15V, WDI IS TOGGLING 0 TO VDD AT 1kHz) ISL705A PFO Results The PFI/PFO function is that of a comparator with the negative input tied to an on-chip 1.25V voltage reference. The PFI input is tied to the positive comparator input and PFO is the comparator output. The specifications allow a ±50mV offset over temperature and radiation. Hence, input voltages below 1.2V set PFO low and voltages above 1.3V set PFO high. Table 4 lists PFO transients as a function of PFI input voltage for Au ions. Transients were seen when driving PFI to the minimum specs of 1.2V. By increasing the comparator overdrive, the transient cross-section can be reduced or eliminated. Even at minimum overdrive conditions (input 1.2V), the transient cross section is so small that the occurrence will be hundreds to thousands of years apart. For further reductions, an off-chip low pass filter could be used. Figure 5 shows scope traces for PFO transients with PFI at 1.2V. Note the LHL transient is 4μs to 6μs long, adding an external low-pass filter would reduce the glitch. This would add delay in the system that the designer would need to evaluate. Additional testing at lower LET levels was done on the PFO output in the conditions that experienced SETs, e.g., VDD = 4.75V with PFI = 1.2V. Table 5 shows the cross section versus the different LET levels tested. Note that the fluence was increased as the LET levels were lowered. ISL705A Summary The key objective of burnout or latch-up hardness to an LET of 86.4MeV/mg/cm2 has been demonstrated. No Reset LHL SEE transients at an LET of 86.4MeV/mg/cm2 have been demonstrated once VDD is above the maximum threshold voltage. Other functions have demonstrated cross sections so small as to not occur for hundreds to thousands of years. These characteristics must be evaluated by the system designer for the particular environment of interest and the usage of the available features of the ISL705A. TABLE 4. PFO TRANSIENTS vs PFI INPUT VOLTAGE (MR = VDD unless noted otherwise) LET (MeV/mg/cm2) PFI VOLTAGE (V) 86.4 1.15 4.5 0 0 N/A 1.2 4.75 0 25 N/A 1.3 5 1 N/A 1. 5.5 1 N/A Submit Document Feedback 5 VDD (V) EXPECTED PFO STATE LHL TRANSITIONS HLH TRANSITIONS FLUENCE (/cm2) 8 x 106 CROSS SECTION (cm2) 3.1 x 10-6 0 8 x 106 8 x 106 0 8 x 106 AN1651.1 August 5, 2014 Application Note 1651 TABLE 5. PFO TRANSIENTS vs LET for PFI = 1.2V (MR = VDD unless noted otherwise) LET (MeV/mg/cm2) PFI VOLTAGE (V) VDD (V) EXPECTED PFO STATE LHL TRANSITIONS HLH TRANSITIONS FLUENCE (/cm2) CROSS SECTION (cm2) 86.4 1.2 4.75 0 25 N/A 8 x 106 3.1 x 10-6 1.2 x 10-6 1.3 x 10-7 43 1.2 4.75 0 19 N/A 1.6 x 107 28 1.2 4.75 0 5 N/A 4 x 107 8.5 1.2 4.75 0 0 N/A 8 x 107 RST WDO PFO FIGURE 5. TRANSIENT ON PFO (VDD = MR = 4.75V, PFI = 1.2V, WDO IS FLOATING) ISL706A Reset Results The ISL706A is the same as the ISL705A with different bias levels for 3.3V operation. Similar results are expected, however, the tighter voltage thresholds and the lower bias levels might introduce more transients. The first test set VDD at 3V and MR at VDD; under these conditions, Reset should be low (as VDD is below the nominal VDD reset threshold of 3.08V). Using a fluence of 2x106/cm2, no transients or transients were observed during this test on any of the 4 parts. This was an encouraging result, which means that during a low VDD condition, there would be no false signals sent from Reset indicating that VDD is within tolerances. The second test set VDD at 3.15V and MR at VDD, hence, Reset should be high (as VDD is above the nominal VDD reset threshold of 3.08V). Each part was run to a fluence of 2x106/cm2 each Submit Document Feedback 6 and no HLH transients were observed on Reset. VDD was then raised to 3.3V, a more typical application, and still no transients were observed. Lastly, VDD was then raised to 3.6V and no transients were observed. All cases where VDD was above the threshold voltage, no false signals were sent from Reset indicating a low line condition. When Reset was driven low by setting MR = 0V (VDD was returned to 3.3V), there were no transients with Au ions. The test was redone with VDD at 3.6V and again, no transients were seen on the Reset output. Observing no transients was not a surprising result, as the SET would have to last longer than the 200ms Reset timer period to get a false transition to a “1” level. In summary, the part has no Reset LHL transients when VDD is less than 3V or is held low by MR input being held low. This means the system will not have any false Reset signals telling it AN1651.1 August 5, 2014 Application Note 1651 that VDD is within tolerance when it isn’t, or that it can operate while the MR (manual reset) is being applied. When VDD > 3.15V and MR = “1”, there are no HLH transients that would cause the system to go through an unnecessary reset cycle. of 8μs to 24μs (see Figures 6 and 7). The only other time transients occurred was when WDI was toggling, thus again VDD was below the reset threshold and the cross section is 2.1x 10-6cm2 (see Figures 8 and 9). ISL706A WDO Results Additional testing at lower LET levels was done on the WDO output in the conditions that experienced SETs, e.g., VDD = 2.9V with WDI toggling and VDD = 3.0V with WDI floating. Table 7 shows the cross section versus the different LET levels tested. Note that the fluence was increased as the LET levels were lowered. Once again the only time the device experience SETs when the supply voltage was equal to or slightly below the RESET threshold voltage. In a typical application, the supply voltage would be at 3.3V constantly. WDO has many modes of operation, depending on whether VDD is below 3.0V or above 3.15V, the state of MR and whether WDI is toggling, DC low, DC high or floating. Table 6 shows these results. With the largest cross section observed in any WDO test being 98x 10-6 cm2, natural space transients will be hundreds to thousands of years apart. When used as a low line indicator (WDO left floating) transients were only seen when VDD was below the reset threshold. Transients observed were in the range TABLE 6. WDO TRANSIENTS vs MODE OF OPERATION (MR = VDD unless noted otherwise) LET (MeV/mg/cm2) WDI STATE VDD (V) EXPECTED WDO STATE LHL TRANSITIONS HLH TRANSITIONS FLUENCE (/cm2) CROSS SECTION (cm2) 86.4 Toggle 2.9 0 17 N/A 8 x 106 2.1 x 10-6 Toggle MR = 0 3.3 1 N/A 0 8 x 106 Float 3.15 1 N/A 0 8 x 106 Float 3 0 784 N/A 8 x 106 3.3V 3.3 0 0 N/A 8 x 106 0V 3.3 0 0 N/A 8 x 106 9.8 x 10-5 TABLE 7. WDO TRANSIENTS vs LET (MR = VDD unless noted otherwise) LET (MeV/mg/cm2) WDI STATE VDD (V) EXPECTED WDO STATE LHL TRANSITIONS HLH TRANSITIONS FLUENCE (/cm2) CROSS SECTION (cm2) 86.4 Toggle 2.9 0 17 N/A 8 x 106 2.1 x 10-6 43 Toggle 2.9 0 1 N/A 1.6 x 107 6.3 x 10-8 28 Toggle 2.9 0 0 N/A 4 x 107 8.5 Toggle 2.9 0 0 N/A 8 x 107 86.4 Float 3 0 784 N/A 8 x 106 9.8 x 10-5 43 Float 3 0 1062 N/A 1.6 x 107 6.6 x 10-5 28 Float 3 0 1909 N/A 4 x 107 4.8 x 10-5 8.5 Float 3 0 58 N/A 8 x 107 7.3 x 10-7 Submit Document Feedback 7 AN1651.1 August 5, 2014 Application Note 1651 RST WDO PFO FIGURE 6. TRANSIENTS ON WDO, VDD = MR = 3.0V, PFI = 0.57V, WDI IS FLOATING RST WDO PFO FIGURE 7. SAME WDO TRANSIENT AS Figure 6 WITH 10µs PER DIVISION TIME SCALE Submit Document Feedback 8 AN1651.1 August 5, 2014 Application Note 1651 RST WDO PFO WDI FIGURE 8. TRANSIENT ON WDO (VDD = MR = PFI = 2.9V, WDI IS TOGGLING 0 TO VDD AT 1kHz) RST WDO PFO WDI FIGURE 9. SAME WDO TRANSIENT AS Figure 8 WITH 10µs PER DIVISION TIME SCALE Submit Document Feedback 9 AN1651.1 August 5, 2014 Application Note 1651 ISL706A PFO Results low-pass filter would reduce the glitch. This would add delay in the system that the designer would need to evaluate. When PFI was above the threshold voltage of 0.624V no HLH transitions were observed. This indicates that when an auxiliary voltage is within regulation (above the threshold) the PFI comparator would not indicate otherwise. The PFI/PFO function is identical to that of the ISL705A, except the negative input of the comparator is tied to an on-chip 0.6V voltage reference. The specification allows a ±24mV offset over temperature and radiation. Hence input voltages below 0.576V set PFO low and voltages above 0.624V set PFO high. Table 8 lists PFO transients as a function of PFI input voltage for Au ions. One transient was seen when driving PFI to the minimum specs of 0.576V. By increasing the comparator overdrive, the transient cross section was eliminated. Again, even at minimum overdrive conditions (input 0.576V) the transient cross section is so small that the occurrence will be hundreds to thousands of years apart. Figure 10 shows the scope trace for the PFO transient with PFI at 0.576V. Note the LHL transient is 6μs long, adding an external Additional testing at lower LET levels was done on the PFO output in the conditions that experienced SETs, e.g., VDD = 3.15V with PFI = 0.576V. Table 9 shows the cross section versus the different LET levels tested. Note that the fluence was increased as the LET levels were lowered. The data also shows that for LET < 43MeV•cm2/mg there are no SETs on PFO in that test condition. TABLE 8. PFO TRANSIENTS vs PFI INPUT VOLTAGE (MR = VDD unless noted otherwise) LET (MeV/mg/cm2) PFI VOLTAGE (V) VDD (V) EXPECTED PFO STATE LHL TRANSITIONS HLH TRANSITIONS FLUENCE (/cm2) 86.4 0.57 3 0 0 N/A 8 x 106 0.576 3.15 0 1 N/A 8 x 106 0.625 3.3 1 N/A 0 8 x 106 0.75 3.6 1 N/A 0 8 x 106 CROSS SECTION (cm2) 1.3 x 10-7 TABLE 9. PFO TRANSIENTS vs LET for PFI = 0.576V (MR = VDD unless noted otherwise) LET (MeV/mg/cm2) PFI VOLTAGE (V) VDD (V) EXPECTED PFO STATE LHL TRANSITIONS HLH TRANSITIONS FLUENCE (/cm2) CROSS SECTION (cm2) 86.4 0.576 3.15 0 1 N/A 8 x 106 1.3 x 10-7 43 0.576 3.15 0 0 N/A 1.6 x 107 28 0.576 3.15 0 0 N/A 4 x 107 8.5 0.576 3.15 0 0 N/A 8 x 107 Submit Document Feedback 10 AN1651.1 August 5, 2014 Application Note 1651 RST WDO PFO FIGURE 10. TRANSIENT ON PFO (VDD = MR = 3.15V, PFI = 0.576V, WDO IS FLOATING) RST WDO PFO FIGURE 11. SAME PFO TRANSIENT AS Figure 10 WITH 10µs PER DIVISION TIME SCALE Submit Document Feedback 11 AN1651.1 August 5, 2014 Application Note 1651 ISL706A Summary Conclusion As with the ISL705A, the ISL706A has no Reset HLH or LHL single-event transients at an LET of 86.4MeV/mg/cm2. The WDO output did have 25 times more transients compared to the ISL705A when used as a low line indicator (WDI floating). These transients did occur only when VDD was below the reset threshold. The increase in the number of transients seen is primarily due to tighter thresholds in the ISL706x family of circuits. Other functions have demonstrated cross sections so small to not occur for hundreds to thousands of years. The PFO output experienced only one transient during SEE testing, compared to the ISL705A testing, which had 25 transients on PFO. The main contribution for the reduction in transients is the internal SEE mitigation filters. Both the ISL705A and ISL706A have these filters; however, in the ISL706A with the lower bias levels, there is less drive capability in the PFO comparator. As a result, the ISL706A benefits by experiencing less and shorter PFO transients at minimal overdrive. This Application Note has presented the results of single-event effects testing of the ISL705A and ISL706A supervisory circuits. The integrated circuit has no SEL or SEB with a supply voltage of up to 6.5V at an LET of 86.4MeV/mg/cm2. The initial SEE characterization of the ISL705A and ISL706A demonstrated that this device does not create/cause false system shutdowns at 86MeV. Furthermore, testing shows that the part will indicate a “system good” signal when it shouldn’t, but the user needs to keep in mind this is in a window of when the general “system” is not in normal operation mode anyway. The additional testing at lower LETs revealed less events and demonstrates lower cross-sections; which may be useful from a cross section analysis. But with a device like this, understanding the way the part will be used in a specific application vs the SEE performance is critical. Acknowledgements I would like to thank Eric Thomson for his hard work and dedication in performing the SEE tests at TAMU. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com Submit Document Feedback 12 AN1651.1 August 5, 2014