For Audio Equipment
MN6474A
D/A Converter for Digital Audio Equipment
192FS
ZFLGB
NSUB
DVSS2
DVDD2
N.C.
X1
X2
DVSS1
DVDD1
AVDD1
Pin Assignment
32
31
30
29
28
27
26
25
24
23
22
Overview
LRPOL
LRCLK
BCLK
SRDATA
DVSS3
DVDD
384FS
PD
MDATA
MCLK
33
34
35
36
37
38
39
40
41
42
Features
Built-in 4-fold oversampling digital filter
(ripple of only ±0.0072 dB within the supported
band and attenuation of 62.7 dB within the cutoff
band)
MLD
RSTB
IE
TP1
TP2
TEST1
TEST2
N.C.
N.C.
AVDD4
1
2
3
4
5
6
7
8
9
10
The MN6474A is a CMOS digital-to-analog converter
with a built-in 16-bit digital filter for pulse code
modulation (PCM) digital audio equipment.
It uses noise shaping technology to convert a digital
signal into a PWM signal.
It contains a 4-fold oversampling digital filter that
permits simplification of the low pass filter after the D/A
converter, thus greatly reducing the power consumption
of the entire D/A conversion system.
The chip provides both regular and inverted phase
outputs for both channels.
The chip contributes to cost and size reductions for CD
players and other digital audio equipment.
(TOP VIEW)
Internal resolution of 18 bits
Two's complement input (I2S input code also supported)
Built-in overflow limiter
No zero cross distortion
Sample-and-hold circuit is unnecessary
Output pin for detecting zero input
Single 5V power supply
Applications
CD players and other digital audio equipment
QFP042-P-1414A
21
20
19
18
17
16
15
14
13
12
11
OUTR(–)
AVSS1
AVSS2
OUTR(+)
AVDD2
N.C.
AVDD3
OUTL(+)
AVSS3
AVSS4
OUTL(–)
MN6474A
For Audio Equipment
X2
25
26
X1
192FS
32
39
384FS
ZFLGB
TP2
TEST1
TP1
31
4
5
6
7
TEST2
Block Diagram
Timing Generator
FIR 1
FIR 2
3
PWM
Logics
(R)
21
Analog
Block
18
(R)
PWM
Logics
(L)
14
Analog
Block
11
(L)
Noise
Shaping
Logics
MLD
MCLK
1
Microcomputer Interface
42
IE
36
S/P
Converter
MDATA
SRDATA
35
41
BCLK
34
PD
LRCLK
33
40
LRPOL
OUTR(–)
OUTR(+)
OUTL(+)
OUTL(–)
For Audio Equipment
MN6474A
Pin Descriptions
Pin No.
1
Symbol
MLD
2
RSTB
3
IE
4
TP1
Function Description
Microcomputer command load input ("L" level to load)
Reset pin (active "L").
Always pull this pin low after applying the power.
Input format selection pin.
"H" level; I 2S format
Digital filter test output pin 1.
Leave this pin open.
"L" level; signal processing LSI format.
5
TP2
Digital filter test output pin 2.
Leave this pin open.
6
TEST1
Digital filter test input pin 1.
Keep this pin at "L" level.
7
TEST2
Digital filter test input pin 2.
Keep this pin at "L" level.
8
N.C.
No connection
Leave these pins open.
No connection
Leave these pins open.
9
N.C.
10
AV DD4
11
OUTL(–)
12
AV SS4
Ground pin 4 for analog circuits.
13
AV SS3
Ground pin 3 for analog circuits.
14
OUTL(+)
15
AV DD3
16
N.C.
Power supply pin 4 for analog circuits.
(+5V)
Left channel inverted phase PWM output pin.
Left channel normal phase PWM output pin.
Power supply pin 3 for analog circuits.
No connection
(+5V)
Leave this pin open.
17
AV DD2
18
OUTR(+)
Power supply pin 2 for analog circuits.
(+5V)
19
AV SS2
Ground pin 2 for analog circuits.
20
AV SS1
Ground pin 1 for analog circuits.
21
OUTR(–)
22
AV DD1
Power supply pin 1 for analog circuits.
(+5V)
23
DV DD1
Power supply pin 1 for digital circuits.
(+5V) (Power supply for oscillator circuit)
24
DV SS1
Ground pin 1 for digital circuits.
25
X2
Crystal oscillator pin.
26
X1
Crystal oscillator pin. (External clock input pin)
Right channel through phase PWM output pin.
Right channel inverted phase PWM output pin.
No connection
(Ground for oscillator circuit)
27
N.C.
28
DV DD2
Power supply pin 2 for analog circuits.
Leave this pin open.
29
DV SS2
Ground pin 2 for digital circuits.
30
NSUB
Connect to D-VDD.
31
ZFLGB
Output pin for detecting zero input.
32
192FS
192fs(=9.216 MHz)output pin.
33
LRPOL
LRCLK polarity selection pin.
(+5V)
(Silicon substrate potential fixing pin)
Max. load capacity: 30 pF.
"H" level; selects the left channel
"L" level; the right channel.
34
LRCLK
LRCLK pin. When the LRPOL pin is at "H" level, "H" level in this pin indicates left
channel data input; "L" level indicates right channel data input. When the LRPOL pin
is at "L" level, "L" level in this pin indicates left channel data input; "H" level input
indicates right channel data input.
35
BCLK
36
SRDATA
37
DV SS3
Serial input bit clock
Serial input data (digital) input pin.
Ground pin 3 for digital circuits.
MN6474A
For Audio Equipment
Pin Descriptions (continued)
Pin No.
38
Symbol
DVDD
39
384FS
40
PD
41
MDATA
42
MCLK
Function Description
Power supply pin for digital circuits. (Silicon substrate potential fixing pin.) (+5V)
384fs (=18.432 MHz)
output pin.
Power down pin.
(active "H")
Max. load capacitance: 30 pF.
Microcomputer command data input pin.
Clock input pin for microcomputer command.
Conversion Characteristics
DV DD=5.0V, DVSS=0V, AVDD=5.0V, AVSS=0V, f=33.8688MHz, Ta=25˚C
Parameter
Analog characteristics
Symbol
Test Conditions
min
typ
max
Unit
Signal-to-noise ratio
S/N
EIAJ (1kHz)
95
106
dB
Dynamic range
D.R.
EIAJ (1kHz)
90
98
dB
Total harmonic distortion
THD+N
EIAJ (1kHz)
0.003
0.005
%
Crosstalk
EIAJ (1kHz)
90
98
dB
Output level *1
1kHz F.S.
1.4
1.7
Vrms
Note*1: These analog characteristics are for circuits equivalent to the suggested application circuit.
"H"
"L"
S1 S4
S5 S6
AVSS3
AVSS4
OUTL(–)
AVDD2
N.C.
AVDD3
OUTL(+)
–
Reset
–
Power
down mode
RSTB(S1)
I2S format
Signal processing
LSI format
IE(S4)
*C9
0.56µF
21
20
19
18
C7
+
17
16 330µF
15
14
13 C8
330µF
12
11
*C1,C5,C6 and C9 are attached to the rear of the P base.
VDD
VSS
MN6474A
AVDD4 10
N.C. 9
N.C. 8
TEST2 7
TEST1 6
TP2 5
TP1 4
IE 3
RSTB 2
MLD 1
PD(S3)
S2 S3
LRPOL
LRCLK
BCLK
SRDATA
DVSS3
DVDD
384FS
PD
MDATA
MCLK
AVDD1
DVDD1
DVSS1
X2
X1
N.C.
DVDD2
DVSS2
NSUB
ZFLGB
192fs
100µF
22
23
*C5 10µF
24
5pF R24.7kW
25
C4
26
33.8688
C3 5pF
27
MHz
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
OUTR(–)
AVSS1
AVSS2
OUTR(+)
*C6 0.56µF
+
47pF
47pF
R12
47kW
C18
47pF
C19 47pF
R11
47kW
R10
47kW
C17
C16
R9
47kW
+
C15 47µF
+
C14 47µF
+
+
IC1 to 4
AN6558
E
15
1 – +
– +
IC4
R26
22W C31
220µF
IC1
R22
47kW
R16
33kW
– +
C21
47pF
1 – +
8
– +
IC3
+
C34
330pF
C35
330pF
220µF
+ C32
1 2 3 4 5 6 7 8 9 10
7th order L.P.F(HAF 0079)
R25
22W
L ch
R30
100kW
R29
100kW
R ch
C28
220µF
R27
330W
+
R28
N
C33 330W
10µF
R24 C29
C32
22W 220µF 10µF
N
R23
22W
7th order L.P.F(HAF 0079)
1 2 3 4 5 6 7 8 9 10
33kW C20 47pF
C27 2200pF
R21
47pF
47kW
C23
R20
R35
220W N
470kW
R15
33kW R18 47kW
10µF
C25
IC2
8
C13
C26 2200pF
22µF C22
47pF
R19
R17 220W N
10µF R34
R13 47kW
C24 470kW
33kW
– +
R14
1 – +
8
+
C11 C12
22µF 22µF
+
–15
1 – +
8
C10
22µF
R5 1kW
R33
R4 330W
+
+
R3 330W
C2
+
*C1
100µF
AVSS
R6 1kW
470W
R1
10W
AVDD
R7 1kW
R32
470W
R32
470W
DVDD
R8 1kW
+
DVSS
For Audio Equipment
MN6474A
Application Circuit Example
MN6474A
For Audio Equipment
Package Dmensions (Unit: mm)
QFP042-P-1414A
18.7±0.4
14.0±0.2
32
22
21
18.7±0.4
14.0±0.2
(0.65)
33
42
11
0.15
SEATING PLANE
(2.35)
+0.10
0.4±0.1
0.15 -0.05
1.27
2.6max.
(1.92)
2.2±0.2
10
0.1±0.1
1
(1.5±0.2)
0 to 10°