ISL8013 Monolithic DC/DC Evaluation Board Setup Procedure ® Application Note June 1, 2006 AN1241.1 Author: Steve Laur This document describes the setup procedure for the ISL8013EVAL1 Rev A board. Features Description • Components on one side of PCB The General Purpose market requires maximum flexibility in its power management solutions due to the large variety of applications produced each year. The ISL8013 services this need by offering a multitude of functionality, combined with features that allow it to work in many different application spaces. • Max height 1.2mm HTSSOP14 • Less than 0.36in2 footprint for the complete 3A converter From a functional standpoint, the ISL8013 is an ideal controller for designers that want a “plug and play” solution. It delivers a regulated output voltage from 0.8V to 5.5V at a maximum current of 3A, with 11 or fewer total components. Its 14 Ld HTSSOP package, combined with integrated MOSFET switches and compensation, yield a solution size below 0.36in2. This small form factor makes the ISL8013 a desirable solution for any application where board space is a premium (PDAs, cell phones, etc.). Additional features include a power good (PG) indicator for output voltage monitoring, and a clock frequency synchronizing input (SYNC). The SYNC input allows the regulator to switch anywhere between the nominal 1.4MHz frequency and 12MHz. Synchronizing multiple switching devices on the same bus eliminates beat-frequency oscillations that can be detrimental to noise-sensitive applications. The ISL8013 supports power up into applications with prebiased loads by allowing Pulse Frequency Modulation (PFM) during the soft-start period. Overall, the ISL8013 delivers a robust, highly integrated DC/DC buck converter for a variety of General Purpose applications. For a more detailed description of the ISL8013, refer to the data sheet [1]. The Intersil General Purpose family of monolithic switching power supplies continues to expand with new selections to better fit our customer’s needs. References • Power-Good (PG) output • Internally-compensated voltage mode controller • Up to 95% efficiency • <1µA shut-down current • Hiccup mode overcurrent and over-temperature protection • External synchronization up to 12MHz • Pb-free plus anneal available (RoHS compliant) Ordering Information PART NUMBER (Note) TAPE & REEL PACKAGE (Pb-Free) PKG. DWG. # ISL8013IVEZ - 14 Ld HTSSOP MDP0048 ISL8013IVEZ-T7 7” 14 Ld HTSSOP MDP0048 ISL8013IVEZ-T13 13” 14 Ld HTSSOP MDP0048 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Pinout ISL8013IVEZ (14 LD HTSSOP) TOP VIEW 1 PG LX 14 2 VIN PGND 13 3 VIN LX 12 4 VIN PGND 11 5 VDD SGND 10 6 SYNC FB 9 7 EN VO 8 [1] Refer to our website for updated information and the ISL8013 data sheet: www.intersil.com. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1241 What’s Inside TABLE 1. DETAILED DESCRIPTION OF SWITCH SETTINGS The Evaluation Board Kit contains the following materials: SWITCH POSITION FUNCTION S1 ON ENABLE ISL8013 OFF (default) DISABLE ISL8013 • The ISL8013EVAL1 Rev A Evaluation Board • The ISL8013 data sheet • The ISL8013 Evaluation Board Setup Procedure (this document) TABLE 2. DETAILED DESCRIPTION OF TEST POINTS REF DES TYPE FUNCTION P1 Test Point SYNC Input: HIGH = Force PWM LOW = Auto PFM/PWM Switching = Clock Sync P2 Test Point GND P3 Test Point PGOOD Output P6 Test Point External Enable NOT. S1 is required to be in the ON position. J1 Oscilloscope Kelvin LX Measurement Quick Setup Guide J2 Oscilloscope Kelvin VOUT Measurement Step 1: P4 Binding Post GND P5 Binding Post VIN P7 Binding Post VOUT P8 Binding Post GND What is Needed The following materials will be needed to perform testing: • 1 electronic load [see note] • 1 power supply: 0-6V @ 5A (see note) • 2 precision digital multimeters • Oscilloscope NOTE: amperage rating of power supplies and loads are determined by maximum expected loading plus a percentage margin of error Step 2: Set the +VIN power supply to +3.3V and place in the “STANDBY” or “OFF” position. Set the supply current limit to 5A. Connect the positive terminal (+) of the supply to the VIN terminal P4 and the negative terminal (-) of the supply to GND P5. Connect the positive terminal (+) of a DMM to the VIN terminal P4 and the negative terminal (-) to the GND terminal P5. Step 3: Connect the positive terminal (+) of the electronic load to the VOUT terminal P7. Connect the negative terminal (-) of the electronic load to the GND terminal P8. Make sure the electronic load is set to the 0A condition. Step 4: Connect the positive terminal (+) of a DMM to the VOUT terminal P7 and the negative terminal (-) to the GND terminal P8. Step 5: Check to ensure all jumpers and switches are in their default positions prior to application of power (refer to Table 1). Step 6: Set all power supplies to the “ON” position. LED D1 should be off. Check all DMM displays for correct voltage levels. Adjust if necessary. Step 7: Turn the ENABLE switch S1 to the “ON” position. LED D1 should glow red. The VOUT DMM should read 1.80V (±5%). EVAL Board Information At this point the board has been properly powered up. Normal testing can begin. NOTE: If you need technical assistance, or other assistance, with the ISL8013 Evaluation Board, call 1-888-INTERSIL (468-3774). 2 FIGURE 1. ISL8013EVAL1 REV A EVALUATION BOARD AN1241.1 June 1, 2006 Application Note 1241 Eval Board Schematic 1 P5 SYNC 10 EN 6 7 15 (See Note) 5 4 3 5 4 3 10 A A SYNC 1K R3 P1 P2 VIN R7 A 750 EN 2 ON/EX OFF 3 1 31 R8 D1 EXT: EN 2N7002 2N7002 Q2 2 P6 Q1 2 1 3 S1 1 1K 10K R4 2 R5 VIN PG 10UF A 8 A P3 P8 9 ISL8013 A 10UF C6 11 C5 12 470PF 5 P7 1.0UH 13 124K C4 4 R6 L1 14 LX PGND LX PGND SGND FB VO 2 1K 10UF 10UF C2 C1 3 A U1 PG VIN VIN VIN VDD SYNC EN EP 1 J2 100K P4 2 2 R1 VIN 1 A R2 PG 1UF C3 J1 A A NOTE: It may be necessary to place a high value electrolytic capacitor between VIN terminals P4 and P5 to eliminate power supply lead impedance. 3 AN1241.1 June 1, 2006 Application Note 1241 TABLE 3. BILL OF MATERIALS ITEM QTY REFERENCE VALUE TYPE 1 1 U1 2 2 J1, J2 Tekronix Scope Jack 3 2 Q1, Q2 N-Channel MOSFET: 2N7002 4 4 C1, C2, C5, C6 10µF Generic ceramic capacitor 1206 6.3V 5 1 C3 1µF Generic ceramic capacitor 0603 6.3V 6 1 C4 470pF Generic ceramic capacitor 0603 6.3V 7 1 L1 1µH 8 1 S1 9 1 R1 124kΩ Generic thick film chip resistor 0603 10 1 R2 100kΩ Generic thick film chip resistor 0603 11 3 R3, R7, R8 1kΩ Generic thick film chip resistor 0603 12 1 R4 10kΩ Generic thick film chip resistor 0603 13 1 R5 750Ω Generic thick film chip resistor 0603 14 1 R6 10Ω Generic thick film chip resistor 0603 15 1 D1 Liteon: LTST-C170CKT 0603 16 4 P1, P2, P3, P6 Test Points 17 4 P4, P5, P7, P8 Binding Posts Intersil ISL8013 FOOTPRINT VOLTAGE HTSSOP14 SOT-23 Pulse: P1166.162 SPDT Switch: GT11MSCKE Eval Board Layout FIGURE 2. EVAL BOARD TOP LAYER ROUTING (ETCH) FIGURE 3. EVAL BOARD BOTTOM LAYER ROUTING (ETCH) All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 4 AN1241.1 June 1, 2006