EL6201 ® Data Sheet August 2, 2007 Low Power 430MHz HFM Oscillator with Disable The EL6201 is a solid state high performance laser modulation oscillator with external resistor adjustable frequency and amplitude. The EL6201 is available in both the 8 Ld MSOP and the 5 Ld SOT-23, to enable device placement close to the laser for reduced EMI. The oscillator frequency is set by connecting a single external resistor from the RFREQ pin to ground. The oscillator current output amplitude is set by connecting a single external resistor from the RAMP pin to ground. The oscillator in the MSOP package also contains a high speed output disable function using the OE pin. The OE pin can be driven by a high speed timing signal to control precise laser modulation during read/write operations. The output current is disabled when a logical zero ‘L’ is driven to the CE pin. Supply current is reduced to microamps when CE = LOW. The EL6201 has internal supply bypass capacitors to reduce oscillation noise spread through supply connections. FN7216.3 Features • Small SOT-23 and MSOP8 packages • Frequency to 430MHz min • Amplitude to 25mAP-P min • Output tristate function (MSOP8) • Power-down function (MSOP8) • Single +3.5V to +5.0V supply • Simple to use - only two external resistors required • Independent resistor setting for frequency and amplitude • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • DVD players • DVD-ROM drives • DVD-RAM drives • CD-RW drives • MO drives Ordering Information PART NUMBER PART MARKING PACKAGE PKG. DWG. # • Optical pickup head assembly • Laser diode modulation EL6201CY G 8 Ld MSOP MDP0043 • Local oscillator EL6201CY-T7* G 8 Ld MSOP MDP0043 • Communications lasers EL6201CY-T13* G 8 Ld MSOP MDP0043 EL6201CYZ (Note) b 8 Ld MSOP (Pb-free) MDP0043 EL6201CYZ-T7* (Note) b 8 Ld MSOP (Pb-free) MDP0043 EL6201CYZ-T13* (Note) b 8 Ld MSOP (Pb-free) MDP0043 EL6201CW-T7* L 5 Ld SOT-23 MDP0038 EL6201CW-T7A* L 5 Ld SOT-23 MDP0038 EL6201CWZ-T7* (Note) BLAA 5 Ld SOT-23 (Pb-free) MDP0038 EL6201CWZ-T7A* BLAA (Note) 5 Ld SOT-23 (Pb-free) MDP0038 Pinouts EL6201 (5 LD SOT-23) TOP VIEW 1 VS RFREQ 5 2 GND 3 IOUT RAMP 4 EL6201 (8 LD MSOP) TOP VIEW *Please refer to TB347 for details on reel specifications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 1 CE VS 8 2 GND IOUT 7 3 RFRE GND 6 4 RAMP OE 5 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2003, 2004, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. EL6201 Absolute Maximum Ratings (TA = +25°C) Thermal Information Voltages applied to: VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.0V RFREQ, RAMP . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +6.0V CE, OE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 to VCC Power Dissipation (maximum) . . . . . . . . . . . . . . . . . . . . See Curves Operating Ambient Temperature Range . . . . . . . . . . . 0°C to +75°C Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35mA Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA DC Electrical Specifications VS = +5V, TA = +25°C, CE = HI, unless otherwise specified. RAMP = 6.67kΩ (IOUT = ±8.5mA), RFREQ = 833Ω (FO = 330MHz) PARAMETER DESCRIPTION CONDITIONS MIN (Note 1) TYP MAX (Note 1) UNIT 20 27 mA 30 µA 10.5 mA 3.5 V IS Supply Current (Enabled) CE = HIGH, OE = LOW ISD Supply Current (Disabled) CE = LOW ISTRI Supply Current (Tristated) OE = HIGH 6.5 VLOAD Output Voltage Range Maximum IOUTP-P 1.5 IOUTP-P Output Current Accuracy RAMP = 6.67k, IOUT = 2.5V to 3.0V 11 15 19 mA IOS Output Current DC offset -2.5 0 +2.5 mA VINL Logic Input Low 0.8 V VINH Logic Input High IINL Logic Low Input Current CE or OE at 0V 100 µA IINH Logic High Input Current CE or OE at +5V 100 µA MAX (Note 1) UNIT AC Electrical Specifications PARAMETER 8.5 2.4 V VS = +5V, TA = +25°C, RAMP = 6.67kΩ, RFREQ = 833Ω DESCRIPTION CONDITIONS MIN (Note 1) TYP TCOSC Oscillator Temperature Coefficient FOSC Initial Oscillator Frequency Accuracy FRANGE Oscillator Frequency Range 500Ω ≤ RFREQ ≤ 7kΩ ARANGE Oscillator Amplitude Range 30kΩ ≤ RAMP ≤ 3kΩ TON, CE EN Delay Time to 50% IOUT CE = Low to High 300 ns TOFF, CE EN Delay Time to 50% IOUT CE = High to Low 10 ns TON, OE OE Delay Time to 50% IOUT OE = Low to High 10 ns TOFF,OE OE Delay Time to 50% IOUT OE = High to Low 10 ns Duty Cycle Measured from +25°C to +125°C die temperature 600 270 400 MHz 80 430 MHz 7.5 25 mAP-P 40 330 ppm/°C 52 60 % 1. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested. 2 FN7216.3 August 2, 2007 EL6201 Typical Performance Curves 600 600 IOUTp-p = 15mA TA = 25°C IOUTp-p = 15mA TA = 25°C 500 FREQUENCY (MHz) FREQUENCY (MHz) 500 400 300 200 100 400 300 200 100 0 0 0 1 2 3 4 0 5 1 RFREQ (kΩ) FIGURE 1. FREQUENCY vs RFREQ 3 FIGURE 2. FREQUENCY vs 1000Ω/RFREQ 40 35 35 30 IDEAL FO = 330MHz TA = 25°C 30 ACTUAL 25 25 IOUTp-p (mA) IOUTp-p (mA) 2 1000Ω/RFREQ 20 15 20 15 FO = 330MHz TA = 25°C 10 10 5 5 0 0 0 4 8 12 16 20 0 50 75 RAMP (kΩ) 100 125 150 175 200 427/RAMP (kΩ) FIGURE 3. IOUTp-p vs RAMP FIGURE 4. IOUTp-p vs 427/RAMP 180 35 160 30 140 120 PDISS (mW) ISUPPLY (mA) 25 20 15 FO = 330MHz IOUTp-p = 15mA TA = 25°C 10 80 FO = 330MHz IOUTp-p = 15mA TA = 25°C 60 40 5 0 3.0 100 20 3.5 4.0 4.5 5.0 VSUPPLY (V) FIGURE 5. ISUPPLY vs VSUPPLY 3 5.5 0 3.0 3.5 4.0 4.5 5.0 5.5 VSUPPLY (V) FIGURE 6. DISSIPATION vs SUPPLY VOLTAGE FN7216.3 August 2, 2007 EL6201 Typical Performance Curves (Continued) 18 320 17 310 16 FREQUENCY (MHz) IOUTp-p (mA) 15 FO = 330MHz RAMP = 6.5kΩ TA = 25°C 14 13 12 11 300 290 280 RFREQ = 833Ω IOUTp-p = 15mA TA = 25°C 270 10 260 9 8 3.0 3.5 4.0 4.5 5.0 250 3.0 5.5 3.5 4.0 VSUPPLY (V) FIGURE 7. IOUTP-P vs VSUPPLY 5.5 35 48.6 30 IOUTp-p = 15mA TA = 25°C 48.4 ISUPPLY (mA) DUTY CYCLE (%) 5.0 FIGURE 8. FREQUENCY vs VSUPPLY 48.8 48.2 RFREQ = 833Ω RAMP = 6.5kΩ TA = 25°C 48.0 25 20 15 47.8 47.6 3.0 10 3.5 4.0 4.5 5.0 5.5 100 0 200 VSUPPLY (V) 300 400 500 FREQUENCY (MHz) FIGURE 9. DUTY CYCLE (%) vs VSUPPLY FIGURE 10. ISUPPLY vs FREQUENCY 180 36 34 160 RFREQ = 833Ω TA = 25°C 32 IOUTp-p = 15mA VS = 5V TA = 25°C 140 ISUPPLY (mA) DISSIPATION (mW) 4.5 VSUPPLY (V) 120 100 30 28 26 24 80 22 60 20 0 100 200 300 400 FREQUENCY (MHz) FIGURE 11. DISSIPATION vs FREQUENCY 4 500 0 5 10 15 20 25 30 35 40 IOUTp-p (mA) FIGURE 12. ISUPPLY vs IOUTp-p FN7216.3 August 2, 2007 EL6201 Typical Performance Curves 58 0 56 -10 RELATIVE AMPLITUDE (dB) IOUTp-p = 15mA VS = 5V TA = 25°C 54 DUTY CYCLE (%) (Continued) 52 50 48 46 44 42 RFREQ = 833Ω RAMP = 6.5k TA = 25°C -20 -30 -40 -50 -60 -70 -80 -90 40 0 100 300 200 400 -100 340 500 345 FREQUENCY (MHz) 350 355 FIGURE 13. DUTY CYCLE vs FREQUENCY 365 FIGURE 14. OUTPUT SPECTRUM - WIDEBAND 28.0 20.5 27.5 RFREQ = 833Ω RAMP = 6.5kΩ 20.0 FO = 330MHz IOUTp-p = 15mA 27.0 26.5 IOUTp-p (mA) ISUPPLY (mA) 360 FREQUENCY (MHz) 26.0 25.5 25.0 19.5 19.0 18.5 24.5 24.0 18.0 0 25 50 75 100 125 0 25 DIE TEMPERATURE (°C) FIGURE 15. ISUPPLY vs DIE TEMPERATURE 75 100 125 FIGURE 16. IOUTp-p vs DIE TEMPERATURE 48.5 380 RFREQ = 833Ω RAMP = 6.5kΩ 375 RFREQ = 833Ω RAMP = 6.5kΩ 370 FREQUENCY (MHz) 48.0 DUTY CYCLE (%) 50 DIE TEMPERATURE (°C) 47.5 47.0 46.5 365 360 355 350 345 46.0 340 45.5 335 0 25 50 75 100 125 DIE TEMPERATURE (°C) FIGURE 17. DUTY CYCLE vs DIE TEMPERATURE 5 0 25 50 75 100 125 DIE TEMPERATURE (°C) FIGURE 18. FREQUENCY vs DIE TEMPERATURE FN7216.3 August 2, 2007 EL6201 Typical Performance Curves (Continued) SEMI G42-88 SINGLE LAYER TEST BOARD SEMI G42-88 SINGLE LAYER TEST BOARD 0.50 0.60 391mW 0.30 0.20 486 mW 0.50 θJA = 256°C/W POWER DISSIPAION (W) POWER DISSIPAION (W) 0.40 195mW 0.10 θJA = 206°C/W 0.40 0.30 243mW 0.20 0.10 0.00 0.00 0 25 50 75 100 125 0 25 AMBIENT TEMPERATURE (°C) 50 75 100 125 AMBIENT TEMPERATURE (°C) FIGURE 19. SOT23-5 POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 20. MSOP8 POWER DISSIPATION vs AMBIENT TEMPERATURE Typical Application Circuit +5V +5V 1 5 RFREQ IDC 2 3 4 RAMP C* *Optional AC coupling Applications Information The EL6201 is designed to interface easily to laser diodes to break up optical feedback resonant modes and thereby reduce laser noise, but it is also generally useful as a 70MHz to 430MHz oscillator. The first applications section will focus on laser systems, and subsequent sections are of general topics. Laser Diode Applications The output of the EL6201 is composed of a sourcing and a sinking current source, switched alternately at the oscillator frequency. The output voltage compliance is VS to ground, with about 40Ω of series resistance. There is no severe squarewave distortion when the output voltage approaches the supply extremes, although the corners will be rounded. Being a current-source output, the output bias voltage is set by direct connection to the laser diode, which will appear as a low AC impedance with a DC voltage from 1.6V to 2.5V. Thus AC coupling from the EL6201 to the diode is unnecessary. The duty cycle of the output is between 40% 6 and 60%, so the DC contribution from the EL6201 is only ±5% of the peak-to-peak output. This will cause little perturbation of the diode’s DC bias current. Although not necessary, capacitance coupling can be employed. A series capacitive reactance of less than 30Ω is recommended. A 20pF capacitor is thus appropriate at 330MHz. Benefits include no DC error current into the laser diode, and an attenuation of low-frequency noise from the EL6201. Disadvantages include perhaps 20% output AC current loss. While the diode AC impedance is generally in the low ohm range, any interconnect will create around 8nH per cm. of series inductance. Because the EL6201’s output is an AC current source, higher load reactance due to series inductance will cause the EL6201’s output voltage to swing more than what a direct connection to the diode would cause. At 400MHz and 15mAP-P output, just one cm. will generate 0.3VP-P of extra driver signal at the fundamental, and more at harmonic frequencies. The output current FN7216.3 August 2, 2007 EL6201 waveform is a squarewave, and inductive loads can cause as much as 1V of overshoot. This does not mean that the current delivered to the diode has overshoot - just the voltage seen at the EL6201 output. Measurements show that the EL6201 output edge rate is about 300psec - a speed nearly impossible to deliver over practical interconnects to the diode. The L Series of Figure 22 must be carefully chosen. The goal is to get a series reactance of around 70Ω at 300MHz, so 40nH would suffice. The inductor should be shielded to reduce EMI and have no saturation effects at the supply currents drawn by the EL6201. Finally, there should be no self-resonance at the operating frequency or its harmonics. Also important is circuit-board layout. At the EL6201’s operating frequencies, even the ground plane is not lowimpedance, and ground loops should be avoided. Figure 23 shows the output current loops: RFREQ RAMP GND (8 Ld PACKAGE) FIGURE 21. OUTPUT CURRENT WAVEFORM - 1GHz BANDWIDTH General Considerations EMI and Grounding From an EMI point of view, the edge rate of the output current is much more important than that of the output voltage. The components are generally small and will be placed over a ground plane, so antenna effects that launch voltage-mode EMI are small. Measurement shows that a practical current edge rate is about 1ns, so interconnect should be over a ground plane and short to minimize inductively launched EMI. Most EMI seems to come from the supply wires connected to the diode/EL6201 board. The internal resistance and inductance of capacitors prevents perfect bypass action, and 150mVP-P noise on the lines is common. There needs to be a lossy series inductance and secondary bypass on the supply side to control signals from propagating down the wires. Alternatively, a series supply resistor can be used, which will also be useful in reducing EL6201 power dissipation. Figure 22 shows the typical connection. L Series: 70Ω reactance at 300MHz (see text) VS EL6201 +5V 0.1µF Chip SUPPLY BYPASS SOURCING CURRENT LOOP SINKING CURRENT LOOP LOAD FIGURE 23. OUTPUT CURRENT LOOPS For the sourcing current loop, the current flows through the supply bypass capacitor. The ground end of the bypass thus should be connected directly to the EL6201 ground pin (output ground pin of the 8 Ld package). A long ground return path will cause the bypass capacitor currents to generate voltage drops in the ground plane of the circuit board, and other components (such as RAMP and RFREQ) will pick this up as an interfering signal. Similarly, the ground return of the load should be considered as noisy and other grounded components should not connect to this path. Slotting the ground plane around the load’s return will eliminate adjacent grounded components from seeing the noise. RFREQ and RAMP Interfaces RAMP and RFREQ should be connected to the non-load side of the power ground to avoid noise pick-up. Figure 24 shows an equivalent circuit of these pins. VREF is roughly 0.35V for RFREQ and more accurately 1.17V for RAMP. The RAMP and RFREQ resistor should return to the EL6201’s ground very directly lest they pick up highfrequency noise interference. They also should have minimal capacitance to ground. Trimmer resistors can be 0.1µF Chip GND FIGURE 22. RECOMMENDED SUPPLY BYPASSING 7 FN7216.3 August 2, 2007 EL6201 used to adjust initial operating points, but they should be replaced with fixed resistors for further testing. + VREF - PIN FIGURE 24. RFREQ AND RAMP PIN INTERFACE External voltage sources can be coupled to the RAMP and RFREQ pins to effect frequency or amplitude modulation or adjustment. It is recommended that a coupling resistor be installed in series with the control voltage and mounted directly next to the EL6201 pin. This will keep the inevitable high-frequency noise of the EL6201’s local environment from propagating to the modulation source, and it will keep parasitic capacitance at the EL6201 pin minimized. Both inputs have several megahertz of bandwidth for analog modulation. The output enable pin can be used to pass digital modulation up to about 20Mbit/sec rates. Power Dissipation Considerations The EL6201 can easily interface to reactive loads, and is adequate as a short-range modulated transmitter. Remembering that the output circuitry looks like current sources, impedance matching becomes a matter of transforming the load impedance to an appropriate load line for the EL6201. Also important is maintaining correct DC bias voltage on the output. Since the output will have a net DC current, capacitor coupling would allow the DC level to drift toward a supply rail and increase output harmonic products. In cases where such harmonics are important, Figure 25 shows coupling the EL6201 output to a 50Ω load: EL6201 L 0.001µF IOUT C1 50Ω LOAD C2 VS LCHOKE R2 R1 FIGURE 25. TUNED INTERFACE TO 50Ω LEAD Digital Clock Applications Supply current can be predicted by Equation1: 12mA + I OUTp-p I S = -------------------------------------------------------------------------------------------------12 4 + ( V S - 1.6V ) × FREQ × 8 × 10 RF Applications (EQ. 1) The 12mA quantity represents the operating DC current of the EL6201. This is also the current drawn from the supply during output disable. The IOUT quantity is based on a typical 50% duty cycle of output pull-up current, and the fact that the peak-to-peak output current is about twice the pullup or pull-down currents. The VS quantity is due to CV2F losses within the circuit, and the 8*10-12 quantity represents internal capacitances that must be slewed at the operating frequency. The 1.6V offset is a curve fit to measured data. The EL6201 can be used as a digital clock source. If unloaded, the output will simply traverse ground to VS. It is recommended that the VS supply be isolated from the main digital supply with an inductor or resistor, whose value is chosen to drop about 250mV. In this way logic noise can be isolated by the series component and the EL6201 local bypass. The rise- and fall-time of the output will be equal to VS/(CLOAD*IOUTP-P/2). The output current should be the smallest that can set an output rise-time, in the interest of lowest dissipation. The jitter is about 0.7% of period, RMS. The internal die temperature operating range is -40°C to +125°C. Internal temperature is equal to the ambient temperature plus power dissipated times the thermal resistance of the mounted package, θJA. For a mounted MSOP-8 package, θJA is 206°C/W. The SOT-23 package has a θJA of 256°C/W. Power-Down with the SOT-23 Package The supply current of the EL6201 is low enough so that a logic output can simply provide the supply current of the part and effect power-down. This is most useful using the EL6201 in the SOT-23 package, which has no enable pin. 8 FN7216.3 August 2, 2007 EL6201 SOT-23 Package Family MDP0038 e1 D SOT-23 PACKAGE FAMILY A MILLIMETERS 6 N SYMBOL 4 E1 2 E 3 0.15 C D 1 2X 2 3 0.20 C 5 2X e 0.20 M C A-B D B b NX 0.15 C A-B 1 3 SOT23-5 SOT23-6 A 1.45 1.45 MAX A1 0.10 0.10 ±0.05 A2 1.14 1.14 ±0.15 b 0.40 0.40 ±0.05 c 0.14 0.14 ±0.06 D 2.90 2.90 Basic E 2.80 2.80 Basic E1 1.60 1.60 Basic e 0.95 0.95 Basic e1 1.90 1.90 Basic L 0.45 0.45 ±0.10 L1 0.60 0.60 Reference N 5 6 Reference D 2X TOLERANCE Rev. F 2/07 NOTES: C A2 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. SEATING PLANE A1 0.10 C 1. Plastic or metal protrusions of 0.25mm maximum per side are not included. 3. This dimension is measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. NX 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only). (L1) 6. SOT23-5 version has no center lead (shown as a dashed line). H A GAUGE PLANE c L 9 0.25 0° +3° -0° FN7216.3 August 2, 2007 EL6201 Mini SO Package Family (MSOP) 0.25 M C A B D MINI SO PACKAGE FAMILY (N/2)+1 N E MDP0043 A E1 MILLIMETERS PIN #1 I.D. 1 B (N/2) e H C SEATING PLANE 0.10 C N LEADS SYMBOL MSOP8 MSOP10 TOLERANCE NOTES A 1.10 1.10 Max. - A1 0.10 0.10 ±0.05 - A2 0.86 0.86 ±0.09 - b 0.33 0.23 +0.07/-0.08 - c 0.18 0.18 ±0.05 - D 3.00 3.00 ±0.10 1, 3 E 4.90 4.90 ±0.15 - E1 3.00 3.00 ±0.10 2, 3 e 0.65 0.50 Basic - L 0.55 0.55 ±0.15 - L1 0.95 0.95 Basic - N 8 10 Reference - 0.08 M C A B b Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. L1 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. A 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. c SEE DETAIL "X" A2 GAUGE PLANE L A1 0.25 3° ±3° DETAIL X All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 FN7216.3 August 2, 2007