LT3062 45V VIN, Micropower, Low Noise, 200mA LDO Features n n n n n n n n n n n n Description Input Voltage Range: 1.6V to 45V Output Current: 200mA Quiescent Current: 45µA Dropout Voltage: 300mV Low Noise: 30µVRMS (10Hz to 100kHz) Adjustable Output (VREF = 600mV) Output Tolerance: ±2% Over Load, Line, and Temperature Single Capacitor Soft-Starts Reference and Lowers Output Noise Shutdown Current: < 1µA Reverse Battery Protection Current Limit Foldback and Thermal Limit Protection 8-Lead 2mm × 3mm DFN and MSOP Packages Applications n n n n n The LT®3062 is a micropower, low dropout (LDO) linear regulator that operates over a 1.6V to 45V supply range. The device supplies 200mA of output current with a typical dropout voltage of 300mV. A single external capacitor provides programmable low noise reference performance and output soft-start functionality. The LT3062’s quiescent current is merely 45μA and provides fast transient response with a minimum 3.3μF output capacitor. In shutdown, quiescent current is less than 1μA and the reference soft start capacitor is reset. The LT3062 optimizes stability and transient response with low ESR, ceramic output capacitors. The LT3062 does not require the addition of ESR as is common with other regulators. Internal protection circuitry includes reverse-battery protection, reverse-output protection, reverse-current protection, current limit with foldback and thermal shutdown. Battery Powered Systems Automotive Power Supplies Industrial Power Supplies Avionic Power Supplies Portable Instruments The LT3062 is available as an adjustable device with an output voltage range from the 600mV reference up to 40V. The LT3062 is offered in the thermally enhanced 8-lead 2mm × 3mm DFN and MSOP packages. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical Application Dropout Voltage 550 1.8V Low Noise Regulator VIN 2.3V 1µF OUT 118k 1% LT3062 SHDN GND 10µF ADJ 59k 1% BYP 450 DROPOUT VOLTAGE (mV) IN 500 VOUT 1.8V 200mA 400 350 300 250 TJ = 25°C 200 150 100 0.01µF 50 3062 TA01 0 0 25 50 75 100 125 150 175 200 OUTPUT CURRENT (mA) 3062 TA01a 3062f For more information www.linear.com/LT3062 1 LT3062 Absolute Maximum Ratings (Note 1) IN Pin Voltage..........................................................±50V OUT Pin Voltage............................................ +40V, –50V Input to Output Differential Voltage (Note 2)............±50V ADJ Pin Voltage.......................................................±50V SHDN Pin Voltage....................................................±50V REF/BYP Pin Voltage..................................... –0.3V to 1V Output Short-Circuit Duration........................... Indefinite Operating Junction Temperature (Notes 3, 5, 12) LT3062E, LT3062I.............................. –40°C to 125°C LT3062MP.......................................... –55°C to 150°C LT3062H............................................. –40°C to 150°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) MS8E Package Only........................................... 300°C Pin Configuration TOP VIEW ADJ 2 OUT 3 TOP VIEW 8 GND REF/BYP 1 9 GND REF/BYP ADJ OUT OUT 7 SHDN 6 IN 5 IN OUT 4 1 2 3 4 9 GND 8 7 6 5 GND SHDN IN IN MS8E PACKAGE 8-LEAD PLASTIC MSOP DCB PACKAGE 8-LEAD (2mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 38°C/W TO 45°C/W, θJC = 3.5°C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB TJMAX = 150°C, θJA = 29°C/W TO 45°C/W, θJC = 5°C/W TO 10°C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3062EDCB#PBF LT3062EDCB#TRPBF LGNC 8-Lead (2mm × 3mm) Plastic DFN –40°C to 125°C LT3062IDCB#PBF LT3062IDCB#TRPBF LGNC 8-Lead (2mm × 3mm) Plastic DFN –40°C to 125°C LT3062HDCB#PBF LT3062HDCB#TRPBF LGNC 8-Lead (2mm × 3mm) Plastic DFN –40°C to 150°C LT3062MPDCB#PBF LT3062MPDCB#TRPBF LGNC 8-Lead (2mm × 3mm) Plastic DFN –55°C to 150°C LT3062EMS8E#PBF LT3062EMS8E#TRPBF LTGND 8-Lead Plastic MSOP –40°C to 125°C LT3062IMS8E#PBF LT3062IMS8E#TRPBF LTGND 8-Lead Plastic MSOP –40°C to 125°C LT3062HMS8E#PBF LT3062HMS8E#TRPBF LTGND 8-Lead Plastic MSOP –40°C to 150°C LT3062MPMS8E#PBF LT3062MPMS8E#TRPBF LTGND 8-Lead Plastic MSOP –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 2 3062f For more information www.linear.com/LT3062 LT3062 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3) PARAMETER CONDITIONS MIN TYP Minimum Input Voltage (Note 4) ILOAD = 200mA ADJ Pin Voltage (Notes 4, 5) VIN = 2.1V, ILOAD = 1mA 2.1V < VIN < 45V, 1mA < ILOAD < 200mA (E-, I-Grades) 2.1V < VIN < 45V, 1mA < ILOAD < 200mA (MP-, H-Grades) 1.6 2.1 V 594 588 585 600 600 600 606 612 612 mV mV mV l l Line Regulation (Note 4) ΔVIN = 2.1V to 45V, ILOAD = 1mA (E-, I-Grades) ΔVIN = 2.1V to 45V, ILOAD = 1mA (MP-, H-Grades) l l 0.5 4 6 mV mV Load Regulation (Note 4) VIN = 2.1V, ∆ILOAD = 1mA to 200mA (E-, I-Grades) VIN = 2.1V, ∆ILOAD = 1mA to 200mA (MP-, H-Grades) l l 0.3 4 9 mV mV Dropout Voltage VIN = VOUT(NOMINAL) (Notes 6, 7) ILOAD = 1mA ILOAD = 1mA 65 l 110 180 mV mV ILOAD = 10mA ILOAD = 10mA 130 l 180 270 mV mV ILOAD = 100mA ILOAD = 100mA 250 l 290 430 mV mV ILOAD = 200mA ILOAD = 200mA 300 l 360 530 mV mV GND Pin Current VIN = VOUT(NOMINAL) + 0.6V (Notes 6, 8) ILOAD = 0 ILOAD = 1mA ILOAD = 10mA ILOAD = 100mA ILOAD = 200mA l l l l l 45 70 225 2 5 90 120 500 4 10 µA µA µA mA mA Output Voltage Noise COUT = 10µF, ILOAD = 200mA, CREF/BYP = 0.01µF VOUT = 600mV, BW = 10Hz to 100kHz ADJ Pin Bias Current (Notes 4, 9) l MAX 30 l Shutdown Threshold VOUT = Off to On VOUT = On to Off l l SHDN Pin Current (Note 10) VSHDN = 0V VSHDN = 45V l l Quiescent Current in Shutdown VIN = 45V, VSHDN = 0V Ripple Rejection (Note 4) VIN – VOUT = 1.5V (AVG), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 200mA Current Limit VIN = 7V, VOUT = 0 VIN = VOUT(NOMINAL) + 1V (Note 11), ΔVOUT = –5% l Input Reverse Leakage Current VIN = -45V, VOUT = 0 l Reverse Output Current (Note 13) VIN = 0, VOUT = 1.2V 0.3 70 220 UNITS µVRMS 15 60 nA 0.8 0.7 1.5 V V 1.2 <1 3 µA µA 0.3 1 µA 85 dB 320 mA mA 0.2 1 mA 10 µA 3062f For more information www.linear.com/LT3062 3 LT3062 Electrical Characteristics Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Absolute maximum input to output differential voltage is not achievable with all combinations of rated IN pin and OUT pin voltages. With the IN pin at 50V, the OUT pin may not be pulled below 0V. The total measured voltage from IN to OUT must not exceed ±50V. If OUT is above ground, do not pull IN more than 40V below OUT. Note 3: The LT3062 is tested and specified under pulse load conditions such that TJ ≅ TA. The LT3062E regulators are 100% tested at TA = 25°C and performance is guaranteed from 0°C to 125°C. Performance at –40°C to 125°C is assured by design, characterization and correlation with statistical process controls. The LT3062I regulators are guaranteed over the full –40°C to 125°C operating junction temperature range. The LT3062MP regulators are 100% tested over the –55°C to 150°C operating junction temperature. The LT3062H regulators are 100% tested at the 150°C operating junction temperature. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperature greater than 125°C. Note 4: The LT3062 is tested and specified for these conditions with the ADJ connected to the OUT pin. Note 5: Maximum junction temperature limits operating conditions. The regulated output voltage specification does not apply for all possible combinations of input voltage and output current. Limit the output current range if operating at the maximum input voltage. Limit the input-to-output voltage differential if operating at maximum output current. Current limit foldback limits the maximum output current as a function of input-tooutput voltage. See Current Limit vs VIN – VOUT in the Typical Performance 4 Characteristics section. Note 6: To satisfy minimum input voltage requirements, the LT3062 is tested and specified for these conditions with an external resistor divider (bottom 60k, top 230k) for an output voltage of 2.9V. The external resistor divider adds 10µA of DC load on the output. The external current is not factored into GND pin current. Note 7: Dropout voltage is the minimum input-to-output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage equals: (VIN – VDROPOUT). Note 8: GND pin current is tested with VIN = VOUT(NOMINAL) + 0.6V and a current source load. GND pin current will increase in dropout. See GND pin current curves in the Typical Performance Characteristics section. Note 9: ADJ pin bias current flows out of the ADJ pin. Note 10: SHDN pin current flows into the SHDN pin. Note 11: To satisfy requirements for minimum input voltage, current limit is tested at VIN = VOUT(NOMINAL) + 1V or VIN = 2.1V, whichever is greater. Note 12: This IC includes thermal limit which protects the device during momentary overload conditions. Junction temperature exceeds 125°C (LT3062E, LT3062I) or 150°C (LT3062MP, LT3062H) when thermal limit is active. Continuous operation above the specified maximum junction temperature may impair device reliability. Note 13: Reverse output current is tested with the IN pin grounded and the OUT pin forced to the specified voltage. This current flows into the OUT pin and out of the GND pin. 3062f For more information www.linear.com/LT3062 LT3062 Typical Performance Characteristics 550 500 500 TJ = 150°C 400 350 TJ = 125°C 300 250 TJ = 25°C 200 150 400 350 TJ = 25°C 300 250 200 150 400 300 250 150 50 50 50 0 0 50 75 100 125 150 175 200 OUTPUT CURRENT (mA) 0 25 3062 G03 Quiescent Current 120 IL = 1mA 610 70 TJ = 25°C 110 V OUT = 5V 100 IL = 10µA ADJ PIN VOLTAGE (mV) 40 30 20 10 VIN = 6V ALL OTHER PINS = 0V QUIESCENT CURRENT (µA) 608 50 606 604 602 600 598 596 594 RL = 3Ω, IL = 200mA RL = 12Ω, IL = 50mA 1.0 0.5 0 1 2 3 4 5 6 VIN (V) 7 8 9 8 7 6 5 4 3 2 1 RL = 600Ω, IL = 1mA 10 3063 G07 VSHDN = 0V, RL = 0 0 5 10 15 20 25 VIN (V) 0 0 25 50 30 35 40 45 SHDN Pin Threshold SHDN PIN THRESHOLD (V) GND PIN CURRENT (mA) 1.5 30 3062 G06 VIN = VOUT(NOMINAL) +1V 9 RL = 6Ω, IL = 100mA 2.0 40 0 GND Pin Current vs ILOAD 2.5 50 10 10 3.0 60 20 GND Pin Current, VOUT = 0.6V 3.5 70 3062 G05 5.0 4.0 80 590 3062 G04 4.5 90 592 588 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 0 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 50 75 100 125 150 175 200 OUTPUT CURRENT (mA) ADJ Pin Voltage 612 VIN = VSHDN = 6V VOUT = 5V IL = 10µA IL = 10mA 3062 G02 Quiescent Current 60 IL = 50mA 200 100 25 IL = 100mA 350 100 0 IL = 200mA 450 100 80 QUIESCENT CURRENT (µA) 500 TJ = 150°C 3062 G01 GND PIN CURRENT (mA) Dropout Voltage 550 = TEST POINTS 450 DROPOUT VOLTAGE (mV) 450 DROPOUT VOLTAGE (mV) Guaranteed Dropout Voltage 550 DROPOUT VOLTAGE (mV) Typical Dropout Voltage TA = 25°C, unless otherwise noted. 75 100 125 150 175 200 ILOAD (mA) 3062 G08 1.5 1.4 1.3 1.2 1.1 1.0 0.9 OFF TO ON 0.8 0.7 0.6 ON TO OFF 0.5 0.4 0.3 0.2 0.1 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3062 G09 3062f For more information www.linear.com/LT3062 5 LT3062 Typical Performance Characteristics SHDN Pin Input Current 2.0 2.0 1.8 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 ADJ Pin Bias Current 50 VSHDN = 45V 40 1.6 ADJ PIN BIAS CURRENT (nA) SHDN PIN INPUT CURRENT (µA) SHDN PIN INPUT CURRENT (µA) SHDN Pin Input Current TA = 25°C, unless otherwise noted. 1.4 1.2 1.0 0.8 0.6 0.4 5 10 15 20 25 30 35 SHDN PIN VOLTAGE (V) 40 45 10 0 –10 –20 –30 –50 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3062 G11 3062 G10 20 –40 0.2 0 30 3062 G12 Internal Current Limit Internal Current Limit 400 REVERSE OUTPUT CURRENT (mA) 400 300 CURRENT LIMIT (mA) 250 200 150 TJ = 150°C TJ = 125°C TJ = 25°C TJ = –40°C TJ = –55°C 100 50 0 350 300 250 200 150 100 50 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 5 10 15 20 25 30 35 40 45 INPUT/OUTPUT VOLTAGE DIFFERENTIAL (V) Reverse Output Current 80 RIPPLE REJECTION (dB) OUTPUT CURRENT (µA) 40 35 30 ADJ 15 10 OUT 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3062 G16 6 ADJ 1.2 1.0 0.8 0.6 0.4 0.2 Input Ripple Rejection VIN = 0V 45 VADJ = VOUT = 1.2V 5 1.4 OUT 0 5 10 15 20 25 30 35 OUTPUT VOLTAGE (V) 40 Input Ripple Rejection 100 VIN = 6.5V +50mVRMS RIPPLE ILOAD = 200mA COUT = 10µF VOUT = 5V 90 VOUT = 0.6V 80 70 V OUT = 5V 60 45 3062 G15 90 50 20 1.6 3063 G14 3062 G13 25 VIN = 0V 1.8 VADJ = VOUT 0 RIPPLE REJECTION (dB) CURRENT LIMIT (mA) 2.0 VIN = 7V 450 VOUT = 0V 350 0 Reverse Output Current 500 COUT = 10µF 50 40 30 20 ILOAD = 200mA 10 CREF/BYP = CFF = 0 VIN = VOUT +1.5V +50mVRMS C OUT = 3.3µF 0 10 1k 100 10k 100k 1M 10M FREQUENCY (Hz) 3062 G17 70 60 50 40 30 20 CREF/BYP = 10nF, CFF = 10nF CREF/BYP = 10nF, CFF = 0 CREF/BYP = CFF = 0 10 0 10 100 10k 100k 1k FREQUENCY (Hz) 1M 10M 3062 G18 3062f For more information www.linear.com/LT3062 LT3062 Typical Performance Characteristics Input Ripple Rejection 80 CREF/BYP = 0 70 60 50 40 30 20 I LOAD = 200mA 10 VOUT = 0.6V VIN = 2.6V +0.5VP-P RIPPLE, f = 120Hz 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) MINIMUM INPUT VOLTAGE (V) CREF/BYP = 10nF 90 RIPPLE REJECTION (dB) Minimum Input Voltage Load Regulation 2.2 1 2.0 0 1.8 –1 ILOAD = 200mA 1.6 LOAD REGULATION (mV) 100 TA = 25°C, unless otherwise noted. 1.4 1.2 ILOAD = 100mA 1.0 0.8 0.6 0.4 –3 –4 –5 –6 –7 –8 ∆I = 1mA TO 200mA L –9 VOUT = 0.6V VIN = 2.1V –10 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 0.2 0.0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3062 G19 –2 3062 G21 3062 G20 5V Transient Response CFF = 10nF, IOUT = 20mA to 200mA 5V Transient Response CFF = 0, IOUT = 20mA to 200mA VOUT 100mV/DIV 5V Transient Response, VOUT = 5V Load Dump, VIN = 12V to 45V VOUT 5mV/DIV VOUT 50mV/DIV 45V IOUT 100mA/DIV IOUT 100mA/DIV 3062 G22 100µs/DIV 12V 3062 G23 20µs/DIV 1ms/DIV 3062 G24 VIN = 6V COUT = 10µF IFB-DIVIDER = 10µA COUT = 10µF CREF/BYP = CFF = 10nF IFB-DIVIDER = 10µA Output Noise Spectral Density CREF/BYP = 0, CFF = 0 Output Noise Spectral Density vs CREF/BYP, CFF = 0 Output Noise Spectral Density vs CFF, CREF/BYP = 10nF 10 1.0 0.1 0.01 10 5V 3.3V 2.5V 1.2V 0.6V 100 COUT =10µF IL = 200mA 1k 10k FREQUENCY (Hz) 100k 3062 G25 10 CREF/BYP = 100pF VOUT = 5V 1 VOUT = 0.6V 0.1 CREF/BYP = 10nF COUT = 10µF IL = 200mA 0.01 10 100 CREF/BYP = 1nF 1k 10k FREQUENCY (Hz) 100k 3062 G26 OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz) VIN = 6V COUT = 10µF IFB-DIVIDER = 10µA OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz) OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz) VIN 10V/DIV 10 CFF = 100pF CFF = 0 1.0 CFF = 10nF 0.1 VOUT = 5V COUT = 10µF IL = 200mA 0.01 10 100 CFF = 1nF 1k 10k FREQUENCY (Hz) 100k 3062 G27 3062f For more information www.linear.com/LT3062 7 LT3062 Typical Performance Characteristics f = 10Hz TO 100kHz 100 COUT = 10µF 90 CREF/BYP = 0 CREF/BYP = 10pF 80 70 60 CREF/BYP = 100pF 50 40 30 CREF/BYP = 1nF 20 10 0 0.01 CREF/BYP = 10nF 0.1 1 10 LOAD CURRENT (mA) 100 OUTPUT NOISE VOLTAGE (µVRMS) OUTPUT NOISE VOLTAGE (µVRMS) 110 RMS Output Noise vs Load Current CREF/BYP = 10nF, CFF = 0 160 VOUT = 5V 150 VOUT = 3.3V 140 VOUT = 2.5V 130 VOUT = 1.2V 120 VOUT = 0.6V 110 f = 10Hz TO 100kHz 90 C OUT = 10µF 80 70 60 50 40 30 20 10 0 0.1 0.01 1 10 LOAD CURRENT (mA) 3062 G28 RMS Output Noise vs Feedforward Capacitor (CFF) OUTPUT NOISE VOLTAGE (µVRMS) RMS Output Noise vs CREF/BYP VOUT = 0.6V TA = 25°C, unless otherwise noted. 100 130 f = 10Hz TO 100kHz 120 CREF/BYP = 10nF VOUT = 5V 110 COUT = 10µF VOUT = 3.3V IFB-DIVIDER = 10mA 100 ILOAD = 200mA 90 80 70 60 50 40 30 20 VOUT = 1.2V VOUT = 2.5V VOUT = 0.6V 10 0 0.01 0.1 1 10 FEEDFORWARD CAPACITOR, CFF (nF) 3062 G30 3062 G29 5V 10Hz to 100kHz Output Noise CREF/BYP = 10nF, CFF = 0 5V 10Hz to 100kHz Output Noise CREF/BYP = 10nF, CFF = 10nF Start-Up Time vs REF/BYP Capacitor VOUT 100µV/DIV START-UP TIME (ms) 100 VOUT 100µV/DIV 1ms/DIV 3062 G31 10 1 0.1 3062 G32 1ms/DIV COUT = 10µF ILOAD = 200mA CFF = 0 COUT = 10µF ILOAD = 200mA 0.01 0.01 1 0.1 10 REF/BYP CAPACITOR (nF) 100 3062 G33 SHDN Transient Response CREF/BYP = 0 SHDN Transient Response CREF/BYP = 10nF VOUT 2V/DIV RL = 50Ω VOUT 2V/DIV RL = 50Ω REF/BYP 500mV/DIV REF/BYP 500mV/DIV SHDN 1V/DIV SHDN 1V/DIV 2ms/DIV COUT = 10µF CFF = 0 8 3062 G34 2ms/DIV 3062 G35 COUT = 10µF CFF = 0 3062f For more information www.linear.com/LT3062 LT3062 Pin Functions REF/BYP (Pin 1): Reference/ Bypass. Connecting a single capacitor from this pin to GND bypasses the LT3062’s reference noise and soft-starts the reference. A 10nF bypass capacitor typically reduces output voltage noise to 30μVRMS in a 10Hz to 100kHz bandwidth. Soft-start time is directly proportional to the REF/BYP capacitor value. If the LT3062 is placed in shutdown, REF/BYP is actively pulled low by an internal device to reset soft-start. If low noise or soft-start performance is not required, this pin must be left floating (unconnected). Do not drive this pin with any active circuitry. ADJ (Pin 2): Adjust. This pin is the error amplifier’s inverting terminal. Its typical bias current of 15nA flows out of the pin (see curve of ADJ Pin Bias Current vs Temperature in the Typical performance Characteristics section). The ADJ pin voltage is 600mV referenced to GND. OUT (Pins 3, 4): Output. These pins supply power to the load. A minimum output capacitor of 3.3µF is required to prevent oscillations. Large load transient applications require larger output capacitors to limit peak voltage transients. See the Applications Information section for more information on transient response and reverse output characteristics. The output voltage range is 600mV to 40V. IN (Pins 5, 6): Input. These pins supply power to the device. The LT3062 requires a bypass capacitor at IN if the device is located more than six inches from the main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. A bypass capacitor in the range of 1µF to 10µF suffices. See Input Capacitance and Stability in the Application Information section for more information. The LT3062 withstands reverse voltages on the IN pin with respect to the GND and OUT pins. In a reversed input situation, such as the battery plugged in backwards, the LT3062 behaves as if a large value resistor is in series with its input. Limited reverse current flows into the LT3062 and no reverse voltage appears at the load. The device protects itself and the load. SHDN (Pin 7): Shutdown. Pulling the SHDN pin low puts the LT3062 into a low power state and turns the output off. Drive the SHDN pin with either logic or an open collector/drain with a pull-up resistor. The resistor supplies the pull-up current to the open collector/drain logic, normally several microamperes, and the SHDN pin current, typically less than 3µA. If unused, connect the SHDN pin to VIN. The LT3062 does not function if the SHDN pin is not connected. The SHDN pin cannot be driven below GND unless tied to the IN pin. If the SHDN pin is driven below GND while IN is powered, the output will turn on. SHDN pin logic cannot be referenced to a negative rail. GND (Pin 8, Exposed Pad Pin 9): Ground. Connect the bottom of the external resistor divider that sets the output voltage directly to GND for optimum regulation. Tie the exposed pad Pin 9 directly to Pin 8 and the PCB ground. This exposed pad provides enhanced thermal performance with its connection to the PCB ground. See the Applications Information section for thermal considerations and calculating junction temperature. 3062f For more information www.linear.com/LT3062 9 LT3062 Applications Information The LT3062 is a 200mA low dropout regulator with shutdown. The device is capable of supplying 200mA at a typical dropout voltage of 300mV and operates over a 1.6V to 45V input range. and ADJ Pin Bias Current vs Temperature appear in the Typical Performance Characteristics. IN A single external capacitor provides programmable low noise reference performance and output soft-start functionality. For example, connecting a 10nF capacitor from the REF/BYP pin to GND lowers output noise to 30µVRMS over a 10Hz to 100kHz bandwidth. This capacitor also soft-starts the reference and prevents output voltage overshoot at turn-on. The LT3062’s quiescent current is merely 45μA, while providing fast transient response with a 3.3μF minimum low ESR ceramic output capacitor. In shutdown, quiescent current is less than 1μA and the reference soft-start capacitor and output are reset. The LT3062 optimizes stability and transient response with low ESR, ceramic output capacitors. The LT3062 does not require the addition of ESR as is common with other regulators. The LT3062 has an adjustable output and typically provides 0.1% line regulation and 0.1% load regulation. A curve of load regulation appears in the Typical Performance Characteristics section. Internal protection circuitry includes reverse-battery protection, reverse-current protection, current limit with foldback and thermal shutdown. Adjustable Operation The LT3062 has an output voltage range of 0.6V to 40V. The output voltage is set by the ratio of two external resistors as shown in Figure 1. The device servos the output to maintain the ADJ pin voltage at 0.6V referenced to ground. The current in R1 is then equal to 0.6V/R1 and the current in R2 is the current in R1 plus the ADJ pin bias current. The ADJ pin bias current, 15nA at 25ºC, flows through R2 into the ADJ pin. Calculate the output voltage using the formula in Figure 1. The value of R1 should be no greater than 61.9k to provide a minimum 10µA load current for stability. The divider does not add to quiescent current in shutdown because the output is turned off and the divider current is zero. Curves of ADJ Pin Voltage vs Temperature 10 VIN OUT LT3062 SHDN VOUT R2 VOUT = 0.6V 1+ ADJ GND REF/BYP R2 – (IADJ •R2) R1 VADJ = 0.6V R1 IADJ = 15nA at 25°C OUTPUT RANGE = 0.6V to 40V 3062 F01 Figure 1. Adjustable Operation The LT3062 is tested and specified with the ADJ pin tied to the OUT pin for an output voltage of 0.6V. Specifications for output voltages greater than 0.6V are proportional to the ratio of the desired output voltage to 0.6V: VOUT/0.6V. For example, load regulation for an output current change of 1mA to 200mA is –0.3mV typical at VOUT = 0.6V. At VOUT = 12V, load regulation is: 12V • ( –0.3mV ) = –6mV 0.6V Table 1 shows 1% resistor divider values for some common output voltages with a resistor divider current of 10µA. Table 1. Output Voltage Resistor Divider Values VOUT R1 R2 1.2V 60.4k 60.4k 1.5V 59k 88.7k 1.8V 59k 118k 2.5V 60.4k 191k 3V 59k 237k 3.3V 61.9k 280k 5V 59k 432k 3062f For more information www.linear.com/LT3062 LT3062 Applications Information The LT3062 regulator provides low output voltage noise over the 10Hz to 100kHz bandwidth while operating at full load with the addition of a bypass capacitor (CREF/BYP) from the REF/BYP pin to GND. A good quality low leakage capacitor is recommended. This capacitor bypasses the reference of the regulator, providing a low frequency noise pole for the internal reference. With the use of 10nF for CREF/BYP, the output voltage noise decreases to as low as 30µVRMS when the output voltage is set for 0.6V. For higher output voltages (generated by using a resistor divider), the output voltage noise gains up accordingly when using CREF/BYP by itself. Higher values of output voltage noise may be measured if care is not exercised with regard to circuit layout and testing. Crosstalk from nearby traces can induce unwanted noise onto the LT3062’s output. Power supply ripple rejection must also be considered. The LT3062 regulator does not have unlimited power supply rejection and will pass a small portion of the input noise through to the output. IN VIN OUT LT3062 SHDN VOUT R2 CFF COUT ADJ GND REF/BYP R1 10nF • (I FB–DIVIDER ) 10µA V I FB–DIVIDER = OUT R1+ R2 CFF ≥ CREF/BYP 3062 F02 Figure 2. Feedforward Capacitor for Fast Transient Response VOUT = 5V COUT = 10µF IFB-DIVIDER = 10µA 0 VOUT 100mV/DIV To lower the output voltage noise for higher output voltages, include a feedforward capacitor (CFF) from VOUT to the ADJ pin. A good quality, low leakage capacitor is recommended. This capacitor bypasses the error amplifier of the regulator, providing a low frequency noise pole. With the use of 10nF for both CFF and CREF/BYP, output voltage noise decreases to 30µVRMS when the output voltage is set to 5V by a 10µA feedback resistor divider. If the current in the feedback resistor divider is doubled, CFF must also be doubled to achieve equivalent noise performance. Using a feedforward capacitor (CFF) from VOUT to the ADJ pin has the added benefit of improving transient response for output voltages greater than 0.6V. With no feedforward capacitor, the settling time will increase as the output voltage is raised above 0.6V. Use the equation in Figure 2 to determine the minimum value of CFF to achieve a transient response that is similar to 0.6V output voltage performance regardless of the chosen output voltage (see Figure 3 and Transient Response in the Typical Performance Characteristics section). FEEDFORWARD CAPACITOR, CFF Bypass Capacitance, Output Voltage Noise and Transient Response 10pF 1nF 10nF LOAD CURRENT 200mA/DIV 100µs/DIV 3062 F03 Figure 3. Transient Response vs Feedforward Capacitor 3062f For more information www.linear.com/LT3062 11 LT3062 Applications Information During start-up, the internal reference soft-starts if a reference bypass capacitor is present. Regulator startup time is directly proportional to the size of the bypass capacitor, slowing to 6ms with a 10nF bypass capacitor (See SHDN Transient Response vs REF/BYP Capacitor in the Typical Performance Characteristics section). The reference bypass capacitor is actively pulled low during shutdown to reset the internal reference. Start-up time is also affected by the use of a feedforward capacitor. Start-up time is directly proportional to the size of the feedforward capacitor and output voltage, and is inversely proportional to the feedback resistor divider current, slowing to 15ms with a 10nF feedforward capacitor and a 10µF output capacitor for an output voltage set to 5V by a 10µA feedback resistor divider. Output Capacitance The LT3062 regulator is stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. Use a minimum output capacitor of 3.3µF with an ESR of 3Ω or less to prevent oscillations. If a feedforward capacitor is used with output voltages set for greater than 24V, use a minimum output capacitor of 10µF. The LT3062 is a micropower device and output load transient response is a function of output capacitance. Larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. Bypass capacitors, used to decouple individual components powered by the LT3062, will increase the effective output capacitor value. For applications with large load current transients, a low ESR ceramic capacitor in parallel with a bulk tantalum capacitor often provides an optimally damped response. 12 Give extra consideration to the use of ceramic capacitors. Manufacturers make ceramic capacitors with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics provide high C-V products in a small package at low cost, but exhibit strong voltage and temperature coefficients as shown in Figures 4 and 5. When used with a 5V regulator, a 16V 10µF Y5V capacitor can exhibit an effective value as low as 1µF to 2µF for the DC bias voltage applied and over the operating temperature range. The X5R and X7R dielectrics yield much more stable characteristics and are more suitable for use as the output capacitor. The X7R type works over a wider temperature range and has better temperature stability, while the X5R is less expensive and is available in higher values. Care still must be exercised when using X5R and X7R capacitors; the X5R and X7R codes only specify operating temperature range and maximum capacitance change over temperature. Capacitance change due to DC bias with X5R and X7R capacitors is better than Y5V and Z5U capacitors, but can still be significant enough to drop capacitor values below appropriate levels. Capacitor DC bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be verified. Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress can be induced by vibrations in the system or thermal transients. 3062f For more information www.linear.com/LT3062 LT3062 Applications Information The resulting voltages produced can cause appreciable amounts of noise. A ceramic capacitor produced the trace in Figure 6 in response to light tapping from a pencil. Similar vibration induced behavior can masquerade as increased output voltage noise. 20 CHANGE IN VALUE (%) 4ms/DIV X5R –40 Input Capacitance and Stability –60 Y5V –80 0 2 4 14 8 6 10 12 DC BIAS VOLTAGE (V) 16 3062 F04 Figure 4. Ceramic Capacitor DC Bias Characteristics 20 X5R 0 –20 –40 Y5V –60 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF –100 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 Low ESR, ceramic input bypass capacitors are acceptable for applications without long input leads. However, applications connecting a power supply to an LT3062 circuit’s IN and GND pins with long input wires combined with a low ESR, ceramic input capacitor are prone to voltage spikes, reliability concerns and application-specific board oscillations. The input wire inductance found in many battery-powered applications, combined with the low ESR ceramic input capacitor, forms a high Q LC resonant tank circuit. In some instances this resonant frequency beats against the output current dependent LDO bandwidth and interferes with proper operation. Simple circuit modifications/solutions are then required. This behavior is not indicative of LT3062 instability, but is a common ceramic input bypass capacitor application issue. 40 CHANGE IN VALUE (%) 3062 F06 Figure 6. Noise Resulting from Tapping on a Ceramic Capacitor –20 –80 VOUT 500µV/DIV BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF 0 –100 VOUT = 0.6V COUT = 10µF CREF/BYP = 10nF ILOAD = 100mA 125 3062 F05 Figure 5. Ceramic Capacitor Temperature Characteristics The self-inductance, or isolated inductance, of a wire is directly proportional to its length. Wire diameter is not a major factor on its self-inductance. For example, the selfinductance of a 2-AWG isolated wire (diameter = 0.26") is about half the self-inductance of a 30-AWG wire (diameter = 0.01"). One foot of 30-AWG wire has approximately 465nH of self-inductance. 3062f For more information www.linear.com/LT3062 13 LT3062 Applications Information Two methods can reduce wire self-inductance. One method divides the current flowing towards the LT3062 between two parallel conductors. In this case, the farther apart the wires are from each other, the more the self-inductance is reduced; up to a 50% reduction when placed a few inches apart. Splitting the wires connects two equal inductors in parallel, but placing them in close proximity creates mutual inductance adding to the self-inductance. The second and most effective way to reduce overall inductance is to place both forward and return current conductors (the input and GND wires) in very close proximity. Two 30-AWG wires separated by only 0.02”, used as forward and return current conductors, reduce the overall self-inductance to approximately one-fifth that of a single isolated wire. If a battery, mounted in close proximity, powers the LT3062, a 1µF input capacitor suffices for stability. However, if a distant supply powers the LT3062, use a larger value input capacitor. Use a rough guideline of 1µF (in addition to the 1µF minimum) per 8 inches of wire length. The minimum input capacitance needed to stabilize the application also varies with power supply output impedance variations. Placing additional capacitance on the LT3062’s output also helps. However, this requires an order of magnitude more capacitance in comparison with additional LT3062 input bypassing. Series resistance between the supply and the LT3062 input also helps stabilize the application; as little as 0.1Ω to 0.5Ω suffices. This impedance dampens the LC tank circuit at the expense of dropout voltage. A better alternative is to use higher ESR tantalum or electrolytic capacitors at the LT3062 input in place of ceramic capacitors. 14 Overload Recovery Like many IC power regulators, the LT3062 has safe operating area protection. The safe area protection decreases current limit as input-to-output voltage increases and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. The protective design provides some output current at all values of input-tooutput voltage up to the device breakdown. When power is first applied, as input voltage rises, the output follows the input, allowing the regulator to start up into very heavy loads. During start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. With a high input voltage, a problem can occur wherein removal of an output short will not allow the output to recover. The problem occurs with a heavy output load when the input voltage is high and the output voltage is low. Common situations include immediately after the removal of a short-circuit or if the shutdown pin is pulled high after the input voltage has already been turned on. The load line for such a load may intersect the output current curve at two points. If this happens, there are two stable output operating points for the regulator. With this double intersection, the input power supply may need to be cycled down to zero and brought up again to make the output recover. 3062f For more information www.linear.com/LT3062 LT3062 Applications Information Thermal Considerations The power handling capability of the device will be limited by the maximum rated junction temperature (125°C for LT3062E, LT3062I or 150°C for LT3062MP, LT3062H). Two components comprise the power dissipated by the device: 1.Output current multiplied by the input/output voltage differential: IOUT • (VIN – VOUT), and 2.GND pin current multiplied by the input voltage: IGND • VIN GND pin current is determined using the GND Pin Current curves in the Typical Performance Characteristics section. Power dissipation will be equal to the sum of the two components listed above. The LT3062 regulator has internal thermal limiting that protects the device during overload conditions. For continuous normal conditions, the maximum junction temperature of 125°C (E-grade, I-grade) or 150°C (MP-grade, H-grade) must not be exceeded. Carefully consider all sources of thermal resistance from junction to ambient including other heat sources mounted in proximity to the LT3062. The undersides of the LT3062 packages have exposed metal from the lead frame to the die attachment. The package allows heat to directly transfer from the die junction to the printed circuit board metal to control maximum operating junction temperature. The dual-in-line pin arrangement allows metal to extend beyond the ends of the package on the topside (component side) of a PCB. Connect this metal to GND on the PCB. The multiple IN and OUT pins of the LT3062 also assist in spreading heat to the PCB. For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes can also be used to spread the heat generated by power devices. The following tables list thermal resistance for several different board sizes and copper areas. All measurements were taken in still air on a 4 layer FR-4 board with 1oz solid internal planes and 2oz top/bottom external trace planes with a total board thickness of 1.6mm. The four layers were electrically isolated with no thermal vias present. PCB layers, copper weight, board layout and thermal vias will affect the resultant thermal resistance. For more information on thermal resistance and high thermal conductivity test boards, refer to JEDEC standard JESD51, notably JESD51-12 and JESD51-7. Achieving low thermal resistance necessitates attention to detail and careful PCB layout. Table 2. Measured Thermal Resistance for DFN Package COPPER AREA TOPSIDE* BACKSIDE (mm2) (mm2) BOARD AREA (mm2) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500 2500 2500 38°C/W 1000 2500 2500 38°C/W 225 2500 2500 40°C/W 100 2500 2500 45°C/W *Device is mounted on topside Table 3. Measured Thermal Resistance for MSOP Package COPPER AREA TOPSIDE* BACKSIDE (mm2) (mm2) BOARD AREA (mm2) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500 2500 2500 29°C/W 1000 2500 2500 30°C/W 225 2500 2500 32°C/W 100 2500 2500 45°C/W *Device is mounted on topside 3062f For more information www.linear.com/LT3062 15 LT3062 Applications Information Calculating Junction Temperature Protection Features Example: Given an output voltage of 2.5V, an input voltage range of 12V ±5%, an output current range of 0mA to 50mA and a maximum ambient temperature of 85°C, what will the maximum junction temperature be? The LT3062 incorporates several protection features that make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device also protects against reverse-input voltages, reverse-output voltages and reverse output-toinput voltages. The power dissipated by the device equals: IOUT(MAX) • (VIN(MAX)–VOUT) + IGND • VIN(MAX) where, IOUT(MAX) = 50mA VIN(MAX) = 12.6V IGND at (IOUT = 50mA, VIN = 12V) = 1mA So, P = 50mA • (12.6V – 2.5V) + 1mA • 12.6V = 0.518W Using a DFN package, the thermal resistance will be in the range of 38°C/W to 45°C/W depending on the copper area. So the junction temperature rise above ambient will be approximately equal to: 0.518W • 45°C/W = 23.3°C The maximum junction temperature equals the maximum ambient temperature plus the maximum junction temperature rise above ambient or: TJMAX = 85°C + 23.3°C = 108.3°C 16 Current limit protection and thermal overload protection protect the device against current overload conditions at the output of the device. The typical thermal shutdown temperature is 165°C. For normal operation, do not exceed a junction temperature of 125°C (LT3062E, LT3062I) or 150°C (LT3062MP, LT3062H). The LT3062 IN pin withstands reverse voltages of 50V. The device limits current flow to less than 1mA (typically less than 250µA) and no negative voltage appears at OUT. The device protects both itself and the load against batteries that are plugged in backwards. The SHDN pin cannot be driven below GND unless tied to the IN pin. If the SHDN pin is driven below GND while IN is powered, the output will turn on. SHDN pin logic cannot be referenced to a negative rail. The LT3062 incurs no damage if its output is pulled below ground. If the input is left open-circuit or grounded, the output can be pulled below ground by 50V. No current flows through the pass transistor from the output. However, current flows in (but is limited by) the resistor divider that sets the output voltage. Current flows from the bottom resistor in the divider and from the ADJ pin’s internal clamp through the top resistor in the divider to the external circuitry pulling OUT below ground. If the input is powered by a voltage source, the output sources current equal to its current limit capability and the LT3062 protects itself by thermal limiting. In this case, grounding the SHDN pin turns off the device and stops the output from sourcing current. 3062f For more information www.linear.com/LT3062 LT3062 Applications Information In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up temporarily or otherwise while the input is pulled to ground, pulled to some intermediate voltage or left open-circuit. Current flow back into the OUT and ADJ pins follows the curve shown in Figure 7. If the LT3062's IN pin is forced below the OUT pin or the OUT pin is pulled above the IN pin, regardless of the state of the SHDN pin, input current typically drops to less than 1µA. 2.0 REVERSE OUTPUT CURRENT (mA) The LT3062 incurs no damage if the ADJ pin is pulled above or below ground by 50V. If the input is left open circuit or grounded, the ADJ pin performs like a large resistor (typically 30k) in series with a diode when pulled above or below ground. VIN = 0V 1.8 VADJ = VOUT 1.6 1.4 ADJ 1.2 1.0 0.8 0.6 0.4 0.2 0 OUT 0 5 10 15 20 25 30 35 OUTPUT VOLTAGE (V) 40 45 3062 F07 Figure 7. Reverse Output Current 3062f For more information www.linear.com/LT3062 17 LT3062 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DCB Package 8-Lead Plastic DFN (2mm × 3mm) (Reference LTC DWG # 05-08-1718 Rev A) 0.70 ±0.05 1.35 ±0.05 3.50 ±0.05 1.65 ±0.05 2.10 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.45 BSC 1.35 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED R = 0.115 TYP R = 0.05 5 TYP 2.00 ±0.10 (2 SIDES) 0.40 ±0.10 8 1.35 ±0.10 1.65 ±0.10 3.00 ±0.10 (2 SIDES) PIN 1 NOTCH R = 0.20 OR 0.25 × 45° CHAMFER PIN 1 BAR TOP MARK (SEE NOTE 6) (DCB8) DFN 0106 REV A 4 0.200 REF 1 0.23 ±0.05 0.45 BSC 0.75 ±0.05 1.35 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 18 3062f For more information www.linear.com/LT3062 LT3062 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8E Package 8-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1662 Rev K) BOTTOM VIEW OF EXPOSED PAD OPTION 1.88 (.074) 1 1.88 ±0.102 (.074 ±.004) 0.29 REF 1.68 (.066) 0.889 ±0.127 (.035 ±.005) 0.05 REF 5.10 (.201) MIN DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 1.68 ±0.102 3.20 – 3.45 (.066 ±.004) (.126 – .136) 8 3.00 ±0.102 (.118 ±.004) (NOTE 3) 0.65 (.0256) BSC 0.42 ±0.038 (.0165 ±.0015) TYP 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 1 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) NOTE: BSC 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.1016 ±0.0508 (.004 ±.002) MSOP (MS8E) 0213 REV K 3062f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT3062 19 LT3062 Typical Application 1.8V Low Noise Regulator IN VIN 2.3V 118k 1% LT3062 1µF VOUT 1.8V 200mA OUT SHDN GND 10µF ADJ 59k 1% BYP 0.01µF 3062 TA02 Related Parts PART NUMBER DESCRIPTION COMMENTS LT1761 100mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20µVRMS , VIN = 1.8V to 20V, ThinSOT™ Package LT1762 150mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20µVRMS , VIN = 1.8V to 20V, MS8 Package LT1763 500mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20µVRMS , VIN = 1.8V to 20V, SO8 Package LT1962 300mA, Low Noise LDO 270mV Dropout Voltage, Low Noise: 20µVRMS , VIN = 1.8V to 20V, MS8 Package LT1964 200mA, Low Noise, Negative LDO 340mV Dropout Voltage, Low Noise 30µVRMS , VIN = –1.8V to –20V, ThinSOT and 3mm × 3mm DFN-8 Packages LT3008 20mA, 45V, 3µA IQ Micropower LDO 300mV Dropout Voltage, Low IQ: 3µA, VIN = 2V to 45V, VOUT = 0.6V to 44.5V; ThinSOT and 2mm × 2mm DFN-6 Packages 280mV Dropout Voltage, Low IQ: 3µA, VIN = 1.6V to 20V, 2mm × 2mm DFN-6 and SC70 Packages LT3009 20mA, 3µA IQ Micropower LDO LT3050 100mA, Low Noise Linear Regulator with 340mV Dropout Voltage, Low Noise: 30µVRMS , VIN: 1.6V to 45V, VOUT: 0.6V to 44.5V, Programmable Precision Current Limit: ±5%, Programmable Minimum IOUT Monitor, Output Current Precision Current Limit and Diagnostic Monitor, Fault Indicator, Reverse Protection; 12-Lead 3mm × 2mm DFN and MSOP Packages. Functions. LT3060 45V VIN, Micropower, Low Noise, 100mA Low Dropout Linear Regulator Input Voltage Range: 1.6V to 45V, Quiescent Current: 40μA, Dropout Voltage: 300mV, Low Noise: 30μVRMS (10Hz to 100kHz), Adjustable Output: VREF = 600mV, 8-Lead 2mm x 2mm DFN and 8-Lead ThinSOT LT3061 45V VIN, Micropower, Low Noise, 100mA Low Dropout Linear Regulator with Active Output Discharge Active Output Discharge, Input Voltage Range: 1.6V to 45V, Quiescent Current: 45μA, Dropout Voltage: 250mV, Low Noise: 30μVRMS (10Hz to 100kHz), Adjustable Output: 600mV to 19V, 8-Lead MSOP and 2mm × 3mm DFN LT3063 45V VIN, Micropower, Low Noise, 200mA Low Dropout Linear Regulator with Active Output Discharge Active Output Discharge, Input Voltage Range: 1.6V to 45V, Quiescent Current: 45μA, Dropout Voltage: 300mV, Low Noise: 30μVRMS (10Hz to 100kHz), Adjustable Output: 600mV to 19V, 8-Lead MSOP and 2mm × 3mm DFN LT3082 200mA, Parallelable, Single Resistor, Low Dropout Linear Regulator Outputs May Be Paralleled for Higher Output, Current or Heat Spreading, Wide Input Voltage Range: 1.2V to 40V Low Value Input/Output Capacitors Required: 0.22μF, Single Resistor Sets Output Voltage Initial Set Pin Current Accuracy: 1%, Low Output Noise: 40μVRMS (10Hz to 100kHz) Reverse-Battery Protection, Reverse-Current Protection; 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages LT3085 500mA, Parallelable, Low Noise, Low Dropout Linear Regulator 275mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V, VOUT: 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set, Directly Parallelable (No Op Amp Required), Stable with Ceramic Capacitors; MS8E and 2mm × 3mm DFN-6 Packages LT3092 200mA 2-Terminal Programmable Current Source Programmable 2-Terminal Current Source, Maximum Output Current: 200mA Wide Input Voltage Range: 1.2V to 40V, Resistor Ratio Sets Output Current Initial Set Pin Current Accuracy: 1%, Current Limit and Thermal Shutdown Protection Reverse-Voltage Protection, Reverse-Current Protection; 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT3062 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT3062 3062f LT 0714 • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2014