LT3091 –36V, 1.5A Negative Linear Regulator with Programmable Current Limit Description Features Output Current: 1.5A nn Single Resistor Sets Output Voltage nn 50µA SET Pin Current: ±1% Initial Accuracy nn Programmable Current Limit nn Positive or Negative Output Current Monitor nn Parallelable for Higher Current and Heat Spreading nn Low Dropout Voltage: 300mV nn Low Output Noise: 18µV RMS (10Hz to 100kHz) nn Configurable as a 3-Terminal Floating Regulator nn Wide Input Voltage Range: –1.5V to –36V nn Rail-to-Rail Output Voltage Range: 0V to –32V nn Positive/Negative Shutdown Logic or UVLO nn Programmable Cable Drop Compensation nn Load Regulation: 1.2mV (1mA to 1.5A) nn Stable with 10µF Minimum Output Capacitor nn Stable with Ceramic or Tantalum Capacitors nn Thermally Enhanced 14-Lead 4mm × 3mm DFN, 16-Lead TSSOP, 7-Lead TO-220 and DD Packages The LT®3091 is a 1.5A, low dropout negative linear regulator that is easily paralleled to increase output current or spread heat on surface mounted boards. Designed with a precision current reference followed by a high performance rail-to-rail voltage buffer, this regulator finds use in applications requiring precision output, high current with no heat sink, output adjustability to zero and low dropout voltage. The device can also be configured as a 3-terminal floating regulator. nn The LT3091 features fast transient response, high PSRR and output noise as low as 18µVRMS. The LT3091 generates a wide output voltage range (0V to –32V) while maintaining unity gain operation. This yields virtually constant bandwidth, load regulation, PSRR and noise, independent of the programmed output voltage. The LT3091 supplies 1.5A at a typical dropout voltage of 300mV. Operating quiescent current is nominally 1.2mA and drops to << 1µA in shutdown. A single resistor adjusts the LT3091’s precision programmable current limit. The device’s positive or negative current monitor either sources a current (0.25mA/A) or sinks a current (0.5mA/A) proportional to output current. Built-in protection includes reverse output protection, internal current limit with foldback and thermal shutdown with hysteresis. Applications Post Regulator for Switching Supplies Low Noise Instrumentation and RF Supplies nn Rugged Industrial Supplies nn Precision Power Supplies nn nn L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Patent Pending. Typical Application 0.1µF LT3091 TO ADC (IMON) 49.9k 6.65k SET GND Output Noise: 10Hz to 100kHz 10µF VOUT –2.5V MAX IOUT 1.5A IMONP OUT + VOUT 100µV/DIV – 10µF VIN –3V TO –10V 50µA IN ILIM SHDN 5k IMONN 3.3V 0.1µF 3091 TA01a For more information www.linear.com/LT3091 1ms/DIV VIN: –3.5V COUT: 10µF, CSET: 0.1µF VOUT: –2.5V IL: 1.5A 3091 G39 3091fa 1 LT3091 Absolute Maximum Ratings (Note 1) IN Pin Voltage (Note 3) with Respect to GND Pin............................0.3V, –40V ILIM Pin Voltage with Respect to IN Pin (Note 3).................–0.3V, 0.7V IMONP Pin Voltage with Respect to IN Pin (Note 3)..................–0.3V, 40V with Respect to GND Pin.............................–40V, 20V with Respect to IMONN Pin.........................–40V, 20V IMONN Pin Voltage with Respect to IN Pin (Note 3)..................–0.3V, 40V with Respect to GND Pin.............................–40V, 20V SHDN Pin Voltage with Respect to IN Pin (Note 3)..................–0.3V, 55V with Respect to GND Pin.............................–40V, 20V SET Pin Voltage with Respect to IN Pin (Note 3)..................–0.3V, 36V with Respect to GND Pin.....................................±36V SET Pin Current (Note 9)........................................±5mA OUT Pin Voltage with Respect to IN Pin (Note 3)..................–0.3V, 36V with Respect to GND Pin.....................................±36V Output Short-Circuit Duration........................... Indefinite Operating Junction Temperature Range (Note 2) E-, I-Grade......................................... –40°C to 125°C MP-Grade.......................................... –55°C to 150°C H-Grade............................................. –40°C to 150°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 Sec) FE, R, T7 Packages ........................................... 300°C Pin Configuration TOP VIEW TOP VIEW IN 1 16 OUT IN 1 14 OUT IN 2 15 OUT IN 2 13 OUT IN 3 IN 3 IN 4 IN 4 ILIM 5 ILIM 5 IMONP 6 9 SET IMONP 6 11 SET IMONN 7 8 SHDN IMONN 7 10 SHDN NC 8 9 12 OUT 15 IN 11 OUT 10 GND DE PACKAGE 14-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 27°C/W, θJC = 5.5°C/W EXPOSED PAD (PIN 15) IS IN, MUST BE SOLDERED TO PCB TAB IS IN 13 OUT 12 GND NC FE PACKAGE 16-LEAD PLASTIC TSSOP TJMAX = 150°C, θJA = 25°C/W, θJC = 8°C/W EXPOSED PAD (PIN 17) IS IN, MUST BE SOLDERED TO PCB FRONT VIEW 7 6 5 4 3 2 1 14 OUT 17 IN FRONT VIEW OUT GND SET IN SHDN IMONN ILIM TAB IS IN 7 6 5 4 3 2 1 OUT GND SET IN SHDN IMONN ILIM T7 PACKAGE 7-LEAD PLASTIC TO-220 R PACKAGE 7-LEAD PLASTIC DD TJMAX = 150°C, θJA = 34°C/W, θJC = 3°C/W TJMAX = 150°C, θJA = 15°C/W, θJC = 3°C/W 3091fa 2 For more information www.linear.com/LT3091 LT3091 Order Information (http://www.linear.com/product/LT3091#orderinfo) LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3091EDE#PBF LT3091EDE#TRPBF 3091 14-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LT3091IDE#PBF LT3091IDE#TRPBF 3091 14-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C LT3091HDE#PBF LT3091HDE#TRPBF 3091 14-Lead (4mm × 3mm) Plastic DFN –40°C to 150°C LT3091MPDE#PBF LT3091MPDE#TRPBF 3091 14-Lead (4mm × 3mm) Plastic DFN –55°C to 150°C LT3091EFE#PBF LT3091EFE#TRPBF 3091FE 16-Lead Plastic TSSOP –40°C to 125°C LT3091IFE#PBF LT3091IFE#TRPBF 3091FE 16-Lead Plastic TSSOP –40°C to 125°C LT3091HFE#PBF LT3091HFE#TRPBF 3091FE 16-Lead Plastic TSSOP –40°C to 150°C LT3091MPFE#PBF LT3091MPFE#TRPBF 3091FE 16-Lead Plastic TSSOP –55°C to 150°C LT3091ER#PBF LT3091ER#TRPBF LT3091R 7-Lead Plastic DD-Pak –40°C to 125°C LT3091IR#PBF LT3091IR#TRPBF LT3091R 7-Lead Plastic DD-Pak –40°C to 125°C LT3091HR#PBF LT3091HR#TRPBF LT3091R 7-Lead Plastic DD-Pak –40°C to 150°C LT3091MPR#PBF LT3091MPR#TRPBF LT3091R 7-Lead Plastic DD-Pak –55°C to 150°C LT3091ET7#PBF N/A LT3091T7 7-Lead Plastic TO-220 –40°C to 125°C LT3091IT7#PBF N/A LT3091T7 7-Lead Plastic TO-220 –40°C to 125°C LT3091HT7#PBF N/A LT3091T7 7-Lead Plastic TO-220 –40°C to 150°C LT3091MPT7#PBF N/A LT3091T7 7-Lead Plastic TO-220 –55°C to 150°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. PARAMETER CONDITIONS Minimum IN Voltage (Note 11) ILOAD = 500mA ILOAD = 1.5A SET Pin Current (ISET) Output Offset Voltage, VOS (VOUT – VSET) MIN TYP l –1.9 –1.5 –1.5 VIN = –1.9V, ILOAD = 1mA –36V < VIN < –1.9V, 1mA < ILOAD < 1.5A (Note 5) l 49.5 49 50 50 VIN = –1.9V, ILOAD = 1mA –36V < VIN < –1.9V, 1mA < ILOAD < 1.5A (Note 5) (DFN, TSSOP) –36V < VIN < –1.9V, 1mA < ILOAD < 1.5A (Note 5) (DD-PAK, TO-220) l l –1.2 –2 –3.5 Line Regulation: ∆ISET/∆VIN VIN = –1.9V to –36V, ILOAD = 1mA Line Regulation: ∆VOS/∆VIN VIN = –1.9V to –36V, ILOAD = 1mA ILOAD = 1mA to 1.5A Load Regulation: ∆ISET ILOAD = 1mA to 1.5A, VIN = –1.9V (Note 6) Load Regulation: ∆VOS Output Regulation with SET Pin Voltage Change: ∆ISET/∆VSET VSET = 0V to –32V, VIN = –36V, ILOAD = 1mA ∆VOS/∆VSET VSET = 0V to –32V, VIN = –36V, ILOAD = 1mA MAX UNITS V V 50.5 51 µA µA 1.2 2 3.5 mV mV mV 1.5 2.5 nA/V µV/V l 2.0 1.2 5.0 nA mV l l 0.2 2.5 2 40 nA/V µV/V 3091fa For more information www.linear.com/LT3091 3 LT3091 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. PARAMETER CONDITIONS Dropout Voltage VIN = VOUT(NOMINAL) (Note 7) ILOAD = 1mA ILOAD = 1mA ILOAD = 100mA ILOAD = 100mA ILOAD = 500mA ILOAD = 500mA ILOAD = 1.5A ILOAD = 1.5A ILOAD = 1.5A ILOAD = 1.5A DFN and TSSOP TO-220 and DD-Pak GND Pin Current VIN = VOUT(NOMINAL) (Note 8) MIN TYP MAX UNITS 173 225 270 225 280 230 320 360 450 420 525 mV mV mV mV mV mV mV mV mV mV 2.0 2.0 5.5 20 80 mA mA mA mA mA l 176 l 185 l 300 l 360 l ILOAD = 20μA ILOAD = 1mA ILOAD = 100mA ILOAD = 500mA ILOAD = 1.5A 1.2 1.2 2.6 9.3 40 l l l l l Error Amplifier RMS Output ILOAD = 1.5A, BW = 10Hz to 100kHz, COUT = 10μF, Noise (Note 12) CSET = 0.1μF 18 μVRMS Reference Current RMS Output Noise (Note 12) BW = 10Hz to 100kHz 10 nARMS Ripple Rejection VIN – VOUT = –1.5V (Avg) VRIPPLE = 500mVP-P, fRIPPLE = 120Hz, ILOAD = 100mA, COUT = 10μF, CSET = 0.47μF VRIPPLE = 50mVP-P, fRIPPLE = 10kHz, ILOAD = 1.5A, COUT = 10μF, CSET = 0.47μF VRIPPLE = 50mVP-P, fRIPPLE = 1MHz, ILOAD = 1.5A, COUT = 10μF, CSET = 0.47μF 70 85 45 20 dB dB dB SHDN Pin Turn-ON Threshold Positive SHDN Rising Negative SHDN Rising (in Magnitude) 1.14 –1.36 1.23 –1.27 SHDN Pin Hysteresis Positive SHDN Hysteresis Negative SHDN Hysteresis 180 190 SHDN Pin Current (Note 10) VSHDN = 0V VSHDN = 15V VSHDN = –15V 21 –4.5 Quiescent Current in Shutdown VIN = –6V, VSHDN = 0V VIN = –6V, VSHDN = 0V Internal Current Limit (Note 13) VIN = –1.9V, VOUT = 0V VIN = –13V, VOUT = 0V VIN = –36V, VOUT = 0V VIN = –1.9V, ∆VOUT < 10mV Programmable Current Limit l l –7 1600 l l 20 1550 V V mV mV ±1 30 µA µA µA 0.1 1 20 µA µA 1900 840 65 1850 2200 mA mA mA mA l l 1.32 –1.18 120 2150 Programmable Scale Factor: –36V < VIN < –1.9V, IOUT > 100mA (Note 14) Max IOUT: VIN = –1.9V, RILIM = 13.3k Max IOUT: VIN = –1.9V, RILIM = 40k l l 1.35 450 1.5 500 1.65 550 A mA Positive Current Monitor (Note 15) Positive Current Monitoring (IMONP) Scale Factor IOUT = 500mA, VIN = –2.5V, VIMONN = 2V, VIMONP = 0V IOUT = 1.5A, VIN = –2.5V, VIMONN = 2V, VIMONP = 0V l l 113 338 0.25 125 375 137 412 mA/A µA µA Negative Current Monitor Negative Current Monitoring (IMONN) Scale Factor IOUT = 500mA, VIN = –2.5V, VIMONN = 0V, VIMONP = –2.5V IOUT = 1.5A, VIN = –2.5V, VIMONN = 0V, VIMONP = –2.5V l l 225 675 0.5 250 750 275 825 mA/A µA µA Minimum Required Load Current (Note 4) –36V < VIN < –1.9V l 20 Thermal Regulation ISET 10ms Pulse 20 A•kΩ μA 0.04 %/W 3091fa 4 For more information www.linear.com/LT3091 LT3091 Electrical Characteristics Note 1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. The LT3091 is tested and specified under pulsed load conditions such that TJ ≅ TA. The LT3091E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating temperature range are assured by design, characterization, and correlation with statistical process controls. The LT3091I is guaranteed over the full –40°C to 125°C operating junction temperature range. The LT3091MP is 100% tested and guaranteed over the full –55°C to 150°C operating junction temperature range. The LT3091H is 100% tested at the 150°C operating junction temperature. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. Note 3. Parasitic diodes exist internally between the OUT, SET, ILIM, SHDN, IMONP, IMONN, and GND pins and the IN pin. Do not drive OUT, SET, ILIM, SHDN, IMONP, IMONN, and GND pins more than 0.3V below the IN pin during fault conditions. These pins must remain at a voltage more positive than IN during normal operation. Note 4. The LT3091 may go out of regulation if the minimum output current requirement is not satisfied. Note 5. Maximum junction temperature limits operating conditions. The regulated output voltage specification does not apply for all possible combinations of input voltage and output current, primarily due to the internal current limit foldback which decreases current limit at VOUT – VIN ≥ 7V. If operating at maximum output current, limit the input voltage range. If operating at maximum input voltage, limit the output current range. Note 6. Load regulation is Kelvin sensed at the package. Note 7. Dropout voltage is the minimum output-to-input voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage is: VIN + VDROPOUT. Note 8. GND pin current is tested with VIN = VOUT(NOMINAL) and a current source load. Therefore, the device is tested while operating in dropout. This is the worst-case GND pin current. GND pin current decreases at higher input voltages. Note 9. The SET pin is clamped to OUT with diodes through 12k resistors. These resistors and diodes only carry current under transient overloads or fault conditions. Note 10. Positive SHDN pin current flows into the SHDN pin. Note 11. The SHDN threshold must be met to ensure device operation. Note 12. Output noise decreases by adding a capacitor across the voltage setting resistor. Adding this capacitor bypasses the voltage setting resistor’s thermal noise as well as the reference current’s noise. Output noise then equals the error amplifier noise (see Applications Information section). Note 13. The internal back-up current limit circuitry incorporates foldback protection that decreases current limit for VOUT – VIN ≥ 7V. Some level of output current is provided at all VOUT – VIN differential voltages. Please consult the Typical Performance Characteristic graph for current limit vs VOUT – VIN. Note 14. The current limit programming scale factor is specified while the internal backup current limit is not active. Please note that the internal current limit has foldback protection for VOUT-to-VIN differentials greater than 7V. Note 15. For positive current monitoring, bias IMONN to ≥ 2V above IMONP. Typical Performance Characteristics SET Pin Current 50.4 SET PIN CURRENT (µA) 50.3 SET Pin Current IL = 1mA VOUT = –1.25V VIN = –1.9V 2.0 N = 4726 1.5 OFFSET VOLTAGE (mV) 50.5 TJ = 25°C, unless otherwise noted. 50.2 50.1 50.0 49.9 49.8 49.7 IL = 1mA VOUT = –1.25V VIN = –1.9V 1.0 0.5 0 –0.5 –1.0 –1.5 49.6 49.5 –75 –50 –25 Offset Voltage (VOUT – VSET) 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G01 49 49.5 50 50.5 DISTRIBUTION (µA) 51 3091 G02 –2.0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G03 3091fa For more information www.linear.com/LT3091 5 LT3091 Typical Performance Characteristics Offset Voltage TJ = 25°C, unless otherwise noted. Set Pin Current 50.5 N = 4726 2.0 IL = 1mA VOUT = –1.25V 50.4 50.1 50.0 49.9 49.8 –55°C 25°C 125°C 150°C 49.6 49.5 2 49.8 –55°C 25°C 125°C 150°C 49.7 49.6 12 16 20 24 OUTPUT VOLTAGE (V) –10 –15 –20 –25 –30 –35 –40 INPUT VOLTAGE (V) 32 28 0.5 0 –0.5 –1.0 –55°C 25°C 125°C 150°C –1.5 –2.0 0 –4 –8 –12 –16 –20 –24 –28 –32 OUTPUT VOLTAGE (V) 450 VSHDN = VIN –5 –10 –15 –20 –25 –30 –35 –40 INPUT VOLTAGE (V) 3091 G06 20 2.5 ∆IL = 1mA to 1.5A VIN = –1.9V VOUT = –1.25V 2.0 10 1.5 0 1.0 –10 0.5 –20 –75 –50 –25 0 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G09 Typical Dropout Voltage 400 DROPOUT VOLTAGE (mV) 1.2 QUIESCENT CURRENT (mA) 0 3091 G08 Quiescent Current 1.0 RL = 61.9kΩ (20µA) VOUT = –1.25V VIN = –1.9V 0.4 0.2 0 –75 –50 –25 –55°C 25°C 125°C 150°C Load Regulation 1.0 1.4 0.6 –2.0 30 3091 G07 0.8 –1.0 SET PIN CURRENT LOAD REGULATION (nA) 49.9 OFFSET VOLTAGE (mV) SET PIN CURRENT (µA) 50.0 8 –0.5 OFFSET VOLTAGE LOAD REGULATION (mV) 50.1 4 0 –1.5 IL = 1mA VIN = –36V 1.5 50.2 0 0.5 Offset Voltage (VOUT – VSET) 2.0 50.3 49.5 –5 1.0 3091 G05 IL = 1mA VIN = –36V 50.4 0 3091 G04 Set Pin Current 50.5 OFFSET VOLTAGE (mV) SET PIN CURRENT (µA) 50.2 49.7 –1 0 1 VOS DISTRIBUTION (mV) IL = 1mA VOUT = –1.25V 1.5 50.3 –2 Offset Voltage (VOUT – VSET) 350 300 250 200 150 –55°C 25°C 125°C 150°C 100 50 VSHDN = 0V 0 25 50 75 100 125 150 TEMPERATURE (°C) 0 0 0.25 3091 G10 1 1.25 0.50 0.75 OUTPUT CURRENT (A) 1.5 3091 G11 3091fa 6 For more information www.linear.com/LT3091 LT3091 Typical Performance Characteristics Guaranteed Dropout Voltage (TO-220 and DD Packages) 600 500 500 TJ ≤ 150°C TJ ≤ 25°C 300 200 400 TJ ≤ 150°C 400 TJ ≤ 25°C 300 200 100 100 0 0 250 500 750 1000 1250 OUTPUT CURRENT (mA) 0 1500 0 250 500 750 1000 1250 OUTPUT CURRENT (mA) 20 15 10 –55°C 25°C 125°C 150°C 5 0.2 0.4 0.6 0.8 1.0 1.2 OUTPUT CURRENT (A) 1.4 100 30 IL = 1A 25 20 15 IL = 500mA 10 1.6 IL = 1mA IL = 100mA Minimum Input Voltage –1.6 –1.4 –1.2 –1.0 –0.8 –0.6 –0.4 –0.2 0 –2.5 –2.6 –2.7 –2.8 –2.9 –3 –3.1 –3.2 –3.3 –3.4 –3.5 INPUT VOLTAGE (V) RSET = 25kΩ IL = 1mA 0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G17 3091 G16 SHDN Turn-On Threshold SHDN Pin Hysteresis 1.275 –1.275 1.250 –1.250 1.225 –1.225 1.200 –1.200 1.175 –1.175 –1.150 0 25 50 75 100 125 150 TEMPERATURE (°C) 0.30 NEGATIVE SHDN TURN-ON THRESHOLD (V) –1.300 VIN = –1.9V 1.150 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) –1.8 IL = 1.5A 35 5 IL = 100mA 3091 G14 VOUT(NOMINAL) = –3V 3091 G15 1.300 IL = 1mA 150 –2.0 VIN = –1.9V 0.25 SHDN PIN HYSTERESIS (V) 0 IL = 500mA 200 0 –75 –50 –25 1500 MINIMUM INPUT VOLTAGE (V) GND PIN CURRENT (mA) 25 POSITIVE SHDN TURN-ON THERSHOLD (V) GND PIN CURRENT (mA) 40 35 IL = 1A 250 GND Pin Current Entering Dropout 45 VIN = –3.5V VOUT = –3V 40 IL = 1.5A 300 3091 G13 GND Pin Current 45 350 50 3091 G12 0 Dropout Voltage 450 DROPOUT VOLTAGE (mV) 600 DROPOUT VOLTAGE (mV) DROPOUT VOLTAGE (mV) Guaranteed Dropout Voltage (DFN and MSOP Packages) 400 TJ = 25°C, unless otherwise noted. 0.20 0.15 0.10 0.05 0 –75 –50 –25 3091 G18 POSITIVE SHDN HYSTERESIS NEGATIVE SHDN HYSTERESIS 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G19 3091fa For more information www.linear.com/LT3091 7 LT3091 Typical Performance Characteristics SHDN Pin Current VIN = –36V VIN = –15V 25 20 15 10 5 0 –55°C 25°C 125°C 150°C –5 –10 –15 –36 –28 –20 –12 –4 4 SHDN PIN VOLTAGE (V) 12 VSHDN = 15V 20 15 10 5 0 –5 268 VIN = –3V 740 730 VOUT = –1.2V VIMONN = –0.5V VIMONP = VIN ILOAD = 1.5A 720 710 700 –75 –50 –25 IMONN CURRENT (µA) IMONN CURRENT (µA) 750 VIN = –3V 259 253 250 247 244 241 VOUT = –1.2V VIMONN = –0.5V VIMONP = VIN ILOAD = 500mA 238 235 232 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) IMONP CURRENT (µA) IMONP CURRENT (µA) 131 370 365 360 129 VOUT = –1.2V VIMONN = 3V VIMONP = 0.5 ILOAD = 500mA 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G26 1.6 IMONP Pin Current 300 250 200 150 100 0 VOUT = –1.2V VIN = –3V VIMONN = 3V VIMONP = 0.5V 0 0.2 0.4 0.6 0.8 1.0 1.2 OUTPUT CURRENT (A) 1.4 1.6 3091 G25 VIN = –3V 127 125 123 121 117 –75 –50 –25 1.4 Programmable Current Limit 119 350 350 –75 –50 –25 133 VIN = –3V 375 0.4 0.6 0.8 1.0 1.2 OUTPUT CURRENT (A) 50 IMONP Pin Current at 500mA 380 0.2 3091 G24 IMONP Pin Current at 1.5A VOUT = –1.2V 395 VIMONN = 3V VIMONP = 0.5 390 ILOAD = 1.5A 385 0 350 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G23 400 200 400 262 760 300 3091 G22 IMONN Pin Current at 500mA 265 780 770 400 3091 G21 IMONN Pin Current at 1.5A 790 500 0 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G20 800 600 100 VSHDN = –15V –10 –75 –50 –25 20 VIN = –3V VOUT = –1.2V VIMONN = –0.5V VIMONP = VIN 700 IMONN CURRENT (µA) SHDN PIN CURRENT (µA) 25 SHDN PIN CURRENT (µA) IMONN Pin Current 800 IMONP CURRENT (µA) 30 SHDN Pin Current 30 CURRENT LIMIT (mA) 35 TJ = 25°C, unless otherwise noted. 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G27 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 VIN = –2V 0.1 VOUT = 0V 0 –75 –50 –25 RILIM = 13.3k RILIM = 20k RILIM = 40k 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G28 3091fa 8 For more information www.linear.com/LT3091 LT3091 Typical Performance Characteristics Programmable Brick-Wall Current Limit RILIM = 40k RILIM = 20k RILIM = 13.3k 1.0 CURRENT LIMIT (A) 0.8 0.6 0.4 1.8 90 1.6 80 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 Internal Current Limit 100 RSET = 25k VIN = –3V 0 0.5 1.0 OUTPUT CURRENT (A) 0 –75 –50 –25 1.5 1.0 0.8 0.6 60 50 40 30 20 VOUT = –2.5V ILOAD = 1.5A CSET = 0.1µF INPUT RIPPLE = 50mVRMS 10 VOUT = 0V –6 –18 –12 –24 –30 INPUT-TO-OUTPUT DIFFERENTIAL (V) 0 –36 10 100 1k 10k 100k FREQUENCY (Hz) 50 40 VOUT = –2.5V ILOAD = 1.5A CSET = 0.1µF INPUT RIPPLE = 50mVRMS 10 0 10 100 1k 10k 100k FREQUENCY (Hz) 60 50 40 30 0 10M 10M 3091 G35 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 3091 G34 RMS Output Noise 1000 90 85 80 75 1M VOUT = –2.5V VIN = –3.5V CSET = 0.1µF INPUT RIPPLE = 50mVRMS 20 95 RIPPLE REJECTION (dB) RIPPLE REJECTION (dB) 60 20 70 Ripple Rejection (120Hz) 70 30 1M 100 COUT = 10µF, CSET = 0.1µF COUT = 10µF, CSET = 0.47µF COUT = 22µF, CSET = 0.1µF 80 IL = 1.5A IL = 500mA IL = 100mA 80 3091 G33 Input Ripple Rejection 90 90 10 3091 G32 100 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G31 –3.5VIN –4VIN 70 0.4 0 VIN = –36V VOUT = 0V 0 –75 –50 –25 RIPPLE REJECTION (dB) 1.2 0 30 Input Ripple Rejection 80 RIPPLE REJECTION (dB) CURRENT LIMIT (A) 1.4 0.2 40 Input Ripple Rejection –55°C 25°C 125°C 150°C 1.6 50 3091 G30 Internal Current Limit 1.8 60 10 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G29 2.0 70 20 VIN = –1.9V VOUT = 0V 0.2 70 –75 –50 –25 VIN = –4V VOUT = –2.5V ILOAD = 1.5A CSET = 0.47µF COUT = 10µF 0 25 50 75 100 125 150 TEMPERATURE (°C) 3091 G36 OUTPUT NOISE (µVRMS) OUTPUT VOLTAGE (V) 1.2 Internal Current Limit 2.0 CURRENT LIMIT (mA) 1.4 TJ = 25°C, unless otherwise noted. 100 10 0.1 10 100 1 SET PIN CAPACITANCE (nF) 1000 3091 G7 3091fa For more information www.linear.com/LT3091 9 LT3091 Typical Performance Characteristics Output Noise: 10Hz to 100kHz TJ = 25°C, unless otherwise noted. Load Transient Response, –3VOUT Output Noise: 10Hz to 100kHz ILOAD 500mA/DIV VOUT 1mV/DIV VOUT 100µV/DIV ∆VOUT 100mV/DIV 1ms/DIV VIN: –3.5V COUT: 10µF, CSET: 20pF VOUT: –2V IL: 1.5A 1ms/DIV VIN: –3.5V COUT: 10µF, CSET: 0.1µF VOUT: –2.5V IL: 1.5A 3091 G38 20µs/DIV ILOAD: 20mA TO 1.5A COUT: 10µF, CSET: 0.1µF VOUT: –3V VIN = –4V, SHDN = IN 3091 G39 Slow Input Supply Ramp-Up and Ramp-Down Line Transient Response 0V VIN 500mV/DIV 3091 G40 Fast Input Supply Start-Up 0V VIN 2V/DIV VOUT 1V/DIV 0V VOUT 1V/DIV VIN 1V/DIV ∆VOUT 50mV/DIV 5µs/DIV VIN: –5V TO –4V COUT: 10µF, CSET: 0.1µF VOUT: –3V IL: 1.5A, SHDN = IN 50ms/DIV VIN: –5V TO 0V COUT: 10µF, CSET: 0.1µF VOUT: –3V TO 0V IL: 1.5A, SHDN = IN 3091 G41 20µs/DIV VIN: 0V TO –5V COUT: 10µF, CSET: 100pF VOUT: 0V TO –3V IL: 1.5A, SHDN = IN 3091 G42 Fast SHDN Start-Up Fast Input Supply Start-Up Fast SHDN Start-Up 0V 0V 0V VIN 2V/DIV VSHDN 2V/DIV VSHDN 2V/DIV 0V 0V 0V VOUT 1V/DIV VOUT 1V/DIV VOUT 1V/DIV 5ms/DIV VIN: 0V TO –5V COUT: 10µF, CSET: 0.1µF VOUT: 0V TO –3V IL: 1.5A, SHDN = IN 3091 G44 20µs/DIV VIN: –5V COUT: 10µF, CSET: 100pF 3091 G43 3091 G45 5ms/DIV VIN: –5V COUT: 10µF, CSET: 0.1µF 3091 G46 3091fa 10 For more information www.linear.com/LT3091 LT3091 Pin Functions (DFN/TSSOP/R/ T7) IN (Pins 1–4, Exposed Pad 15/Pins 1–4, Exposed Pad 17/ Pin 4, Tab/Pin 4, Tab): Input. These pins supply power to the regulator. The exposed backside pad of the DFN and TSSOP packages, as well as the tab of the DD-Pak and TO-220 packages, is an electrical connection to IN and the device’s substrate. For proper electrical and thermal performance, tie all IN pins together and tie IN to the exposed backside/tab of the package on the PCB. See the Applications Information section for thermal considerations and calculating junction temperature. The LT3091 requires a bypass capacitor at IN. In general, a battery’s output impedance rises with frequency, so include a bypass capacitor in battery powered applications. An input bypass capacitor in the range of 4.7µF to 10µF generally suffices, but applications with large load transients or longer input lines may require higher input capacitance to prevent input supply droop or input ringing. ILIM (Pin 5/Pin 5/Pin 1/Pin 1): Current Limit Programming Pin. Connecting an external resistor between the ILIM and IN pins programs the current limit set point. For best accuracy, Kelvin connect this resistor to the IN pins. The programming scale factor is nominally 20A • kΩ. Current limit is accurate to ±10% over temperature. If unused, tie ILIM to IN and the internal current limit protects the part. A parasitic substrate diode exists between the LT3091’s ILIM and IN pins. Therefore, do not drive ILIM more than 0.3V below IN during normal operation or during a fault condition. IMONP (Pin 6/Pin 6/NA/NA): Positive Current Monitoring Pin. For positive current monitoring, connect a resistor between IMONP and GND. IMONP sources current equal to 1/4000 of output current. For negative current monitoring, tie this pin to IN. For proper operation, IN and IMONP must be at least 2V below IMONN. If unused, tie IMONP to IN. A parasitic substrate diode exists between the LT3091’s IMONP and IN pins. Therefore, do not drive IMONP more than 0.3V below IN during normal operation or during a fault condition. IMONN (Pin 7/Pin 7/Pin 2/Pin 2): Negative Current Monitoring Pin. For negative current monitoring, connect a resistor between IMONN and GND. IMONN sinks current equal to 1/2000 of output current. For positive current monitoring, bias IMONN to a positive supply voltage (at least 2V above IMONP). If unused, tie IMONN to the GND pin. A parasitic substrate diode exists between the LT3091’s IMONN and IN pins. Therefore, do not drive IMONN more than 0.3V below IN during normal operation or during a fault condition. SHDN (Pin 8/Pin 10/Pin 3/Pin 3): Shutdown. Use the SHDN pin to put the LT3091 into a micropower shutdown state and to turn off the output voltage. The SHDN function is bidirectional, allowing either positive or negative logic to turn the regulator ON/OFF. The SHDN pin threshold voltages are referenced to GND. The output of the LT3091 is OFF if the SHDN pin is pulled within ±0.45V of GND. Driving the SHDN pin more than ±1.4V turns the LT3091 ON. Drive the SHDN pin with either a logic gate or with open collector/drain logic using a pull-up resistor. The resistor supplies the pull-up current of the open collector/drain gate. The maximum SHDN pin current is 7µA out of the pin (for negative logic) or 30µA into the pin (for positive logic). If the SHDN function is unused, connect the SHDN pin to VIN or a positive bias voltage to turn the device ON. Do not float the SHDN pin. As detailed in the Applications Information section, the SHDN pin can also be used to set a programmable undervoltage lockout (UVLO) threshold. A parasitic diode exists between the LT3091’s SHDN and IN pins. Therefore, do not drive SHDN more than 0.3V below IN during normal operation or during a fault condition. SET (Pin 9/Pin 11/Pin 5/Pin 5): SET. This pin is the inverting input to the error amplifier and the regulation setpoint for the device. A precision fixed current of 50µA flows into this pin. Connecting a resistor from SET to GND programs the LT3091’s output voltage. Output voltage range is from 3091fa For more information www.linear.com/LT3091 11 LT3091 Pin Functions (DFN/TSSOP/R/ T7) zero to –32V. Adding a bypass capacitor from SET to GND improves transient response, PSRR, noise performance and soft starts the output. Kelvin connect the GND side of the SET pin resistor to the load for optimum load regulation performance. A parasitic substrate diode exists between the LT3091’s SET and IN pins. Therefore, do not drive SET more than 0.3V below IN during normal operation or during a fault condition. GND (Pin 10/Pin 12/Pin 6/Pin 6): Ground. This pin supplies the LT3091's quiescent current and the drive current to the NPN pass transistor. The LT3091's GND pin is highly versatile. Depending on application’s requirements, it can be tied to the system ground, a positive voltage, or the OUT pin. A parasitic substrate diode exists between the LT3091’s GND and IN pins. Therefore, do not drive GND more than 0.3V below IN during normal operation or during a fault condition. OUT (Pins 11–14/Pins 13–16/Pin 7/Pin 7): Output. These pins supply power to the load. Tie all OUT pins together for best performance. Use a minimum output capacitor of 10µF with an ESR less than 500mΩ to prevent oscillations. As mentioned in the Electrical Characteristics table, a minimum load current of 20µA is required to prevent instability. Large load transient applications require larger output capacitors to limit peak voltage transients. See the Applications Information section for more information on output capacitance. A parasitic substrate diode exists between OUT and IN pins of the LT3091. Therefore, do not drive OUT more than 0.3V below IN during normal operation or during a fault condition. NC (NA/Pins 8–9/NA/NA): No Connection. No connect pins have no connection to internal circuitry and may be tied to VIN, GND or floated. 3091fa 12 For more information www.linear.com/LT3091 LT3091 Block Diagram COUT RSET SET RLOAD OUT SHDN GND 1.23V IMONN – + BIAS – –1.27V + BIDIRECTIONAL SHUTDOWN 20.25µA – – + 0.0675Ω 6.33k + RAIL-TO-RAIL ERROR AMP 50µA 2x INTERNAL CURRENT LIMIT 1x + + V 225mV + DRIVER – – + – – 3k 135Ω PROGRAMMABLE CURRENT LIMIT IN ILIM POSITIVE OR NEGATIVE CURRENT MONITOR IMONP RILIM CIN IN 3091 BD 3091fa For more information www.linear.com/LT3091 13 LT3091 Applications Information The LT3091 is a 1.5A, rail-to-rail output, negative low dropout linear regulator featuring very low output noise, high bandwidth, precision programmable current limit, precision positive or negative current monitor, and bidirectional shutdown. The LT3091 supplies 1.5A at a typical dropout voltage of 300mV. Unlike other devices, the LT3091 does not require a separate supply to achieve low dropout performance. The 1.2mA quiescent current drops to well below 1µA in shutdown. The LT3091 is easy to use and incorporates all of the protection features expected in high performance regulators. Included are short circuit protection, safe operating area protection, as well as thermal shutdown with hysteresis. In bipolar supply applications where the regulator’s load is returned to a positive supply, OUT can be pulled above GND up to 36V and still allow the LT3091 to safely startup. Output Voltage The LT3091 incorporates a zero TC 50µA reference current source that flows into the SET pin. The SET pin is the inverting input of the error amp. Connecting a resistor from SET to ground generates a voltage that becomes the reference point for the error amplifier (see Figure 1). The reference voltage is a straight multiplication of the SET pin current and the resistor value (Ohm’s Law, V = I • R). The rail-to-rail error amp’s unity gain configuration produces a low impedance voltage on its noninverting input, i.e. the OUT pin. Output voltage is programmable from 0V (using zero Ω resistor) to VIN plus dropout. Table 1 lists many common output voltages and its corresponding 1% RSET resistance. The benefits of using a current reference, as opposed to a voltage reference as in conventional regulators such as the LT1185, LT1175, LT1964 and LT3015, is that the device always operates in a unity gain configuration, regardless of the programmed output voltage. This allows the LT3091 to have loop gain, frequency response, and bandwidth independent of the output voltage. Moreover, none of the error amp gain is needed to amplify the set pin voltage to a higher output voltage (in magnitude). As a result, output load regulation is specified in terms of millivolts and not a fixed percentage of the output voltage. Since the zero TC current source is very accurate, the SET pin resistor is the limiting factor in achieving high accuracy; hence, it must be a precision resistor. Moreover, any leakage paths to and from the SET pin create errors in the output voltage. If necessary, use high quality insulation (e.g. Teflon, Kel-F); moreover, cleaning of all insulating surfaces to remove fluxes and other residues may be required. High humidity environments may require a surface coating at the SET pin to provide a moisture barrier. Minimize board leakage by encircling the SET pin with a guard ring operated at a potential close to itself – ideally the guard ring should be tied to the OUT pin. Guarding both sides of the circuit board is required. Bulk leakage 0.1µF RSET 49.9k SET RSET (kΩ) –2.5 49.9 –3 60.4 –3.3 66.5 –5 100 –12 243 –15 301 GND VOUT –2.5V MAX IOUT 1.5A IMONN OUT + Table 1. 1% Resistor for Common Output Voltages VOUT (V) COUT 10µF – CIN 10µF LT3091 50µA IN VIN –3V TO –10V SHDN IMONP ILIM 3091 F01 RILIM 5k Figure 1. Basic Adjustable Regulator 3091fa 14 For more information www.linear.com/LT3091 LT3091 Applications Information reduction depends on the guard ring width. Leakages as small as 50nA into or out of the SET pin creates a 0.1% error in the reference voltage. Leakages of this magnitude, coupled with other sources of leakage, can cause significant errors in the output voltage, especially over wide operating temperature range. Figure 2 illustrates a typical guard ring layout technique. If guard ring techniques are used, then SET pin stray capacitance is practically eliminated. Since the SET pin is a high impedance node, unwanted signals may couple into the SET pin and cause erratic behavior. This is most noticeable when operating with a minimum output capacitor at light load currents. The simplest remedy is to bypass the SET pin with a small capacitance to ground – 100pF is generally sufficient. 1 14 2 13 3 4 5 15 IN 12 OUT 11 10 6 9 7 8 SET 3091 F02 Figure 2. Guard Ring Layout for DFN Stability and Input Capacitance The LT3091 is stable with a minimum of 10µF capacitor placed at the IN pin. Low ESR ceramic capacitors can be used. However, in cases where long wires connect the power supply to the LT3091’s input and ground, the use of low value input capacitors combined with a large output load current may result in instability. The resonant LC tank circuit formed by the wire inductance and the input capacitor is the cause and not because of LT3091 instability. The self inductance, or isolated inductance, of a wire is directly proportional to its length. However, the wire diameter has less influence on its self inductance. For example, the self inductance of a 2-AWG isolated wire with a diameter of 0.26" is about half the inductance of a 30-AWG wire with a diameter of 0.01". One foot of 30-AWG wire has 465nH of self inductance. Several methods exist to reduce a wire’s self inductance. One method divides the current flowing towards the LT3091 between two parallel conductors. In this case, placing the wires further apart reduces the inductance; up to a 50% reduction when placed only a few inches apart. Splitting the wires connects two equal inductors in parallel. However, when placed in close proximity to each other, mutual inductance adds to the overall self inductance of the wires. The second and most effective technique to reduce overall inductance is to place the forward and return current conductors (the input wire and the ground wire) in close proximity. Two 30-AWG wires separated by 0.02" reduce the overall self inductance to about one-fifth of a single wire. If a battery, mounted in close proximity, powers the LT3091, a 10µF input capacitor suffices for stability. However, if a distantly located supply powers the LT3091, use a larger value input capacitor. Use a rough guideline of 1µF (in addition to the 10µF minimum) per 8" of wire length. The minimum input capacitance needed to stabilize the application also varies with power supply output impedance variations. Placing additional capacitance on the LT3091’s output also helps. However, this requires an order of magnitude more capacitance in comparison with additional LT3091 input bypassing. Series resistance between the supply and the LT3091 input also helps stabilize the application; as little as 0.1Ω to 0.5Ω suffices. This impedance dampens the LC tank circuit at the expense of dropout voltage. A better alternative is to use higher ESR tantalum or electrolytic capacitors at the LT3091 input in place of ceramic capacitors. Stability and Output Capacitance The LT3091 requires an output capacitor for stability. It is stable with low ESR capacitors (such as ceramic, tantalum or low ESR electrolytic). A minimum output capacitor of 10µF with an ESR of 500mΩ or less is recommended to prevent oscillations. Larger values of output capacitance 3091fa For more information www.linear.com/LT3091 15 LT3091 Applications Information decrease peak output deviations during a load transient. The LT3091 requires a minimum 20µA load current to maintain stability under all operating conditions. Give extra consideration to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics used are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are good for providing high capacitance in small packages, but they have strong voltage and temperature coefficients as shown in Figures 3 and 4. When used with a 5V regulator, a 16V 10µF Y5V capacitor can exhibit an effective value as low as 1µF to 2µF for the DC bias voltage applied over the operating temperature range. 20 BOTH CAPACITORS ARE 16V 1210 CASE SIZE, 10µF CHANGE IN VALUE (%) 0 X5R –20 –40 –60 Y5V 0 2 4 8 6 10 12 DC BIAS VOLTAGE (V) 14 16 3091 F03 Figure 3. Ceramic Capacitor DC Bias Characteristics 40 BOTH CAPACITORS ARE 16V 1210 CASE SIZE, 10µF CHANGE IN VALUE (%) 20 X5R 0 –20 –40 Y5V –60 –80 –100 –50 –25 Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates a voltage across its terminals due to mechanical stress upon it, similar to how a piezoelectric microphone works. For a ceramic capacitor the stress can be induced by mechanical vibrations within the system or due to thermal transients. Output Noise Analysis –80 –100 The X5R and X7R dielectrics result in more stable characteristics, and are thus more suitable for use as the regulator’s output capacitor. The X7R dielectric has better stability across temperature, while X5R is less expensive and is available in higher values. Nonetheless, care must still be exercised when using X5R and X7R capacitors. The X5R and X7R codes only specify operating temperature range and the maximum capacitance change over temperature. While capacitance change due to DC bias for X5R and X7R is better than Y5V and Z5U dielectrics, it can still be significant enough to drop capacitance below sufficient levels. Capacitor DC bias characteristics tend to improve as component case size increases, but verification of expected capacitance at the operating voltage is highly recommended. 50 25 75 0 TEMPERATURE (°C) 100 125 3091 F04 Figure 4. Ceramic Capacitor Temperature Characteristics The LT3091 offers many advantages with respect to noise performance. Traditional linear regulators have several sources of noise. The most critical noise sources for an LDO are its voltage reference, the error amplifier, the noise of the resistors in the divider network setting output voltage and the noise gain created by this resistor divider. Many low noise regulators pin out the voltage reference to allow for bypassing and noise reduction of the reference. Unlike other linear regulators, the LT3091 does not use a traditional voltage reference, but instead it uses a 50µA current source reference. That current operates with typical noise current levels of 31.6pA/√Hz (10nARMS over a 10Hz to 100kHz bandwidth). The voltage noise equals the noise current multiplied by the resistor value. The resistor itself generates spot noise equal to √4kTR (whereby k = Boltzmann’s constant, 1.38 • 10–23 J/K and T is the absolute temperature) which is RMS summed with the reference current noise. 3091fa 16 For more information www.linear.com/LT3091 LT3091 Applications Information One problem that conventional linear regulators face is that the resistor divider setting VOUT gains up the reference noise. In contrast, the LT3091’s unity gain follower architecture presents no gain from the SET pin to the output. Therefore, output noise is virtually independent of the output voltage setting if a capacitor bypasses the SET pin. Resultant output noise is then set by the error amplifier’s noise, typically 57nV/√Hz (18µVRMS in a 10Hz to 100kHz bandwidth). Curves in the Typical Performance Characteristics section show noise spectral density and peak-to-peak noise characteristics for both the reference current and the error amplifier over a 10Hz to 100kHz bandwidth. Set Pin (Bypass) Capacitance: Output Noise, PSRR, Transient Response and Soft-Start Bypassing the SET pin’s voltage setting resistor with a capacitor lowers output noise. The Typical Performance Characteristics section illustrates that connecting a 0.1µF from SET to GND yields output noise as low as 18µVRMS. Paralleling multiple LT3091s further reduces noise by √N, for N parallel regulators. Curves in the Typical Performance Characteristics section show noise spectral density and peak-to-peak noise characteristics for the error amplifier for different values of bypass capacitance. Use of a SET pin bypass capacitor also improves PSRR and transient response performance. It is important to note that any bypass capacitor leakage deteriorates the LT3091’s DC regulation. Capacitor leakage of even 50nA is a 0.1% DC error. Therefore, LTC recommends the use of a good quality low leakage capacitor. voltage reference to the SET pin removes any errors in output voltage due to the reference current and resistor tolerances. Shutdown/UVLO The SHDN pin is used to put the LT3091 into a micropower shutdown state. The LT3091 has an accurate –1.27V turn-ON threshold on the SHDN pin. This threshold can be used in conjunction with a resistor divider from the input supply to define an accurate undervoltage lockout (UVLO) threshold for the regulator. The SHDN pin current (at the threshold) needs to be considered when determining the resistor divider network. See the Typical Performance curves for SHDN pin current vs SHDN pin voltage. Moreover, since the SHDN pin is bidirectional, it can be taken beyond ±1.4V to turn-ON the LT3091. In bipolar supply applications, the positive SHDN threshold can be used to sequence the turn-ON of the LT3091 after the positive regulator has turned on. Current Monitoring (IMONN and IMONP) The LT3091 incorporates a precision positive or negative current monitor. As illustrated in the Block Diagram, the negative current monitor pin (IMONN) sinks current proportional (1:2000) to the output current while the positive current monitor pin (IMONP) sources current proportional (1:4000) to the output current. For proper operation, ensure IMONN is at least 2V above IN and IMONP. As highlighted in Figure 5, for a negative current monitor application, tie IMONP to IN and tie IMONN through a The final benefit of using a SET pin bypass capacitor is that it soft starts the output and limits inrush current. The R-C time constant, formed by the SET pin resistor and capacitor, controls soft-start time. Ramp-up rate from 0 to 90% of nominal VOUT is: 0.1µF 49.9k 10µF 1mV PER mA SET GND IMONN OUT LT3091 tSS ≈ 2.3 • RSET • CSET For applications requiring higher accuracy or an adjustable output voltage, the SET pin may be actively driven by an external voltage source capable of sourcing 50µA – the application limitations are the creativity and ingenuity of the circuit designer. For instance, connecting a precision 2k IOUT 10µF VIN –3V TO –10V VOUT: –2.5 MAX IOUT: 1.5A 4000 IN SHDN IMONP ILIM 3091 F05 5k Figure 5: Negative Output Current Monitor 3091fa For more information www.linear.com/LT3091 17 LT3091 Applications Information resistor to GND – this generates a negative voltage (proportional to output current) on IMONN. Furthermore, as illustrated in Figure 6, the negative current monitor pin can also be used for cable drop compensation. Cable drop compensation corrects for load dependent voltage drop caused by a resistive connection between the LT3091’s OUT pin and its load. RCBL2 10µF RCDC = RCBL • 2K 0.1µF LOAD RSET IMONN GND OUT SET RCBL = RCBL1 + RCBL2 + – 10µF RCBL1 LT3091 50µA ILIM IMONP SHDN 3091 F06 5k Figure 6. Simple Cable Drop Compensation For a positive current monitor application, as illustrated in Figure 7, tie IMONP through a resistor to GND—this generates a positive voltage (proportional to output current) on IMONP. And tie IMONN to a supply at least 2V above the maximum operating IMONP voltage. 0.1µF 49.9k 0.1µF 10µF ≥3.3V SET GND LT3091 IOUT 10µF VIN –3V TO –10V IN SHDN 5k IMONN OUT VOUT: –2.5V MAX IOUT: 1.5A IMONP 4000 ILIM 1mV PER mA 4k 3091 F07 Figure 7. Positive Output Current Monitor When unused, IMONN and IMONP pins can be left floating; however, this slightly reduces (~5%) the device’s internal current limit. Hence, if the current monitor functionality is not used, as shown in Figure 1, it is recommended to tie IMONN to GND and IMONP to IN. 18 Externally Programmable Current Limit The ILIM pin internally regulates to 225mV above IN. Connecting a resistor from ILIM to IN sets the current flowing out of the ILIM pin, which in turn programs the LT3091’s current limit. The programming scale factor is 20kΩ • A. For example, a 40k resistor between ILIM and IN programs current limit to 500mA. For good accuracy, Kelvin connect this resistor to the LT3091’s IN pin. In cases where the OUT-to-IN differential is greater than 7V, the LT3091’s foldback circuitry decreases the internal current limit. Therefore, internal current limit may override the externally programmed current limit level to keep the LT3091 within its Safe-Operating-Area (SOA). See the Internal Current Limit vs Input-to-Output differential graph in the Typical Performance Characteristics section. IN VIN ≤–6V The LT3091’s positive or negative current monitor circuitry remains accurate even under short circuit or dropout conditions. ILIM can be tied to IN if external programmable current limit is not needed. However, because the ILIM pin is internally regulated to 225mV above IN, if ILIM pin is shorted to IN, then this loop current limits, causing the LT3091’s quiescent current to increase by about 300µA. Hence, when unused, it is recommended to tie ILIM to IN through a 5k resistor. Load Regulation The LT3091 does not have a separate Kelvin connection for sensing output voltage. Therefore, it is not possible to provide true remote load sensing. The connectivity resistance between the regulator and the load limits load regulation. The data sheet specification for load regulation is Kelvin sensed at the OUT pin of the package. GND side Kelvin sensing is a true Kelvin connection, with the top of the voltage setting resistor returned to the positive side of the load (see Figure 8). Connected as shown, system load regulation is the sum of the LT3091 load regulation and the parasitic line resistance multiplied by the output current. It is therefore important to keep the negative connection between the regulator and the load as short as possible and to use wide wires or PC board traces. For more information www.linear.com/LT3091 3091fa LT3091 Applications Information PARASITIC RESISTANCE RP SET RP IMONN GND OUT COUT 10µF + – CIN 10µF VIN –3V TO –10V LOAD RP RSET 49.9k VOUT –2.5V MAX IOUT 1.5A LT3091 50µA IN ILIM IMONP SHDN 3091 F08 RILIM 5k Figure 8. Connections for Best Load Regulation Floating 3-Terminal Regulator The LT3091’s rail-to-rail error amp allows the LDO to be configured as a floating three-terminal regulator. With proper protection, the LT3091 can be used in arbitrarily high voltage applications. Figure 9 illustrates this configuration. In this mode, the GND pin current is supplied by the load; hence, a minimum 2mA load current is required to maintain regulation. If true zero output voltage operation is required, return the 2mA load current to a positive supply. Note that in three terminal operation, the minimum input voltage is now the device’s dropout voltage. Furthermore, the ILIM pin is internally regulated to 225mV above IN. This servo loop will current limit if ILIM is shorted to IN, thereby causing LT3091’s quiescent current to increase by about 300µA. Hence, when unused, it is recommended to tie ILIM to IN through a 5k resistor. 0.1µF COUT 15µF RSET 301k GND SET VOUT –15V MAX IOUT 1.5A IMONN OUT + – CIN 10µF VIN –17V TO –22V It is important to note that in a floating configuration and with slow VIN ramp-up and ramp-down (as shown in Figures 10 and 11), the LT3091 may exhibit oscillations during start-up if SHDN is tied to VIN. This occurs because the SHDN comparator’s turn-ON and turn-OFF thresholds are referenced to the LT3091’s GND pin . Since, in floating configuration, the GND pin of the LT3091 is tied to the OUT pin, which is slowly increasing as VIN is ramping up, the reference point for the SHDN comparator is changing; hence, it causes start-up oscillations. This oscillation can be minimized by placing at least 0.1µF and 47µF capacitor at the SET and OUT pins, respectively—although it won’t be eliminated, as per Figures 10 and 11 below. For fast VIN ramp-up and ramp-down, the LT3091 does not oscillate. If however, the SHDN pin is tied to a positive supply, 1.3V and above (as shown in Figure 12), then there are no start-up oscillations and a 10µF minimum output capacitor can be used—but having some SET pin capacitance is still recommended. In addition to tying the GND pin to the OUT pin (for floating configuration), the GND pin of LT3091 can also be tied to a positive voltage as shown in the next section. VOUT 1V/DIV VIN 2V/DIV 10ms/DIV VIN: 0V TO –5V COUT: 15µF, CSET: 0.1µF VOUT: 0V TO –3V IL: 1.5A, SHDN = IN 3091F10 Figure 10. Floating Mode: Input Supply Ramp-Up VOUT 1V/DIV VIN 2V/DIV LT3091 50µA IN SHDN IMONP ILIM 1ms/DIV VIN: –5V TO 0V COUT: 15µF, CSET: 0.1µF VOUT: –3V TO 0V IL: 1.5A, SHDN = IN 3091 F09 RILIM 5k Figure 9. Floating 3-Terminal Adjustable Regulator 3091 F11 Figure 11. Floating Mode: Input Supply Ramp-Down 3091fa For more information www.linear.com/LT3091 19 LT3091 Applications Information set below the LT3091’s –1.9V minimum input voltage. As long as there is 1.9V between IN and GND pins of LT3091, the minimum operating voltage is satisfied. Now it can operate with much lower dropout voltage, with the device dropout set by the pass device as illustrated in Figure 14. VOUT 1V/DIV VIN 2V/DIV 50ms/DIV VIN: –5V TO 0V COUT: 15µF, CSET: 0.1µF VOUT: –3V TO 0V IL: 1.5A, VSHDN = 1.5V 3091 F12 0.1µF Figure 12. Floating Mode: Input Supply Ramp-Up and Down Using Positive SHDN Bias Voltage RSET 4.02k COUT 10µF 0.47µF +1.2V OR HIGHER SET GND VOUT –0.2V MAX IOUT 1.5A IMONN OUT + GND Pin Versatility of LT3091 – For applications requiring very low output voltages such as below –1V, the minimum input voltage of –1.9V limits how low VIN can drop before the device stops regulating. As shown in Figure 13, this results in a much higher dropout voltage set by the minimum VIN specification rather than the actual dropout of the NPN pass device. 0.1µF RSET 4.02k COUT 10µF SET GND VOUT –0.2V MAX IOUT 1.5A IMONN OUT + – CIN 10µF VIN –1.9V TO –7V CIN 10µF VIN –0.7V TO –7V LT3091 50µA IN IMONP SHDN ILIM 3091 F14 RILIM 5k Figure 14. Low Dropout Operation for Very Low Output Voltages Note that if the LT3091’s SHDN capability is not desired, then tie the SHDN pin to VIN. However, if it is desired to turn the device ON and OFF, then the SHDN logic signal needs to be referenced to the LT3091’s GND pin. A simple way to achieve this is shown Figure 15, but the GND pin needs to be at least +1.4V. LT3091 50µA IN 0.1µF SHDN IMONP ILIM RSET 4.02k COUT 10µF 0.47µF +1.4V OR HIGHER 3091 F13 100k RILIM SET 5k GND SHDN Figure 13. Generating Very Low Output Voltages A solution to this problem is available from the LT3091 architecture and the flexibility in how its GND pin can be connected. The GND pin does not need to be connected to system ground! It can be connected to a positive voltage as well. If the GND pin of LT3091 is tied to a positive voltage that is at least 1.9V above VIN, then VIN can be OUT + SHDN (ACTIVE LOW) VIN –0.7V TO –7V VOUT –0.2V MAX IOUT 1.5A IMONN – CIN 10µF LT3091 50µA IN IMONP ILIM 3091 F15 RILIM 5k Figure 15. GND Pin Referenced SHDN Signal 3091fa 20 For more information www.linear.com/LT3091 LT3091 Applications Information In summary, the GND pin of LT3091 is highly versatile and can be tied to different places depending on the application’s requirements: a) It can be tied to the system GND for low dropout operation for output voltages greater than –1.6V, b) it can be tied to a positive voltage for low dropout operation for very low output voltages, and c) as illustrated in the Floating 3-Terminal Regulator section, the GND pin can be tied to the OUT pin for very high common mode voltage applications. Direct Paralleling 0.1µF 24.9k 22µF GND SET + – VIN –3V TO –10V IN GND 20mil WIDTH* 27.1 2 27.1 13.6 SET Finally, note that more than two LT3091s can be paralleled for higher output current. Paralleling multiple LT3091s is a useful technique for distributing heat on the PCB. For applications with high input-to-output voltage differential, either input series resistors or resistors in parallel with the LT3091s further spread heat. IMONN 10mΩ + LT3091 50µA IN SHDN IMONP ILIM 3091 F16 5k *Trace resistance is measured in mΩ/in The small worst-case offset of ±2mV for each paralleled LT3091 minimizes the value of required ballast resistance. Figure 16 illustrates that two LT3091s, each using a 10mΩ PCB trace ballast resistor, provide better than 80% output current sharing at full load. The 10mΩ external resistances (5mΩ for the two devices in parallel) only adds 15mV of output regulation drop with a 3A maximum load. With an output voltage as low as –1.5V, this only adds 1% to the regulation accuracy. If this additional load regulation error is intolerable, circuits shown in the Typical Applications section highlight how to correct this error using the output current monitor function or a master-slave configuration. VOUT –2.5V MAX IOUT 3A ILIM OUT – 54.3 IMONP 5k Table 2. PC Board Trace Resistance 10mil WIDTH* LT3091 50µA 22µF Higher output current is obtained by paralleling multiple LT3091s. Tie all SET pins together and all IN pins together. Connect the OUT pins together using small pieces of PC trace (used as a ballast resistor) to equalize the currents in each LT3091. PC trace resistance in mΩ/inch is shown in Table 2. Ballasting requires only a tiny area. 1 10mΩ OUT SHDN WEIGHT (oz) IMONN Figure 16. Parallel Devices Thermal Considerations The LT3091 has internal power and thermal limiting circuitry designed to protect it under overload conditions. The typical thermal shutdown temperature is 165°C with about 8°C of hysteresis. For continuous normal load conditions, do not exceed the maximum junction temperature. It is important to consider all sources of thermal resistance from junction to ambient. This includes junction-to-case, case-to-heat sink interface, heat sink resistance or circuit board-to-ambient as the application dictates. Additionally, consider all heat sources in close proximity to the LT3091. The undersides of the DFN and TSSOP packages have exposed metal from the lead frame to the die attachment. Both packages allow heat to directly transfer from the die junction to the PCB metal to limit the maximum operating 3091fa For more information www.linear.com/LT3091 21 LT3091 Applications Information junction temperature. The dual-in-line pin arrangement allows metal to extend beyond the ends of the package on the topside (component side) of the PCB. Connect this metal to IN on the PCB. The multiple IN and OUT pins of the LT3091 further assist in spreading heat to the PCB. For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PCB and its copper traces. Copper board stiffeners and plated throughholes can also be used to spread the heat generated by power devices. Table 3. Measured Thermal Resistance for DFN Package COPPER AREA BOARD AREA THERMAL RESISTANCE 2500mm2 2500mm2 21°C/W 1000mm2 2500mm2 2500mm2 24°C/W 225mm2 2500mm2 2500mm2 28°C/W 100mm2 2500mm2 2500mm2 32°C/W Top Side* Bottom Side 2500mm2 *Device is mounted on topside Calculating Junction Temperature Example: Given an output voltage of –2.5V and input voltage of –3.3V ± 5%, output current range from 1mA to 1A, and a maximum ambient temperature of 85°C, what is the maximum junction temperature? The LT3091’s power dissipation is: Table 4. Measured Thermal Resistance for TSSOP Package COPPER AREA Tables 3 to 5 list thermal resistance as a function of copper area in a fixed board size. All measurements were taken in still air on a 4 layer FR-4 board with 1oz solid internal planes and 2oz top/bottom external trace planes with a total board thickness of 1.6mm. The four layers were electrically isolated with no thermal vias present. PCB layers, copper weight, board layout and thermal vias affect the resultant thermal resistance. For more information on thermal resistance and high thermal conductivity test boards, refer to JEDEC standard JESD51, notably JESD51-7 and JESD51-12. Achieving low thermal resistance necessitates attentions to detail and careful PCB layout. BOARD AREA THERMAL RESISTANCE IOUT(MAX) • (VIN(MAX) – VOUT) + IGND • VIN(MAX) where: Top Side* Bottom Side 2500mm2 2500mm2 2500mm2 20°C/W 1000mm2 2500mm2 2500mm2 IOUT(MAX) = –1A 23°C/W 225mm2 2500mm2 2500mm2 26°C/W VIN(MAX) = –3.465V 100mm2 2500mm2 2500mm2 30°C/W IGND (at IOUT = –1A and VIN = –3.465V) = –15mA *Device is mounted on topside Thus: Table 5. R Package, 7-Lead DD-Pak Package P = (–1A) • (–3.465V + 2.5V) + (–15mA) • (– 3.465V) = 1.02W COPPER AREA BOARD AREA THERMAL RESISTANCE (JUNCTION-TOAMBIENT) Top Side* Bottom Side 2500mm2 2500mm2 2500mm2 13°C/W 1000mm2 2500mm2 2500mm2 14°C/W 225mm2 2500mm2 2500mm2 16°C/W *Device is mounted on topside T7 Package, 7-Lead TO-220 Thermal Resistance (Junction-to-Case) = 3°C/W Using a DFN package, the thermal resistance is in the range of 21°C/W to 32°C/W depending on the copper area. Therefore, the junction temperature rise above ambient approximately equals: 1.02W •27°C/W = 27.5°C The maximum junction temperature equals the maximum ambient temperature plus the maximum junction temperature rise above ambient: TJMAX = 85°C + 27.5°C = 112.5°C 3091fa 22 For more information www.linear.com/LT3091 LT3091 Applications Information Overload Recovery Like many monolithic power regulators, the LT3091 incorporates safe-operating-area (SOA) protection. The SOA protection activates at output-to-input differential voltage greater than 7V. The SOA protection decreases current limit as the output-to-input differential increases and keeps the power transistor inside a safe operating region for all values of output-to-input voltage up to the LT3091’s Absolute Maximum Ratings. The LT3091 provides some level of output current for all values of output-to-input differential. Refer to the Current Limit curve in the Typical Performance Characteristics section. When power is first applied and input voltage rises, the output follows the input and keeps the output-to-input differential low to allow the regulator to supply large output current and startup into high current loads. Due to current limit fold back, however, at high input voltages, a problem can occur if the output voltage is low and the load current is high. Such situations occur after the removal of a short-circuit or if the shutdown pin is pulled high after the input voltage has already turn ON. The load line for such a load intersects the output current curve at two points. If this happens, the regulator has two stable output operating points. With this double intersection, the input power supply may need to be cycled down to zero and brought back up again to make the output recover. Other LTC negative linear regulators such as the LT3015, LT1964, and LT1175 also exhibit this phenomenon, so it is not unique to the LT3091. Protection Features The LT3091 incorporates several protection features that make it ideal for use in battery-powered applications. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device also protects itself against reverse output voltages. Precision current limit and thermal overload protection protect the LT3091 against overload and fault conditions at the device’s output. For normal operation, do not allow the junction temperature to exceed 125°C for E- and I-grades and 150°C for H- and MP-grades. Pulling the LT3091’s output above ground induces no damage to the part. If IN is left open circuited or grounded, OUT can be pulled 36V above GND. In this condition, a maximum current of 7mA flows into the OUT pin and out of the GND pin. If IN is powered by a voltage source, OUT sinks the LT3091’s (fold back) short-circuit current and protects itself by thermal limiting. In this case, however, grounding the SHDN pin turns off the device and stops OUT from sinking the short-circuit current. 3091fa For more information www.linear.com/LT3091 23 LT3091 Typical Applications Parallel Devices 0.1µF LT3091 24.9k 1% 22µF GND SET IMONN OUT 10mΩ + – 22µF VIN –3V TO –10V 50µA IN IMONP SHDN VOUT –2.5V MAX IOUT 3A ILIM 5k GND LT3091 SET IMONN OUT 10mΩ + – 50µA IN SHDN IMONP ILIM 3091 TA02 5k 3091fa 24 For more information www.linear.com/LT3091 LT3091 Typical Applications Paralleling Devices Using IMONN to Cancel Ballast Resistor Drop RCOMP 10 CSET 0.1µF RCOMP = 2K • RBLST/N 24.9k 1% 22µF GND SET LT3091 RBLST 10mΩ IMONN OUT + – 50µA 22µF VOUT = N • 50µA(RSET + RCOMP) N = NUMBER OF LT3091s IN PARALLEL IN VIN –3V TO –10V IMONP SHDN VOUT –2.5V MAX IOUT 3A ILIM 5k GND LT3091 SET IMONN OUT RBLST 10mΩ + – 50µA IN SHDN IMONP ILIM 3091 TA03 5k Load Sharing without Ballasting (Using IMONP) Master Regulator 0.1µF LT3091 Slave Regulator 49.9k 1% 49.9k 1% 22µF SET GND IMONN IMONN OUT OUT VOUT: –2.5V MAX IOUT: 3A + 22µF SET LT3091 + – VIN –3V TO –10V GND 0.1µF – 50µA 50µA IN IN SHDN ILIM IMONP IMONP 5k SHDN ILIM 5k 3091 TA04 2N3904 2N3904 300Ω 300Ω 3091fa For more information www.linear.com/LT3091 25 LT3091 Typical Applications Paralleling Devices without Ballasting (50mA Minimum Load) 0.1µF LT3091 Master Regulator 49.9k 1% SET GND VOUT –2.5V IOUT 3A IMONN OUT 20Ω Slave Regulator 22µF + 20mΩ OUT – 50µA 22µF VIN –3V TO –10V IMONN GND SET + LT3091 IN – ILIM IMONP SHDN 5k 50µA IN ILIM IMONP SHDN 5k 3091 TA05 Using Lower Value RSET for Higher Output Voltages COUT 10µF RSET 0.1µF 523Ω 1% 10k 1% LT3091 SET GND IMONN OUT VOUT = –0.5V – 1mA • RSET MAX IOUT: 1.5A + – CIN 10µF VIN 50µA IN SHDN IMONP 5k ILIM 3091 TA06 3091fa 26 For more information www.linear.com/LT3091 LT3091 Typical Applications Constant-Current Constant-Voltage Lab Power Supply 0.1µF RSET LT3091 SET 10µF GND IMONN OUT VOUT + – 50µA 10µF IN VIN IMONP SHDN ILIM RILIM 3091 TA07 Low Dropout Operation for Very Low Output Voltages 0.1µF 4.02k 1% LT3091 SET CGND 0.47µF +1.2V OR HIGHER GND COUT 10µF IMONN OUT VOUT: –0.2V MAX IOUT: 1.5A + – CIN 10µF VIN –0.7V TO –7V 50µA IN SHDN IMONP ILIM 5k 3091 TA08 3091fa For more information www.linear.com/LT3091 27 LT3091 Typical Applications Input Supply Tracking VIN 0.1µF 100k 1% LT3091 SET 10µF 10µF GND VOUT = VIN – 5V MAX IOUT 1.5A IMONN OUT + – 50µA IN IMONP SHDN ILIM 3091 TA09 5k Floating 3-Terminal Regulator (for Arbitrarily High Voltage Applications) 0.1µF LT3091 1M 1% 10µF SET 36V GND IMONN OUT + – 10µF VIN –52V TO –57V VOUT –50V MAX IOUT 1.5A 36V 50µA IN SHDN IMONP ILIM 5k 3091 TA10 3091fa 28 For more information www.linear.com/LT3091 LT3091 Typical Applications 500mA LED Driver with Grounded LED Tab (Heatsink) 500mA 4.02k SET LT3091 GND 500mA LED Driver with Positive Supply VIN 400mΩ IMONN OUT SET LT3091 + 10µF 10µF 400mΩ IMONN OUT 10µF – 50µA 50µA IN IN VIN GND + – 10µF 500mA 4.02k IMONP SHDN ILIM ILIM IMONP SHDN 3091 TA11 3091 TA12 5k 5k Low Noise Single Inductor Positive-to-Negative Converter C2 1µF L1 3.3µH 0.1µF 49.9k 1% LT3091 SET 10µF 1206 • • VIN 12V VOUT –5V 1.5A L2 3.3µH D1 SW1 SW2 VIN C1 22µF 100k 124k LT3581 FB SHDN GATE FAULT CLKOUT RT VC SYNC SS GND C3 22µF 0.1µF VOUT2 –2.5V MAX IOUT 1.5A IMONN OUT + 60.4k 56pF GND 6.8k – 10µF 1206 50µA IN 3.3nF SHDN IMONP ILIM 3091 TA13 5k C1: 22µF, 25V, X7R, 1210 C2: 1µF, 50V, X7R, 1206 C3: 22µF, 16V, X7R, 1210 D1: CENTRAL CMSH3-40FL L1, L2: COILCRAFT MSD7342-332MLB 3091fa For more information www.linear.com/LT3091 29 LT3091 Typical Applications High Efficiency Low Noise Single Inductor Positive-to-Negative Converter with LDO Input-to-Output Control VIN 12V 10µF 1M 1µF VIN RUN/S 143k INTVCC SYNC 1nF BIAS PG BST LT8612 TR/SS 60.4k L 2.2µH 0.1µF RT SW 1M FB GND PGND 10pF 1M 3× 47µF VOUT – 2V IMONP IN SHDN VOUT –2.5V MAX IOUT 1.5mA OUT 4.99k LT3091 ILIM IMONN SET GND 10µF 49.9k 3091 TA14 L: COILCRAFT XAL5030-222ME 3091fa 30 For more information www.linear.com/LT3091 LT3091 Typical Applications 12V to ±3.3V Low Noise Power Supply 10µF C1 2.2µF L1 4.7µH D1 CIN1 22µF SWA1 SWB1 • VIN1 100k PG1 LT8582 CLKOUT1 RT1 100k TEMP IMON ILIM 47pF 0.1µF 115k VOUT1 3.3V MAX IOUT 1.5A OUT SET 13k 1.5nF 0.1µF 66.5k 1% 0.1µF 66.5k 1% 22µF GND 115k PG2 RT2 SHDN2 SS2 VIN2 VC2 47pF 22µF 18.7k C2 2.2µF • D2 SET GND VOUT2 –3.3V MAX IOUT 1.5A IMONN OUT + – L4 4.7µH • CIN2 22µF LT3091 COUT2 22µF ×2 60.4k FBX2 SWA2 SWB2 2.2nF 0.1µF GATE2 L3 4.7µH – COUT1 22µF ×2 VC1 SS1 SYNC2 + 45.3k GATE1 SYNC1 CLKOUT2 ISET 50µA L2 4.7µH FBX1 SHDN1 IN LT3081 5V • VIN 12V –5V 50µA 10µF IN SHDN CIN1, CIN2: 22µF, 25V, X7R, 1210 COUT1, COUT2: 22µF, 16V, X7R, 1210 C1, C2: 2.2µF, 50V, X7R, 1206 D1, D2: CENTRAL CMSH3-40FL L1, L2: WÜRTH WE TDC 74489440047 L3, L4: WÜRTH WE TDC 74489440047 IMONP ILIM 3091 TA15 5k 3091fa For more information www.linear.com/LT3091 31 LT3091 Typical Applications Reference Buffer COUT 10µF LT1004-2.5 LT3091 SET GND VOUT –2.5V MAX IOUT 1.5A IMONN OUT + – CIN 10µF VIN –3V TO –10V 50µA IN SHDN IMONP ILIM 3091 TA16 5k Coincident Tracking Supplies R1 49.9k 1% LT3091 COUT 10µF SET GND IMONN OUT VOUT1, –2.5V 1.5A + R2 16.2k 1% – CIN 22µF VIN –5.5V TO –10V LT3091 50µA COUT 10µF SET IN GND IMONN OUT VOUT2, –3.3V 1.5A R3 34k 1% + SHDN IMONP ILIM – 5k LT3091 50µA COUT 10µF SET IN GND IMONN OUT VOUT3, –5V 1.5A + SHDN IMONP ILIM – 5k 50µA IN SHDN IMONP ILIM 3091 TA17 5k 3091fa 32 For more information www.linear.com/LT3091 LT3091 Typical Applications Simple Cable Drop Compensation RCBL2 RCDC = RCBL • 2k 10µF LOAD 0.1µF 100k 1% LT3091 SET GND IMONN RCBL1 OUT + RCBL = RCBL1 + RCBL2 – 10µF VOUT –5V MAX IOUT 1.5A 50µA IN VIN ≤ –6V SHDN ILIM IMONP 3091 TA18 5k Low Noise 4-Quadrant Power Supply VCC 10µF IN CTRL LT3081 ILIM 50µA TEMP + IMON – OUT SET 10µF 14mΩ VSET 10µF 14mΩ 22µF OPT VOUT (SOURCE/SINK 1.5A) VEE + VDROPOUT (LT3091) ≤ VOUT ≤ VCC – VDROPOUT (LT3081) LT3091 SET GND IMONN OUT + – 10µF 50µA IN SHDN VEE IMONP ILIM 3091 TA19 5k 3091fa For more information www.linear.com/LT3091 33 LT3091 Typical Applications 2-Terminal Current Source 4.02k, 1% IOUT = 200mV/R1 R1 SET LT3091 GND IMONN OUT + – 50µA IN VIN ILIM IMONP SHDN 5k 10µF 3091 TA20 Positive Output Current Monitor 0.1µF LT3091 TO ADC 49.9k 1% 2.67k 10µF SET GND VOUT –2.5V MAX IOUT 1.5A IMONP OUT + – 10µF 50µA IN VIN –3V TO –10V IMONN 3V ILIM SHDN 0.1µF 5k 3091 TA21 Negative Output Current Monitor 0.1µF LT3091 49.9k 1% 1.33k 10µF TO ADC SET GND VOUT –2.5V MAX IOUT 1.5A IMONN OUT + – 10µF VIN –3V TO –10V 50µA IN SHDN IMONP ILIM 3091 TA22 5k 3091fa 34 For more information www.linear.com/LT3091 LT3091 Package Description Please refer to http://www.linear.com/product/LT3091#packaging for the most recent package drawings. DE Package 14-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1708 Rev B) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 3.00 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 (2 SIDES) R = 0.05 TYP 3.00 ±0.10 (2 SIDES) R = 0.115 TYP 8 0.40 ±0.10 14 3.30 ±0.10 1.70 ±0.10 PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER PIN 1 TOP MARK (SEE NOTE 6) 0.200 REF 0.75 ±0.05 (DE14) DFN 0806 REV B 7 1 0.25 ±0.05 0.50 BSC 3.00 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3091fa For more information www.linear.com/LT3091 35 LT3091 Package Description Please refer to http://www.linear.com/product/LT3091#packaging for the most recent package drawings. FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev K) Exposed Pad Variation BC 4.60 3.58 (.141) 4.90 – 5.10* (.193 – .201) 16 1514 13 12 11 SEE NOTE 5 6.60 ±0.10 4.50 ±0.10 0.48 (.019) REF 3.58 (.141) 2.94 (.116) 10 9 DETAIL B 6.40 2.94 (.252) (.116) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.51 (.020) REF DETAIL B IS THE PART OF THE LEAD FRAME FEATURE FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 0.65 BSC 1 2 3 4 5 6 7 8 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.25 REF 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT 1.10 (.0433) MAX 0° – 8° 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 0.05 – 0.15 (.002 – .006) FE16 (BC) TSSOP REV K 1013 5. BOTTOM EXPOSED PADDLE MAY HAVE METAL PROTRUSION IN THIS AREA. THIS REGION MUST BE FREE OF ANY EXPOSED TRACES OR VIAS ON PCB LAYOUT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3091fa 36 For more information www.linear.com/LT3091 LT3091 Package Description Please refer to http://www.linear.com/product/LT3091#packaging for the most recent package drawings. R Package 7-Lead Plastic DD Pak (Reference LTC DWG # 05-08-1462 Rev F) .256 (6.502) .060 (1.524) TYP .060 (1.524) .390 – .415 (9.906 – 10.541) .165 – .180 (4.191 – 4.572) .045 – .055 (1.143 – 1.397) 15° TYP .060 (1.524) .183 (4.648) +.008 .004 –.004 +0.203 0.102 –0.102 .059 (1.499) TYP .330 – .370 (8.382 – 9.398) ( ) .095 – .115 (2.413 – 2.921) .075 (1.905) DETAIL A .300 (7.620) +.012 .143 –.020 +0.305 3.632 –0.508 ( BOTTOM VIEW OF DD PAK HATCHED AREA IS SOLDER PLATED COPPER HEAT SINK ) .026 – .035 (0.660 – 0.889) TYP .050 (1.27) BSC .013 – .023 (0.330 – 0.584) .050 ±.012 (1.270 ±0.305) DETAIL A 0° – 7° TYP .420 .080 .420 0° – 7° TYP .276 .350 .325 .205 .585 .585 .320 .090 .050 .035 RECOMMENDED SOLDER PAD LAYOUT NOTE: 1. DIMENSIONS IN INCH/(MILLIMETER) 2. DRAWING NOT TO SCALE .090 .050 .035 RECOMMENDED SOLDER PAD LAYOUT FOR THICKER SOLDER PASTE APPLICATIONS R (DD7) 0212 REV F 3091fa For more information www.linear.com/LT3091 37 LT3091 Package Description Please refer to http://www.linear.com/product/LT3091#packaging for the most recent package drawings. T7 Package 7-Lead Plastic TO-220 (Standard) (Reference LTC DWG # 05-08-1422) .390 – .415 (9.906 – 10.541) .165 – .180 (4.191 – 4.572) .147 – .155 (3.734 – 3.937) DIA .045 – .055 (1.143 – 1.397) .230 – .270 (5.842 – 6.858) .460 – .500 (11.684 – 12.700) .570 – .620 (14.478 – 15.748) .330 – .370 (8.382 – 9.398) .620 (15.75) TYP .700 – .728 (17.780 – 18.491) .095 – .115 (2.413 – 2.921) .155 – .195* (3.937 – 4.953) SEATING PLANE .152 – .202 .260 – .320 (3.860 – 5.130) (6.604 – 8.128) BSC .050 (1.27) .026 – .036 (0.660 – 0.914) .135 – .165 (3.429 – 4.191) .013 – .023 (0.330 – 0.584) *MEASURED AT THE SEATING PLANE T7 (TO-220) 0801 3091fa 38 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more information www.linear.com/LT3091 tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. LT3091 Revision History REV DATE DESCRIPTION A 03/16 Revised Output Offset Voltage VOS conditions and specs PAGE NUMBER 3 3091fa For more information www.linear.com/LT3091 39 LT3091 Typical Application Parallel Devices 0.1µF 24.9k 1% 22µF SET LT3091 GND IMONN OUT 10mΩ + VOUT –2.5V MAX IOUT 3A – 22µF 50µA IN VIN –3V TO –10V IMONP SHDN ILIM 5k GND LT3091 SET IMONN OUT 10mΩ + – 50µA IN SHDN IMONP ILIM 3091 TA23 5k Related Parts PART NUMBER DESCRIPTION COMMENTS LT1185 3A, Negative Linear Regulator 750mV Dropout Voltage, VIN = –4.3V to –35V, DD-PAK and TO-220 Packages LT1175 500mA, Negative Low Dropout Micropower Regulator 500mV Dropout Voltage, VIN = –4.5V to –20V, N8, S8, DD-PAK, TO-220 and SOT-223 LT1964 200mA, Negative Low Noise Low Dropout Regulator 340mV Dropout Voltage, Low Noise: 30µVRMS, VIN = –1.9V to –20V, DFN and SOT-23 Packages LT3015 1.5A, Fast Transient Response, Negative LDO Regulator 310mV Dropout Voltage, Low Noise: 60µVRMS, VIN = –2.3V to –30V, DFN, MSOP, TO-220 and DD-PAK Packages LT3080 1.1A, Parallelable, Low Noise, Low Dropout Linear Regulator 350mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V, Single Resistor Output, DFN, MSOP, TO-220, DD and SOT-223 Packages LT3085 500mA, Parallelable, Low Noise, Low Dropout Linear Regulator 275mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 36V, Single Resistor Output, DFN, MSOP LT3082 200mA, Parallelable, Low Noise, Low Dropout Linear Regulator Low Noise: 33µVRMS, VIN: 1.2V to 40V, Single Resistor Output, DFN, SOT-223 and SOT-23 Packages LT3081 1.5A, Parallelable, Low Noise, Low Dropout Linear Regulator Low Noise: 27µVRMS, VIN: 1.2V to 36V, Single Resistor Output, DFN, FE, DD-PAK and TO-220 Packages LT3083 3A, Parallelable, Low Noise, Low Dropout Linear Regulator 310mV Dropout Voltage (2-Supply Operation), Low Noise: 40µVRMS, VIN: 1.2V to 23V, Single Resistor Output, DFN, TSSOP, TO-220 and DD Packages LT3090 –36V, 600mA Negative Linear Regulator with Programmable Current Limit 300mV Dropout Voltage, Low Noise: 18µVRMS, VIN: –1.5V to –36V, Single Resistor Output, DFN and MSOP Packages 3091fa 40 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT3091 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT3091 LT 0316 REV A • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2015