LTC2975 4-Channel PMBus Power System Manager Featuring Accurate Input Current and Energy Measurement Description Features Sequence, Trim, Margin and Supervise Four Power Supplies nn Manage Faults, Monitor Telemetry and Create Fault Logs nn PMBus™ Compliant Command Set nn Supported by LTpowerPlay™ GUI nn Margin or Trim Supplies to Within 0.25% of Target nn Monitor Input Current (±1%) and Accumulate Energy nn Fast OV/UV and OC Supervisors Per Channel nn Coordinate Sequencing and Fault Management Across Multiple LTC PSM Devices nn Automatic Fault Logging to Internal EEPROM nn Operate Autonomously Without Additional Software nn External Temperature and Input Voltage Supervisors nn Accurate Monitoring of Four Output Voltages, Four Output Currents, Four External Temperatures, Input Voltage and Current, and Internal Die Temperature nn I2C/SMBus Serial Interface nn Can Be Powered from 3.3V, or 4.5V to 15V nn Pin-Compatible to the LTC2974 nn Available in 64-Lead 9mm × 9mm QFN Package The LTC®2975 is a 4-channel Power System Manager used to sequence, trim (servo), margin, supervise, manage faults, provide telemetry and create fault logs. PMBus commands support power supply sequencing, precision point-of-load voltage adjustment and margining. DACs use a proprietary soft-connect algorithm to minimize supply disturbances. Supervisory functions include over and under current, voltage and temperature threshold limits for four power supply output channels as well as over and under voltage threshold limits for a single power supply input channel. Programmable fault responses can disable the power supplies with optional retry after a fault is detected. Faults that disable a power supply can automatically trigger black box EEPROM storage of fault status and associated telemetry. An internal 16-bit ADC monitors four output voltages, four output currents, four external temperatures, input voltage and current, and die temperature. Input power, energy, and output power is also calculated. A programmable watchdog timer monitors microprocessor activity for a stalled condition and resets the microprocessor if necessary. A single wire bus synchronizes power supplies across multiple LTC Power System Management (PSM) devices. Configuration EEPROM supports autonomous operation without additional software. nn Applications Computers and Network Servers Industrial Test and Measurement nn High Reliability Systems nn Video and Medical Imaging nn nn L, LT, LTC, LTM, Linear Technology, the Linear logo, µModule and PolyPhase are registered trademarks and LTpowerPlay is a trademark of Linear Technology Corporation. PMBus is a trademark of SMIF, Inc. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 7382303, 7420359 and 8648623. Typical Application 4-Channel PMBus Power System Manager with Input Energy Metering VIN 4.5V < VIBUS < 15V IIN_SNSP IIN_SNSM VPWR VIN_SNS ISENSEP0 AUXFAULTB LTC2975* SCL ALERTB CONTROL0 TO/FROM OTHER DEVICES FAULTB0 FAULTB1 BG R10 VSENSEM0 GND MMBT3906 TSENSE0 ASEL1 WDI/RESETB 1 0 SGND VOUT_EN0 PWRGD ASEL0 VFB LOAD SHARE_CLK WP R30 VSENSEP0 R20 SDA Mfr_ein_config_iin_range = Medium VIIN_SNS = 50mV VVIN_SNS = 12V SW VDAC0 VDD33** DC/DC CONVERTER TG ISENSEM0 VIN_SNS_CAP PMBus INTERFACE I– I+ ERROR (%) OV Power Measurement Error 2 TO µP RESETB INPUT RUN/SS GND 0.1µF *SOME DETAILS OMITTED FOR CLARITY ONLY ONE OF FOUR CHANNELS SHOWN WATCHDOG TIMER INTERRUPT 2975 TA01a **LTC2975 MAY ALSO BE POWERED DIRECTLY FROM EXTERNAL 3.3V SUPPLY –1 6 TYPICAL PARTS –2 0 25 –50 –25 50 75 TEMPERATURE (°C) 100 2975 TA01b 2975f For more information www.linear.com/LTC2975 1 LTC2975 Table of Contents Features.......................................................................... 1 Applications..................................................................... 1 Typical Application............................................................. 1 Description...................................................................... 1 Absolute Maximum Ratings................................................... 4 Order Information............................................................... 4 Pin Configuration............................................................... 4 Electrical Characteristics...................................................... 5 PMBus Timing Diagram.......................................................10 Typical Performance Characteristics.......................................10 Pin Functions...................................................................14 Block Diagram..................................................................16 Operation.......................................................................17 LTC2975 Operation Overview.......................................................... 17 EEPROM..................................................................................... 18 AUXFAULTB..................................................................................... 18 RESETB............................................................................................ 19 PMBus Serial Digital Interface......................................................... 19 PMBus........................................................................................ 19 Device Address........................................................................... 19 Processing Commands.............................................................. 20 PMBUS Command Summary.................................................23 PMBus Command Description...............................................29 Addressing and Write Protect.......................................................... 29 PAGE........................................................................................... 29 WRITE_PROTECT....................................................................... 30 WRITE-PROTECT Pin................................................................. 30 MFR_PAGE_FF_MASK............................................................... 30 MFR_I2C_BASE_ADDRESS....................................................... 31 MFR_COMMAND_PLUS............................................................ 31 MFR_DATA_PLUS0 and MFR_DATA_PLUS1............................ 31 MFR_STATUS_PLUS0, and MFR_STATUS_PLUS1................... 31 Reading Fault Log Using Command Plus and Mfr_data_plus0.32 Reading Energy Using MFR_COMMAND_PLUS and MFR_DATA_PLUS0.................................................................... 33 Peek Operation Using Mfr_data_plus0...................................... 33 Enabling and Disabling Poke Operations................................... 33 Poke Operation Using Mfr_data_plus0...................................... 33 On/Off Control, Margining and Configuration................................. 34 OPERATION................................................................................ 34 Command Plus Operations Using Mfr_data_plus1................... 34 ON_OFF_CONFIG........................................................................ 35 MFR_CONFIG_LTC2975............................................................. 36 Cascade Sequence ON with Time-Based Sequence OFF........... 37 MFR_CONFIG2_LTC2975........................................................... 38 MFR_CONFIG3_LTC2975........................................................... 39 Tracking Supplies On and Off..................................................... 40 Tracking Implementation............................................................ 43 MFR_CONFIG_ALL_LTC2975.................................................... 43 Programming User EEPROM Space................................................ 45 STORE_USER_ALL and RESTORE_USER_ALL........................ 45 Bulk Programming the User EEPROM Space............................. 45 MFR_EE_UNLOCK...................................................................... 46 MFR_EE_ERASE........................................................................ 46 MFR_EE_DATA........................................................................... 46 Response When Part Is Busy..................................................... 47 2 MFR_EE Erase and Write Programming Time........................... 47 Input Voltage Commands and Limits.............................................. 47 VIN_ON, VIN_OFF, VIN_OV_FAULT_LIMIT, VIN_OV_WARN_LIMIT, VIN_UV_WARN_LIMIT and VIN_UV_FAULT_LIMIT............................................................... 47 INPUT Current and ENERGY............................................................ 48 Energy Measurement and Reporting......................................... 48 MFR_EIN ................................................................................... 48 MFR_EIN_CONFIG..................................................................... 49 MFR_IIN_CAL_GAIN.................................................................. 49 MFR_IIN_CAL_GAIN_TC............................................................ 50 Output Voltage Commands and Limits............................................ 50 VOUT_MODE.............................................................................. 51 VOUT_COMMAND, VOUT_MAX, VOUT_MARGIN_HIGH, VOUT_MARGIN_LOW, VOUT_OV_FAULT_LIMIT, VOUT_OV_WARN_LIMIT, VOUT_UV_WARN_LIMIT, VOUT_UV_FAULT_LIMIT, POWER_GOOD_ON and POWER_GOOD_OFF................................................................... 51 MFR_VOUT_DISCHARGE_THRESHOLD.................................... 51 MFR_DAC................................................................................... 51 Output Current Commands and Limits............................................ 52 IOUT_CAL_GAIN........................................................................ 52 IOUT_OC_FAULT_LIMIT, IOUT_OC_WARN_LIMIT and IOUT_UC_FAULT_LIMIT............................................................. 52 MFR_IOUT_CAL_GAIN_TC........................................................ 53 External Temperature Commands and Limits................................. 53 OT_FAULT_LIMIT, OT_WARN_LIMIT, UT_WARN_LIMIT and UT_FAULT_LIMIT....................................................................... 54 MFR_TEMP_1_GAIN and MFR_TEMP_1_OFFSET...................... 54 MFR_T_SELF_HEAT, MFR_IOUT_CAL_GAIN_TAU_INV and MFR_IOUT_CAL_GAIN_THETA.................................................. 54 Sequencing Timing Limits and Clock Sharing................................. 56 TON_DELAY, TON_RISE, TON_MAX_FAULT_LIMIT and TOFF_DELAY.............................................................................. 56 MFR_RESTART_DELAY............................................................. 57 Clock Sharing............................................................................. 57 Watchdog Timer and Power Good................................................... 57 MFR_PWRGD_EN...................................................................... 57 MFR_POWERGOOD_ASSERTION_DELAY................................ 58 Watchdog Operation.................................................................. 58 MFR_WATCHDOG_T_FIRST and MFR_WATCHDOG_T.............. 58 Fault Responses............................................................................... 59 Clearing Latched Faults.............................................................. 59 VOUT_OV_FAULT_RESPONSE and VOUT_UV_FAULT_RESPONSE................................................... 59 IOUT_OC_FAULT_RESPONSE and IOUT_UC_FAULT_RESPONSE.................................................... 60 OT_FAULT_RESPONSE, UT_FAULT_RESPONSE, VIN_OV_FAULT_RESPONSE and VIN_UV_FAULT_RESPONSE.61 TON_MAX_FAULT_RESPONSE................................................. 62 MFR_RETRY_DELAY.................................................................. 62 MFR_RETRY_COUNT................................................................. 62 Shared External Faults..................................................................... 63 MFR_FAULTB0_PROPAGATE and MFR_FAULTB1_PROPAGATE..................................................... 63 MFR_FAULTB0_RESPONSE and MFR_FAULTB1_RESPONSE.. 63 2975f For more information www.linear.com/LTC2975 LTC2975 Table of Contents Fault Warning and Status................................................................ 64 CLEAR_FAULTS......................................................................... 64 STATUS_BYTE........................................................................... 65 STATUS_WORD.......................................................................... 65 STATUS_VOUT........................................................................... 66 STATUS_IOUT............................................................................ 66 STATUS_INPUT.......................................................................... 66 STATUS_TEMPERATURE........................................................... 67 STATUS_CML............................................................................. 67 STATUS_MFR_SPECIFIC........................................................... 68 MFR_PADS................................................................................. 68 MFR_COMMON.......................................................................... 69 Telemetry......................................................................................... 70 READ_VIN.................................................................................. 70 READ_IIN................................................................................... 70 READ_PIN.................................................................................. 70 READ_VOUT............................................................................... 70 READ_IOUT................................................................................ 71 MFR_IIN_PEAK.......................................................................... 71 MFR_IIN_MIN............................................................................ 71 MFR_PIN_PEAK......................................................................... 71 MFR_PIN_MIN........................................................................... 71 READ_TEMPERATURE_1........................................................... 71 READ_TEMPERATURE_2........................................................... 71 READ_POUT............................................................................... 71 MFR_READ_IOUT...................................................................... 72 MFR_IOUT_SENSE_VOLTAGE................................................... 73 MFR_VIN_PEAK......................................................................... 73 MFR_VOUT_PEAK...................................................................... 73 MFR_IOUT_PEAK....................................................................... 73 MFR_TEMPERATURE_1_PEAK.................................................. 73 MFR_VIN_MIN........................................................................... 73 MFR_VOUT_MIN........................................................................ 73 MFR_IOUT_MIN......................................................................... 73 MFR_TEMPERATURE_1_MIN.................................................... 74 Fault Logging................................................................................... 74 Fault Log Operation.................................................................... 74 MFR_FAULT_LOG_STORE......................................................... 74 MFR_FAULT_LOG_RESTORE.................................................... 74 MFR_FAULT_LOG_CLEAR......................................................... 75 MFR_FAULT_LOG_STATUS....................................................... 75 MFR_FAULT_LOG....................................................................... 75 MFR_FAULT_LOG Read Example............................................... 78 Identification/Information................................................................ 82 CAPABILITY................................................................................ 83 PMBus_REVISION..................................................................... 83 MFR_SPECIAL_ID...................................................................... 83 MFR_SPECIAL_LOT................................................................... 83 User Scratchpad.............................................................................. 83 USER_DATA_00, USER_DATA_01, USER_DATA_02, USER_DATA_03, USER_DATA_04, MFR_LTC_RESERVED_1 and MFR_LTC_RESERVED_2.................................................... 83 Applications Information.....................................................84 Overview.......................................................................................... 84 Powering the LTC2975..................................................................... 84 Setting Command Register Values.................................................. 84 MEASURING INPUT CURRENT........................................................ 84 MEASURING INPUT VOLTAGE......................................................... 86 MEASURING INPUT POWER........................................................... 86 Measuring INPUT ENERGY.............................................................. 86 Sequence, Servo, Margin and Restart Operations.......................... 86 Command Units On or Off.......................................................... 86 On Sequencing........................................................................... 87 On State Operation..................................................................... 87 Servo Modes.............................................................................. 87 DAC Modes................................................................................. 87 Margining................................................................................... 88 Off Sequencing........................................................................... 88 VOUT Off Threshold Voltage....................................................... 88 Automatic Restart via MFR_RESTART_DELAY Command and CONTROL Pin............................................................................. 88 Fault Management........................................................................... 89 Output Overvoltage, Undervoltage, Overcurrent and Undercurrent Faults.................................................................... 89 Output Overvoltage, Undervoltage, and Overcurrent Warnings.89 Configuring the AUXFAULTB Output.......................................... 89 Multi-Channel Fault Management.............................................. 89 Interconnect Between Multiple LTC POWER MANAGERS............... 91 Application Circuits.......................................................................... 91 Trimming and Margining DC/DC Converters with External Feedback Resistors...................................................... 91 Four-Step Resistor Selection Procedure for DC/DC Converters with External Feedback Resistors.............................................. 93 Trimming and Margining DC/DC Converters with a TRIM Pin... 93 Two-Step Resistor and DAC Full-Scale Voltage Selection Procedure for DC/DC Converters with a TRIM Pin.................... 94 Measuring Output with a Sense Resistor................................... 94 Measuring Output with Inductor DCR........................................ 94 Single Phase Design Example.................................................... 95 Measuring Multiphase Currents................................................. 95 Multiphase Design Example....................................................... 95 Anti-aliasing Filter Considerations............................................. 95 Sensing Negative Voltages......................................................... 96 Connecting the USB to I2C/SMBus/PMBus Controller to the LTC2975 in System.................................................................... 96 Accurate DCR Temperature Compensation..................................... 97 LTpowerPlay: An Interactive GUI for Power Managers.................. 100 PCB Assembly and Layout Suggestions........................................ 101 Bypass Capacitor Placement.................................................... 101 Exposed Pad Stencil Design..................................................... 101 PCB Board Layout.................................................................... 101 Unused ADC Sense Inputs....................................................... 101 Design Checklist............................................................................ 102 I2C............................................................................................. 102 Output Enables......................................................................... 102 VIN Sense.................................................................................. 102 Input Current Sense................................................................. 102 Logic Signals............................................................................ 102 Floating Inputs......................................................................... 102 Package Description........................................................ 103 Typical Application.......................................................... 104 Related Parts................................................................. 104 2975f For more information www.linear.com/LTC2975 3 LTC2975 Absolute Maximum Ratings Pin Configuration (Notes 1, 2) 64 VSENSEM1 63 VSENSEP1 62 VSENSEM2 61 VSENSEP2 60 GND 59 GND 58 VDAC3 57 VDAC2 56 IIN_SNSM 55 IIN_SNSP 54 VDAC1 53 VDAC0 52 GND 51 VIN_SNS_CAP 50 VSENSEM3 49 VSENSEP3 TOP VIEW VSENSEP0 1 VSENSEM0 2 VOUT_EN0 3 VOUT_EN1 4 VOUT_EN2 5 VOUT_EN3 6 AUXFAULTB 7 DNC 8 VIN_SNS 9 VPWR 10 VDD33 11 VDD33 12 VDD25 13 VDD25 14 TSENSE0 15 TSENSE1 16 65 GND 48 ISENSEM3 47 ISENSEP3 46 ISENSEM2 45 ISENSEP2 44 ISENSEM1 43 ISENSEP1 42 ISENSEM0 41 ISENSEP0 40 REFM 39 GND 38 REFP 37 GND 36 ASEL1 35 ASEL0 34 TSENSE3 33 CONTROL1 PWRGD 17 SHARE_CLK 18 GND 19 GND 20 GND 21 CONTROL2 22 CONTROL3 23 WDI/RESETB 24 FAULTB0 25 FAULTB1 26 TSENSE2 27 WP 28 SDA 29 SCL 30 ALERTB 31 CONTROL0 32 Supply Voltages: VPWR...................................................... –0.3V to 15V VDD33..................................................... –0.3V to 3.6V VDD25................................................... –0.3V to 2.75V Digital Input/Output Voltages: ALERTB, SDA, SCL, CONTROL0, CONTROL1, CONTROL2, CONTROL3........................ –0.3V to 3.6V PWRGD, SHARE_CLK, WDI/RESETB, WP, FAULTB0, FAULTB1......................... –0.3V to 3.6V ASEL0, ASEL1........................................ –0.3V to 3.6V Analog Voltages: REFP.................................................... –0.3V to 1.35V REFM..................................................... –0.3V to 0.3V VIN_SNS, VIN_SNS_CAP............................. –0.3V to 15V IIN_SNSP, IIN_SNSM to VIN_SNS................ –0.3V to 0.3V VSENSEP[3:0].............................................. –0.3V to 6V VSENSEM[3:0].............................................. –0.3V to 6V ISENSEP[3:0]................................................ –0.3V to 6V ISENSEM[3:0]............................................... –0.3V to 6V VOUT_EN[3:0], AUXFAULTB....................... –0.3V to 15V VDAC[3:0]................................................... –0.3V to 6V TSENSE[3:0]............................................. –0.3V to 3.6V IIN_SNSP, IIN_SNSM.................................. –0.3V to 15V Operating Junction Temperature Range: LTC2975C................................................. 0°C to 70°C LTC2975I............................................ –40°C to 105°C Storage Temperature Range................. –65°C to 150°C* Maximum Junction Temperature......................... 125°C* UP PACKAGE 64-LEAD (9mm × 9mm) PLASTIC QFN TJMAX = 125°C, θJCtop = 7°C/W, θJCbottom = 1°C/W EXPOSED PAD (PIN 65) IS GND, MUST BE SOLDERED TO PCB *See OPERATION section for detailed EEPROM derating information for junction temperatures in excess of 105°C. Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION JUNCTION TEMPERATURE RANGE LTC2975CUP#PBF LTC2975CUP#TRPBF LTC2975UP 64-Lead (9mm × 9mm) Plastic QFN 0°C to 70°C LTC2975IUP#PBF LTC2975IUP#TRPBF LTC2975UP 64-Lead (9mm × 9mm) Plastic QFN –40°C to 105°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 4 2975f For more information www.linear.com/LTC2975 LTC2975 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, VDD25, REFP and REFM pins floating, unless otherwise indicated. CVDD33 = 100nF, CVDD25 = 100nF, CVIN_SNS_CAP = 10nF and CREF = 100nF. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply Characteristics VPWR VPWR Supply Input Operating Range VDD33 Floating (Note 2) l 15 V IPWR VPWR Supply Current 4.5V ≤ VPWR ≤ 15V, VDD33 Floating (Note 2) l 10 13 mA IVDD33 VDD33 Supply Current 3.13V ≤ VDD33 ≤ 3.47V, VPWR = VDD33 l 10 13 mA VUVLO_VDD33 VDD33 Undervoltage Lockout VDD33 Ramping Up, VPWR = VDD33 l 2.55 2.8 4.5 2.25 VDD33 Undervoltage Lockout Hysteresis VDD33 VDD25 tINIT 120 V mV Supply Input Operating Range VPWR = VDD33 l 3.13 3.47 V Regulator Output Voltage 4.5V ≤ VPWR ≤ 15V l 3.13 3.26 3.47 V Regulator Output Short-Circuit Current VPWR = 4.5V, VDD33 = 0V l 50 90 140 mA Regulator Output Voltage 3.13V ≤ VDD33 ≤ 3.47V l 2.35 2.5 2.6 V Regulator Output Short-Circuit Current VPWR = VDD33 = 3.47V, VDD25 = 0V l 30 55 80 mA Initialization Time Time from VIN applied until the TON_DELAY timer starts 30 ms Voltage Reference Characteristics VREF Output Voltage VREF = VREFP – VREFM, 0 < IREFP < 100µA l 1.220 Temperature Coefficient Hysteresis 1.232 1.244 3 (Note 3) V ppm/°C 100 ppm ADC Characteristics VIN_ADC Voltage Sense Input Range Current Sense Input Range N_ADC Differential Voltage: VIN_ADC = (VSENSEPn – VSENSEMn) l 0 6 V Single-Ended Voltage: VSENSEMn l –0.1 0.1 V Single-Ended Voltage: ISENSEPn, ISENSEMn l –0.1 6 Differential Current Sense Voltage: VIN_ADC = (ISENSEPn – ISENSEMn) l –170 170 V mV Voltage Sense Resolution 0V ≤ VIN_ADC ≤ 6V, READ_VOUT 122 µV/LSB Current Sense Resolution with IOUT_CAL_GAIN = 1Ω 0mV ≤ |VIN_ADC| < 16mV (Note 4) 16mV ≤ |VIN_ADC| < 32mV 32mV ≤ |VIN_ADC| < 63.9mV 63.9mV ≤ |VIN_ADC| < 127.9mV 127.9mV ≤ |VIN_ADC| 15.625 31.25 62.5 125 250 µA/LSB µA/LSB µA/LSB µA/LSB µA/LSB TUE_ADC_ VOLT_SNS Total Unadjusted Error Voltage Sense Inputs VIN_ADC ≥ 1V l ±0.25 % of Reading Voltage Sense Inputs 0 ≤ VIN_ADC ≤ 1V l ±2.5 TUE_ADC_ CURR_SNS Total Unadjusted Error Current Sense Inputs 20mV ≤ |VIN_ADC| ≤ 170mV l ±0.3 % of Reading Current Sense Inputs |VIN_ADC| ≤ 20mV l ±60 µV VOS_ADC Offset Error ISENSEPn and ISENSEMn Inputs, VOS • IOUT_CAL_ GAIN, IOUT_CAL_GAIN = 1000mΩ l ±35 µV tCONV_ADC Conversion Time VSENSEPn, VSENSEMn, VIN_SNS Inputs (Note 5) 6.15 ms ISENSEPn and ISENSEMn Inputs (Note 5) 24.6 ms Internal Temperature (READ_TEMPERATURE_2) (Note 5) 24.6 ms Note 5, Mfr_ein_config_hd = 0 190 ms Note 5, Mfr_ein_config_hd = 1 500 ms tUPDATE_ADC Update Time mV 2975f For more information www.linear.com/LTC2975 5 LTC2975 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, VDD25, REFP and REFM pins floating, unless otherwise indicated. CVDD33 = 100nF, CVDD25 = 100nF, CVIN_SNS_CAP = 10nF and CREF = 100nF. SYMBOL PARAMETER fIN_ADC Input Sampling Frequency CONDITIONS MIN TYP MAX 62.5 UNITS kHz Sense Input Current Characteristics (Note 12) IIN_VSENSE IIN_ISENSE Input Current VSENSEPn and VSENSEMn Inputs l ±15 µA Differential Input Current VSENSEPn and VSENSEMn Inputs, VIN_DIFF = 6V l ±30 µA Input Current ISENSEPn and ISENSEMn Inputs l ±3 µA Differential Input Current ISENSEPn and ISENSEMn Inputs, |VIN_DIFF| = 0.17V l ±5 µA DAC Output Characteristics N_VDAC Resolution VFS_VDAC Full-Scale Output Voltage (Programmable) DAC Code = 0x3FF Buffer Gain Setting_0 DAC Polarity = 1 Buffer Gain Setting_1 l l 10 1.3 2.5 1.38 2.65 Bits 1.44 2.77 V V INL_VDAC Integral Nonlinearity (Note 6) l ±2 LSB DNL_VDAC Differential Nonlinearity (Note 6) l ±2.4 LSB VOS_VDAC Offset Voltage (Note 6) l VDAC Load Regulation VDACn = 2.65V, IVDACn Sourcing = 2mA 100 ppm/mA VDACn = 0.1V, IVDACn Sinking = 2mA 100 ppm/mA PSRR DC: 3.13V ≤ VDD33 ≤ 3.47V, VPWR = VDD33 60 dB ±15 Leakage Current VDACn Hi-Z, 0V ≤ VDACn ≤ 6V l Short-Circuit Current Low VDACn Shorted to GND l –12 l 4 mV ±100 nA –4 mA 12 mA Short-Circuit Current High VDACn Shorted to VDD33 COUT Output Capacitance VDACn Hi-Z 10 pF tS_VDAC DAC Output Update Rate Fast Servo Mode 250 µs Voltage Supervisor Characteristics VIN_VS Input Voltage Range (Programmable) N_VS Voltage Sensing Resolution 0V to 3.8V Range: High Resolution Mode TUE_VS Total Unadjusted Error 2V ≤ VIN_VS ≤ 6V, Low Resolution Mode l ±1.25 % of Reading 1.5V < VIN_VS ≤ 3.8V, High Resolution Mode l ±1.0 % of Reading 0.8V ≤ VIN_VS ≤ 1.5V, High Resolution Mode l ±1.5 % of Reading VIN_VS = (VSENSEPn Low Resolution Mode – VSENSEMn) High Resolution Mode l l 0 0 Single-Ended Voltage: VSENSEMn l –0.1 0.1 4 0V to 6V Range: Low Resolution Mode tS_VS 6 3.8 V mV/LSB 8 Update Period V V mV/LSB 12.21 µs Current Supervisor Characteristics VIN_CS Current Sense Input Range N_CS Current Sense Resolution TUE_CS Total Unadjusted Error VOS_CS Offset Error tS_CS Update Period 6 l Single-Ended Voltage: ISENSEPn, ISENSEMn Differential Voltage: VIN_CS = (ISENSEPn – ISENSEMn) l IOUT_OC_FAULT_LIMIT • IOUT_CAL_GAIN IOUT_UC_FAULT_LIMIT • IOUT_CAL_GAIN –0.1 6 –170 170 400 V mV µV/LSB 50mV ≤ |VIN_CS| ≤ 170mV l ±3 |VIN_CS| < 50mV l ±1.5 mV VIN_CS = 0 l ±600 µV 12.21 % of Reading µs 2975f For more information www.linear.com/LTC2975 LTC2975 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, VDD25, REFP and REFM pins floating, unless otherwise indicated. CVDD33 = 100nF, CVDD25 = 100nF, CVIN_SNS_CAP = 10nF and CREF = 100nF. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN_SNS Input Characteristics VIN_SNS VIN_SNS Input Voltage Range (Note 11) l 0 15 V IVIN_SNS VIN_SNS Input Current VVIN_SNS = 4.5V l 80 140 200 µA VVIN_SNS = 12V l 150 250 350 µA VVIN_SNS = 15V l 180 300 420 µA 4.5V ≤ VVIN_SNS ≤ 8V l TUEVIN_SNS_T VIN_ON, VIN_OFF Threshold Total Unadjusted Error ±2.0 % of Reading VVIN_SNS > 8V l ±1.0 % of Reading 4.5V ≤ VVIN_SNS ≤ 15V (Note 11) l ±0.5 % of Reading VDACPn = 0.2V l ±1 ±18 mV VDACPn = 1.3V l ±2 ±26 mV VDACPn = 2.65V l ±3 ±52 mV Common Mode Input Range VIIN_SNSP = VIIN_SNSM (Note 11) l 15 V IIIN IIIN_SNSP, IIIN_SNSM Input Current FS_IIN Full-Scale Input Current Sense Voltage Range l VIIN_SNSP = VIIN_SNSM = VIIN_SNS (Note 2) l Referred to (VIIN_SNSP – VIIN_SNSM) High Range Medium Range l l Low Range TUE_IIN Total Unadjusted Error TUE_VIN READ_VIN Total Unadjusted Error DAC Soft-Connect Comparator Characteristics VOS_CMP Offset Voltage Input Current Sense Characteristics VIIN CMRR_IIN 4.5 0.5 –100 –50 –20 2 µA 100 50 20 mV mV mV |VIIN_SNSP – VIIN_SNSM | = 100mV, High Range |VIIN_SNSP – VIIN_SNSM | = 50mV, Medium Range |VIIN_SNSP – VIIN_SNSM | = 20mV, Low Range l l l ±0.6 % of Reading ±0.65 % of Reading ±0.75 % of Reading |VIIN_SNSP – VIIN_SNSM | = 20mV, High Range |VIIN_SNSP – VIIN_SNSM | = 15mV, Medium Range |VIIN_SNSP – VIIN_SNSM | = 10mV, Low Range l l l ±1 ±1 ±1 |VIIN_SNSP – VIIN_SNSM | = 0mV, High Range |VIIN_SNSP – VIIN_SNSM | = 0mV, Medium Range |VIIN_SNSP – VIIN_SNSM | = 0mV, Low Range l l l ±100 ±75 ±50 DC CMRR 4.5V ≤ VIIN_SNSP = VIIN_SNS ≤ 15V |VIIN_SNSP – VIIN_SNSM| = 100mV High Range l AC CMRR VIIN_SNSP = VIIN_SNS= 12V ± 100mV f = 62.5kHz 85 % of Reading % of Reading % of Reading µV µV µV dB 85 dB tCONV_IIN Conversion Time 25 ms tUPDATE Update Rate 5.4 Hz 66 ms External Temperature Sensor Characteristics (READ_TEMPERATURE_1) tCONV_TSENSE Conversion Time For One Channel, (Total Latency For All Channels Is 4 • 66ms) ITSENSE_HI TSENSE High Level Current ITSENSE_LOW TSENSE Low Level Current TUE_TS Total Unadjusted Error Ideal Diode Assumed N_TS Maximum Ideality Factor READ_TEMPERATURE_1 = 175°C MFR_TEMP_1_GAIN = 1/N_TS l –90 l –5.5 l –64 –40 µA –4 –2.5 µA ±3 °C 1.10 Internal Temperature Sensor Characteristics (READ_TEMPERATURE_2) TUE_TS2 Total Unadjusted Error ±1 °C 2975f For more information www.linear.com/LTC2975 7 LTC2975 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, VDD25, REFP and REFM pins floating, unless otherwise indicated. CVDD33 = 100nF, CVDD25 = 100nF, CVIN_SNS_CAP = 10nF and CREF = 100nF. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOUT Enable Output (VOUT_EN [3:0]) Characteristics VVOUT_ENn Output High Voltage IVOUT_ENn = –5µA, VDD33 = 3.13V l 10 13 14.7 V IVOUT_ENn Output Sourcing Current VVOUT_ENn Pull-Up Enabled, VVOUT_ENn = 1V l –5 –7 –9 µA Output Sinking Current Strong Pull-Down Enabled, VVOUT_ENn = 0.4V l 2.5 5 8 mA Weak Pull-Down Enabled, VVOUT_ENn = 0.4V l 33 50 Internal Pull-Up Disabled, 0V ≤ VVOUT_ENn ≤ 15V l Output Leakage Current 65 µA ±1 µA General Purpose Output (AUXFAULTB) Characteristics VAUXFAULTB Output High Voltage IAUXFAULTB = –5µA, VDD33 = 3.13V l 10 13 14.7 V IAUXFAULTB Output Sourcing Current AUXFAULTB Pull-Up Enabled, VAUXFAULTB = 1V l –5 –7 –9 µA Output Sinking Current Strong Pull-Down Enabled, VAUXFAULTB = 0.4V l 2.5 5 8 mA Output Leakage Current Internal Pull-Up Disabled, 0V ≤ VAUXFAULTB ≤ 15V l ±1 µA Energy Meter Characteristics TUE_ETB Energy Meter Time-Base Error TUE_PIN READ_PIN Total Unadjusted Error ±1.5 % of Reading l VIIN_SNSP – VIIN_SNSM = 50mV, Medium Range l Energy Meter Total Unadjusted Error VIIN_SNSP – VIIN_SNSM = 50mV, Medium Range EEPROM Characteristics l Endurance 0°C < TJ < 85°C During EEPROM Write Operations l 10,000 20 TUE_EIN (Notes 7, 10) Retention (Notes 7, 10) TJ < 105°C l tMASS_WRITE Mass Write Operation Time (Note 8) STORE_USER_ALL, 0°C < TJ < 85°C During EEPROM Write Operations l ±1 % of Reading ±2.5 % of Reading Cycles Years 440 4100 ms Digital Inputs SCL, SDA, CONTROL0, CONTROL1, CONTROL2, CONTROL3, WDI/RESETB, FAULTB0, FAULTB1, WP VIH VIL High Level Input Voltage Low Level Input Voltage VHYST Input Hysteresis ILEAK Input Leakage Current tSP Pulse Width of Spike Suppressed FAULTB0, FAULTB1, SDA, SCL, WDI/RESETB, WP l 2.1 V CONTROLn Only l 1.85 V FAULTB0, FAULTB1, SDA, SCL, WDI/RESETB, WP l 1.5 V CONTROLn Only l 1.6 V 0V ≤ VPIN ≤ 3.6V l 20 mV ±2 µA FAULTB0, FAULTB1, CONTROLn 10 µs SDA, SCL 98 ns tFAULT_MIN Minimum Low Pulse Width for Externally Generated Faults tRESETB Pulse Width to Assert Reset VWDI/RESETB ≤ 1.5V l 300 tWDI Pulse Width to Reset Watchdog Timer VWDI/RESETB ≤ 1.5V l 0.3 fWDI Watchdog Timer Interrupt Input Frequency CIN Input Capacitance 180 ms µs 200 1 l 10 µs MHz pF Digital Input SHARE_CLK VIH High Level Input Voltage l VIL Low Level Input Voltage l fSHARE_CLK_IN Input Frequency Operating Range tLOW 8 Assertion Low Time VSHARE_CLK < 0.8V 1.6 V 0.8 V l 90 110 kHz l 0.825 1.11 µs 2975f For more information www.linear.com/LTC2975 LTC2975 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, VDD25, REFP and REFM pins floating, unless otherwise indicated. CVDD33 = 100nF, CVDD25 = 100nF, CVIN_SNS_CAP = 10nF and CREF = 100nF. SYMBOL PARAMETER CONDITIONS tRISE Rise Time VSHARE_CLK < 0.8V to VSHARE_CLK > 1.6V l MIN ILEAK Input Leakage Current 0V ≤ VSHARE_CLK ≤ VDD33 + 0.3V l CIN Input Capacitance TYP MAX UNITS 450 ns ±1 µA 10 pF Digital Outputs SDA, ALERTB, SHARE_CLK, FAULTB0, FAULTB1, PWRGD VOL Digital Output Low Voltage fSHARE_CLK_OUT Output Frequency Operating Range ISINK = 3mA l 5.49kΩ Pull-Up to VDD33 l 90 100 0.4 V 110 kHz Digital Inputs ASEL0,ASEL1 VIH Input High Threshold Voltage l VDD33 – 0.5 VIL Input Low Threshold Voltage l 0.5 V l ±95 µA l ±24 µA IIH,IL High, Low Input Current IHIZ Hi-Z Input Current CIN Input Capacitance ASEL[1:0] = 0, VDD33 V 10 pF Serial Bus Timing Characteristics fSCL Serial Clock Frequency (Note 9) l 10 tLOW Serial Clock Low Period (Note 9) l 1.3 µs tHIGH Serial Clock High Period (Note 9) l 0.6 µs tBUF Bus Free Time Between Stop and Start (Note 10) l 1.3 µs tHD,STA Start Condition Hold Time (Note 9) l 600 ns tSU,STA Start Condition Setup Time (Note 9) l 600 ns tSU,STO Stop Condition Setup Time (Note 9) l 600 ns tHD,DAT Data Hold Time (LTC2975 Receiving Data) (Note 9) l 0 ns Data Hold Time (LTC2975 Transmitting Data) (Note 9) l 300 tSU,DAT Data Setup Time (Note 9) l 100 tSP Pulse Width of Spike Suppressed (Note 9) tTIMEOUT_BUS Time Allowed to Complete any Mfr_config_all_longer_pmbus_timeout = 0 PMBus Command After Which Time Mfr_config_all_longer_pmbus_timeout = 1 SDA Will Be Released and Command Terminated 400 900 ns ns 98 l l kHz 25 200 ns 35 280 ms ms Additional Digital Timing Characteristics tOFF_MIN Minimum Off-Time for Any Channel 100 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into device pins are positive. All currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified. If power is supplied to the chip via the VDD33 pin only, connect VPWR and VDD33 pins together. Note 3: Hysteresis in the output voltage is created by package stress that differs depending on whether IC was previously at a higher or lower temperature. Output voltage is always measured at 25°C, but the IC is ms cycled to 105°C or –40°C before successive measurements. Hysteresis is roughly proportional to the square of the temperature change. Note 4: The current sense resolution is determined by the L11 format and the mV units of the returned value. For example, a full-scale value of 170mV returns a L11 value of 0xF2A8 = 680 • 2–2 = 170. This is the lowest range that can represent this value without overflowing the L11 mantissa and the resolution for 1LSB in this range is 2–2mA = 250µA. Each successively lower range improves resolution by cutting the LSB size in half. Note 5: The nominal time between successive ADC conversions (latency of the ADC) for any given channel is tUPDATE_ADC. 2975f For more information www.linear.com/LTC2975 9 LTC2975 Electrical Characteristics Note 6: Nonlinearity is defined from the first code that is greater than or equal to the maximum offset specification to full-scale code, 1023. Note 7: EEPROM endurance and retention are guaranteed by design, characterization and correlation with statistical process controls. The minimum retention specification applies for devices whose EEPROM has been cycled less than the minimum endurance specification. Note 8: The LTC2975 will not acknowledge any PMBus commands, except for MFR_COMMON, when a STORE_USER_ALL command is being executed. See also OPERATION section. Note 9: Maximum capacitive load, CB, for SCL and SDA is 400pF. Data and clock rise time (tr) and fall time (tf) are: (20 + 0.1• CB) (ns) < tr < 300ns and (20 + 0.1 • CB) (ns) < tf < 300ns. CB = capacitance of one bus line in pF. SCL and SDA external pull-up voltage, VIO, is 3.13V < VIO < 3.6V. Note 10: EEPROM endurance and retention will be degraded when TJ > 105°C. Note 11: While READ_VIN operates with 0V ≤ VIN_SNS ≤ 15V, the valid READ_IIN, READ_PIN, and MFR_EIN operating range is 4.5V ≤ VIN_SNS ≤ 15V. Note 12: VSENSE and ISENSE input currents are characterized by input current and input differential current. Input current is defined as current into a single device pin (see Note 2). Input differential current is defined as (I+ – I–) where I+ is the current into the positive device pin and I– is the current into the negative device pin. PMBus Timing Diagram SDA tf tLOW tr tSU(DAT) tHD(STA) tf tSP tr tBUF SCL tHD(STA) tHD(DAT) tSU(STA) tHIGH tSU(STO) 2975 TD START CONDITION REPEATED START CONDITION STOP CONDITION START CONDITION Typical Performance Characteristics Reference Voltage vs Temperature 0.06 1.2320 ERROR (% OF READING) REFERENCE OUTPUT VOLTAGE (V) 1.2322 0.07 THREE TYPICAL PARTS 1.2318 1.2316 1.2314 1.2312 1.2310 ADC READ_IOUT Input Referred Offset Voltage vs Temperature 5 THREE TYPICAL PARTS 4 0.05 3 0.04 2 0.03 1 OFFSET (µV) 1.2324 ADC READ_VOUT ADC Total Unadjusted Error vs Temperature 0.02 0.01 0 –1 0.00 –2 –0.01 –3 1.2306 –0.02 –4 1.2304 –50 –0.03 –50 1.2308 –25 0 25 50 75 TEMPERATURE (°C) 100 2975 G01 10 –25 0 25 50 75 TEMPERATURE (°C) 100 2975 G02 THREE TYPICAL PARTS –5 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 2975 G03 2975f For more information www.linear.com/LTC2975 LTC2975 Typical Performance Characteristics ADC READ_VOUT-INL 3 2 2 1 0 –1 1 0 –1 –2 –2 –3 –3 –4 –4 1 0 2 3 4 READ_VOUT (V) 5 –5 6 0 1 2 3 4 READ_VOUT (V) 5 15 4.25 12 INPUT CURRENT (µA) NOISE (µVRMS) 3.75 3.50 3.25 3.00 2.75 IVSENSEP1 6 3 0 –3 IVSENSEM1 –9 –12 100 0 2975 G07 Current Sense Input Current vs Common Mode Voltage 1.4 INPUT CURRENT (µA) DIFFERENTIAL INPUT CURRENT (µA) 1.6 IISENSEM1 1.0 0.8 0.6 0.4 0.2 0 DIFFERENTIAL INPUT VOLTAGE = 0V 0 1 2 3 4 5 COMMON MODE VOLTAGE (V) 6 2975 G10 1 10 1 2 3 4 VSENSEP1 – VSENSEM1 (V) 10 5 0 1 2 3 4 5 DIFFERENTIAL INPUT VOLTAGE (V) 2975 G08 1.0 0.8 0.6 0.4 0.2 25 50 75 100 125 150 DIFFERENTIAL INPUT VOLTAGE (mV) 175 2975 G11 6 2975 G09 Voltage Supervisor Total Unadjusted Error vs Temperature 0.25 VCM = 2.5V 0 VSENSEM1 = 0V VOLTAGE SUPERVISOR LOW RES MODE 15 0 6 5 1.2 0 100 20 Current Sense Differential Input Current vs Differential Input Voltage IISENSEP1 0.1 2975 G06 25 VOLTAGE SUPERVISOR LOW RES MODE VSENSEM1 = 0V –6 1.2 0.01 Voltage Sense Differential Input Current vs Differential Input Voltage 9 4.00 1.4 –75 0.001 6 Voltage Sense Input Currents vs Differential Input Voltage 4.50 0 25 50 75 TEMPERATURE (°C) –25 2975 G05 ADC READ_IOUT Input Referred Noise vs Temperature –25 0 READ_IOUT (A) 2975 G04 2.50 –50 25 –50 SUPERVISOR ERROR (% OF READING) –5 IOUT_CAL_GAIN = 2.1875mΩ 50 READ_IOUT ERROR (mA) 3 75 122µV/LSB 4 ERROR (LSBs) ERROR (LSBs) 5 122µV/LSB 4 DIFFERENTIAL INPUT CURRENT (µA) 5 ADC READ_IOUT Error vs READ_IOUT ADC READ_VOUT-DNL 0.20 HIGH RES MODE VIN = 1.5V 0.15 0.10 0.05 0 –0.05 –0.10 –0.15 THREE TYPICAL PARTS –0.20 0 25 –50 –25 50 75 TEMPERATURE (°C) 100 2975 G12 2975f For more information www.linear.com/LTC2975 11 LTC2975 Typical Performance Characteristics Current Supervisor Total Unadjusted Error vs Temperature DAC Full-Scale Voltage vs Temperature, Gain Setting = 0 1.405 0.8 50mV 0.6 20mV 0.4 0.2 1.395 1.390 1.385 1.380 1.375 1.370 –25 0 25 50 75 TEMPERATURE (°C) 1.360 –50 100 THREE TYPICAL PARTS –25 0 25 50 75 TEMPERATURE (°C) 2975 G13 0.0040 2.65 2.64 2.62 –50 100 DAC OUTPUT VOLTAGE (V) 0.0005 2.66 2.65 2.64 THREE TYPICAL PARTS –25 0 25 50 75 TEMPERATURE (°C) 100 GAIN SETTING = 1 2975 G15 70 0.0030 60 NUMBER OF PARTS 0.0035 0.0025 0.0020 0.0015 0.0010 0.0005 THREE TYPICAL PARTS 0 –50 –25 0 25 50 75 TEMPERATURE (°C) 0 25 50 75 TEMPERATURE (°C) 100 Closed Loop Servo Error 2.67 2.62 –50 GAIN SETTING = 0 0.0010 –25 80 GAIN SETTING = 1 2.68 2.63 0.0015 THREE TYPICAL PARTS 2975 G15 2.69 DAC OUTPUT VOLTAGE (V) DAC OUTPUT VOLTAGE (V) 2.66 DAC Offset Voltage vs Temperature, Gain Setting = 1 2.70 0.0020 0 –50 100 194 PARTS SOLDERED DOWN 50 40 30 20 10 THREE TYPICAL PARTS –25 0 25 50 75 TEMPERATURE (°C) 2975 G16 0 –2.5 100 –0.15 –0.05 0.05 ERROR (%) 0.15 2975 G17 VDD33 Regulator Output Voltage vs Temperature 3.285 0 0.25 2975 G18 VOUT_EN[0:3] and AUXFAULTB Output High Voltage vs Load Current VDD33 Regulator Load Regulation 14 3.275 3.270 3.265 3.260 3.255 3.250 –1000 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE DELTA (ppm) 3.280 OUTPUT VOLTAGE (V) 2.67 2975 G12 DAC Offset Voltage vs Temperature, Gain Setting = 0 0.0025 2.68 2.63 1.365 0 –50 GAIN SETTING = 1 2.69 DAC OUTPUT VOLTAGE (V) 1.0 2.70 GAIN SETTING = 0 1.400 1.2 DAC OUTPUT VOLTAGE (V) SUPERVISOR ERROR (% OF READING) 1.4 DAC Full-Scale Voltage vs Temperature, Gain Setting = 1 –2000 –3000 105°C 13 –40°C 12 25°C 11 10 3.245 THREE TYPICAL PARTS 3.240 –50 –25 0 25 50 75 TEMPERATURE (°C) 100 2975 G19 12 –4000 0 10 20 30 40 LOAD CURRENT SOURCING (mA) 50 2975 G20 9 0 1 2 3 4 5 CURRENT SOURCING (µA) 6 7 2975 G21 2975f For more information www.linear.com/LTC2975 LTC2975 Typical Performance Characteristics External Temperature READ_ TEMPERATURE_1 Error vs Temperature VOUT_EN[0:3] and AUXFAULTB VOL vs Load Current 1.00 1.2 105°C ERROR (°C) 25°C 0.8 0.6 –40°C 0.4 0.2 0 2 4 6 8 10 CURRENT SOURCING (µA) 12 1.00 0.50 0.50 0.25 0.25 0 –0.25 –0.75 –0.75 TUE_VIN vs VIN_SNS 0.4 TUE_IIN (% OF READING) TUE_VIN (%) 0.2 25°C 105°C –0.1 –0.2 –0.3 25°C 0.2 –40°C 105°C 0 –0.2 –0.4 4.5 6.5 8.5 10.5 VIN_SNS (V) 12.5 –0.6 14.5 4.5 2.0 0 25°C –0.25 105°C –0.50 6.5 8.5 10.5 VIN_SNS (V) 12.5 14.5 2975 G28 6.5 8.5 10.5 VIN_SNS (V) 12.5 14.5 2975 G27 0 –10 Mfr_ein_config_iin_range = Medium VIIN_SNS = 50mV VVIN_SNS = 12V ±100mV –30 25°C –0.5 105°C –40 –50 –60 –70 –1.0 –2.0 12.5 4.5 READ_IIN Common Mode Gain vs Frequency –40°C 0 –1.00 8.5 10.5 VIN_SNS (V) –0.75 –20 0.5 –1.5 6.5 14.5 1.0 –0.75 4.5 105°C –0.25 AC CMRR (dB) TUE_EIN (% OF READING) TUE_ETB (%) –40°C 0.25 0 Mfr_ein_config_iin_range = Medium VIIN_SNS = 50mV 1.5 0.5 –40°C 25°C 0.25 TUE_EIN vs VIN_SNS Mfr_ein_config_iin_range = Medium VIIN_SNS = 50mV 0.75 0.50 2975 G26 TUE_ETB vs VIN_SNS 100 –0.50 2975 G25 1.00 0 25 50 75 TEMPERATURE (°C) Mfr_ein_config_iin_range = Medium VIIN_SNS = 50mV 0.75 –0.4 –0.5 –25 TUE_PIN vs VIN_SNS 1.00 Mfr_ein_config_iin_range = Medium VIIN_SNS = 50mV 0.4 0.3 THREE TYPICAL PARTS 2975 G24 TUE_IIN vs VIN_SNS 0.6 –40°C –1.00 –50 100 2975 G23 0.5 0 –0.25 –0.50 2975 G22 0.1 0 –0.50 THREE TYPICAL PARTS –1.00 0 25 –50 –25 50 75 TEMPERATURE (°C) VDD33 = VPWR = 3.3V 0.75 TUE_PIN (% OF READING) VOL (V) 1.0 MMBT3906 DIODE CONNECTED BJTS MFR_TEMP_1_GAIN_ADJ = 0.984 0.75 MFR_EXT_TEMP_1_ADC_OFF = 0.7704°C ERROR (°C) 1.4 0 READ_TEMPERATURE_2 Error vs Temperature 105°C –80 –90 4.5 6.5 8.5 10.5 VIN_SNS (V) 12.5 14.5 2975 G29 –100 62.5 25°C –40°C 625 FREQUENCY (kHz) 6250 2975 G30 2975f For more information www.linear.com/LTC2975 13 LTC2975 Pin Functions PIN NAME PIN NUMBER PIN TYPE DESCRIPTION VSENSEP0 1* In DC/DC Converter Differential (+) Output Voltage-0 Sensing Pin VSENSEM0 2* In DC/DC Converter Differential (–) Output Voltage-0 Sensing Pin VOUT_EN0 3 Out DC/DC Converter Enable-0 Pin. Output High Voltage Optionally Pulled-Up to 12V by 5µA VOUT_EN1 4 Out DC/DC Converter Enable-1 Pin. Output High Voltage Optionally Pulled-Up to 12V by 5µA VOUT_EN2 5 Out DC/DC Converter Enable-2 Pin. Output High Voltage Optionally Pulled-Up to 12V by 5µA VOUT_EN3 6 Out DC/DC Converter Enable-3 Pin. Output High Voltage Optionally Pulled-Up to 12V by 5µA AUXFAULTB 7 Out Auxiliary Fault Output Pin. Output High Voltage Optionally Pulled-Up to 12V by 5µA. Can Be Configured to Pull Low When OV/OC/UC Detected DNC 8 VIN_SNS 9 In VIN SENSE Input. This Voltage is Compared Against the VIN On and Off Voltage Thresholds In Order to Determine When to Enable and Disable, Respectively, the Downstream DC/DC Converters VPWR 10 In VPWR Serves as the Unregulated Power Supply Input to the Chip (4.5 to 15V). If a 4.5V to 15V Supply Voltage Is Unavailable, Short VPWR to VDD33 and Power the Chip Directly from a 3.3V Supply. Bypass to GND with 0.1µF Capacitor. VDD33 11 In/Out If Shorted to VPWR, It Serves as 3.13 to 3.47V Supply Input Pin. Otherwise It Is a 3.3V Internally Regulated Voltage Output (Use 0.1µF Decoupling Capacitor to GND). If using the internal regulator to provide VDD33, do not connect to VDD33 pins of any other devices. VDD33 12 In VDD25 13 In/Out Do Not Connect Do Not Connect to this Pin Input for Internal 2.5V Sub-Regulator. Short this Pin to Pin 11 2.5V Internally Regulated Voltage Output. Bypass to GND with a 0.1µF Capacitor. Do not connect to VDD25 pins of any other devices. VDD25 14 In TSENSE0 15* In/Out External Temperature Current Output and Voltage Input for Channel 0. Maximum allowed capacitance is 1µF 2.5V Supply Voltage Input. Short this Pin to Pin 13 TSENSE1 16* In/Out External Temperature Current Output and Voltage Input for Channel 1. Maximum allowed capacitance is 1µF PWRGD 17 Out Power-Good Open Drain Output. Indicates When Selected Outputs Are Power Good. Can be Used as System Power-on Reset SHARE_CLK 18 In/Out Bidirectional Clock Sharing Pin. Connect a 5.49kΩ Pull-Up Resistor to VDD33. Connect to all other SHARE_CLK pins in the system. GND 19 Ground Chip Ground. Must Be Soldered to PCB GND 20 Ground Chip Ground. Must Be Soldered to PCB GND 21 Ground Chip Ground. Must Be Soldered to PCB CONTROL2 22 In Control Pin 2 Input CONTROL3 23 In Control Pin 3 Input WDI/RESETB 24 In Watchdog Timer Interrupt and Chip Reset Input. Connect a 10kΩ Pull-Up Resistor to VDD33. Rising Edge Resets Watchdog Counter. Holding this Pin Low for More than tRESETB Resets the Chip FAULTB0 25 In/Out Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-0. Connect a 10kΩ Pull-Up Resistor to VDD33 FAULTB1 26 In/Out Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-1. Connect a 10kΩ Pull-Up Resistor to VDD33 TSENSE2 27* In/Out External Temperature Current Output and Voltage Input for Channel 2. Maximum allowed capacitance is 1µF WP 28 In Digital Input. Write-Protect Input Pin, Active High SDA 29 In/Out SCL 30 In PMBus Serial Clock Input Pin (400kHz Maximum) ALERTB 31 Out Open-Drain Output. Generates an Interrupt Request in a Fault/Warning Situation 14 PMBus Bidirectional Serial Data Pin 2975f For more information www.linear.com/LTC2975 LTC2975 Pin Functions PIN NAME PIN NUMBER PIN TYPE CONTROL0 32 In DESCRIPTION Control Pin 0 Input CONTROL1 33 In TSENSE3 34* In/Out Control Pin 1 Input ASEL0 35 In Ternary Address Select Pin 0 Input. Connect to VDD33, GND or Float to Encode 1 of 3 Logic States ASEL1 36 In Ternary Address Select Pin 1 Input. Connect to VDD33, GND or Float to Encode 1 of 3 Logic States GND 37 Ground REFP 38 Out GND 39 Ground REFM 40 Out Reference Return Pin. Needs 0.1µF Decoupling Capacitor to REFP ISENSEP0 41* In DC/DC Converter Differential (+) Output Current-0 Sensing Pin ISENSEM0 42* In DC/DC Converter Differential (–) Output Current-0 Sensing Pin ISENSEP1 43* In DC/DC Converter Differential (+) Output Current-1 Sensing Pin ISENSEM1 44* In DC/DC Converter Differential (–) Output Current-1 Sensing Pin ISENSEP2 45* In DC/DC Converter Differential (+) Output Current-2 Sensing Pin ISENSEM2 46* In DC/DC Converter Differential (–) Output Current-2 Sensing Pin ISENSEP3 47* In DC/DC Converter Differential (+) Output Current-3 Sensing Pin ISENSEM3 48* In DC/DC Converter Differential (–) Output Current-3 Sensing Pin VSENSEP3 49* In DC/DC Converter Differential (+) Output Voltage-3 Sensing Pin VSENSEM3 50* In DC/DC Converter Differential (–) Output Voltage-3 Sensing Pin VIN_SNS_CAP 51 Out VIN_SNS Filter Capacitor Pin. Bypass to Ground with a 10nF Ceramic Capacitor GND 52 Ground External Temperature Current Output and Voltage Input for Channel 3. Maximum allowed capacitance is 1µF Chip Ground. Must Be Soldered to PCB Reference Voltage Output. Needs 0.1µF Decoupling Capacitor to REFM Chip Ground. Must Be Soldered to PCB Chip Ground. Must be Soldered to PCB. VDAC0 53 Out DAC0 Output VDAC1 54 Out DAC1 Output IIN_SNSP 55 In DC/DC Converter Differential (+) Input Current Sensing Pin. If Unused, Connect to VIN_SNS IIN_SNSM 56 In DC/DC Converter Differential (–) Input Current Sensing Pin. If Unused, Connect to VIN_SNS VDAC2 57 Out DAC2 Output VDAC3 58 Out DAC3 Output GND 59 Ground GND 60 Ground VSENSEP2 61* In DC/DC Converter Differential (+) Output Voltage-2 Sensing Pin VSENSEM2 62* In DC/DC Converter Differential (–) Output Voltage-2 Sensing Pin VSENSEP1 63* In DC/DC Converter Differential (+) Output Voltage-1 Sensing Pin VSENSEM1 64* In DC/DC Converter Differential (–) Output Voltage-1 Sensing Pin Chip Ground. Must Be Soldered to PCB Chip Ground. Must Be Soldered to PCB GND 65 Ground Exposed Pad. Must Be Soldered to PCB * Tie any unused VSENSEPn /ISENSEPn , VSENSEMn /ISENSEMn or TSENSEn pins to GND. Refer to Unused ADC Sense Inputs in the Applications Information section. 2975f For more information www.linear.com/LTC2975 15 LTC2975 Block Diagram 3.3V REGULATOR VOUT VIN VPWR 10 VDD33 VDD33(OUT) 11 2.5V REGULATOR VIN VDD33(IN) 12 VOUT VDD25(OUT) 13 VDD25 3R VIN_SNS 9 VSENSEP0 VSENSEM0 R 20Ω ISENSEP0 DNC 8 350Ω VIN_SNS_CAP 51 IIN_SNSM 56 + MUX – 41 ISENSEP0 ISENSEP1 42 ISENSEM0 ISENSEM1 63 VSENSEP1 ICMP VSENSEM2 ISENSEP2 + – 64 VSENSEM1 10-BIT DAC VSENSEM3 INTERNAL TEMP SENSOR 62 VSENSEM2 VCMP ISENSEP3 GND 52 ISENSEM3 + – 45 ISENSEP2 10-BIT DAC 46 ISENSEM2 49 VSENSEP3 + 16-BIT – ∆∑ ADC GND 59 50 VSENSEM3 47 ISENSEP3 ADC CLOCKS GND 60 VDD33 GND 65 48 ISENSEM3 10-BIT DAC 53 VDAC0 VBUF 54 VDAC1 57 VDAC2 REFERENCE 1.232V (TYP) REFP 38 58 VDAC3 PAGE 0 PAGE 1 PAGE 2 PAGE 3 REFM 40 ALERTB 31 SCL 30 ASEL0 35 PMBus INTERFACE (400kHz I2C COMPATIBLE) EEPROM RAM ADC_RESULTS MONITOR LIMITS SERVO TARGETS ASEL1 36 3 VOUT_EN0 WP 28 OSCILLATOR PWRGD 17 SHARE_CLK 18 4 PAGES WDI/RESETB 24 4 PAGES FAULTB0 25 FAULTB1 26 CONTROL0 32 44 ISENSEM1 61 VSENSEP2 VSENSEP3 GND 21 SDA 29 43 ISENSEP1 ISENSEM2 GND 20 GND 39 2 VSENSEM0 VSENSEM1 VSENSEP2 GND 19 GND 37 VSENSEP1 – + + – IIN_SNSP 55 1 VSENSEP0 ISENSEM0 – + + – VDD25(IN) 14 CONTROLLER PMBus ALGORITHM FAULT PROCESSOR WATCHDOG SEQUENCER CLOCK GENERATION MASKING 5 VOUT_EN2 6 VOUT_EN3 VDD PORB 4 VOUT_EN1 7 AUXFAULTB UVLO 15 TSENSE0 EXTERNAL TEMPERATURE SENSOR CONTROL1 33 CONTROL2 22 16 TSENSE1 27 TSENSE2 34 TSENSE3 CONTROL3 23 2975 BD 16 2975f For more information www.linear.com/LTC2975 LTC2975 Operation LTC2975 Operation Overview The LTC2975 is a PMBus programmable power supply controller, monitor, sequencer and voltage and current supervisor that can perform the following operations: • Accept PMBus compatible programming commands. • Provide DC/DC converter input voltage, output voltage, output current, output temperature, and LTC2975 internal temperature readback through the PMBus interface. • Control the output of DC/DC converters that set the output voltage with a trim pin or DC/DC converters that set the output voltage using an external resistor feedback network. • Sequence the startup of DC/DC converters via PMBus programming and the CONTROL input pins. The LTC2975 supports time-based sequencing and tracking sequencing. Cascade sequence on with time based sequence off is also supported. • Trim the DC/DC converter output voltage (typically in 0.02% steps), in closed-loop servo operating mode, autonomously or through PMBus programming. • Margin the DC/DC converter output voltage to PMBus programmed limits. • Trim or margin the DC/DC converter output voltage with direct access to the margin DAC. • Supervise the DC/DC converter input voltage, output voltage, load current and the inductor temperatures for overvalue/undervalue conditions with respect to PMBus programmed limits and generate appropriate faults and warnings. • Accurately handle inductor self-heating transients using a proprietary algorithm. These self-heating effects are combined with external temperature sensor readings to improve accuracy of current supervisors and ADC current measurement. • Respond to a fault condition by continuing operation indefinitely, latching-off after a programmable deglitch period, latching-off immediately or sequencing off after TOFF_DELAY. Use retry mode to automatically recover from a latched-off condition. With retry enabled, MFR_RETRY_COUNT programs the number of retries (0 to 6 or infinite) for all pages. • Optionally stop trimming the DC/DC converter output voltage after it reaches the initial margin or nominal target. Optionally allow trimming restart if target drifts outside of VOUT warning limits. • Store command register contents with CRC to EEPROM through PMBus programming. • Restore EEPROM contents through PMBus programming or when VDD33 is applied on power-up. • Report the DC/DC converter output voltage status through the power good output. • Generate interrupt requests by asserting the ALERTB pin in response to supported PMBus faults and warnings. • Coordinate system wide fault responses for all DC/DC converters connected to the LTC2975 FAULTB0 and FAULTB1 pins. • Synchronize sequencing delays or shutdown for multiple devices using the SHARE_CLK pin. • Software and hardware write protect the command registers. • Disable the input voltage to the supervised DC/DC converters in response to output OV, UV, OC and UC faults. • Log telemetry and status data to EEPROM in response to a faulted-off condition. • Supervise an external microcontroller’s activity for a stalled condition with a programmable watchdog timer and reset it if necessary. • Prevent a DC/DC converter from re-entering the on state after a power cycle until a programmable interval (MFR_RESTART_DELAY) has elapsed and its output has decayed below a programmable threshold voltage (MFR_VOUT_DISCHARGE_THRESHOLD). • Read high side input current, input voltage, input power, and accumulated input energy. • Record minimum and maximum input voltage, input current, input power, output voltages, output currents and output temperatures. • Access user EEPROM data directly, without altering RAM space (Mfr_ee_unlock, Mfr_ee_erase, and Mfr_ee_data). Facilitates in-house bulk programming. • Accommodate multiple hosts with Command Plus. 2975f For more information www.linear.com/LTC2975 17 LTC2975 Operation EEPROM The LTC2975 contains internal EEPROM (Non-Volatile Memory) to store configuration settings and fault log information. EEPROM endurance, retention and mass write operation time are specified over the operating temperature range. See Electrical Characteristics and Absolute Maximum Ratings sections. Non destructive operation above TJ = 105°C is possible although the Electrical Characteristics are not guaranteed and the EEPROM will be degraded. Operating the EEPROM above 105°C may result in a degradation of retention characteristics. The fault logging function, which is useful in debugging system problems that may occur at high temperatures, only writes to fault log EEPROM locations. If occasional writes to these registers occur above 105°C, a slight degradation in the data retention characteristics of the fault log may occur. It is recommended that the EEPROM not be written using STORE_USER_ALL or bulk programming when TJ > 105°C. The degradation in EEPROM retention for temperatures >105°C can be approximated by calculating the dimensionless acceleration factor using the following equation. So the overall retention of the EEPROM was degraded by 86.5 hours as a result of operation at a junction temperature of 125°C for 10 hours. Note that the effect of this overstress is negligible when compared to the overall EEPROM retention rating of 175,200 hours at a junction temperature of 105°C. AUXFAULTB The AUXFAULTB pin can be configured to indicate when some fault conditions have been detected, using a third output level. See Figure 1 for a conceptual view of this multiplexing. 12V Mfr_config_all_auxfaultb_wpu_dis OV/OC/UC (MASKABLE) SET AUXFAULTB Q fault_seen RESET OFF_THEN_ON OR FAULT_RETRY FOR ANY CHANNEL ⎡⎛ Ea ⎞ ⎛ ⎞⎤ 1 1 – ⎢⎜ ⎟•⎜ ⎟⎥ ⎣⎝ k ⎠ ⎝ TUSE +273 TSTRESS +273 ⎠⎦ 2975 F01 Figure 1. AUXFAULTB MUX AF = e where: AF = acceleration factor Ea = activation energy = 1.4eV k = 8.617 • 10–5 eV/°K TUSE = 105°C specified junction temperature TSTRESS = actual junction temperature °C Example: Calculate the effect on retention when operating at a junction temperature of 125°C for 10 hours. TSTRESS = 125°C The MFR_CONFIG2_LTC2975 and MFR_CONFIG3_ LTC2975 commands can be used on a per channel basis to select which, if any, fault conditions will cause the AUXFAULTB pin to be driven to its third output level (fast pull-down to GND). The only fault types which can be propagated to the AUXFAULTB pin are overvoltage faults and overcurrent/undercurrent faults. Mfr_config_all_auxfaultb_wpu selects whether the AUXFAULTB pin is in the hi-Z state, or weakly pulled-up to approximately 12V, using a 5µA current. As shown in Figure 1, the pull-down to GND overrides if any enabled faults are detected. TUSE = 105°C AF = 8.65 Equivalent operating time at 105°C = 86.5 hours. 18 2975f For more information www.linear.com/LTC2975 LTC2975 Operation RESETB Holding the WDI/RESETB pin low for more than tRESETB will cause the LTC2975 to enter the power-on reset state. While in the power-on reset state, the device will not communicate on the I2C bus. Following the subsequent rising-edge of the WDI/RESETB pin, the LTC2975 will execute its power-on sequence per the user configuration stored in EEPROM. Connect WDI/RESETB to VDD33 with a 10k resistor. WDI/RESETB includes an internal 256µs deglitch filter so additional filter capacitance on this pin is not recommended. PMBus Serial Digital Interface The LTC2975 communicates with a host (master) using the standard PMBus serial bus interface. The PMBus Timing Diagram shows the timing relationship of the signals on the bus. The two bus lines, SDA and SCL, must be high when the bus is not in use. External pull-up resistors or current sources are required on these lines. The PMBus two wire interface is an incremental extension of the SMBus. SMBus is built upon I2C with some minor differences in timing, DC parameters and protocol. The SMBus protocols are more robust than simple I2C byte commands because they provide timeouts to prevent bus hangs and optional Packet Error Checking (PEC) to ensure data integrity. In general, a master device that can be configured for I2C communication can be used for PMBus communication with little or no change to hardware or firmware. For a description of the minor extensions and exceptions PMBus makes to SMBus, refer to PMBus Specification Part 1 Revision 1.1: Section 5: Transport. This can be found at: www.pmbus.org For a description of the differences between SMBus and I2C, refer to System Management Bus (SMBus) Specification Version 2.0: Appendix B – Differences between SMBus and I2C. This can be found at: www.smbus.org The following SMBus commands are supported: When using an I2C controller to communicate with a PMBus part it is important that the controller be able to write a byte of data without generating a stop. This will allow the controller to properly form the repeated start of a PMBus read command by concatenating a start command byte write with an I2C read. • Write Byte, Write Word, Send Byte Device Address • Read Byte, Read Word, Block Read The I2C/SMBus address of the LTC2975 equals the base address + N where N is a number from 0 to 8. N can be configured by setting the ASEL0 and ASEL1 pins to VDD33, GND or FLOAT. See Table 1. Using one base address and the nine values of N, nine LTC2975s can be connected together to control thirty six outputs. The base address is stored in the MFR_I2C_BASE_ADDRESS register. The base address can be written to any value, but generally should not be changed unless the desired range of addresses overlap existing addresses. Watch that the address range does not overlap with other I2C/SMBus device or global addresses, including I2C/SMBus multiplexers and bus buffers. This will bring you great happiness. The LTC2975 is a slave device. The master can communicate with the LTC2975 using the following formats: • Master transmitter, slave receiver • Master receiver, slave transmitter • Alert Response Address Figures 2 to 14 illustrate the aforementioned SMBus protocols. All transactions support PEC (packet error check) and GCP (group command protocol). The Block Read supports 255 bytes of returned data. For this reason, the SMBus timeout may be extended using the Mfr_config_all_longer_pmbus_timeout setting. PMBus PMBus is an industry standard that defines a means of communication with power conversion devices. It is comprised of an industry standard SMBus serial interface and the PMBus command language. The LTC2975 always responds to its global address and the SMBus Alert Response address regardless of the state of its ASEL pins and the MFR_I2C_BASE_ADDRESS register. 2975f For more information www.linear.com/LTC2975 19 LTC2975 Operation Processing Commands The LTC2975 uses a dedicated processing block to ensure quick response to all of its commands. There are a few exceptions where the part will NACK a subsequent command because it is still processing the previous command. These are summarized in the following tables. MFR_COMMON is a special command that may always be read even when the part is busy. This provides an alternate method for a host to determine if the LTC2975 is busy. EEPROM Related Commands COMMAND TYPICAL DELAY* COMMENT STORE_USER_ALL tMASS_WRITE See Electrical Characterization table. The LTC2975 will not accept any commands while it is transferring register contents to the EEPROM. The command byte will be NACKed. MFR_COMMON may always be read. RESTORE_USER_ALL 30ms The LTC2975 will not accept any commands while it is transferring EEPROM data to command registers. The command byte will be NACKed. MFR_COMMON may always be read. MFR_FAULT_LOG_CLEAR 175ms The LTC2975 will not accept any commands while it is initializing the fault log EEPROM space. The command byte will be NACKed. MFR_COMMON may always be read. MFR_FAULT_LOG_STORE 20ms The LTC2975 will not accept any commands while it is transferring fault log RAM buffer to EEPROM space. The command byte will be NACKed. MFR_COMMON may always be read. Internal Fault log 20ms An internal fault log event is a one time event that uploads the contents of the fault log to EEPROM in response to a fault. Internal fault logging may be disabled. Commands received during this EEPROM write are NACKed. MFR_COMMON may always be read. MFR_FAULT_LOG_ RESTORE 2ms The LTC2975 will not accept any commands while it is transferring EEPROM data to the fault log RAM buffer. The command byte will be NACKed. MFR_COMMON may always be read. *The typical delay is measured from the command’s stop to the next command’s start. Other Commands COMMAND TYPICAL DELAY* COMMENT MFR_CONFIG <50µs The LTC2975 will not accept any commands while it is completing this command. The command byte will be NACKed. MFR_COMMON may always be read. IOUT_CAL_GAIN <500µs The LTC2975 will not accept any commands while it is completing this command. The command byte will be NACKed. MFR_COMMON may always be read. *The delay is measured from the command’s stop to the next command’s start. Other PMBus Timing Notes COMMAND COMMENT CLEAR_FAULTS The LTC2975 will accept commands while it is completing this command but the affected status flags will not be cleared for up to 500µs. 20 2975f For more information www.linear.com/LTC2975 LTC2975 Operation Table 1. LTC2975 Address Look-Up Table with MFR_I2C_BASE_ADDRESS Set to 7bit 0x5C ADDRESS PINS HEX DEVICE ADDRESS DESCRIPTION 7-Bit BINARY DEVICE ADDRESS ASEL1 ASEL0 8-Bit 6 5 4 3 2 1 0 R/W X X Alert Response X X Global 0C 19 0 0 0 1 1 0 0 1 5B B6 1 0 1 1 0 1 1 0 L L N=0 5C* B8 1 0 1 1 1 0 0 0 L NC N=1 5D BA 1 0 1 1 1 0 1 0 L H N=2 5E BC 1 0 1 1 1 1 0 0 NC L N=3 5F BE 1 0 1 1 1 1 1 0 NC NC N=4 60 C0 1 1 0 0 0 0 0 0 NC H N=5 61 C2 1 1 0 0 0 0 1 0 H L N=6 62 C4 1 1 0 0 0 1 0 0 H NC N=7 63 C6 1 1 0 0 0 1 1 0 H H N=8 64 C8 1 1 0 0 1 0 0 0 H = Tie to VDD33, NC = No Connect = Open or Float, L = Tie to GND, X = Don’t Care *MFR_I2C_BASE_ADDRESS = 7bit 0x5C (Factory Default) 1 7 1 1 8 1 1 DATA BYTE A P S SLAVE ADDRESS Wr A S START CONDITION Sr REPEATED START CONDITION Rd READ (BIT VALUE OF 1) Wr WRITE (BIT VALUE OF 0) A NOT ACKNOWLEDGE (HIGH) A ACKNOWLEDGE (LOW) P STOP CONDITION PEC PACKET ERROR CODE MASTER TO SLAVE SLAVE TO MASTER CONTINUATION OF PROTOCOL 2975 F02 Figure 2. PMBus Packet Protocol Diagram Element Key 1 S 7 1 1 8 1 SLAVE ADDRESS Wr A COMMAND CODE A 8 1 1 DATA BYTE A P 2975 F03 Figure 3. Write Byte Protocol 1 S 7 1 1 8 1 SLAVE ADDRESS Wr A COMMAND CODE A 8 1 8 1 1 DATA BYTE LOW A DATA BYTE HIGH A P 2975 F04 Figure 4. Write Word Protocol 1 S 7 1 1 8 1 SLAVE ADDRESS Wr A COMMAND CODE A 8 1 8 1 1 DATA BYTE A PEC A P 2975 F05 Figure 5. Write Byte Protocol with PEC 2975f For more information www.linear.com/LTC2975 21 LTC2975 Operation 1 S 7 1 1 8 1 SLAVE ADDRESS Wr A COMMAND CODE A 8 1 8 1 8 1 1 DATA BYTE LOW A DATA BYTE HIGH A PEC A P 2975 F06 Figure 6. Write Word Protocol with PEC 1 S 1 1 SLAVE ADDRESS Wr A COMMAND CODE A 7 1 1 8 P 2975 F07 Figure 7. Send Byte Protocol 1 S 7 1 1 8 1 SLAVE ADDRESS Wr A COMMAND CODE A 8 1 1 PEC A P 2975 F08 Figure 8. Send Byte Protocol with PEC 1 S 7 1 1 8 1 SLAVE ADDRESS Wr A COMMAND CODE A 1 7 1 1 Sr SLAVE ADDRESS Rd A 8 1 DATA BYTE LOW A 1 1 DATA BYTE HIGH A 8 P 2975 F09 Figure 9. Read Word Protocol 1 S 7 1 1 8 1 1 7 1 1 SLAVE ADDRESS Wr A COMMAND CODE A Sr SLAVE ADDRESS Rd A 8 1 DATA BYTE LOW A 8 1 DATA BYTE HIGH A 8 1 1 PEC A P 2975 F10 Figure 10. Read Word Protocol with PEC 1 S 7 1 1 8 1 1 7 1 1 SLAVE ADDRESS Wr A COMMAND CODE A Sr SLAVE ADDRESS Rd A 8 1 1 DATA BYTE A P 2975 F11 Figure 11. Read Byte Protocol 1 S 7 1 1 8 1 1 7 1 1 SLAVE ADDRESS Wr A COMMAND CODE A Sr SLAVE ADDRESS Rd A 8 1 DATA BYTE A PEC 1 1 A P 2975 F12 Figure 12. Read Byte Protocol with PEC 1 S 7 1 1 8 1 SLAVE ADDRESS Wr A COMMAND CODE A 1 7 1 1 Sr SLAVE ADDRESS Rd A 8 1 8 1 DATA BYTE 1 A DATA BYTE 2 A ••• 8 1 BYTE COUNT = N A 8 1 1 DATA BYTE N A P ••• 2975 F13 Figure 13. Block Read 1 S 7 1 1 8 1 SLAVE ADDRESS Wr A COMMAND CODE A 8 1 8 1 DATA BYTE 1 A DATA BYTE 2 A ••• 1 7 1 1 Sr SLAVE ADDRESS Rd A 8 1 BYTE COUNT = N A 8 1 8 1 1 DATA BYTE N A PEC A P ••• 2975 F14 Figure 14. Block Read with PEC 22 2975f For more information www.linear.com/LTC2975 LTC2975 PMBUS Command Summary Summary Table COMMAND NAME CMD CODE DESCRIPTION TYPE DEFAULT VALUE: DATA FLOAT REF PAGED FORMAT UNITS EEPROM HEX PAGE PAGE 0x00 Channel or page currently selected for any command that supports paging. R/W Byte N Reg 0x00 29 OPERATION 0x01 Operating mode control. On/Off, Margin High R/W Byte and Margin Low. Y Reg Y 0x00 34 ON_OFF_CONFIG 0x02 CONTROL pin and PMBus on/off command setting. R/W Byte Y Reg Y 0x1E 35 CLEAR_FAULTS 0x03 Clear any fault bits that have been set. Send Byte Y NA 64 WRITE_PROTECT 0x10 Level of protection provided by the device against accidental changes. R/W Byte N 0x00 30 STORE_USER_ALL 0x15 Store entire operating memory to EEPROM. Send Byte RESTORE_USER_ALL 0x16 Restore entire operating memory from EEPROM. Send Byte N NA 45 N NA 45 CAPABILITY 0x19 Summary of PMBus optional communication protocols supported by this device. R Byte N Reg 0xB0 83 VOUT_MODE 0x20 Output voltage data format and mantissa exponent (2–13). R Byte Y Reg 0x13 51 VOUT_COMMAND 0x21 Servo target. Nominal DC/DC converter output voltage setpoint. R/W Word Y L16 V Y 1.0 0x2000 51 VOUT_MAX 0x24 Upper limit on the output voltage the unit can command regardless of any other commands. R/W Word Y L16 V Y 4.0 0x8000 51 VOUT_MARGIN_HIGH 0x25 Margin high DC/DC converter output voltage R/W Word setting. Y L16 V Y 1.05 0x219A 51 VOUT_MARGIN_LOW 0x26 Margin low DC/DC converter output voltage setting. R/W Word Y L16 V Y 0.95 0x1E66 51 VIN_ON 0x35 Input voltage above which power conversion R/W Word can be enabled. N L11 V Y 10.0 0xD280 47 VIN_OFF 0x36 Input voltage below which power conversion R/W Word is disabled. All VOUT_EN pins go off immediately or sequence off after TOFF_ DELAY (See Mfr_config_track_enn). N L11 V Y 9.0 0xD240 47 IOUT_CAL_GAIN 0x38 The nominal resistance of the current sense element in mΩ. R/W Word Y L11 mΩ Y 1.0 0xBA00 52 VOUT_OV_FAULT_LIMIT 0x40 Output overvoltage fault limit. R/W Word Y L16 V Y 1.1 0x2333 51 VOUT_OV_FAULT_RESPONSE 0x41 Action to be taken by the device when an output overvoltage fault is detected. R/W Byte Y Reg Y 0x80 59 VOUT_OV_WARN_LIMIT 0x42 Output overvoltage warning limit. R/W Word Y L16 V Y 1.075 0x2266 51 VOUT_UV_WARN_LIMIT 0x43 Output undervoltage warning limit. R/W Word Y L16 V Y 0.925 0x1D9A 51 VOUT_UV_FAULT_LIMIT 0x44 Output undervoltage fault limit. Used for Ton_max_fault and power good deassertion. R/W Word Y L16 V Y 0.9 0x1CCD 51 Reg Y Note: The data format abbreviations are detailed at the end of this table 2975f For more information www.linear.com/LTC2975 23 LTC2975 PMBUS Command Summary Summary Table COMMAND NAME CMD CODE DESCRIPTION TYPE DEFAULT VALUE: DATA FLOAT REF PAGED FORMAT UNITS EEPROM HEX PAGE VOUT_UV_FAULT_RESPONSE 0x45 Action to be taken by the device when an output undervoltage fault is detected. R/W Byte Y Reg Y 0x7F 59 IOUT_OC_FAULT_LIMIT 0x46 Output overcurrent fault limit. R/W Word Y L11 Y 10.0 0xD280 60 IOUT_OC_FAULT_RESPONSE 0x47 Action to be taken by the device when an output overcurrent fault is detected. R/W Byte Y Reg Y 0x00 60 IOUT_OC_WARN_LIMIT 0x4A Output overcurrent warning limit. R/W Word Y L11 A Y 5.0 0xCA80 52 IOUT_UC_FAULT_LIMIT 0x4B Output undercurrent fault limit. Used to detect a reverse current and must be a negative value. R/W Word Y L11 A Y –1.0 0xB400 52 IOUT_UC_FAULT_RESPONSE 0x4C Action to be taken by the device when an output undercurrent fault is detected. R/W Byte Y Reg Y 0x00 60 OT_FAULT_LIMIT 0x4F Overtemperature fault limit for the external temperature sensor. R/W Word Y L11 Y 65.0 0xEA08 54 OT_FAULT_RESPONSE 0x50 Action to be taken by the device when an overtemperature fault is detected on the external temperature sensor. R/W Byte Y Reg Y 0xB8 61 OT_WARN_LIMIT 0x51 Overtemperature warning limit for the external temperature sensor R/W Word Y L11 °C Y 60.0 0xE3C0 54 UT_WARN_LIMIT 0x52 Undertemperature warning limit for the external temperature sensor. R/W Word Y L11 °C Y 0 0x8000 54 UT_FAULT_LIMIT 0x53 Undertemperature fault limit for the external temperature sensor. R/W Word Y L11 °C Y –5.0 0xCD80 54 UT_FAULT_RESPONSE 0x54 Action to be taken by the device when an undertemperature fault is detected on the external temperature sensor. R/W Byte Y Reg Y 0xB8 61 VIN_OV_FAULT_LIMIT 0x55 Input overvoltage fault limit measured at VIN_SNS pin. R/W Word N L11 Y 15.0 0xD3C0 47 VIN_OV_FAULT_RESPONSE 0x56 Action to be taken by the device when an input overvoltage fault is detected. R/W Byte N Reg Y 0x80 61 VIN_OV_WARN_LIMIT 0x57 Input overvoltage warning limit measured at VIN_SNS pin. R/W Word N L11 V Y 14.0 0xD380 47 VIN_UV_WARN_LIMIT 0x58 Input undervoltage warning limit measured at VIN_SNS pin. R/W Word N L11 V Y 0 0x8000 47 VIN_UV_FAULT_LIMIT 0x59 Input undervoltage fault limit measured at VIN_SNS pin. R/W Word N L11 V Y 0 0x8000 47 VIN_UV_FAULT_RESPONSE 0x5A Action to be taken by the device when an input undervoltage fault is detected. R/W Byte N Reg Y 0x00 61 POWER_GOOD_ON 0x5E Output voltage at or above which a power good should be asserted. R/W Word Y L16 V Y 0.96 0x1EB8 51 POWER_GOOD_OFF 0x5F Output voltage at or below which a power good should be de-asserted when Mfr_ config_all_pwrgd_off_uses_uv is clear. R/W Word Y L16 V Y 0.94 0x1E14 51 TON_DELAY 0x60 Time from CONTROL pin and/or OPERATION R/W Word command = ON to VOUT_EN pin = ON. Y L11 mS Y 1.0 0xBA00 56 24 A °C V 2975f For more information www.linear.com/LTC2975 LTC2975 PMBUS Command Summary Summary Table COMMAND NAME CMD CODE DESCRIPTION TYPE DEFAULT VALUE: DATA FLOAT REF PAGED FORMAT UNITS EEPROM HEX PAGE TON_RISE 0x61 Time from when the VOUT_ENn pin goes high until the LTC2975 optionally soft-connects its DAC and begins to servo the output voltage to the desired value. R/W Word Y L11 mS Y 10.0 0xD280 56 TON_MAX_FAULT_LIMIT 0x62 Maximum time from VOUT_EN pin on assertion that an UV condition will be tolerated before a TON_MAX_FAULT condition results. R/W Word Y L11 mS Y 15.0 0xD3C0 56 R/W Byte Y Reg Y 0xB8 62 TOFF_DELAY 0x64 Time from CONTROL pin and/or OPERATION R/W Word command = OFF to VOUT_EN pin = OFF. Y L11 Y 1.0 0xBA00 56 STATUS_BYTE 0x78 One byte summary of the unit’s fault condition. R Byte Y Reg NA 65 STATUS_WORD 0x79 Two byte summary of the unit’s fault condition. R Word Y Reg NA 65 STATUS_VOUT 0x7A Output voltage fault and warning status. R Byte Y Reg NA 66 STATUS_IOUT 0x7B Output current fault and warning status. R Byte Y Reg NA 66 TON_MAX_FAULT_RESPONSE 0x63 Action to be taken by the device when a TON_MAX_FAULT event is detected. mS STATUS_INPUT 0x7C Input supply fault and warning status. R Byte N Reg NA 66 STATUS_TEMPERATURE 0x7D External temperature fault and warning status for READ_TEMPERATURE_1. R Byte Y Reg NA 67 STATUS_CML 0x7E Communication and memory fault and warning status. R Byte N Reg NA 67 STATUS_MFR_SPECIFIC 0x80 Manufacturer specific fault and state information. R Byte Y Reg NA 68 READ_VIN 0x88 Input supply voltage. R Word N L11 V NA 70 READ_IIN 0x89 DC/DC converter input current. R Word Y L11 A NA 70 READ_VOUT 0x8B DC/DC converter output voltage. R Word Y L16 V NA 70 READ_IOUT 0x8C DC/DC converter output current. R Word Y L11 A NA 71 READ_TEMPERATURE_1 0x8D External diode junction temperature. This is the value used for all temperature related processing, including IOUT_CAL_GAIN. R Word Y L11 °C NA 71 READ_TEMPERATURE_2 0x8E Internal junction temperature. R Word N L11 °C NA 71 READ_POUT 0x96 DC/DC converter output power. R Word Y L11 W NA 71 READ_PIN 0x97 DC/DC converter input power. R Word Y L11 W PMBUS_REVISION 0x98 PMBus revision supported by this device. Current revision is 1.1. R Byte N Reg USER_DATA_00 0xB0 Manufacturer reserved for LTpowerPlay. R/W Word N Reg USER_DATA_01 0xB1 Manufacturer reserved for LTpowerPlay. R/W Word Y Reg USER_DATA_02 0xB2 OEM Reserved. R/W Word N Reg USER_DATA_03 0xB3 Scratchpad location. R/W Word Y Reg USER_DATA_04 0xB4 Scratchpad location. R/W Word N Reg MFR_LTC_RESERVED_1 0xB5 Manufacturer reserved. R/W Word Y Reg NA 70 0x11 83 NA 83 Y NA 83 Y NA 83 Y 0x0000 83 Y 0x0000 83 Y NA 83 Y 2975f For more information www.linear.com/LTC2975 25 LTC2975 PMBUS Command Summary Summary Table COMMAND NAME CMD CODE DESCRIPTION TYPE DEFAULT VALUE: DATA FLOAT REF PAGED FORMAT UNITS EEPROM HEX PAGE MFR_T_SELF_HEAT 0xB8 Calculated temperature rise due to selfheating of output current sense device above value measured by external temperature sensor. R Word Y L11 MFR_IOUT_CAL_GAIN_TAU_ INV 0xB9 Inverse of time constant for Mfr_t_self_heat changes scaled by 4 • tCONV_SENSE. R/W Word Y L11 R/W Word Y L11 °C/W R Word Y CF 2.5mA MFR_IOUT_CAL_GAIN_THETA 0xBA Thermal resistance from inductor core to point measured by external temperature sensor. °C NA 54 Y 0.0 0x8000 54 Y 0.0 0x8000 54 NA 72 MFR_READ_IOUT 0xBB Alternate data format for READ_IOUT. One LSB = 2.5mA. MFR_LTC_RESERVED_2 0xBC Manufacturer reserved. R/W Word Y Reg NA 83 MFR_EE_UNLOCK 0xBD Unlock user EEPROM for access by MFR_ EE_ERASE and MFR_EE_DATA commands. R/W Byte N Reg NA 46 MFR_EE_ERASE 0xBE Initialize user EEPROM for bulk programming by MFR_EE_DATA. R/W Byte N Reg NA 46 MFR_EE_DATA 0xBF Data transferred to and from EEPROM using R/W Word sequential PMBus word reads or writes. Supports bulk programming. N Reg NA 46 MFR_EIN 0xC0 Input Energy data bytes. R Block N Reg NA 48 MFR_EIN_CONFIG 0xC1 Configuration register for energy and input current. R/W Byte N Reg Y 0x00 49 MFR_SPECIAL_LOT 0xC2 Customer dependent codes that identify the factory programmed user configuration stored in EEPROM. Contact factory for default value. R Byte Y Reg Y NA 83 MFR_IIN_CAL_GAIN_TC 0xC3 Temperature coefficient applied to IIN_CAL_ R/W Word GAIN. N CF ppm Y 0x0000 50 MFR_IIN_PEAK 0xC4 Maximum measured value of READ_IIN R Word Y L11 A NA 71 MFR_IIN_MIN 0xC5 Minimum measured value of READ_IIN. R Word Y L11 A NA 71 MFR_PIN_PEAK 0xC6 Maximum measured value of READ_PIN. R Word Y L11 W NA 71 MFR_PIN_MIN 0xC7 Minimum measured value of READ_PIN. R Word Y L11 W NA 71 MFR_COMMAND_PLUS 0xC8 Alternate access to block read and other data. Commands for all additional hosts. R/W Word N Reg 31 MFR_DATA_PLUS0 0xC9 Alternate access to block read and other data. Data for additional host 0. R/W Word N Reg 31 MFR_DATA_PLUS1 0xCA Alternate access to block read and other data. Data for additional host 1. R/W Word N Reg 31 MFR_CONFIG_LTC2975 0xD0 Configuration bits that are channel specific. R/W Word Y Reg Y 0x0080 36 MFR_CONFIG_ALL_LTC2975 0xD1 Configuration bits that are common to all pages. R/W Word N Reg Y 0x0F7B 43 MFR_FAULTB0_PROPAGATE 0xD2 Configuration that determines if a channel’s faulted off state is propagated to the FAULTB0 pin. R/W Byte Y Reg Y 0x00 63 MFR_FAULTB1_PROPAGATE 0xD3 Configuration that determines if a channel’s faulted off state is propagated to the FAULTB1 pin. R/W Byte Y Reg Y 0x00 63 26 2975f For more information www.linear.com/LTC2975 LTC2975 PMBUS Command Summary Summary Table COMMAND NAME CMD CODE DESCRIPTION TYPE DEFAULT VALUE: DATA FLOAT REF PAGED FORMAT UNITS EEPROM HEX PAGE MFR_PWRGD_EN 0xD4 Configuration that maps WDI/RESETB status R/W Word and individual channel power good to the PWRGD pin. N Reg Y 0x0000 57 MFR_FAULTB0_RESPONSE 0xD5 Action to be taken by the device when the FAULTB0 pin is asserted low. R/W Byte N Reg Y 0x00 63 MFR_FAULTB1_RESPONSE 0xD6 Action to be taken by the device when the FAULTB1 pin is asserted low. R/W Byte N Reg Y 0x00 63 MFR_IOUT_PEAK 0xD7 Maximum measured value of READ_IOUT. R Word Y L11 A NA 73 MFR_IOUT_MIN 0xD8 Minimum measured value of READ_IOUT. R Word Y L11 A MFR_CONFIG2_LTC2975 0xD9 Configuration bits that are channel specific R/W Byte N Reg MFR_CONFIG3_LTC2975 0xDA Configuration bits that are channel specific R/W Byte N Reg MFR_RETRY_DELAY 0xDB Retry interval during FAULT retry mode. R/W Word N L11 mS MFR_RESTART_DELAY 0xDC Delay from actual CONTROL active edge to virtual CONTROL active edge. R/W Word N L11 mS MFR_VOUT_PEAK 0xDD Maximum measured value of READ_VOUT. R Word Y L16 V MFR_VIN_PEAK 0xDE Maximum measured value of READ_VIN. R Word N L11 R Word Y L11 MFR_TEMPERATURE_1_PEAK 0xDF Maximum measured value of READ_ TEMPERATURE_1. NA 73 Y 0x00 38 Y 0x00 39 Y 200 0xF320 62 Y 400 0xFB20 57 NA 73 V NA 73 °C NA 73 0x0000 51 MFR_DAC 0xE0 Manufacturer register that contains the code R/W Word of the 10-bit DAC. Y Reg MFR_POWERGOOD_ ASSERTION_DELAY 0xE1 Power-good output assertion delay. R/W Word N L11 mS Y 100 0xEB20 58 MFR_WATCHDOG_T_FIRST 0xE2 First watchdog timer interval. R/W Word N L11 mS Y 0 0x8000 58 MFR_WATCHDOG_T 0xE3 Watchdog timer interval. R/W Word N L11 mS Y 0 0x8000 58 MFR_PAGE_FF_MASK 0xE4 Configuration defining which channels respond to global page commands (PAGE=0xFF). R/W Byte N Reg Y 0x0F 30 MFR_PADS 0xE5 Current state of selected digital I/O pads. R/W Word N Reg NA 68 MFR_I2C_BASE_ADDRESS 0xE6 Base value of the I2C/SMBus address byte. R/W Byte N Reg Y 0x5C 31 MFR_SPECIAL_ID 0xE7 Manufacturer code for identifying the LTC2975. R Word N Reg Y 547 83 0x0223 Y 1.0 0xBA00 49 Y 2.0 0xC200 51 N NA 74 Send Byte N NA 74 0xEC Initialize the EEPROM block reserved for fault Send Byte logging and clear any previous fault logging locks. N NA 75 MFR_IIN_CAL_GAIN 0xE8 The nominal resistance of the input current sense element in mΩ. R/W Word N L11 MFR_VOUT_DISCHARGE_ THRESHOLD 0xE9 Coefficient used to multiply VOUT_ COMMAND in order to determine VOUT off threshold voltage. R/W Word Y L11 MFR_FAULT_LOG_STORE 0xEA Command a transfer of the fault log from RAM to EEPROM. Send Byte MFR_FAULT_LOG_RESTORE 0xEB Command a transfer of the fault log previously stored in EEPROM back to RAM. MFR_FAULT_LOG_CLEAR mΩ 2975f For more information www.linear.com/LTC2975 27 LTC2975 PMBUS Command Summary Summary Table DEFAULT VALUE: DATA FLOAT REF PAGED FORMAT UNITS EEPROM HEX PAGE COMMAND NAME CMD CODE DESCRIPTION TYPE MFR_FAULT_LOG_STATUS 0xED Fault logging status. R Byte N Reg Y NA 75 MFR_FAULT_LOG 0xEE Fault log data bytes. This sequentially retrieved data is used to assemble a complete fault log. R Block N Reg Y NA 75 MFR_COMMON 0xEF Manufacturer status bits that are common across multiple LTC chips. R Byte N Reg NA 69 MFR_IOUT_CAL_GAIN_TC 0xF6 Temperature coefficient applied to IOUT_ CAL_GAIN. R/W Word Y CF Y 0x0000 53 MFR_RETRY_COUNT 0xF7 Retry count for all faulted off conditions that enable retry. R/W Byte N Reg Y 0x07 62 MFR_TEMP_1_GAIN 0xF8 Inverse of external diode temperature non ideality factor. One LSB = 2–14. R/W Word Y CF Y 1 0x4000 54 MFR_TEMP_1_OFFSET 0xF9 Offset value for the external temperature. R/W Word Y L11 °C Y 0 0x8000 54 MFR_IOUT_SENSE_VOLTAGE 0xFA Absolute value of VISENSEP – VISENSEM. One LSB = 3.05µV. R Word Y CF 3.05µV NA 73 MFR_VOUT_MIN 0xFB Minimum measured value of READ_VOUT. R Word Y L16 V NA 73 MFR_VIN_MIN 0xFC Minimum measured value of READ_VIN. R Word N L11 V NA 73 MFR_TEMPERATURE_1_MIN 0xFD Minimum measured value of READ_ TEMPERATURE_1. R Word Y L11 °C NA 74 ppm Data Formats L11 Linear_5s_11s L16 Linear_16u Reg Register CF Custom Format 28 PMBus data field b[15:0] Value = Y • 2N where N = b[15:11] is a 5-bit two’s complement integer and Y = b[10:0] is an 11-bit two’s complement integer Example: READ_VIN = 10V For b[15:0] = 0xD280 = 1101_0010_1000_0000b Value = 640 • 2–6 = 10 See PMBus Spec Part II: Paragraph 7.1 PMBus data field b[15:0] Value = Y • 2N where Y = b[15:0] is an unsigned integer and N = Vout_mode_parameter is a 5-bit two’s complement exponent that is hardwired to –13 decimal. Example: VOUT_COMMAND = 4.75V For b[15:0] = 0x9800 = 1001_1000_0000_0000b Value = 38912 • 2–13 = 4.75 See PMBus Spec Part II: Paragraph 8.3.1 PMBus data field b[15:0] or b[7:0]. Bit field meaning is defined in detailed PMBus Command Register Description. PMBus data field b[15:0] Value is defined in detailed PMBus Command Register Description. This is often an unsigned or two’s complement integer scaled by an MFR specific constant. 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description Addressing and Write Protect COMMAND NAME CMD CODE PAGE 0x00 Channel or page currently selected for any command that supports paging. R/W Byte N Reg WRITE_PROTECT 0x10 Level of protection provided by the device against accidental changes. R/W Byte N Reg MFR_I2C_BASE_ADDRESS 0xE6 Base value of the I2C/SMBus address byte. R/W Byte N MFR_PAGE_FF_MASK 0xE4 Configuration defining which channels respond to global page commands (PAGE=0xFF). R/W Byte N MFR_COMMAND_PLUS 0xC8 Alternate access to block read and other data. Commands for all additional hosts. R/W Word N Reg 31 MFR_DATA_PLUS0 0xC9 Alternate access to block read and other data. Data for additional host 0. R/W Word N Reg 31 MFR_DATA_PLUS1 0xCA Alternate access to block read and other data. Data for additional host 1. R/W Word N Reg 31 DESCRIPTION TYPE PAGED FORMAT UNITS EEPROM DEFAULT REF VALUE PAGE 0x00 29 Y 0x00 30 Reg Y 0x5C 31 Reg Y 0x0F 30 PAGE The LTC2975 has four pages that correspond to the four DC/DC converter channels that can be managed. Each DC/ DC converter channel can be uniquely programmed by first setting the appropriate page. Setting PAGE = 0xFF allows a simultaneous write to all pages for PMBus commands that support global page programming. The only commands that support PAGE = 0xFF are CLEAR_FAULTS, OPERATION and ON_OFF_CONFIG. See MFR_PAGE_FF_MASK for additional options. Reading any paged PMBus register with PAGE = 0xFF returns unpredictable data and will trigger a CML fault. Writes to pages that do not support PAGE = 0xFF with PAGE = 0xFF will be ignored and generate a CML fault. PAGE Data Contents BIT(S) SYMBOL OPERATION b[7:0] Page Page operation. 0x00: All PMBus commands address channel/page 0. 0x01: All PMBus commands address channel/page 1. 0x02: All PMBus commands address channel/page 2. 0x03: All PMBus commands address channel/page 3. 0xXX: All non specified values reserved. 0xFF: A single PMBus write/send to commands that support this mode will simultaneously address all channel/pages with MFR_PAGE_FF_MASK enabled. 2975f For more information www.linear.com/LTC2975 29 LTC2975 PMBus Command Description WRITE_PROTECT The WRITE_PROTECT command provides protection against accidental programming of the LTC2975 command registers. All supported commands may have their parameters read, regardless of the WRITE_PROTECT setting, and the EEPROM contents can also be read regardless of the WRITE_PROTECT settings. There are two levels of protection: • Level 1: Nothing can be changed except the level of write protection itself. Values can be read from all pages. This setting can be stored to EEPROM. • Level 2: Nothing can be changed except for the level of protection, channel on/off state, and clearing of faults. Values can be read from all pages. This setting can be stored to EEPROM. WRITE_PROTECT Data Contents BIT(S) SYMBOL OPERATION b[7:0] Write_protect[7:0] 1000_0000b: Level 1 Protection - Disable all writes except to the WRITE_PROTECT, PAGE, MFR_EE_UNLOCK, and STORE_ USER_ALL commands. 0100_0000b: Level 2 Protection – Disable all writes except to the WRITE_PROTECT, PAGE, MFR_EE_UNLOCK, STORE_ USER_ALL, OPERATION, MFR_PAGE_FF_MASK and CLEAR_FAULTS commands. 0000_0000b: Enable writes to all commands. xxxx_xxxxb: All other values reserved. WRITE-PROTECT Pin The WP pin allows the user to write-protect the LTC2975’s configuration registers. The WP pin is active high, and when asserted it provides Level 2 protection: all writes are disabled except to the WRITE_PROTECT, PAGE, MFR_EE_UNLOCK, STORE_USER_ALL, OPERATION, MFR_PAGE_FF_MASK and CLEAR_FAULTS commands. The most restrictive setting between the WP pin and WRITE_PROTECT command will override. For example if WP = 1 and WRITE_PROTECT = 0x80, then the WRITE_PROTECT command overrides, since it is the most restrictive. MFR_PAGE_FF_MASK The MFR_PAGE_FF_MASK command is used to select which channels respond when the global page command (PAGE = 0xFF) is in use. MFR_PAGE_FF_MASK Data Contents BIT(S) SYMBOL OPERATION b[7:4] Reserved Always returns 0000b b[3] Mfr_page_ff_mask_chan3 Channel 3 masking of global page command (PAGE=0xFF) accesses 0 = ignore global page command accesses 1 = fully respond to global page command accesses b[2] Mfr_page_ff_mask_chan2 Channel 2 masking of global page command (PAGE=0xFF) accesses 0 = ignore global page command accesses 1 = fully respond to global page command accesses b[1] Mfr_page_ff_mask_chan1 Channel 1 masking of global page command (PAGE=0xFF) accesses 0 = ignore global page command accesses 1 = fully respond to global page command accesses 30 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description MFR_PAGE_FF_MASK Data Contents BIT(S) SYMBOL b[0] OPERATION Mfr_page_ff_mask_chan0 Channel 0 masking of global page command (PAGE = 0xFF) accesses 0 = ignore global page command accesses 1 = fully respond to global page command accesses MFR_I2C_BASE_ADDRESS The MFR_I2C_BASE_ADDRESS command determines the base value for the I2C/SMBus address byte. Offsets of 0 to 8 are added to this base address to generate the device I2C/SMBus address. The part responds to the device address. For example, with the factory default MFR_I2C_BASE_ADDRESS of 5C, with both ASEL1 and ASEL0 High (Offset N=2), the device address would be 0x5C+2 = 0x5E. MFR_I2C_BASE_ADDRESS Data Contents BIT(S) SYMBOL b[7] Reserved b[6:0] I2C_base_address OPERATION Read only, always returns 0. This 7-bit value determines the base value of the 7-bit I2C/SMBus address. See Device Address in the Operation section. MFR_COMMAND_PLUS MFR_DATA_PLUS0 and MFR_DATA_PLUS1 MFR_STATUS_PLUS0, and MFR_STATUS_PLUS1 Similar to the PAGE register, these registers allow the user to indirectly address memory. These registers are useful to advanced users for reading or writing memory as described below. Command Plus operations use a sequence of word commands to support the following: • An alternate method for reading block data using sequential standard word reads. • A peek operation that allows up to two additional hosts to read an internal register using PMBus word protocol where each host has a unique page. • A poke operation that allows up to two additional hosts to write an internal register using PMBus word protocol where each host has a unique page. • Peek, Poke and Command Plus block reads do not interfere with normal PMBus accesses or page values set by PAGE. This enables multi master support for up to 3 hosts. MFR_COMMAND_PLUS Data Contents BIT(S) SYMBOL OPERATION b[15] Mfr_command_plus_ reserved Reserved. Always returns 0. b[14] Mfr_command_plus_id Command plus host ID 0: Mfr_command_plus pointer and page are cached and used for all Mfr_data_plus0 accesses. 1: Mfr_command_plus pointer and page are cached and used for all Mfr_data_plus1 accesses. 2975f For more information www.linear.com/LTC2975 31 LTC2975 PMBus Command Description MFR_COMMAND_PLUS Data Contents b[13:9] Mfr_command_plus_page Page to be used when peeking or poking via Mfr_data_plus0 or Mfr_data_plus1. Allowed values are 0 through 3. This page value is cached separately for Mfr_data_plus0 and Mfr_data_plus1 based on the value of Mfr_command_plus_id when this register is written. b[8:0] Mfr_command_plus_ pointer Internal memory location accessed by Mfr_data_plus0 or Mfr_data_plus1. Mfr_data_plus0 and Mfr_data_plus1 pointers are cached separately. Legal values are listed in the CMD Code column of the PMBus COMMAND SUMMARY table. All other values are reserved, except for the special poke enable/disable values listed in the Enabling And Disabling Poke Operations section, and the command values listed below for Mfr_status_plus0 and Mfr_status_plus1. MFR_DATA_PLUS0 and MFR_DATA_PLUS1 Data Contents BIT(S) b[15:0] SYMBOL OPERATION Mfr_data_plus0 A read from this register returns data referenced by the last matching Mfr_command_plus write. More specifically, writes to Mfr_command_plus by host 0 update Mfr_data_plus0, and writes to Mfr_command_plus by host1 update Mfr_data_plus1. Multiple sequential reads while pointer = Mfr_fault_Log return the complete contents of the block read buffer. Block reads beyond the end of buffer return zeros. Mfr_data_plus1 A write to this register will transfer the data to the location referenced by the last matching Mfr_command_ plus_pointer when the Poke operation protocol described in the Poke Operation Using Mfr_data_plus0 section is followed. MFR_STATUS_PLUS0 and MFR_STATUS_PLUS1 Data Contents BIT(S) SYMBOL b[7:2] Reserved OPERATION b[1] Mfr_status_plus_block_ Status of most recent block peek for matching host. peek_failed0 0: Last block peek was not aborted. Mfr_status_plus_block_ 1: Last block peek was aborted due to an intervening fault log EEPROM write, MFR_FAULT_LOG_STORE command, peek_failed1 or standard PMBus block read of MFR_FAULT_LOG. The intervening operation is always completed cleanly. b[0] Mfr_status_plus_poke_ failed0 Status of most recent poke for matching host. Mfr_status_plus_poke_ failed1 1: Last poke operation failed because pokes were not enabled as described in Enabling and Disabling Poke Operations section. 0: Last poke operation did not fail. MFR_STATUS_PLUS0 is at command location 0x2C, and MFR_STATUS_PLUS1 is at command location 0x2D. These correspond to reserved PMBus command locations. These two status registers can only be read via Command Plus peeks. Reading Fault Log Using Command Plus and Mfr_data_plus0 Write Mfr_command_plus_pointer = 0xEE with Mfr_command_plus_page = 0 and Mfr_command_plus_id = 0. Read data from Mfr_data_plus0; each read returns the next data word of the MFR_FAULT_LOG command: • The first word read is Byte_count[15:0] = 0x00FF. • The next set of words read is the Preamble with 2 bytes packed into a word. Refer to the Fault Log section for details. • The next set of words read is the Cyclical Loop Data with 2 bytes per word. Refer to the Fault Log section for details. • Extra reads return zero. • Interleaved PMBus word and byte commands do not interfere with an ongoing Command Plus block read. • Interleaved PMBus block reads of MFR_FAULT_LOG will interrupt this command. 32 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description Check status to be sure the data just read was all valid: • Write Mfr_command_plus_pointer = 0x2C with Mfr_command_plus_page = 0 and Mfr_command_plus_id = 0. • Read data from Mfr_data_plus0 and confirm that Mfr_status_plus_block_peek_failed0 = 0. Reading Energy Using MFR_COMMAND_PLUS and MFR_DATA_PLUS0 Write Mfr_command_plus_pointer = 0xC0 with Mfr_command_plus_page = 0 and Mfr_command_plus_id = 0. Read data from Mfr_data_plus_0; each read returns the next data word of the MFR_EIN command: • Byte_count[15:0] = 0x000C • Energy_value[15:0] • Energy_value[31:16] • Energy_value[47:32] • Energy_time[15:0] • Energy_time[31:16] • Energy_time[47:32] Peek Operation Using Mfr_data_plus0 Internal words and bytes may be read using Command Plus: Write Mfr_command_plus_pointer = CMD_CODE with Mfr_command_plus_page = page and Mfr_command_plus_id = 0. The CMD_CODE’s are listed in the PMBus COMMAND SUMMARY table. Read data from Mfr_data_plus0. Data is always read using a word read. Byte data is returned with upper byte set to 0. Enabling and Disabling Poke Operations Poke operations to Mfr_data_plus0 are enabled by writing Mfr_command_plus = 0x0BF6. Poke operations to Mfr_data_plus0 are disabled by writing Mfr_command_plus = 0x01F6. Poke operations to Mfr_data_plus1 are enabled by writing Mfr_command_plus = 0x4BF6. Poke operations to Mfr_data_plus1 are disabled by writing Mfr_command_plus = 0x41F6. Poke Operation Using Mfr_data_plus0 Internal words and bytes may be written using Command Plus: Enable poke access for Mfr_data_plus0. This need only be done once after a power-up or WDI reset. Write Mfr_command_plus_pointer = CMD_CODE with Mfr_command_plus_page = page and Mfr_command_plus_id = 0. The CMD_CODEs are listed in the PMBus COMMAND SUMMARY table. Write the new data value to MFR_DATA_PLUS0 2975f For more information www.linear.com/LTC2975 33 LTC2975 PMBus Command Description Optionally check status to be sure data was written as desired: • Write Mfr_command_plus_pointer = 0x2C with Mfr_command_plus_page = 0 and Mfr_command_plus_id = 0. • Read data from Mfr_data_plus0 and confirm that Mfr_status_plus_poke_failed0 = 0. Command Plus Operations Using Mfr_data_plus1 All the previous operations may be accessed via Mfr_data_plus1 by substituting Mfr_command_plus_id value with a 1. Poke operations must be enabled for Mfr_data_plus1. On/Off Control, Margining and Configuration COMMAND NAME CMD CODE DESCRIPTION OPERATION 0x01 Operating mode control. On/Off, Margin High and Margin Low. R/W Byte Y Reg Y 0x00 34 ON_OFF_CONFIG 0x02 CONTROL pin and PMBus on/off command setting. R/W Byte Y Reg Y 0x1E 35 MFR_CONFIG_LTC2975 0xD0 Configuration bits that are channel specific. R/W Word Y Reg Y 0x0080 36 MFR_CONFIG2_LTC2975 0xD9 Configuration bits that are channel specific R/W Byte N Reg Y 0x00 38 MFR_CONFIG3_LTC2975 0xDA Configuration bits that are channel specific R/W Byte N Reg Y 0x00 39 MFR_CONFIG_ALL_LTC2975 0xD1 R/W Word N Reg Y 0x0F7B 43 TYPE Configuration bits that are common to all pages. PAGED FORMAT UNITS EEPROM DEFAULT REF VALUE PAGE OPERATION The OPERATION command is used to turn the unit on and off in conjunction with the CONTROL pin and ON_OFF_CONFIG. This command register responds to the global page command (PAGE = 0xFF). The contents and functions of the data byte are shown in the following tables. A minimum tOFF_MIN wait time must be observed between any OPERATION commands used to turn the unit off and then back on to give the ADC telemetry loop time to complete a full cycle. OPERATION Data Contents (On_off_config_use_pmbus = 1) SYMBOL Action BITS Operation_margin[1:0] Operation_fault[1:0] Reserved (read only) b[7:6] b[5:4] b[3:2] b[1:0] Turn off immediately 00 XX XX 00 Sequence on 10 00 XX 00 Margin low (ignore faults and warnings) 10 01 01 00 Margin low 10 01 10 00 Margin high (ignore faults and warnings 10 10 01 00 Margin high 10 10 10 00 01 00 XX 00 01 01 01 00 Sequence off with margin low 01 01 10 00 Sequence off with margin high (ignore faults and warnings) 01 10 01 00 Sequence off with margin high 01 10 10 00 FUNCTION Sequence off with margin to nominal Sequence off with margin low (ignore faults and warnings) Reserved 34 Operation_control[1:0] All remaining combinations 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description OPERATION Data Contents (On_off_config_use_pmbus = 0) On or Off SYMBOL Action Operation_control[1:0] Operation_margin[1:0] Operation_fault[1:0] Reserved (read only) BITS FUNCTION b[7:6] b[5:4] b[3:2] b[1:0] Output at nominal 00, 01 or 10 00 XX 00 Margin low (ignore faults and warnings) 00, 01 or 10 01 01 00 Margin low 00, 01 or 10 01 10 00 Margin high (ignore faults and warnings 00, 01 or 10 10 01 00 Margin high 00, 01 or 10 10 10 00 Reserved All remaining combinations ON_OFF_CONFIG The ON_OFF_CONFIG command configures the combination of CONTROL pin input and PMBus commands needed to turn the LTC2975 on/off, including the power-on behavior, as shown in the following table. This command register responds to the global page command (PAGE = 0xFF). After the part has initialized, an additional comparator monitors VIN_SNS. The VIN_ON threshold must be exceeded before the output power sequencing can begin. After VIN is initially applied, the part will typically require tINIT to initialize and begin the TON_DELAY timer. The readback of voltages and currents may require an additional wait for tUPDATE_ADC. A minimum tOFF_MIN wait time must be observed for any CONTROL pin used toggle to turn the unit off and then back on.. ON_OFF_CONFIG Data Contents BIT(S) SYMBOL OPERATION b[7:5] Reserved Don’t care. Always returns 0. b[4] On_off_config_controlled_on Control default autonomous power up operation. 0: Unit powers up regardless of the CONTROL pin or OPERATION value. Unit always powers up with sequencing. To turn unit on without sequencing, set TON_DELAY = 0. 1: Unit does not power up unless commanded by the CONTROL pin and/or the OPERATION command on the serial bus. If On_off_config[3:2] = 00, the unit never powers up. b[3] On_off_config_use_pmbus Controls how the unit responds to commands received via the serial bus. 0: Unit ignores the Operation_control[1:0]. 1: Unit responds to Operation_control[1:0]. Depending on On_off_config_use_control, the unit may also require the CONTROL pin to be asserted for the unit to start. b[2] On_off_config_use_control Controls how unit responds to the CONTROL pin. 0: Unit ignores the CONTROL pin. 1: Unit requires the CONTROL pin to be asserted to start the unit. Depending on On_off_config_use_pmbuS the OPERATION command may also be required to instruct the device to start. b[1] Reserved Not supported. Always returns 1. b[0] On_off_config_control_fast_off CONTROL pin turn off action when commanding the unit to turn off 0: Use the programmed TOFF_DELAY. 1: Turn off the output and stop transferring energy as quickly as possible. The device does not sink current in order to decrease the output voltage fall time. 2975f For more information www.linear.com/LTC2975 35 LTC2975 PMBus Command Description MFR_CONFIG_LTC2975 This command is used to configure various manufacturer specific operating parameters for each channel. MFR_CONFIG_LTC2975 Data Contents BIT(S) SYMBOL OPERATION b[15] Reserved Don’t care. Always returns 0. b[14] Mfr_config_cascade_on Configures channel’s control pin for cascade sequence ON. There is no provision for cascade sequence OFF. See description for time based sequence OFF options. b[13:12] Mfr_config_controln_sel[1:0] Selects the active control pin input (CONTROL0 , CONTROL1, CONTROL2 or CONTROL3) for this channel. 0: Select CONTROL0 pin. 1: Select CONTROL1 pin. 2: Select CONTROL2 pin. 3: Select CONTROL3 pin. b[11] Mfr_config_fast_servo_off Disables fast servo when margining or trimming output voltages: 0: fast-servo enabled. 1: fast-servo disabled. b[10] Mfr_config_supervisor_resolution Selects voltage supervisor resolution: 0: high resolution = 4mV / LSB, range for VVSENSEPn – VVSENSEMn is 0 to 3.8V 1: low resolution = 8mV / LSB, range for VVSENSEPn – VVSENSEMn is 0 to 6.0V b[9:8] b[7] Reserved Always returns 0. Mfr_config_servo_continuous Select whether the UNIT should continuously servo VOUT after it has reached a new margin or nominal target. Only applies when Mfr_ config _dac_mode = 00b. 0: Do not continuously servo VOUT after reaching initial target. 1: Continuously servo VOUT to target. b[6] Mfr_config_servo_on_warn Control re-servo on warning feature. Only applies when Mfr_ config _dac_mode = 00b and Mfr_config_ servo_continuous = 0. 0: Do not allow the unit to re-servo when a VOUT warning threshold is met or exceeded. 1: Allow the unit to re-servo VOUT to nominal target if b[5:4] b[3] VOUT ≥ V(Vout_ov_warn_limit) or VOUT ≤ V(Vout_uv_warn_limit). Mfr_config_dac_mode Determines how DAC is used when channel is in the ON state and TON_RISE has elapsed. 00: Soft-connect (if needed) and servo to target. 01: DAC not connected. 10: DAC connected immediately using value from MFR_DAC command. If this is the configuration after a reset or RESTORE_USER_ALL, MFR_DAC will be undefined and must be written to desired value. 11: DAC is soft-connected. After soft-connect is complete MFR_DAC may be written. Mfr_config_vo_en_wpu_en VOUT_EN pin charge pumped, current-limited pull-up enable. 0: Disable weak pull-up. VOUT_EN pin driver is three-stated when channel is on. 1: Use weak current-limited pull-up on VOUT_EN pin when the channel is on. b[2] Mfr_config_vo_en_wpd_en VOUT_EN pin charge-pumped, current-limited pull-down enable. 0: Use a fast N-channel device to pull down VOUT_EN pin when the channel is off for any reason. 1: Use weak current-limited pull-down to discharge VOUT_EN pin when channel is off due to soft stop by the CONTROL pin and/or OPERATION command. If the channel is off due to a fault, use the fast pull-down on the VOUT_EN pin. 36 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description MFR_CONFIG_LTC2975 Data Contents BIT(S) b[1] SYMBOL OPERATION Mfr_config_dac_gain DAC buffer gain. 0: Select DAC buffer gain dac_gain_0 (1.38V full-scale) 1: Select DAC buffer gain dac_gain_1 (2.65V full-scale) b[0] Mfr_config_ dac_pol DAC output polarity. 0: Encodes negative (inverting) DC/DC converter trim input. 1: Encodes positive (non-inverting) DC/DC converter trim input. Cascade Sequence ON with Time-Based Sequence OFF Cascade sequence ON allows a master power supply to sequence on a series of slave supplies by connecting each power supply’s power good output to the control pin of the next power supply in the chain. Please note that the power good signal is that of the power supply and not derived from the LTC2975’s internal power good processing. Power good based cascade sequence OFF is not supported, OFF sequencing must be managed using immediate or time based sequence OFF. See also Tracking Based Sequencing section. Cascade sequence ON is illustrated in Figure 15. For each slave channel Mfr_config_cascade_on is asserted high and the associated control input is connected to the power good output of the previous power supply. In this configuration each slave channel’s startup is delayed until the previous supply has powered up. Cascade sequence OFF is not directly supported. Options for reversing the sequence when turning the supplies off include: • Using the OPERATION command to turn off all the channels with an appropriate off delay. • Using the FAULT pin to bring all the channels down immediately or in sequence with an appropriate off delay. CONTROL0 LTC2975 FAULTB0 FAULTB0 CONTROL0 RECOMMENDED CONNECTION WHEN HARDWARE ON/OFF CONTROL IS REQUIRED VOUT_EN0 RUN VOUTP DC/DC CONTROL1 VOUT_EN1 POWERGOOD0 VOUTM RUN VOUTP DC/DC CONTROL2 VOUT_EN2 VOUT_EN3 POWERGOOD1 VOUTM RUN VOUTP POWERGOOD2 VOUTM RUN VOUTP POWERGOOD3 VSENSEP1 VSENSEM1 VSENSEP2 LOAD DC/DC TO NEXT CONTROL PIN MASTER VSENSEM0 LOAD DC/DC CONTROL3 VSENSEP0 LOAD SLAVES VSENSEM2 VSENSEP3 LOAD VOUTM VSENSEM3 2975 F15 Figure 15. LTC2975 Configured to Cascade Sequence ON and Time-Base Sequence OFF 2975f For more information www.linear.com/LTC2975 37 LTC2975 PMBus Command Description TOFF_DELAY3 TOFF_DELAY2 TOFF_DELAY1 TOFF_DELAY0 VOUT0 VOUT1 VOUT2 VOUT3 CONTROL-FAULTB0 POWERGOOD0 POWERGOOD1 POWERGOOD2 POWERGOOD3 2975 F16 Figure 16. Cascade Sequence ON with Time Based Sequence Down on FAULT0 When asserted, Mfr_config_cascade_on enables a slave channel to honor fault retries even when its control pin is low. Additionally, if the system has faulted off after zero or a finite number of retries, an OPERATION command may be used to turn all cascade channels off then on to clear the faulted off state when the slave’s control pin is low. For this reason we refer to the control pin as being redefined as a sequence pin. The waveform of Figure 16 illustrates cascade sequence ON and time based sequence OFF using the configuration illustrated in Figure 15. In this example the FAULTB0 pin is used as a broadcast off signal. Turning the system off with the FAULTB0 requires all slave channels to be configured with Mfr_faultb0_response_chann asserted high. After the system is turned off, the LTC2975 will assert ALERTB with all slave channels indicating a Status_mfr_fault0_in event. MFR_CONFIG2_LTC2975 This command register determines whether VOUT overvoltage or overcurrent faults from a given channel cause the AUXFAULTB pin to be pulled low. MFR_CONFIG2_LTC2975 Data Contents BIT(S) SYMBOL b[7] Mfr_auxfaultb_oc_fault_response_ chan3 b[6] b[5] b[4] b[3] Mfr_auxfaultb_oc_fault_response_ chan2 Mfr_auxfaultb_oc_fault_response_ chan1 Mfr_auxfaultb_oc_fault_response_ chan0 Mfr_auxfaultb_ov_fault_response_ chan3 OPERATION Response to channel 3 IOUT_OC_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. Response to channel 2 IOUT_OC_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. Response to channel 1 IOUT_OC_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. Response to channel 0 IOUT_OC_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. Response to channel 3 VOUT_OV_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. 38 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description MFR_CONFIG2_LTC2975 Data Contents BIT(S) SYMBOL b[2] Mfr_auxfaultb_ov_fault_response_ chan2 b[1] b[0] Mfr_auxfaultb_ov_fault_response_ chan1 Mfr_auxfaultb_ov_fault_response_ chan0 OPERATION Response to channel 2 VOUT_OV_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. Response to channel 1 VOUT_OV_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. Response to channel 0 VOUT_OV_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. MFR_CONFIG3_LTC2975 This command register determines whether VOUT undercurrent faults from a given channel cause the AUXFAULTB pin to be pulled low. This command also allows tracking to be enabled on any channel. MFR_CONFIG3_LTC2975 Data Contents BIT(S) SYMBOL b[7] Mfr_auxfaultb_uc_fault_response_ chan3 OPERATION Response to channel 3 IOUT_UC_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. b[6] Mfr_auxfaultb_uc_fault_response_ chan2 Response to channel 2 IOUT_UC_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. b[5] Mfr_auxfaultb_uc_fault_response_ chan1 Response to channel 1 IOUT_UC_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 =Do not pull AUXFAULTB low. b[4] Mfr_auxfaultb_uc_fault_response_ chan0 Response to channel 0 IOUT_UC_FAULT. 1 = Pull AUXFAULTB low via fast pull-down. 0 = Do not pull AUXFAULTB low. b[3] Mfr_track_en_chan3 Select if channel 3 is a slave in a tracked power supply system. 0: Channel is not a slave in a tracked power supply system. 1: Channel is a slave in a tracked power supply system. Setting this bit disables UV and UC detection during TOFF_DELAY. b[2] Mfr_track_en_chan2 Select if channel 2 is a slave in a tracked power supply system. 0: Channel is not a slave in a tracked power supply system. 1: Channel is a slave in a tracked power supply system. Setting this bit disables UV and UC detection during TOFF_DELAY. b[1] Mfr_track_en_chan1 Select if channel 1 is a slave in a tracked power supply system. 0: Channel is not a slave in a tracked power supply system. 1: Channel is a slave in a tracked power supply system. Setting this bit disables UV and UC detection during TOFF_DELAY. b[0] Mfr_track_en_chan0 Select if channel 0 is a slave in a tracked power supply system. 0: Channel is not a slave in a tracked power supply system. 1: Channel is a slave in a tracked power supply system. Setting this bit disables UV and UC detection during TOFF_DELAY. 2975f For more information www.linear.com/LTC2975 39 LTC2975 PMBus Command Description LTC2975 CONTROL0 FAULTB0 CONTROL0 PWRGD FAULTB0 VSENSEP0 VOUT_EN0 VSENSEM0 VDAC0 RUN VFB VOUTP DC/DC VOUTM TRACK VSENSEP1 VOUT_EN1 VSENSEM1 VDAC1 RUN VFB R1_1 VSENSEP2 VOUT_EN2 VSENSEM2 VDAC2 VOUT_EN3 VSENSEM3 VDAC3 VFB VSENSEP1 LOAD VOUTM VOUTP DC/DC VSENSEM1 VOUTM TRACK VSENSEP2 LOAD VSENSEM2 R2_2 RUN VFB R1_3 VSENSEM0 R2_1 RUN R1_2 VSENSEP3 VOUTP DC/DC TRACK VSENSEP0 LOAD VOUTP DC/DC TRACK R2_3 VSENSEP3 LOAD VOUTM VSENSEM3 2975 F17 Figure 17. LTC2975 Configured to Control, Supervise and Monitor Power Supplies Equipped with Tracking Pin Tracking Supplies On and Off The LTC2975 supports tracking power supplies that are equipped with a tracking pin and configured for tracking. A tracking power supply uses a secondary feedback terminal (TRACK) to allow its output voltage to be scaled to an external master voltage. Typically the external voltage is generated by the supply with the highest voltage in the system, which is fed to the slave track pins (see Figure 17). Supplies that track a master supply must be enabled before the master supply comes up and disabled after the master supply comes down. Enabling the slave supplies when the master is down requires supervisors monitoring the slaves to disable UV detection. Slave UC detection must also be disabled when the slaves are tracking the master down to prevent false UC events. All channels configured for tracking must track off together in response to a fault on any channel or any other condition that can bring one or more of the channels down. Prematurely disabling a slave channel via its RUN pin may cause that channel to shut down out of sequence (see Figure 20) An important feature of the LTC2975 is the ability to control, monitor and supervise DC/DC converters that are configured to track a master supply on and off. The LTC2975 supports the following tracking features: • Track channels on and off without issuing false UV/UC events when the slave channels are tracking up or down. • Track all channels down in response to a fault from a slave or master. • Track all channels down when VIN_SNS drops below VIN_OFF, share clock is held low or RESTORE_USER_ALL is issued. • Ability to reconfigure selected channels that are part of a tracking group to sequence up after the group has tracked up or sequence down before the group has tracked down. 40 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description TON_RISE EXPIRES FOR ALL CHANNELS. UV AND UC DETECT ENABLED ON ALL CHANNELS VOUT0 TOFF_DELAY ENTERED FOR ALL CHANNELS. UV AND UC DETECT DISABLED ON ALL CHANNELS VOUT1 VOUT2 MASTER BRINGS DOWN NEXT HIGHEST SLAVE VOUT3 CONTROL VOUT_EN0 VOUT_EN(3:1) 2975 F18 SLAVE OUTPUT ENABLES TURN ON FIRST SLAVE OUTPUT ENABLES TURN OFF LAST Figure 18. Control Pin Tracking All Supplies Up And Down TON_RISE EXPIRES FOR ALL CHANNELS. UV AND UC DETECT ENABLED ON ALL CHANNELS VOUT0 TOFF_DELAY ENTERED FOR ALL CHANNELS. UV AND UC DETECT DISABLED ON ALL CHANNELS UV FAULT ON CHANNEL 1 BRINGS DOWN MASTER VIA FAULTB0. ALL SLAVE CHANNELS INCLUDING THE ONE WITH THE UV FAULT ENTER TOFF_DELAY VOUT1 VOUT2 VOUT3 MASTER BRINGS DOWN NEXT HIGHEST SLAVE CONTROL FAULTB0 VOUT_EN0 VOUT_EN(3:1) 2975 F19 SLAVE OUTPUT ENABLES TURN ON FIRST SLAVE OUTPUT ENABLES TURN OFF LAST Figure 19. Fault on Channel 1 Tracking All Supplies Down 2975f For more information www.linear.com/LTC2975 41 LTC2975 PMBus Command Description TON_RISE EXPIRES FOR ALL CHANNELS. UV AND UC DETECT ENABLED ON ALL CHANNELS VOUT0 VOUT1 VOUT2 TOFF_DELAY ENTERED FOR ALL CHANNELS. UV AND UC DETECT DISABLED ON ALL CHANNELS UV FAULT ON CHANNEL 1 BRINGS DOWN MASTER VIA FAULTB0. ALL SLAVES WITH ENABLED RUN PINS TRACK DOWN CORRECTLY VOUT3 DISABLING VOUT_EN1 IMMEDIATELY IN RESPONSE TO THE UV FAULT CAUSES VOUT1 TO SHUT DOWN OUT OF SEQUENCE CONTROL FAULTB0 VOUT_EN0 VOUT_EN1 VOUT_EN(3:2) 2975 F20 SLAVE OUTPUT ENABLES TURN ON FIRST SLAVE OUTPUT ENABLES TURN OFF LAST Figure 20. Improperly Configured Fault Response on Faulting Channel Disrupts Tracking 42 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description Tracking Implementation The LTC2975 supports tracking through the coordinated programing of Ton_delay, Ton_rise,Toff_delay and Mfr_track_ en_chann. The master channel must be configured to turn on after all the slave channels have turned on and to turn off before all the slave channels turn off. Slaves that are enabled before the master will remain off until the tracking pin allows them to turn on. Slaves will be turned off via the tracking pin even though their run pin is still asserted. Ton_rise must be extended on the slaves so that it ends relative to the rise of the TRACK pin and not the rise of the VOUT_EN pin. When Mfr_track_en_chann is enabled the channel is reconfigured to: • Sequence down on fault, VIN_OFF, SHARE_CLK low or RESTORE_USER_ALL. • Ignore UV and UC during TOFF_DELAY. Note that ignoring UV and UC during TON_RISE and TON_MAX_FAULT always happens regardless of how this bit is set. The following example illustrates configuring an LTC2975 with one master channel and three slaves. Master channel 0 TON_DELAY = Ton_delay_master TON_RISE = Ton_rise_master TOFF_DELAY = Toff_delay_master Mfr_track_en_chan0 = 0 Slave channel n TON_DELAY = Ton_delay_slave TON_RISE = Ton_delay_master + Ton_rise_slave TOFF_DELAY = Toff_delay_master + T_off_delay_slave Mfr_track_en_chan0 = 1 Where: Ton_delay_master – Ton_delay_slave > RUN to TRACK setup time Toff_delay_slave > time for master supply to fall. The system response to a control pin toggle is illustrated in Figure 18. The system response to a UV fault on a slave channel is illustrated in Figure 19. MFR_CONFIG_ALL_LTC2975 This command is used to configure parameters that are common to all channels on the IC. They may be set or reviewed from any PAGE setting. 2975f For more information www.linear.com/LTC2975 43 LTC2975 PMBus Command Description MFR_CONFIG_ALL_LTC2975 Data Contents BIT(S) SYMBOL b[15:12] Reserved b[11] Mfr_config_all_pwrgd_off_uses_uv OPERATION Don’t care. Always returns 0. Selects PWRGD de-assertion source for all channels. 0: PWRGD is de-asserted based on VOUT being below or equal to POWER_GOOD_OFF. This option uses the ADC. Response time is approximately 100ms to 200ms. 1: PWRGD is de-asserted based on VOUT being below or equal to VOUT_UV_LIMIT. This option uses the high speed supervisor. Response time is approximately 12µs. b[10] Mfr_config_all_fast_fault_log Controls number of ADC readings completed before transferring fault log memory to EEPROM. 0: All ADC telemetry values will be updated before transferring fault log to EEPROM. Slower. 1: Telemetry values will be transferred from fault log to EEPROM within 24ms after detecting fault. Faster. b[9] Mfr_config_all_control3_pol Selects active polarity of CONTROL3 pin 0: Active low (pull pin low to start unit). 1: Active high (pull pin high to start unit). b[8] Mfr_config_all_control2_pol Selects active polarity of CONTROL2 pin 0: Active low (pull pin low to start unit). 1: Active high (pull pin high to start unit). b[7] Mfr_config_all_fault_log_enable Enable fault logging to EEPROM in response to Fault. 0: Fault logging to EEPROM is disabled. 1: Fault logging to EEPROM is enabled. b[6] Mfr_config_all_vin_on_clr_faults_en Allow VIN_ON rising edge to clear all latched faults. 0: VIN_ON clear faults feature is disabled. 1: VIN_ON clear faults feature is enabled. b[5] Mfr_config_all_control1_pol Selects active polarity of CONTROL1 pin 0: Active low (pull pin low to start unit). 1: Active high (pull pin high to start unit). b[4] Mfr_config_all_control0_pol Selects active polarity of CONTROL0 pin 0: Active low (pull pin low to start unit). 1: Active high (pull pin high to start unit). b[3] Mfr_config_all_vin_share_enable Allow this unit to hold Share-clock pin low when VIN has not risen above VIN_ON or has fallen below VIN_OFF. When enabled this unit will also turn all channels off in response to Share-clock being held low. 0: Share-clock inhibit is disabled. 1: Share-clock inhibit is enabled. b[2] Mfr_config_all_pec_en PMBus packet error checking enable. 0: PEC is accepted but not required. 1: PEC is enabled. b[1] Mfr_config_all_longer_pmbus_timeout Increase PMBus timeout interval by a factor of 8. Recommended for fault logging. 0: PMBus timeout is not multiplied by a factor of 8. 1: PMBus timeout is multiplied by a factor of 8. b[0] Mfr_config_all_auxfaultb_wpu_dis AUXFAULTB charge-pumped, current-limited pull-up disable. 0: Use weak current-limited pull-up on AUXFAULTB after power-up, as long as no faults have forced AUXFAULTB off. 1: Disable weak pull-up. AUXFAULTB driver is three-stated after power-up as long as no faults have forced AUXFAULTB off. 44 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description Programming User EEPROM Space COMMAND NAME CMD CODE DESCRIPTION STORE_USER_ALL 0x15 Store entire operating memory to EEPROM. Send Byte N NA 45 RESTORE_USER_ALL 0x16 Restore entire operating memory from EEPROM. Send Byte N NA 45 MFR_EE_UNLOCK 0xBD Unlock user EEPROM for access by MFR_ EE_ERASE and MFR_EE_DATA commands. R/W Byte N Reg NA 46 MFR_EE_ERASE 0xBE Initialize user EEPROM for bulk programming by MFR_EE_DATA. R/W Byte N Reg NA 46 MFR_EE_DATA 0xBF Data transferred to and from EEPROM using sequential PMBus word reads or writes. Supports bulk programming. R/W Word N Reg NA 46 TYPE DEFAULT REF PAGED FORMAT UNITS EEPROM VALUE PAGE STORE_USER_ALL and RESTORE_USER_ALL STORE_USER_ALL, RESTORE_USER_ALL commands provide access to User EEPROM space. Once a command is stored in User EEPROM, it will be restored with explicit restore command, when the part emerges from power-on reset after power is applied, or after toggling the Reset pin. While either of these commands is being processed, the part will indicate it is busy, see Response When Part Is Busy on page 47. STORE_USER_ALL. Issuing this command will store all operating memory commands with a corresponding EEPROM memory location. RESTORE_USER_ALL. Issuing this command will restore all commands from EEPROM Memory. It is recommended that this command not be executed while a unit is enabled since all monitoring is suspended while the EEPROM is transferred to operating memory, and intermediate values from EEPROM may not be compatible with the values initially stored in operating memory. Bulk Programming the User EEPROM Space The MFR_EE_UNLOCK, MFR_EE_ERASE and MFR_EE_DATA commands provide a method for 3rd party EEPROM programming houses and end users to easily program the LTC2975 independent of any order dependencies or delays between PMBus commands. All data transfers are directly to and from the EEPROM and do not affect the volatile RAM space currently configuring the device. The first step is to program a master reference part with the desired configuration. MFR_EE_UNLOCK and MFR_EE_DATA are then used to read back all the data in User EEPROM space as sequential words. This information is stored to the master programming HEX file. Subsequent parts may be cloned to match the master part using MFR_EE_UNLOCK, MFR_EE_ERASE and MFR_EE_DATA to transfer data from the master HEX file. These commands operate directly on the EEPROM independent of the part configurations stored in RAM space. During EEPROM access the part will indicate that it is busy as described below. In order to support simple programming fixtures the bulk programming features only uses PMBus word and byte commands. The MFR_UNLOCK configures the appropriate access mode and resets an internal address pointer allowing a series of word commands to behave as a block read or write with the address pointer being incremented after each operation. PEC use is optional and is configured by the MFR_EE_UNLOCK operation. 2975f For more information www.linear.com/LTC2975 45 LTC2975 PMBus Command Description MFR_EE_UNLOCK The MFR_EE_UNLOCK command prevents accidental EEPROM access in normal operation and configures the required EEPROM bulk programming mode for bulk initialization, sequential writes, or reads. MFR_EE_UNLOCK augments the protection provided by write protect. Upon unlocking the part for the required operation, an internal address pointer is reset allowing a series of MFR_EE_DATA reads or writes to sequentially transfer data, similar to a block read or block write. The MFR_EE_UNLOCK command can clear or set PEC mode based on the desired level of error protection. An MFR_EE_UNLOCK sequence consists of writing two unlock codes using two byte-write commands. The following table documents the allowed sequences. Writing a non-supported sequence locks the part. Reading MFR_EE_UNLOCK returns the last byte written or zero if the part is locked. MFR_EE_UNLOCK Data Contents BIT(S) SYMBOL OPERATION b[7:0] Mfr_ee_unlock[7:0] To unlock user EEPROM space for Mfr_ee_erase and Mfr_ee_data read or write operations with PEC allowed: Write 0x2b followed by 0xd4. To unlock user EEPROM space for Mfr_ee_erase and Mfr_ee_data read or write operations with PEC required: Write 0x2b followed by 0xd5. To unlock user and manufacturer EEPROM space for Mfr_ee_data read only operations with PEC allowed: Write 0x2b, followed by 0x91 followed by 0xe4. To unlock user and manufacturer EEPROM space for Mfr_ee_data read only operations with PEC required: Write 0x2b, followed by 0x91 followed by 0xe5. MFR_EE_ERASE The MFR_EE_ERASE command is used to erase the entire contents of the user EEPROM space and configures this space to accept new program data. Writing values other than 0x2B will lock the part. Reads return the last value written. MFR_EE_ERASE Data contents BIT(S) SYMBOL OPERATION b[7:0] Mfr_ee_erase[7:0] To erase the user EEPROM space and configure to accept new data: 1) Use the appropriate Mfr_ee_unlock sequence to configure for Mfr_ee_erase commands with or without PEC. 2) Write 0x2B to Mfr_ee_erase. The part will indicate it is busy erasing the EEPROM by the mechanism detailed below. MFR_EE_DATA The MFR_EE_DATA command allows the user to transfer data directly to or from the EEPROM without affecting RAM space. To read the user EEPROM space issue the appropriate Mfr_ee_unlock command and perform Mfr_ee_data reads until the EEPROM has been completely read. Extra reads will lock the part and return zero. The first read returns the 16-bit EEPROM packing revision ID that is stored in ROM. The second read returns the number of 16-bit words available; this is the number of reads or writes to access all memory locations. Subsequent reads return EEPROM data starting with lowest address. To write to the user EEPROM space issue the appropriate Mfr_ee_unlock and Mfr_ee_erase commands followed by successive Mfr_ee_data word writes until the EEPROM is full. Extra writes will lock the part. The first write is to the lowest address. Mfr_ee_data reads and writes must not be mixed. 46 For more information www.linear.com/LTC2975 2975f LTC2975 PMBus Command Description MFR_EE_DATA Data Contents BIT(S) SYMBOL OPERATION b[7:0] Mfr_ee_data[7:0] To read user space 1) Use the appropriate Mfr_ee_unlock sequence to configure for Mfr_ee_data commands with or without PEC. 2) Read Mfr_ee_data[0] = PackingId (MFR Specific ID). 3) Read Mfr_ee_data[1] = NumberOfUserWords (total number of 16-bit word available). 4) Read Mfr_ee_data[2] through Mfr_ee_data[NumberOfWord+1] (User EEPROM data contents) To write user space 1) Initialize the user memory using the sequence described for the MFR_EE_ERASE command. 2) Use the appropriate Mfr_ee_unlock sequence to configure for Mfr_ee_data commands with or without PEC. 3) Write Mfr_ee_data[0] through Mfr_ee_data[NumberOfWord-1] (User EEPROM data content to be written) The part will indicate it is busy erasing the EEPROM by the mechanism detailed below. Response When Part Is Busy The part will indicate it is busy accessing the EEPROM by the following mechanism: 1)Clearing Mfr_common_busyb of the MFR_COMMON register. This byte can always be read and will never NACK a byte read request even if the part is busy. 2)NACKing commands other than MFR_COMMON. MFR_EE Erase and Write Programming Time The program time per word is typically 0.17ms and will require spacing the I2C/SMBus writes at greater than 0.17ms to guarantee the write has completed. The Mfr_ee_erase command takes approximately 400ms. We recommend using MFR_COMMON for handshaking. Input Voltage Commands and Limits COMMAND NAME CMD CODE VIN_ON 0x35 Input voltage above which power conversion can be enabled. R/W Word N L11 V Y 10.0 0xD280 47 VIN_OFF 0x36 R/W Word Input voltage below which power conversion is disabled. All VOUT_EN pins go off immediately or sequence off after TOFF_DELAY (See Mfr_config_ track_enn). N L11 V Y 9.0 0xD240 47 VIN_OV_FAULT_LIMIT 0x55 Input overvoltage fault limit measured at VIN_ SNS pin. R/W Word N L11 V Y 15.0 0xD3C0 47 VIN_OV_WARN_LIMIT 0x57 Input overvoltage warning limit measured at VIN_SNS pin. R/W Word N L11 V Y 14.0 0xD380 47 VIN_UV_WARN_LIMIT 0x58 Input undervoltage warning limit measured at VIN_SNS pin. R/W Word N L11 V Y 0 0x8000 47 VIN_UV_FAULT_LIMIT 0x59 Input undervoltage fault limit measured at VIN_SNS pin. R/W Word N L11 V Y 0 0x8000 47 DESCRIPTION TYPE PAGED FORMAT UNITS EEPROM DEFAULT REF VALUE PAGE VIN_ON, VIN_OFF, VIN_OV_FAULT_LIMIT, VIN_OV_WARN_LIMIT, VIN_UV_WARN_LIMIT and VIN_UV_FAULT_LIMIT These commands provide voltage supervising limits for the input voltage VIN_SNS . For more information www.linear.com/LTC2975 2975f 47 LTC2975 PMBus Command Description INPUT Current and ENERGY COMMAND NAME MFR_EIN MFR_EIN_CONFIG MFR_IIN_CAL_GAIN_TC MFR_IIN_CAL_GAIN DESCRIPTION 0xC0 0xC1 0xC3 0xE8 TYPE Input energy data bytes. R Block Configuration register for energy and input current. R/W Byte Temperature coefficient applied to IIN_CAL_GAIN. R/W Word The nominal resistance of the current sense R/W Word element in mΩ. PAGED FORMAT UNITS EEPROM N N N N Reg Reg CF L11 ppm mΩ Y Y Y DEFAULT REF VALUE PAGE NA 0x00 0x0000 1.0 0xBA00 48 49 50 49 Energy Measurement and Reporting Input energy measurement and monitoring supports the following: • Input energy derived from the accumulated product of READ_VIN and READ_IIN. • Reporting input energy value as a 48-bit integer in mJ. Returning value in Joules eliminates the need for the host to manage time. • Reporting input energy time as a 48-bit integer in ms, where input energy time is the elapsed time since energy monitoring was last reset. • Resetting time and energy accumulators whenever MFR_EIN_CONFIG is written. • Wrapping of time and energy accumulators when full. • An optional HD mode allowing the user to give priority to energy measurement by forcing the ADC to measure READ_VIN and READ_IIN between every other ADC measurement. • Reporting energy and time values coherently. • Ability to decrement energy to prevent rectification and accumulation of noise when the channel is off. Energy is not allowed to decrement below zero. MFR_EIN Read only. This 12 byte data block returns the input energy value and time. Once the block read starts, MFR_EIN updates are suspended until the block read completes. However, energy and time continue to accumulate internally during block reads. Table 2. MFR_EIN Data Block Contents DATA Energy_value [7:0] Energy_value [15:8] Energy_value [23:16] Energy_value [31:24] Energy_value [39:32] Energy_value [47:40] Energy_time [7:0] Energy_time [15:8] Energy_time [23:16] Energy_time [31:24] Energy_time [39:32] Energy_time [47:40] 48 BYTE* 0 1 2 3 4 5 6 7 8 9 10 11 DESCRIPTION Energy Value in mJ. This is the accumulated energy since Mfr_ein_config was last written. Energy Time in ms. This is the elapsed time since Mfr_ein_config was last written. 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description MFR_EIN_CONFIG This command configures energy and input current related parameters. MFR_EIN_CONFIG Data Contents BIT(S) SYMBOL OPERATION b[7:3] Mfr_ein_config_reserved Don’t care. Always returns 0. Mfr_ein_config_hd Optimize ADC polling sequence for higher definition input energy measurement. b[2] 0: Standard ADC polling sequence 1: Read_vin and Read_iin measurements are interleaved between every other ADC measurement. b[1:0] Mfr_ein_config_iin_range Input sense amplifier range setting. 0: High Range 1: Medium Range 2: Low Range 3: Reserved The range sets the Full-Scale Input Voltage Range (FS_IIN). Lower range settings have lower input referred noise. MFR_IIN_CAL_GAIN The MFR_IIN_CAL_GAIN command is used to set the ratio of the voltage at the input current sense pins to the sensed current. For devices using a fixed current sense resistor, it is the same value as the resistance of the sense resistor (units are expressed in mΩ). MFR_IIN_CAL_GAIN is internally limited to values between 0.01mΩ to 1,000mΩ. The register readback value always returns what was last written and does not reflect internal limiting. Calculations using IIN_CAL_GAIN are: READ_IIN = VIIN _ SNSPn − VIIN _ SNSMn (MFR _IIN_CAL _GAIN) • TCORRECTION where: TCORRECTION = [1 + MFR_IIN_CAL_GAIN_TC • 1E-6 • (READ_TEMPERATURE_2 – 25.0)] Note: TCORRECTION is limited by hardware to a value between 0.25 and 4.0. READ_TEMPERATURE_2 is the internal die temperature. Mfr_ein_config_iin_range[1:0] may be used to minimize noise in systems with low sense resistor values. 2975f For more information www.linear.com/LTC2975 49 LTC2975 PMBus Command Description MFR_IIN_CAL_GAIN_TC The MFR_IIN_CAL_GAIN_TC sets the temperature coefficient of the MFR_IIN_CAL_GAIN register value in ppm/°C. This command uses the internal die temperature. Refer to MFR_IIN_CAL_GAIN for details on proper usage. MFR_IOUT_CAL_GAIN_TC Data Contents BIT(S) SYMBOL OPERATION b[15:0] Mfr_iin_cal_gain_tc 16-bit twos complement integer representing the temperature coefficient. Value = Y where Y = b[15:0] is a twos complement number. Example: Mfr_iin_cal_gain_tc = 3900ppm For b[15:0] = 0x0F3C Value = 3900 Output Voltage Commands and Limits COMMAND NAME CMD CODE DESCRIPTION TYPE VOUT_MODE 0x20 Output voltage data format and mantissa exponent (2–13). VOUT_COMMAND PAGED FORMAT UNITS EEPROM R Byte Y Reg 0x21 Servo target. Nominal DC/DC converter output voltage setpoint. R/W Word Y L16 V VOUT_MAX 0x24 Upper limit on the output voltage the unit can command regardless of any other commands. R/W Word Y L16 VOUT_MARGIN_HIGH 0x25 Margin high DC/DC converter output voltage setting. R/W Word Y VOUT_MARGIN_LOW 0x26 Margin low DC/DC converter output voltage setting. R/W Word VOUT_OV_FAULT_LIMIT 0x40 Output overvoltage fault limit. VOUT_OV_WARN_LIMIT DEFAULT REF VALUE PAGE 0x13 51 Y 1.0 0x2000 51 V Y 4.0 0x8000 51 L16 V Y 1.05 0x219A 51 Y L16 V Y 0.95 0x1E66 51 R/W Word Y L16 V Y 1.1 0x2333 47 0x42 Output overvoltage warning limit. R/W Word Y L16 V Y 1.075 0x2266 47 VOUT_UV_WARN_LIMIT 0x43 Output undervoltage warning limit. R/W Word Y L16 V Y 0.925 0x1D9A 47 VOUT_UV_FAULT_LIMIT 0x44 Output undervoltage fault limit. Used for Ton_ max_fault and power good de-assertion. R/W Word Y L16 V Y 0.9 0x1CCD 47 POWER_GOOD_ON 0x5E Output voltage at or above which a power good should be asserted. R/W Word Y L16 V Y 0.96 0x1EB8 51 POWER_GOOD_OFF 0x5F R/W Word Y L16 V Y 0.94 0x1E14 51 MFR_VOUT_DISCHARGE_ THRESHOLD 0xE9 Coefficient used to multiply VOUT_COMMAND in R/W Word order to determine VOUT off threshold voltage. Y L11 Y 2.0 0xC200 51 MFR_DAC 0xE0 Manufacturer register that contains the code of the 10-bit DAC. Y Reg 0x0000 51 50 Output voltage at or below which a power good should be de-asserted when Mfr_config_all_ pwrgd_off_uses_uv is clear. R/W Word 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description VOUT_MODE This command is read only and specifies the mode and exponent for all commands with a L16 data format. See Data Formats on page 27. VOUT_MODE Data Contents BIT(S) SYMBOL OPERATION b[7:5] Vout_mode_type Reports linear mode. Hard-wired to 000b. b[4:0] Vout_mode_parameter Linear mode exponent. 5-bit two’s complement integer. Hardwired to 0x13 (–13 decimal). VOUT_COMMAND, VOUT_MAX, VOUT_MARGIN_HIGH, VOUT_MARGIN_LOW, VOUT_OV_FAULT_LIMIT, VOUT_OV_WARN_LIMIT, VOUT_UV_WARN_LIMIT, VOUT_UV_FAULT_LIMIT, POWER_GOOD_ON and POWER_GOOD_OFF These commands provide various servo, margining and supervising limits for a channel’s output voltage. MFR_VOUT_DISCHARGE_THRESHOLD This register contains the coefficient that multiplies VOUT_COMMAND in order to determine the OFF threshold voltage for the associated output. If the output voltage has not decayed below MFR_VOUT_DISCHARGE_THRESHOLD • VOUT_COMMAND prior to the channel being commanded to enter/re-enter the ON state, the Status_mfr_discharge bit in the STATUS_MFR_SPECIFIC register will be set and the ALERTB pin will be asserted low. In addition, the channel will not enter the ON state until the output has decayed below its off-threshold voltage. Setting this to a value greater than 1.0 effectively disables DISCHARGE_THRESHOLD checking, allowing the channel to turn back on even if it has not decayed at all. Other channels can be held-off if a particular output has failed to discharge by using the bidirectional FAULTBn pins (refer to the MFR_FAULTBn_RESPONSE and MFR_FAULTBn_PROPOGATE registers). MFR_DAC This command register allows the user to directly program the 10-bit DAC. Manual DAC writes require the channel to be in the ON state,TON_RISE to have expired and MFR_CONFIG_LTC2975 b[5:4] = 10b or 11b. Writing MFR_ CONFIG_LTC2975 b[5:4] = 10b commands the DAC to hard connect with the value in Mfr_dac_direct_val. Writing b[5:4] = 11b commands the DAC to soft connect. Once the DAC has soft connected, Mfr_dac_direct_val returns the value that allowed the DAC to be connected without perturbing the power supply. MFR_DAC writes are ignored when MFR_CONFIG_LTC2975 b[5:4] = 00b or 01b. MFR_DAC Data Contents BIT(S) SYMBOL b[15:10] Reserved b[9:0] OPERATION Read only, always returns 0. Mfr_dac_direct_val DAC code value. 2975f For more information www.linear.com/LTC2975 51 LTC2975 PMBus Command Description Output Current Commands and Limits CMD CODE DESCRIPTION COMMAND NAME TYPE PAGED FORMAT UNITS EEPROM DEFAULT REF VALUE PAGE IOUT_CAL_GAIN 0x38 The nominal resistance of the current sense element in mΩ. R/W Word Y L11 mΩ Y 1.0 0xBA00 52 IOUT_OC_FAULT_LIMIT 0x46 Output overcurrent fault limit. R/W Word Y L11 A Y 10.0 0xD280 52 IOUT_OC_WARN_LIMIT 0x4A Output overcurrent warning limit. R/W Word Y L11 A Y 5.0 0xCA80 52 IOUT_UC_FAULT_LIMIT 0x4B Output undercurrent fault limit. Used to detect a reverse current and must be a negative value. R/W Word Y L11 A Y -1.0 0xB400 52 MFR_IOUT_CAL_GAIN_TC 0xF6 R/W Word Y CF ppm Y 0x0000 53 Temperature coefficient applied to IOUT_CAL_ GAIN. IOUT_CAL_GAIN The IOUT_CAL_GAIN command is used to set the ratio of the voltage at the current sense pins to the sensed current. For devices using a fixed current sense resistor, it is the same value as the resistance of the resistor (units are expressed in mΩ). IOUT_CAL_GAIN is internally limited to values between 0.01mΩ to 1,000mΩ. The register readback value always returns what was last written and does not reflect internal limiting. Calculations using IOUT_CAL_GAIN are: VIOUT_OC_FAULT_LIMIT = IOUT_OC_FAULT_LIMIT • IOUT_CAL_GAIN • TCORRECTION VIOUT_UC_FAULT_LIMIT = IOUT_UC_FAULT_LIMIT • IOUT_CAL_GAIN • TCORRECTION where: TCORRECTION = (1 + MFR_IOUT_CAL_GAIN_TC • 1E-6 • (READ_TEMPERATURE_1 + MFR_T_SELF_HEAT – 25.0)) READ_IOUT = VIOUT _ SNSPn – VIOUT _ SNSMn (IOUT _CAL _GAIN) • TCORRECTION Note: TCORRECTION is limited by hardware to a value between 0.25 and 4.0. READ_TEMPERATURE_2 is substituted for READ_TEMPERATURE_1 if the associated TSENSE network fails to detect a valid temperature. See READ_TEMPERATURE_1 for more information. IOUT_OC_FAULT_LIMIT, IOUT_OC_WARN_LIMIT and IOUT_UC_FAULT_LIMIT IOUT supervisor fault and warning limits. IOUT_OC_FAULT_LIMIT is internally limited to values greater or equal to zero. The register readback value always returns what was last written and does not reflect internal limiting. IOUT_UC_FAULT_LIMIT is internally limited to values less than zero. The register readback value always returns what was last written and does not reflect internal limiting. 52 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description MFR_IOUT_CAL_GAIN_TC The MFR_IOUT_CAL_GAIN_TC is a paged command that sets the temperature coefficient of the IOUT_CAL_GAIN register value in ppm/°C. This command uses the temperature measured by the external temperature diode for the associated page. Refer to IOUT_CAL_GAIN for details on proper usage. MFR_IOUT_CAL_GAIN_TC Data Contents BIT(S) SYMBOL b[15:0] Mfr_iout_cal_gain_tc OPERATION 16-bit twos complement integer representing the temperature coefficient. Value = Y where Y = b[15:0] is a twos complement. Example: Mfr_iout_cal_gain_tc = 3900ppm For b[15:0] = 0x0F3C Value = 3900 External Temperature Commands and Limits COMMAND NAME CMD CODE DESCRIPTION OT_FAULT_LIMIT 0x4F Overtemperature fault limit setting for R/W Word the external temperature sensor. Y L11 °C Y 65.0 0xEA08 54 OT_WARN_LIMIT 0x51 Overtemperature warning limit for the R/W Word external temperature sensor Y L11 °C Y 60.0 0xE3C0 54 UT_WARN_LIMIT 0x52 Undertemperature warning limit for the external temperature sensor. R/W Word Y L11 °C Y 0 0x8000 54 UT_FAULT_LIMIT 0x53 Undertemperature fault limit for the external temperature sensor. R/W Word Y L11 °C Y –5.0 0xCD80 54 MFR_TEMP_1_GAIN 0xF8 Inverse of external diode temperature R/W Word non ideality factor. One LSB = 2–14. Y CF Y 1 0x4000 54 MFR_TEMP_1_OFFSET 0xF9 Offset value for the external temperature. R/W Word Y L11 °C Y 0 0x8000 54 MFR_T_SELF_HEAT 0xB8 Calculated temperature rise due to self-heating of output current sense device above value measured by external temperature sensor. R Word Y L11 °C NA 54 MFR_IOUT_CAL_GAIN_TAU_INV 0xB9 Inverse of time constant for Mfr_t_ self_heat changes scaled by 4 • tCONV_SENSE. R/W Word Y L11 Y 0.0 0x8000 54 MFR_IOUT_CAL_GAIN_THETA 0xBA Thermal resistance from inductor core to point measured by external temperature sensor. R/W Word Y L11 Y 0.0 0x8000 54 TYPE PAGED FORMAT UNITS EEPROM °C/W DEFAULT REF VALUE PAGE 2975f For more information www.linear.com/LTC2975 53 LTC2975 PMBus Command Description OT_FAULT_LIMIT, OT_WARN_LIMIT, UT_WARN_LIMIT and UT_FAULT_LIMIT These commands provide supervising limits for temperature as measured by the external diode. MFR_TEMP_1_GAIN and MFR_TEMP_1_OFFSET The MFR_TEMP_1_GAIN command specifies the inverse of the temperature sensor ideality factor. The MFR_TEMP_1_ OFFSET allows an offset to be applied to the measured temperature. Calculations using these paged commands are: READ_TEMPERATURE_1 = TEXT • MFR_TEMP_1_GAIN – 273.15 + MFR_TEMP_1_OFFSET where: TEXT = Measured external temperature in degrees Kelvin. READ_TEMPERATURE_2 is substituted for READ_TEMPERATURE_1 if the associated TSENSE network fails to detect a valid temperature. Under these conditions MFR_TEMP_1_GAIN and MFR_TEMP_1_OFFSET will have no effect. See READ_TEMPERATURE_1 for more information. MFR_TEMP_1_GAIN Data Contents BIT(S) SYMBOL OPERATION b[15:0] Mfr_temp_1_gain[15:0] 16-bit integer representing inverse of temperature non-ideality factor. Value = Y • 214 where Y = b[15:0] is an unsigned integer. Example: MFR_TEMP_1_GAIN = 1.0 For b[15:0] = 0x4000 Value = 16384 • 2–14 = 1.0 MFR_T_SELF_HEAT, MFR_IOUT_CAL_GAIN_TAU_INV and MFR_IOUT_CAL_GAIN_THETA The LTC2975 uses an innovative (patent pending) algorithm to dynamically model the temperature rise from the external temperature sensor to the inductor core. This temperature rise is called MFR_T_SELF_HEAT and is used to calculate the final temperature correction required by IOUT_CAL_GAIN. The temperature rise is a function of the power dissipated in the inductor DCR, the thermal resistance from the inductor core to the remote temperature sensor and the thermal time constant of the inductor to board system. The algorithm simplifies the placement requirements for the external temperature sensor and compensates for the significant steady state and transient temperature error from the inductor core to the primary inductor heat sink. I = PI PI = CURRENT REPRESENTING THE POWER DISSIPATED BY THE INDUCTOR (VDCR • READ_IOUT WHERE VDCR = (VISENSEP – VISENSM)) Cτ = CAPACITANCE REPRESENTING THERMAL HEAT CAPACITY OF THE INDUCTOR (INCLUDED IN MFR_IOUT_CAL_GAIN_TAU_INV) VI = TI R = θIS C = Cτ VS = TS TI = VOLTAGE REPRESENTING THE TEMPERATURE OF THE INDUCTOR θIS = RESISTANCE REPRESENTING THE THERMAL RESISTANCE FROM THE DCR TO THE REMOTE TEMPERATURE SENSOR (MFR_IOUT_CAL_GAIN_THETA) TS = VOLTAGE REPRESENTING THE TEMPERATURE AT THE REMOTE TEMPERATURE SENSOR 2975 F21 Figure 21. Electronic Analogy for Inductor Temperature Model 54 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description The best way to understand the self-heating effect inside the inductor is to model the system using the circuit analogy of Figure 21. The 1st order differential equation for the above model may be approximated by the following difference equation: PI – TI/θIS = Cτ ∆TI/∆t (Eq1) (when TS = 0) from which: ∆TI = ∆t (PI θIS – TI)/(θIS Cτ) (Eq2) or ∆TI = (PI θIS – TI) • τINV (Eq3) where τINV = ∆t/(θIS Cτ) (Eq4) and ∆t is the sample period of the external temperature ADC. The LTC2975 implements the self-heating algorithm using Eq3 and Eq4 where: ∆TI =∆MFR_T_SELF_HEAT PI = READ_IOUT • (VISENSEP – VISENSEM) TS = READ_TEMPERATURE_1 TI = MFR_T_SELF_HEAT + TS ∆t = 4 • tCONV_SENSE. (One complete external temperature loop period) τINV = MFR_IOUT_CAL_GAIN_TAU_INV θIS = MFR_IOUT_CAL_GAIN_THETA Initially self heat is set to zero. After each temperature measurement self heat is updated to be the previous value of self heat incremented or decremented by ∆MFR_T_SELF_HEAT. The actual value of Cτ is not required. The important quantity is the thermal time constant τINV = (θIS Cτ). For example, if an inductor has a thermal time constant τINV = 5 seconds then: MFR_IOUT_CAL_GAIN_TAU_INV = (4 • tCONV_SENSE)/5 = 4 • 66ms/5s = 0.0528 Refer to the application section for more information on calibrating θIS and τINV. READ_TEMPERATURE_2 is substituted for READ_TEMPERATURE_1 if the associated TSENSE network fails to detect a valid temperature. Under these conditions TS = READ_TEMPERATURE_2 and the self-heating correction is applied using the internal die temperature. See READ_TEMPERATURE_1 for more information. MFR_T_SELF_HEAT Data Content Bit(s) Symbol b[15:0] Mfr_t_self_heat Operation Values are limited to the range 0°C to 50°C. MFR_IOUT_CAL_GAIN_THETA Data Content Bit(s) Symbol b[15:0] Mfr_iout_cal_gain_theta Operation Values ≤ 0 set MFR_T_SELF_HEAT to zero. 2975f For more information www.linear.com/LTC2975 55 LTC2975 PMBus Command Description MFR_IOUT_CAL_GAIN_TAU_INV Data Content Bit(s) Symbol Operation b[15:0] Mfr_iout_cal_gain_tau_inv Values ≤ 0 set MFR_T_SELF_HEAT to zero. Values ≥ 1 set MFR_T_SELF_HEAT to MFR_IOUT_CAL_GAIN_THETA • READ_IOUT • (VISENSEP – VISENSEM). Sequencing Timing Limits and Clock Sharing COMMAND NAME CMD CODE DESCRIPTION TYPE DEFAULT REF PAGED FORMAT UNITS EEPROM VALUE PAGE TON_DELAY 0x60 Time from CONTROL pin and/or OPERATION command = ON to VOUT_EN pin = ON. R/W Word Y L11 mS Y 1.0 0xBA00 56 TON_RISE 0x61 Time from when the VOUT_ENn pin goes high until the R/W Word LTC2975 optionally soft-connects its DAC and begins to servo the output voltage to the desired value. Y L11 mS Y 10.0 0xD280 56 TON_MAX_FAULT_LIMIT 0x62 Maximum time from VOUT_EN pin on assertion that R/W Word an UV condition will be tolerated before a TON_MAX_ FAULT condition results. Y L11 mS Y 15.0 0xD3C0 56 TOFF_DELAY 0x64 Time from CONTROL pin and/or OPERATION command = OFF to VOUT_EN pin = OFF. R/W Word Y L11 mS Y 1.0 0xBA00 56 MFR_RESTART_DELAY 0xDC Delay from actual CONTROL active edge to virtual CONTROL active edge. R/W Word N L11 mS Y 400 0xFB20 57 TON_DELAY, TON_RISE, TON_MAX_FAULT_LIMIT and TOFF_DELAY These commands share the same format and provide sequencing and timer fault and warning delays in ms. TON_DELAY sets the amount of time in milliseconds that a channel waits following the start of an ON sequence before its VOUT_EN pin enables a DC/DC converter. This delay is counted using SHARE_CLK only. TON_RISE sets the amount of time in ms that elapses after the power supply has been enabled until the LTC2975’s DAC soft connects and servos the output voltage to the desired level if Mfr_dac_mode = 00b. This delay is counted using SHARE_CLK only. TON_MAX_FAULT_LIMIT is the maximum amount of time that the power supply being controlled by the LTC2975 can attempt to power up the output without reaching the VOUT_UV_FAULT_LIMIT. If it does not, then a TON_MAX_FAULT is declared. If the output reaches VOUT_UV_FAULT_LIMIT prior to TON_MAX_FAULT_LIMIT, the LTC2975 unmasks the VOUT_UV_FAULT_LIMIT threshold. (Note that a value of zero means there is no limit to how long the power supply can attempt to bring up its output voltage.) This delay is counted using SHARE_CLK only. TOFF_DELAY is the amount of time that elapses after the CONTROL pin and/or OPERATION command is de-asserted until the channel is disabled (soft-off). This delay is counted using SHARE_CLK if available, otherwise the internal oscillator is used. All of the above TON and TOFF delays are internally limited to 655ms, and rounded to the nearest 10µs. The read value of these commands always returns what was last written and does not reflect internal limiting. 56 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description MFR_RESTART_DELAY This command essentially sets the off time of a CONTROL pin initiated restart. If the CONTROL pin is toggled off for at least 10µs then on, all dependent channels are disabled, held off for a time = Mfr_restart_delay, then sequenced back on. CONTROL pin transitions whose OFF time exceeds Mfr_restart_delay are not affected by this command. A value of all zeros disables this feature. This delay is counted using SHARE_CLK only. This delay is internally limited to 13.1 seconds, and rounded to the nearest 200µs. The read value of this command always returns what was last written and does not reflect internal limiting. Clock Sharing Multiple LTC PMBus devices can synchronize their clocks in an application by connecting together the open-drain SHARE_CLK input/outputs to a pull-up resistor as a wired OR. In this case the fastest clock will take over and synchronize all other chips to its falling edge. SHARE_CLK can optionally be used to synchronize ON/OFF dependency on VIN across multiple chips by setting the Mfr_config_all_vin_share_enable bit of the MFR_CONFIG_ALL register. When configured this way the chip will hold SHARE_CLK low when the unit is off for insufficient input voltage, and upon detecting that SHARE_CLK is held low the chip will disable all channels after a brief deglitch period. When the SHARE_CLK pin is allowed to rise, the chip will respond by beginning a start sequence. In this case the slowest VIN_ON detection will take over and synchronize other chips to its start sequence. Watchdog Timer and Power Good CMD CODE DESCRIPTION COMMAND NAME TYPE DEFAULT REF PAGED FORMAT UNITS EEPROM VALUE PAGE Y 0x0000 57 mS Y 100 0xEB20 58 L11 mS Y 0 0x8000 58 L11 mS Y 0 0x8000 58 MFR_PWRGD_EN 0xD4 Configuration that maps WDI/ R/W Word RESETB status and individual channel power good to the PWRGD pin. N Reg MFR_POWERGOOD_ASSERTION_ DELAY 0xE1 Power-good output assertion delay. R/W Word N L11 MFR_WATCHDOG_T_FIRST 0xE2 First watchdog timer interval. R/W Word N MFR_WATCHDOG_T 0xE3 Watchdog timer interval. R/W Word N MFR_PWRGD_EN This command register controls the mapping of the watchdog and channel power good status to the PWRGD pin. MFR_PWRGD_EN Data Contents BIT(S) SYMBOL OPERATION b[15:9] Reserved Read only, always returns 0s. b[8] Mfr_pwrgd_en_wdog Watchdog. 1 = Watchdog timer not-expired status is ANDed with PWRGD status for any similarly enabled channels to determine when the PWRGD pin gets asserted. 0 = Watchdog timer does not affect the PWRGD pin. b[7:4] Reserved Always returns 0000b. b[3] Mfr_pwrgd_en_chan3 Channel 3. 1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine when the PWRGD pin gets asserted. 0 = PWRGD status for this channel does not affect the PWRGD pin. 2975f For more information www.linear.com/LTC2975 57 LTC2975 PMBus Command Description MFR_PWRGD_EN Data Contents BIT(S) SYMBOL OPERATION b[2] Mfr_pwrgd_en_chan2 Channel 2. 1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine when the PWRGD pin gets asserted. b[1] 0 = PWRGD status for this channel does not affect the PWRGD pin. Mfr_pwrgd_en_chan1 Channel 1. 1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine when the PWRGD pin gets asserted. b[0] 0 = PWRGD status for this channel does not affect the PWRGD pin. Mfr_pwrgd_en_chan0 Channel 0. 1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine when the PWRGD pin gets asserted. 0 = PWRGD status for this channel does not affect the PWRGD pin. MFR_POWERGOOD_ASSERTION_DELAY This command register allows the user to program the delay from when the internal power-good signal becomes valid until the power-good output is asserted. This delay is counted using SHARE_CLK if available, otherwise the internal oscillator is used. This delay is internally limited to 13.1 seconds, and rounded to the nearest 200µs. The read value of this command always returns what was last written and does not reflect internal limiting. The power good de-assertion delay and threshold source is controlled by Mfr_config_all_pwrgd_off_uses_uv. Systems that require a fast power good de-assertion should set Mfr_config_all_pwrgd_off_uses_uv = 1. This uses the VOUT_UV_FAULT_LIMIT and the high speed comparator to de-assert the PWRGD pin. Systems that require a separate power good off threshold should set Mfr_config_all_pwrgd_off_uses_uv = 0. This uses the slower ADC polling loop and POWER_GOOD_OFF to de-assert the PWRGD pin. Watchdog Operation A non-zero write to the MFR_WATCHDOG_T register will reset the watchdog timer. Low-to-high transitions on the WDI/RESETB pin also reset the watchdog timer. If the timer expires, ALERTB is asserted and the PWRGD output is optionally de-asserted and then reasserted after MFR_PWRGD_ASSERTION_DELAY ms. Writing 0 to either the MFR_WATCH_DOG_T or MFR_WATCHDOG_T_FIRST registers will disable the timer. MFR_WATCHDOG_T_FIRST and MFR_WATCHDOG_T The MFR_WATCHDOG_T_FIRST register allows the user to program the duration of the first watchdog timer interval following assertion of the PWRGD pin, assuming the PWRGD pin reflects the status of the watchdog timer. If assertion of PWRGD is not conditioned by the watchdog timer’s status, then MFR_WATCHDOG_T_FIRST applies to the first timing interval after the timer is enabled. Writing a value of 0ms to the MFR_WATCHDOG_T_FIRST register disables the watchdog timer. This delay is internally limited to 65 seconds and rounded to the nearest 1ms. The MFR_WATCHDOG_T register allows the user to program watchdog timer intervals subsequent to the MFR_ WATCHDOG_T_FIRST timing interval. Writing a value of 0ms to the MFR_WATCHDOG_T register disables the watchdog timer. This delay is internally limited to 655ms and rounded to the nearest 10µs. Both timers operate on an internal clock independent of SHARE_CLK. The read value of both commands always returns what was last written and does not reflect internal limiting. 58 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description Fault Responses COMMAND NAME CMD CODE VOUT_OV_FAULT_RESPONSE 0x41 Action to be taken by the device when an output overvoltage fault is detected. R/W Byte Y Reg Y 0x80 59 VOUT_UV_FAULT_RESPONSE 0x45 Action to be taken by the device when an output undervoltage fault is detected. R/W Byte Y Reg Y 0x7F 59 IOUT_OC_FAULT_RESPONSE 0x47 Action to be taken by the device when an output overcurrent fault is detected. R/W Byte Y Reg Y 0x00 60 IOUT_UC_FAULT_RESPONSE 0x4C Action to be taken by the device when an output undercurrent fault is detected. R/W Byte Y Reg Y 0x00 60 OT_FAULT_RESPONSE 0x50 Action to be taken by the device when an overtemperature fault is detected on the external temperature sensor. R/W Byte Y Reg Y 0xB8 61 UT_FAULT_RESPONSE 0x54 Action to be taken by the device when an undertemperature fault is detected on the external temperature sensor. R/W Byte Y Reg Y 0xB8 61 VIN_OV_FAULT_RESPONSE 0x56 Action to be taken by the device when an input overvoltage fault is detected. R/W Byte N Reg Y 0x80 61 VIN_UV_FAULT_RESPONSE 0x5A Action to be taken by the device when an input undervoltage fault is detected. R/W Byte N Reg Y 0x00 61 TON_MAX_FAULT_RESPONSE 0x63 Action to be taken by the device when a TON_MAX_FAULT event is detected. R/W Byte Y Reg Y 0xB8 62 MFR_RETRY_DELAY 0xDB Retry interval during FAULT retry mode. R/W Word N L11 Y 200 0xF320 62 MFR_RETRY_COUNT 0xF7 Retry count for all faulted off conditions that enable retry. R/W Byte N Reg Y 0x07 62 DESCRIPTION TYPE PAGED FORMAT UNITS EEPROM mS DEFAULT REF VALUE PAGE Clearing Latched Faults Latched faults are reset by toggling the CONTROL pin, using the OPERATION command, or removing and reapplying the bias voltage to the VIN_SNS pin. All fault and warning conditions result in the ALERTB pin being asserted low and the corresponding bits being set in the status registers. The CLEAR_FAULTS command resets the contents of the status registers and de-asserts the ALERTB output. The CLEAR_FAULTS does not clear a faulted off state nor allow a channel to turn back on. VOUT_OV_FAULT_RESPONSE and VOUT_UV_FAULT_RESPONSE The fault response documented here is for voltages that are measured by the high speed supervisor. These voltages are measured over a short period of time and may require a deglitch period. Note that in addition to the response described by these commands, the LTC2975 will also: • Set the appropriate bit(s) in the STATUS_BYTE. • Set the appropriate bit(s) in the STATUS_WORD. • Set the appropriate bit in the corresponding STATUS_VOUT register, and • Notify the host by pulling the ALERTB pin low. 2975f For more information www.linear.com/LTC2975 59 LTC2975 PMBus Command Description VOUT_OV_FAULT_RESPONSE and VOUT_UV_FAULT_RESPONSE Data Contents BIT(S) SYMBOL OPERATION b[7:6] Vout_ov_fault_response_action, Response action: Vout_uv_fault_response_action 00b: The unit continues operation without interruption. 01b: The unit continues operating for the delay time specified by bits[2:0] in increments of tS_VS. See Electrical Characteristics Table. If the fault is still present at the end of the delay time, the unit shuts down immediately or sequences off after TOFF_DELAY (See Mfr_config_track_enn). After shutting down, the device responds according to the retry settings in bits [5:3]. 10b-11b: The unit shuts down immediately or sequences off after TOFF_DELAY (See Mfr_config_track_enn). After shutting down, the device responds according to the retry settings in bits [5:3]. b[5:3] Vout_ov_fault_response_retry, Vout_uv_fault_response_retry Response retry behavior: 000b: A zero value for the retry setting means that the unit does not attempt to restart. The output remains disabled until the fault is cleared. 001b-111b: The PMBus device attempts to restart the number of times specified by the global Mfr_retry_ count[2:0] until it is commanded OFF (by the CONTROL pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. Changing the value might not take effect until the next off-then-on sequence on that channel. b[2:0] Vout_ov_fault_response_delay, This sample count determines the amount of time a unit is to ignore a fault after it is first detected. Use this Vout_uv_fault_response_delay delay to deglitch fast faults. 000b: There is no additional deglitch delay applied to fault detection. 001b-111b: The fault is deglitched for deglitch period of b[2:0] samples at a sampling period of tS_VS (12.2µs typical). IOUT_OC_FAULT_RESPONSE and IOUT_UC_FAULT_RESPONSE The fault response documented here is for currents that are measured by the high speed supervisor. These currents are measured over a short period of time and may require a deglitch period. Note that in addition to the response described by these commands, the LTC2975 will also: • Set the appropriate bit in the STATUS_BYTE. • Set the appropriate bit in the STATUS_WORD. • Set the appropriate bit in the corresponding STATUS_IOUT register, and • Notify the host by pulling the ALERTB pin low. IOUT_OC_FAULT_RESONSE and IOUT_UC_FAULT_RESPONSE Data Contents BIT(S) SYMBOL OPERATION b[7:6] Iout_oc_fault_response_action, Response action: Iout_uc_fault_response_action 00b and 01b: The unit continues operation without interruption. Note that the current will not be limited to the value of Iout_oc_fault_limit or Iout_uc_fault_limit. 10b: The unit continues operating for the delay time specified by bits [2:0]. If the fault is still present at the end of the delay time, the unit shuts down immediately or sequences off after TOFF_DELAY (See Mfr_config_ track_enn). After shutting down, the device responds according to the retry settings in bits [5:3]. Note that the current will not be limited to the value of Iout_oc_fault_limit or Iout_uc_fault_limit. 11b: The unit shuts down immediately or sequences off after TOFF_DELAY (See Mfr_config_track_enn). After shutting down, the device responds according to the retry settings in bits [5:3]. 60 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description IOUT_OC_FAULT_RESONSE and IOUT_UC_FAULT_RESPONSE Data Contents BIT(S) SYMBOL b[5:3] Iout_oc_fault_response_retry, Iout_uc_fault_response_retry OPERATION Response retry behavior: 000b: A zero value for the retry setting means that the unit does not attempt to restart. The output remains disabled until the fault is cleared. 001-111b: The PMBus device attempts to restart the number of times specified by the global Mfr_retry_ count[2:0] until it is commanded off (by the control pin or operation command or both), bias power is removed, or another fault condition causes the unit to shut down. b[2:0] Iout_oc_fault_response_delay, Iout_uc_fault_response_delay Changing the value might not take effect until the next off-then-on sequence on that channel. This sample count determines the amount of time a unit is to ignore a fault after it is first detected. Use this delay to deglitch fast faults. 000b: There is no additional deglitch delay applied to fault detection. 001b-111b: The fault is deglitched for the interval selected by b[2:0] as follows. b[2:0] 001b 010b 011b 100b 101b 110b 111b Deglitch interval 100µs 1ms 5ms 10ms 20ms 50ms 100ms OT_FAULT_RESPONSE, UT_FAULT_RESPONSE, VIN_OV_FAULT_RESPONSE and VIN_UV_FAULT_RESPONSE The fault response documented here is for values that are measured by the ADC. Note that in addition to the response described by these commands, the LTC2975 will also: • Set the appropriate bit(s) in the STATUS_BYTE. • Set the appropriate bit(s) in the STATUS_WORD. • Set the appropriate bit in the corresponding STATUS_VIN or STATUS_TEMPERATURE register, and • Notify the host by pulling the ALERTB pin low. OT_FAULT_RESPONSE, UT_FAULT_RESPONSE, VIN_OV_FAULT_RESPONSE, VIN_UV_FAULT_RESPONSE Data Contents BIT(S) SYMBOL b[7:6] Ot_fault_response_action, Ut_fault_response_action, Vin_ov_fault_response_action, Vin_uv_fault_response_action b[5:3] Ot_fault_response_retry, Ut_fault_response_retry, Vin_ov_fault_response_retry, Vin_uv_fault_response_retry b[2:0] Ot_fault_response_delay, Ut_fault_response_delay, Vin_ov_fault_response_delay, Vin_uv_fault_response_delay OPERATION Response action: 00b: The unit continues operation without interruption. 01b-11b: The unit shuts down immediately or sequences off after TOFF_DELAY (See Mfr_config_track_enn). After shutting down, the device responds according to the retry settings in bits [5:3]. Response retry behavior: 000b: A zero value for the retry setting means that the unit does not attempt to restart. The output remains disabled until the fault is cleared. 001b-111b: The PMBus device attempts to restart the number of times specified by the global Mfr_retry_ count[2:0] until it is commanded OFF (by the CONTROL pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. Changing the value might not take effect until the next off-then-on sequence on that channel. Hard coded to 000b: There is no additional deglitch delay applied to fault detection. 2975f For more information www.linear.com/LTC2975 61 LTC2975 PMBus Command Description TON_MAX_FAULT_RESPONSE This command defines the LTC2975 response to a TON_MAX_FAULT. It may be used to protect against a short-circuited output at startup. After startup use VOUT_UV_FAULT_RESPONSE to protect against a short-circuited output. The device also: • Sets the HIGH_BYTE bit in the STATUS_BYTE, • Sets the VOUT bit in the STATUS_WORD, • Sets the TON_MAX_FAULT bit in the STATUS_VOUT register, and • Notifies the host by asserting ALERTB. TON_MAX_FAULT_RESPONSE Data Contents BIT(S) SYMBOL OPERATION b[7:6] Ton_max_fault_response_ action Response action: 00b: The unit continues operation without interruption. 01b-11b: The unit shuts down immediately or sequences off after TOFF_DELAY (See Mfr_config_track_enn). After shutting down, the device responds according to the retry settings in bits [5:3]. b[5:3] Ton_max_fault_response_retry Response retry behavior: 000b: A zero value for the retry setting means that the unit does not attempt to restart. The output remains disabled until the fault is cleared. 001b-111b: The PMBus device attempts to restart the number of times specified by the global Mfr_retry_ count[2:0] until it is commanded OFF (by the CONTROL pin or OPERATION command or both), bias power is removed, or another fault condition causes the unit to shut down. Changing the value might not take effect until the next off-then-on sequence on that channel. b[2:0] Ton_max_fault_response_delay Hard coded to 000b: There is no additional deglitch delay applied to fault detection. MFR_RETRY_DELAY This command determines the retry interval when the LTC2975 is in retry mode in response to a fault condition. This delay is counted using SHARE_CLK only. This delay is internally limited to 13.1 seconds, and rounded to the nearest 200µs. The read value of this command always returns what was last written and does not reflect internal limiting. MFR_RETRY_COUNT The MFR_RETRY_COUNT is a global command that sets the number of retries attempted when any channel faults off with its fault response retry field set to a non zero value. In the event of multiple or recurring retry faults on the same channel the total number of retries equals MFR_RETRY_ COUNT. If a channel has not been faulted off for at least 16 seconds, its retry counter is cleared. Toggling a channel’s CONTROL pin off then on or issuing OPERATION off then on commands will synchronously clear the retry count. MFR_RETRY_COUNT Data Contents BIT(S) SYMBOL OPERATION b[7:3] Reserved b[2:0] Mfr_retry_count [2:0] Always returns zero. 0: No retries: 1-6: Number of retries. 7: Infinite retries. Changing the value might not take effect until the next off-then-on sequence on that channel. 62 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description Shared External Faults COMMAND NAME CMD CODE MFR_FAULTB0_PROPAGATE 0xD2 Configuration that determines if a channels faulted off state is propagated to the FAULTB0 pin. R/W Byte Y Reg Y 0x00 63 MFR_FAULTB1_PROPAGATE 0xD3 Configuration that determines if a channels faulted off state is propagated to the FAULTB1 pin. R/W Byte Y Reg Y 0x00 63 MFR_FAULTB0_RESPONSE 0xD5 Action to be taken by the device when the FAULTB0 pin is asserted low. R/W Byte N Reg Y 0x00 63 MFR_FAULTB1_RESPONSE 0xD6 Action to be taken by the device when the FAULTB1 pin is asserted low. R/W Byte N Reg Y 0x00 63 DESCRIPTION TYPE DEFAULT REF PAGED FORMAT UNITS EEPROM VALUE PAGE MFR_FAULTB0_PROPAGATE and MFR_FAULTB1_PROPAGATE These manufacturer specific commands enable channels that have faulted off to propagate that state to the appropriate fault pin. MFR_FAULTB0_PROPAGATE allows any channel’s faulted off state to propagate to the FAULTB0 pin. MFR_ FAULTB1_PROPAGATE allows any channel’s faulted off state to propagate to the FAULTB1 pin. Note that pulling a fault pin low will have no effect for channels that have MFR_FAULTBn_RESPONSE set to 0. The channel continues operation without interruption. This fault response is called Ignore (0x0) in LTpowerPlay. MFR_FAULT0_PROPAGATE Data Contents BIT(S) SYMBOL OPERATION b[7:1] Reserved Don’t care. Always returns 0. b[0] Mfr_faultb0_propagate Enable fault propagation. 0: Channel’s faulted off state does not assert FAULTB0 low. 1 :Channel’s faulted off state asserts FAULTB0 low. MFR_FAULT1_PROPAGATE Data Contents BIT(S) SYMBOL OPERATION b[7:1] Reserved Don’t care. Always returns 0. b[0] Mfr_faultb1_propagate Enable fault propagation. 0: Channel’s faulted off state does not assert FAULTB1 low. 1: Channel’s faulted off state asserts FAULTB1 low. MFR_FAULTB0_RESPONSE and MFR_FAULTB1_RESPONSE These manufacturer specific commands share the same format and specify the response to assertions of the FAULTB pins. MFR_FAULTB0_RESPONSE determines which channels shut off when the FAULTB0 pin is asserted low and MFR_FAULTB1_RESPONSE determines which channels shut off when the FAULTB1 pin is asserted low. When a channel shuts off in response to a FAULTBn pin, the ALERTB pin is asserted low and the appropriate bit is set in the STATUS_MFR_SPECIFIC register. For a graphical explanation, see the switches on the left hand side of Figure 32: Channel Fault Management Block Diagram. Faults will not propagate for channels that have MFR_FAULTBn_RESPONSE set to 0: The channel continues operation without interruption. Note that this fault response is called No Action in LTpowerPlay. 2975f For more information www.linear.com/LTC2975 63 LTC2975 PMBus Command Description MFR_FAULTB0_RESPONSE and MFR_FAULTB1_RESPONSE Data Contents BIT(S) SYMBOL b[7:4] Reserved b[3] Mfr_faultb0_response_chan3, Mfr_faultb1_response_chan3 OPERATION Read only, always returns 0000b. Channel 3 response. 0: The channel continues operation without interruption b[2] 1: The channel shuts down if the corresponding FAULTB pin is still asserted after 10µs. When the FAULTB pin subsequently de-asserts, the channel turns back on, honoring TON_DELAY and TON_RISE settings. Mfr_faultb0_response_chan2, Channel 2 response. Mfr_faultb1_response_chan2 0: The channel continues operation without interruption b[1] 1: The channel shuts down if the corresponding FAULTB pin is still asserted after 10µs. When the FAULTB pin subsequently de-asserts, the channel turns back on, honoring TON_DELAY and TON_RISE settings. Mfr_faultb0_response_chan1, Channel 1 response. Mfr_faultb1_response_chan1 0: The channel continues operation without interruption b[0] 1: The channel shuts down if the corresponding FAULTB pin is still asserted after 10µs. When the FAULTB pin subsequently de-asserts, the channel turns back on, honoring TON_DELAY and TON_RISE settings. Mfr_faultb0_response_chan0, Channel 0 response. Mfr_faultb1_response_chan0 0: The channel continues operation without interruption 1: The channel shuts down if the corresponding FAULTB pin is still asserted after 10µs. When the FAULTB pin subsequently de-asserts, the channel turns back on, honoring TON_DELAY and TON_RISE settings. Fault Warning and Status COMMAND NAME CMD CODE DESCRIPTION CLEAR_FAULTS 0x03 Clear any fault bits that have been set. STATUS_BYTE STATUS_WORD TYPE DEFAULT REF PAGED FORMAT UNITS EEPROM VALUE PAGE NA 64 Reg NA 65 Reg NA 65 Reg NA 66 Reg NA 66 Reg NA 66 Reg NA 67 N Reg NA 67 R Byte Y Reg NA 68 R/W Word N Reg NA 68 R Byte N Reg NA 69 Send Byte Y 0x78 One byte summary of the unit’s fault condition. R Byte Y 0x79 Two byte summary of the unit’s fault condition. R Word Y STATUS_VOUT 0x7A Output voltage fault and warning status. R Byte Y STATUS_IOUT 0x7B Output current fault and warning status. R Byte Y STATUS_INPUT 0x7C Input supply fault and warning status. R Byte N STATUS_TEMPERATURE 0x7D External temperature fault and warning status for READ_TEMPERATURE_1. R Byte Y STATUS_CML 0x7E Communication and memory fault and warning status. R Byte STATUS_MFR_SPECIFIC 0x80 Manufacturer specific fault and state information. MFR_PADS 0xE5 Current state of selected digital I/O pads. MFR_COMMON 0xEF Manufacturer status bits that are common across multiple LTC chips. CLEAR_FAULTS The CLEAR_FAULTS command is used to clear status bits that have been set. This command clears all fault and warning bits in all unpaged status registers, and paged status registers selected by the current PAGE setting. At the same time, the device negates (clears, releases) its contribution to ALERTB. The CLEAR_FAULTS command does not cause a unit that has latched off for a fault condition to restart. See Clearing Latched Faults for more information. If the fault is present after the fault is cleared, the fault status bit will be set again and the host notified by the usual means. Note: this command responds to the global page command. (PAGE=0xFF) 64 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description STATUS_BYTE The STATUS_BYTE command returns the summary of the most critical faults or warnings which have occurred, as shown in the following table. STATUS_BYTE is a subset of STATUS_WORD and duplicates the same information. STATUS_BYTE Data Contents BIT(S) SYMBOL OPERATION b[7] Status_byte_busy Same as Status_word_busy. b[6] Status_byte_off Same as Status_word_off. b[5] Status_byte_vout_ov Same as Status_word_vout_ov. b[4] Status_byte_iout_oc Same as Status_word_iout_oc. b[3] Status_byte_vin_uv Same as Status_word_vin_uv. b[2] Status_byte_temp Same as Status_word_temp. b[1] Status_byte_cml Same as Status_word_cml. b[0] Status_byte_high_byte Same as Status_word_high_byte. STATUS_WORD The STATUS_WORD command returns two bytes of information with a summary of the unit’s fault condition. Based on the information in these bytes, the host can get more information by reading the appropriate detailed status register. The low byte of the STATUS_WORD is the same register as the STATUS_BYTE command. STATUS_WORD Data Contents BIT(S) SYMBOL OPERATION b[15] Status_word_vout An output voltage fault or warning has occurred. See STATUS_VOUT. b[14] Status_word_iout An output current fault or warning has occurred. See STATUS_IOUT. b[13] Status_word_input An input voltage fault or warning has occurred. See STATUS_INPUT. b[12] Status_word_mfr A manufacturer specific fault has occurred. See STATUS_MFR._SPECIFIC. b[11] Status_word_power_not_good The PWRGD pin, if enabled, is negated. Power is not good. b[10] Status_word_fans Not supported. Always returns 0. b[9] Status_word_other Not supported. Always returns 0. b[8] Status_word_unknown Not supported. Always returns 0. b[7] Status_word_busy Device busy when PMBus command received. See OPERATION: Processing Commands. b[6] Status_word_off This bit is asserted if the unit is not providing power to the output, regardless of the reason, including simply not being enabled. The off-bit is clear if unit is allowed to provide power to the output. b[5] Status_word_vout_ov An output overvoltage fault has occurred. b[4] Status_word_iout_oc An output overcurrent fault has occurred. b[3] Status_word_vin_uv A VIN undervoltage fault has occurred. b[2] Status_word_temp A temperature fault or warning has occurred. See STATUS_TEMPERATURE. b[1] Status_word_cml A communication, memory or logic fault has occurred. See STATUS_CML. b[0] Status_word_high_byte A fault/warning not listed in b[7:1] has occurred. 2975f For more information www.linear.com/LTC2975 65 LTC2975 PMBus Command Description STATUS_VOUT The STATUS_VOUT command returns the summary of the output voltage faults or warnings which have occurred, as shown in the following table: STATUS_VOUT Data Contents BIT(S) SYMBOL OPERATION b[7] Status_vout_ov_fault Overvoltage fault. b[6] Status_vout_ov_warn Overvoltage warning. b[5] Status_vout_uv_warn Undervoltage warning b[4] Status_vout_uv_fault Undervoltage fault. b[3] Status_vout_max_warn VOUT_MAX warning. An attempt has been made to set the output voltage to a value higher than allowed by the VOUT_MAX command. After being cleared, Status_vout_max_warn will not report additional warnings until a channel state transition (off-then-on) has been performed or a valid output voltage, lower than allowed by VOUT_ MAX, has been set. b[2] Status_vout_ton_max_fault TON_MAX_FAULT sequencing fault. b[1] Status_vout_toff_max_warn Not supported. Always returns 0. b[0] Status_vout_tracking_error Not supported. Always returns 0. STATUS_IOUT The STATUS_IOUT command returns the summary of the output current faults or warnings which have occurred, as shown in the following table: STATUS_IOUT Data Contents BIT(S) SYMBOL OPERATION b[7] Status_iout_oc_fault Overcurrent fault. b[6] Status_iout_oc_uv_fault Not Supported. Always returns 0. b[5] Status_iout_oc_warn Overcurrent warning b[4] Status_iout_uc_fault Undercurrent fault. b[3] Status_iout_curr_share_fault Not Supported. Always returns 0. b[2] Status_pout_power_limiting Not Supported. Always returns 0. b[1] Status_pout_overpower_fault Not Supported. Always returns 0. b[0] Status_pout_overpower_warn Not Supported. Always returns 0. STATUS_INPUT The STATUS_INPUT command returns the summary of the VIN faults or warnings which have occurred, as shown in the following table: STATUS_INPUT Data Contents BIT(S) SYMBOL OPERATION b[7] Status_input_ov_fault VIN overvoltage fault b[6] Status_input_ov_warn VIN overvoltage warning b[5] Status_input_uv_warn VIN undervoltage warning b[4] Status_input_uv_fault VIN undervoltage fault b[3] Status_input_off Unit is off for insufficient input voltage. b[2] IIN overcurrent fault Not supported. Always returns 0. 66 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description STATUS_INPUT Data Contents BIT(S) SYMBOL OPERATION b[1] IIN overcurrent warn Not supported. Always returns 0. b[0] PIN overpower warn Not supported. Always returns 0. STATUS_TEMPERATURE The STATUS_TEMPERATURE command returns the summary of the temperature faults or warnings which have occurred, as shown in the following table. Note that this information is paged and refers to the temperature of the associated external diode. STATUS_TEMPERATURE Data Contents BIT(S) SYMBOL OPERATION b[7] Status_temperature_ot_fault Overtemperature fault. b[6] Status_temperature_ot_warn Overtemperature warning. b[5] Status_temperature_ut_warn Undertemperature warning. b[4] Status_temperature_ut_fault Undertemperature fault. b[3] Reserved Reserved. Always returns 0. b[2] Reserved Reserved. Always returns 0. b[1] Reserved Reserved. Always returns 0. b[0] Reserved Reserved. Always returns 0. STATUS_CML The STATUS_CML command returns the summary of the communication, memory and logic faults or warnings which have occurred, as shown in the following table: STATUS_CML Data Contents BIT(S) SYMBOL b[7] Status_cml_cmd_fault OPERATION 1 = An illegal or unsupported command fault has occurred. 0 = No fault has occurred. b[6] Status_cml_data_fault 1 = Illegal or unsupported data received. 0 = No fault has occurred. b[5] Status_cml_pec_fault 1 = A packet error check fault has occurred. Note: PEC checking is always active in the LTC2975. Any extra byte received before a STOP will set Status_cml_pec_fault unless the extra byte is a matching PEC byte. 0 = No fault has occurred. b[4] Status_cml_memory_fault 1 = A fault has occurred in the EEPROM. 0 = No fault has occurred. b[3] Status_cml_processor_fault Not supported, always returns 0. b[2] Reserved Reserved, always returns 0. b[1] Status_cml_pmbus_fault 1 = A communication fault other than ones listed in this table has occurred. This is a catch all category for illegally formed I2C/SMBus commands (Example: An address byte with read =1 received immediately after a START). b[0] Status_cml_unknown_fault 0 = No fault has occurred. Not supported, always returns 0. 2975f For more information www.linear.com/LTC2975 67 LTC2975 PMBus Command Description STATUS_MFR_SPECIFIC The STATUS_MFR_SPECIFIC command returns manufacturer specific status flags. Bits marked CHANNEL = All are not paged. Bits marked STICKY = Yes stay set until a CLEAR_FAULTS is issued or the channel is commanded on by the user. Bits marked ALERT = Yes pull ALERTB low when the bit is set. Bits marked OFF = Yes indicate that the event can be configured elsewhere to turn the channel off. STATUS_MFR_SPECIFIC Data Contents BIT(S) SYMBOL b[7] Status_mfr_discharge OPERATION 1 = A VOUT discharge fault occurred while attempting to enter the ON state. CHANNEL STICKY ALERT OFF Current Page Yes Yes Yes 0 = No VOUT discharge fault has occurred. b[6] Status_mfr_fault1_in Current Page This channel attempted to turn on while the FAULTB1 pin was asserted low, or this channel has shut down at least once in response to a FAULTB1 pin asserting low since the last CONTROL pin toggle, OPERATION command ON/OFF cycle or CLEAR_FAULTS command. If Mfr_track_en_chann is set, Status_mfr_fault1_in may also be set for the channel causing the fault. Yes Yes Yes b[5] Status_mfr_fault0_in This channel attempted to turn on while the FAULTB0 pin was Current Page asserted low, or this channel has shut down at least once in response to a FAULTB0 pin asserting low since the last CONTROL pin toggle, OPERATION command ON/OFF cycle or CLEAR_FAULTS command. If Mfr_track_en_chann is set, Status_mfr_fault0_in may also be set for the channel causing the fault. Yes Yes Yes b[4] Status_mfr_servo_target_reached Servo target has been reached. Current Page No No No b[3] Status_mfr_dac_connected DAC is connected and driving VDAC pin. Current Page No No No b[2] Status_mfr_dac_saturated A previous servo operation terminated with maximum or minimum DAC value. Current Page Yes No No b[1] Status_mfr_auxfaultb_faulted_off AUXFAULTB has been de-asserted due to a VOUT or IOUT fault. All No No No b[0] Status_mfr_watchdog_fault 1 = A watchdog fault has occurred. All Yes Yes No 0 = No watchdog fault has occurred. MFR_PADS The MFR_PADS command provides read-only access of digital pads (pins). The input values are before any deglitching logic. MFR_PADS Data Contents BIT(S) SYMBOL b[15] Mfr_pads_pwrgd_drive 0 = PWRGD pad is being driven low by this chip. Mfr_pads_alertb_drive 1 = PWRGD pad is not being driven low by this chip. 0 = ALERTB pad is being driven low by this chip. b[14] b[13:12] Mfr_pads_faultb_drive[1:0] OPERATION 1 = ALERTB pad is not being driven low by this chip. bit[1] used for FAULTB0 pad, bit[0] used for FAULTB1 pad as follows: 0 = FAULTB pad is being driven low by this chip. b[11:10] Reserved[1:0] b[9:8] Mfr_pads_asel1[1:0] 1 = FAULTB pad is not being driven low by this chip. Always returns 00b. 11: Logic high detected on ASEL1 input pad. 10: ASEL1 input pad is floating. 01: Reserved. 00: Logic low detected on ASEL1 input pad. 68 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description MFR_PADS Data Contents BIT(S) SYMBOL b[7:6] Mfr_pads_asel0[1:0] OPERATION 11: Logic high detected on ASEL0 input pad. 10: ASEL0 input pad is floating. 01: Reserved. b[5] Mfr_pads_control1 00: Logic low detected on ASEL0 input pad. 1: Logic high detected on CONTROL1 pad. b[4] Mfr_pads_control0 0: Logic low detected on CONTROL1 pad. 1: Logic high detected on CONTROL0 pad. Mfr_pads_faultb[1:0] 0: Logic low detected on CONTROL0 pad. bit[1] used for FAULTB0 pad, bit[0] used for FAULTB1 pad as follows: b[3:2] 1: Logic high detected on FAULTB pad. b[1] Mfr_pads_control2 0: Logic low detected on FAULTB pad. 1: Logic high detected on CONTROL2 pad. b[0] Mfr_pads_control3 0: Logic low detected on CONTROL2 pad. 1: Logic high detected on CONTROL3 pad. 0: Logic low detected on CONTROL3 pad. MFR_COMMON This command returns status information for the alert, device busy, share-clock pin (SHARE_CLK) and the writeprotect pin (WP). This is the only command that may still be read when the LTC2975 is busy processing an EEPROM or other command. It may be polled by the host to determine when the LTC2975 is available to process a PMBus command. A busy device will always acknowledge its address but will NACK the command byte and set Status_byte_busy and Status_word_busy when it receives a command that it cannot immediately process. ALERTB will not be asserted low in this case. MFR_COMMON Data Contents BIT(S) SYMBOL b[7] Mfr_common_alertb OPERATION Returns alert status. 1: ALERTB is de-asserted high. 0: ALERTB is asserted low. b[6] Mfr_common_busyb Returns device busy status. 1: The device is available to process PMBus commands. 0: The device is busy and will NACK PMBus commands. b[5:2] Reserved b[1] Mfr_common_share_clk Read only, always returns 1s. Returns the status of the share-clock pin. 1: Share-clock pin is being held low. 0: Share-clock pin is active. b[0] Mfr_common_write_protect Returns the status of the write-protect pin. 1: Write-protect pin is high. 0: Write-protect pin is low. 2975f For more information www.linear.com/LTC2975 69 LTC2975 PMBus Command Description Telemetry COMMAND NAME CMD CODE DESCRIPTION DEFAULT REF TYPE PAGED FORMAT UNITS EEPROM VALUE PAGE READ_VIN 0x88 Input supply voltage. R Word N L11 V NA 70 READ_IIN 0x89 DC/DC converter input current. R Word Y L11 A NA 70 READ_PIN 0x97 DC/DC converter input power. R Word Y L11 W NA 70 READ_VOUT 0x8B DC/DC converter output voltage. R Word Y L16 V NA 70 READ_IOUT 0x8C DC/DC converter output current. R Word Y L11 A NA 71 READ_TEMPERATURE_1 0x8D External diode junction temperature. This is the value R Word used for all temperature related processing, including IOUT_CAL_GAIN. Y L11 °C NA 71 READ_TEMPERATURE_2 0x8E Internal junction temperature. R Word N L11 °C NA 71 READ_POUT 0x96 DC/DC converter output power. R Word Y L11 W NA 71 MFR_READ_IOUT 0xBB Alternate data format for READ_IOUT. One LSB = 2.5mA. R Word Y CF 2.5mA NA 72 MFR_IIN_PEAK 0xC4 Maximum measured value of READ_IIN R Word Y L11 A NA 71 MFR_IIN_MIN 0xC5 Minimum measured value of READ_IIN. R Word Y L11 A NA 71 MFR_PIN_PEAK 0xC6 Maximum measured value of READ_PIN. R Word Y L11 W NA 71 MFR_PIN_MIN 0xC7 Minimum measured value of READ_PIN. R Word Y L11 W NA 71 MFR_IOUT_SENSE_VOLTAGE 0xFA Absolute value of VISENSEP – VISENSEM. One LSB = R Word 3.05µV. Y CF 3.05µV NA 73 MFR_VIN_PEAK 0xDE Maximum measured value of READ_VIN. R Word N L11 V NA 73 MFR_VOUT_PEAK 0xDD Maximum measured value of READ_VOUT. R Word Y L16 V NA 73 MFR_IOUT_PEAK 0xD7 Maximum measured value of READ_IOUT. R Word Y L11 A NA 73 MFR_TEMPERATURE_1_PEAK 0xDF Maximum measured value of READ_TEMPERATURE_1. R Word Y L11 °C NA 73 MFR_VIN_MIN 0xFC Minimum measured value of READ_VIN. R Word N L11 V NA 73 MFR_VOUT_MIN 0xFB Minimum measured value of READ_VOUT. R Word Y L16 V NA 73 MFR_IOUT_MIN 0xD8 Minimum measured value of READ_IOUT. R Word Y L11 A NA 73 MFR_TEMPERATURE_1_MIN 0xFD Minimum measured value of READ_TEMPERATURE_1. R Word Y L11 °C NA 74 READ_VIN This command returns the most recent ADC measured value of the input voltage at the VIN_SNS pin. READ_IIN This command returns the most recent ADC measured value of the input current derived from the voltage difference between the IIN_SNSP and IIN_SNSM pins. The READ_IIN value reported is automatically corrected to account for the range selected by Mfr_ein_config_iin_range[1:0]. READ_PIN This command returns the most recent ADC measured value of the input power in watts. This is the product of READ_IIN and READ_VIN. READ_VOUT This command returns the most recent ADC measured value of the channel’s output voltage. 70 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description READ_IOUT This command returns the most recent ADC measured value of the channel’s output current. MFR_IIN_PEAK This command returns the maximum ADC measured value of the input current. This register is reset to 0x7C00 (–225) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. MFR_IIN_MIN This command returns the minimum ADC measured value of the input current. This register is reset to 0x7BFF (approximately 225) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. MFR_PIN_PEAK This command returns the maximum ADC measured value of the input power. This register is reset to 0x7C00 (–225) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. MFR_PIN_MIN This command returns the minimum ADC measured value of the input power. This register is reset to 0x7BFF (approximately 225) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. READ_TEMPERATURE_1 This command returns the most recent measured value of the external diode temperature in °C. This value is used for all temperature related operations and calculations. This command is paged. READ_TEMPERATURE_2 is substituted for READ_TEMPERATURE_1 if the associated TSENSE network fails to detect a valid temperature. The TSENSE network will fail to detect a valid temperature under the following conditions: The TSENSE pin is shorted to a constant voltage. The sense diode has an ideality factor greater than N_TS max. READ_TEMPERATURE_2 This command returns the most recent ADC measured value of junction temperature in °C as determined by the LTC2975’s internal temperature sensor. This register is for information purposes and does not generate any faults, warnings, or affect any other registers or internal calculations unless it is used as READ_TEMPERATURE_1. This command is not paged. READ_TEMPERATURE_2 is substituted for READ_TEMPERATURE_1 if a channel’s TSENSE network fails to detect a valid temperature. READ_POUT This command returns the most recent ADC measured value of the channel’s output power in watts. 2975f For more information www.linear.com/LTC2975 71 LTC2975 PMBus Command Description MFR_READ_IOUT This command returns the most recent ADC measured value of the channel’s output current, using a custom format that provides better numeric representation granularity than the READ_IOUT command for currents whose absolute value is between 2A and 82A. MFR_READ_IOUT Data Contents BIT(S) SYMBOL OPERATION b[15:0] Mfr_read_iout[15:0] Channel output current expressed in custom format for improved resolution at high currents. Value = Y • 2.5 where Y = b[15:0] is a signed two’s-complement number. Example: MFR_READ_IOUT = 5mA For b[15:0] = 0x0002 Value = 2 • 2.5 = 5mA The granularity of the returned value is always 2.5mA, and the return value is limited to ±81.92A. Use the READ_IOUT command for larger currents. Note that the accuracy of the returned value is always limited by the ADC Characteristics listed in the Electrical Characteristics section. Comparison of Granularity Due to Numeric Format READ_IOUT GRANULARITY MFR_READ_IOUT GRANULARITY 31.25mA ≤ IOUT < 62.5mA 61µA 2.5mA 62.5mA ≤ IOUT < 125mA 122µA 2.5mA 125mA ≤ IOUT < 250mA 244µA 2.5mA 250mA ≤ IOUT < 500mA 488µA 2.5mA CURRENT RANGE 0.5A ≤ IOUT < 1A 977µA 2.5mA 1A ≤ IOUT < 2A 1.95mA 2.5mA 2A ≤ IOUT < 4A 3.9mA 2.5mA 4A ≤ IOUT < 8A 7.8mA 2.5mA 8A ≤ IOUT < 16A 15.6mA 2.5mA 16A ≤ IOUT < 32A 31.3mA 2.5mA 32A ≤ IOUT < 64A 62.5mA 2.5mA 64A ≤ IOUT < 82A 125mA 2.5mA 82A ≤ IOUT < 128A 125mA Saturated 128A ≤ IOUT < 256A 250mA Saturated 72 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description MFR_IOUT_SENSE_VOLTAGE This command returns the absolute value of the voltage measured between ISENSEPn and ISENSEMn during the last READ_IOUT ADC conversion without any temperature correction. MFR_IOUT_SENSE_VOLTAGE Data Contents BIT(S) SYMBOL OPERATION b[15:0] Mfr_iout_sense_voltage Absolute value of raw voltage conversion measured between ISENSEPn and ISENSEMn. Value = Y • 0.025 • 2–13 where Y = b[15:0] is an unsigned integer. Example: MFR_IOUT_SENSE_VOLTAGE = 1.544mV For b[15:0] = 0x1FA=506 Value = 506 • 0.025 • 2–13 = 1.544mV MFR_VIN_PEAK This command returns the maximum ADC measured value of the input voltage. This register is reset to 0x7C00 (–225) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. MFR_VOUT_PEAK This command returns the maximum ADC measured value of the channel’s output voltage. This register is reset to 0xF800 (0.0) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. MFR_IOUT_PEAK This commands returns the maximum ADC measured value of the channel’s output current. This register is reset to 0x7C00 (–225) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. MFR_TEMPERATURE_1_PEAK This command returns the maximum measured value of the external diode temperature in °C. This register is reset to 0x7C00 (–225) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. MFR_VIN_MIN This command returns the minimum ADC measured value of the input voltage. This register is reset to 0x7BFF (approximately 225) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. MFR_VOUT_MIN This command returns the minimum ADC measured value of the channel’s output voltage. This register is reset to 0xFFFF (7.9999) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. Updates are disabled when Margin Low (Ignore Faults and Warnings) is enabled. MFR_IOUT_MIN This command returns the minimum ADC measured value of the channel’s output current. This register is reset to 0x7BFF (approximately 225) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. 2975f For more information www.linear.com/LTC2975 73 LTC2975 PMBus Command Description MFR_TEMPERATURE_1_MIN This command returns the minimum measured value of the external diode temperature in °C. This register is reset to 0x7BFF (approximately 225) when the LTC2975 emerges from power-on reset or when a CLEAR_FAULTS command is executed. Fault Logging COMMAND NAME CMD CODE DESCRIPTION TYPE DEFAULT REF PAGED FORMAT UNITS EEPROM VALUE PAGE N NA 74 Send Byte N NA 74 MFR_FAULT_LOG_CLEAR 0xEC Initialize the EEPROM block reserved for fault Send Byte logging and clear any previous fault logging locks. N NA 75 MFR_FAULT_LOG_STATUS 0xED Fault logging status. R Byte N Reg Y NA 75 MFR_FAULT_LOG 0xEE Fault log data bytes. This sequentially retrieved data is used to assemble a complete fault log. R Block N Reg Y NA 75 MFR_FAULT_LOG_STORE 0xEA Command a transfer of the fault log from RAM to Send Byte EEPROM. MFR_FAULT_LOG_RESTORE 0xEB Command a transfer of the fault log previously stored in EEPROM back to RAM. Fault Log Operation A conceptual diagram of the fault log is shown in Figure 22. The fault log provides black box capability for the LTC2975. During normal operation the contents of the status registers, the output voltage/current/temperature readings, the input voltage readings, as well as peak and min values of these quantities, are stored in a continuously updated buffer in RAM. You can think of the operation as being similar to a strip chart recorder. When a fault occurs, the contents are written into EEPROM for non volatile storage. The EEPROM fault log is then locked. The part can be powered down with the fault log available for reading at a later time. TIME OF FAULT TRANSFER TO EEPROM AND LOCK ADC READINGS CONTINUOUSLY FILL BUFFER RAM 255 BYTES • • • • • • EEPROM 255 BYTES AFTER FAULT READ FROM EEPROM AND LOCK BUFFER 2975 F22 Figure 22. Fault Logging MFR_FAULT_LOG_STORE This command allows the user to transfer data from the RAM buffer to EEPROM. MFR_FAULT_LOG_RESTORE This command allows the user to transfer a copy of the fault-log data from the EEPROM to the RAM buffer. After a restore the RAM buffer is locked until a successful Mfr_fault_log read. 74 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description MFR_FAULT_LOG_CLEAR This command initializes the EEPROM block reserved for fault logging. Any previous fault log stored in EEPROM will be erased by this operation and logging of the fault log RAM to EEPROM will be enabled. Make sure that Mfr_fault_ log_status_ram = 0 before issuing the MFR_FAULT_LOG_CLEAR command. MFR_FAULT_LOG_STATUS This register is used to manage fault log events. The Mfr_fault_log_status_eeprom bit is set after a MFR_FAULT_LOG_ STORE command or a faulted-off event triggers a transfer of the fault log from RAM to EEPROM. This bit is cleared by a MFR_FAULT_LOG_CLEAR command. Mfr_fault_log_status_ram is set after a MFR_FAULT_ LOG_RESTORE to indicate that the data in the RAM has been restored from EEPROM and not yet read using a MFR_FAULT_LOG command. This bit is cleared only by a successful execution of an MFR_FAULT_LOG command. MFR_FAULT_LOG_STATUS Data Contents BIT(S) SYMBOL OPERATION b[7:2] Reserved Read only, always returns 0s. b[1] Mfr_fault_log_status_ram Fault log RAM status: 0: The fault log RAM allows updates. 1: The fault log RAM is locked until the next Mfr_fault_log read. b[0] Mfr_fault_log_status_eeprom Fault log EEPROM status: 0: The transfer of the fault log RAM to the EEPROM is enabled. 1: The transfer of the fault log RAM to the EEPROM is inhibited. MFR_FAULT_LOG Read only. This 2040-bit (255 byte) data block contains a copy of the RAM buffer fault log. The RAM buffer is continuously updated after each ADC conversion as long as Mfr_fault_log_status_eeprom is clear. With Mfr_config_fault_log_enable = 1 and Mfr_fault_log_status_eeprom = 0, the RAM buffer is transferred to EEPROM whenever an LTC2975 fault causes a channel to latch off or a MFR_FAULT_LOG_STORE command is received. This transfer is delayed until the ADC has updated its READ values for all channels when Mfr_config_all_fast_fault_log is clear, otherwise it happens within 24ms. This optional delay can be used to ensure that the slower ADC monitored values are all updated for the case where a fast supervisor detected fault initiates the transfer to EEPROM. Mfr_fault_log_status_eeprom is set high after the RAM buffer is transferred to EEPROM and not cleared until a Mfr_fault_log_clear is received, even if the LTC2975 is reset or powered down. Fault log EEPROM transfers are not initiated as a result of Status_mfr_discharge events. During a Mfr_fault_log read, data is returned one byte at a time as defined in Table 2. The fault log data is partitioned into two sections. The first section is referred to as the preamble and contains the Position_last pointer, time information and peak and min values. The second section contains a chronological record of telemetry and requires Position_last for proper interpretation. The fault log stores approximately 300ms seconds of telemetry. To prevent timeouts during block reads, it is recommended that Mfr_config_all_longer_pmbus_timeout be set to 1. 2975f For more information www.linear.com/LTC2975 75 LTC2975 PMBus Command Description Table 2. Data Block Contents Table 2. Data Block Contents DATA DATA Position_last[7:0] SharedTime[7:0] BYTE* DESCRIPTION 0 1 BYTE* DESCRIPTION Position of fault log pointer when fault occurred. Mfr_iout_peak1[7:0] 39 41-bit share-clock counter value when fault occurred. Counter LSB is in 200μs increments. Mfr_iout_peak1[15:8] 40 Mfr_iout_min1[7:0] 41 Mfr_iout_min1[15:8] 42 43 SharedTime[15:8] 2 Mfr_vout_peak2[7:0] SharedTime[23:16] 3 Mfr_vout_peak2[15:8] 44 SharedTime[31:24] 4 Mfr_vout_min2[7:0] 45 SharedTime[39:32] 5 Mfr_vout_min2[15:8] 46 SharedTime[40] 6 Mfr_temperature_peak2[7:0] 47 Mfr_vout_peak0[7:0] 7 Mfr_temperature_peak2[15:8] 48 Mfr_vout_peak0[15:8] 8 Mfr_temperature_min2[7:0] 49 Mfr_vout_min0[7:0] 9 Mfr_temperature_min2[15:8] 50 Mfr_vout_min0[15:8] 10 Mfr_iout_peak2[7:0] 51 Mfr_temperature_peak0[7:0] 11 Mfr_iout_peak2[15:8] 52 Mfr_temperature_peak0[15:8] 12 Mfr_iout_min2[7:0] 53 Mfr_temperature_min0[7:0] 13 Mfr_iout_min2[15:8] 54 Mfr_temperature_min0[15:8] 14 Mfr_vout_peak3[7:0] 55 Mfr_iout_peak0[7:0] 15 Mfr_vout_peak3[15:8] 56 Mfr_iout_peak0[15:8] 16 Mfr_vout_min3[7:0] 57 Mfr_iout_min0[7:0] 17 Mfr_vout_min3[15:8] 58 Mfr_iout_min0[15:8] 18 Mfr_temperature_peak3[7:0] 59 Mfr_vin_peak[7:0] 19 Mfr_temperature_peak3[15:8] 60 Mfr_vin_peak[15:8] 20 Mfr_temperature_min3[7:0] 61 Mfr_vin_min[7:0] 21 Mfr_temperature_min3[15:8] 62 Mfr_vin_min[15:8] 22 Mfr_iout_peak3[7:0] 63 Mfr_iin_peak[7:0] 23 Mfr_iout_peak3[15:8] 64 Mfr_iin_peak[15:8] 24 Mfr_iout_min3[7:0] 65 Mfr_iin_min[7:0] 25 Mfr_iout_min3[15:8] 66 Mfr_iin_min[15:8] 26 Status_vout0[7:0] 67 Mfr_pin_peak[7:0] 27 Status_iout0[7:0] 68 Mfr_pin_peak[15:8] 28 Status_mfr_specific0[7:0] 69 Mfr_pin_min[7:0] 29 Status_vout1[7:0] 70 Mfr_pin_min[15:8] 30 Status_iout1[7:0] 71 Mfr_vout_peak1[7:0] 31 Status_mfr_specific1[7:0] 72 Mfr_vout_peak1[15:8] 32 Status_vout2[7:0] 73 Mfr_vout_min1[7:0] 33 Status_iout2[7:0] 74 Mfr_vout_min1[15:8] 34 Status_mfr_specific2[7:0] 75 Mfr_temperature_peak1[7:0] 35 Status_vout3[7:0] 76 Mfr_temperature_peak1[15:8] 36 Status_iout3[7:0] 77 Mfr_temperature_min1[7:0] 37 Status_mfr_specific3[7:0] 78 Mfr_temperature_min1[15:8] 38 76 71 bytes for preamble 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description Table 2. Data Block Contents DATA Table 3. Interpreting Cyclical Loop Data BYTE* DESCRIPTION POSITION DATA Fault_log [Position_last] 79 18 Read_iin[7:0] Fault_log [Position_last-1] 80 19 Read_iin[15:8] ... 20 Read_pin[7:0] Fault_log [Position_last-170] 237 21 Read_pin[15:8] Reserved 238254 22 Read_vout1[7:0] 23 Read_vout1[15:8] 24 Status_vout1[7:0] 25 Status_mfr_specific1[7:0] 26 Read_temperature_1_1[7:0] 27 Read_temperature_1_1[15:8] 28 Status_temperature1[7:0] 29 Status_iout1[7:0] 30 Read_iout1[7:0] 31 Read_iout1[15:8] 32 Read_pout1[7:0] 33 Read_pout1[15:8] 34 Read_vout2[7:0] 35 Read_vout2[15:8] 36 Status_vout2[7:0] 37 Status_mfr_specific2[7:0] 38 Read_temperature_1_2[7:0] 39 Read_temperature_1_2[15:8] 40 Status_temperature2[7:0] 41 Status_iout2[7:0] 42 Read_iout2[7:0] 43 Read_iout2[15:8] 44 Read_pout2[7:0] 45 Read_pout2[15:8] 46 Read_vout3[7:0] 47 Read_vout3[15:8] 48 Status_vout3[7:0] 49 Status_mfr_specific3[7:0] 50 Read_temperature_1_3[7:0] 51 Read_temperature_1_3[15:8] 52 Status_temperature3[7:0] 53 Status_iout3[7:0] 54 Read_iout3[7:0] 55 Read_iout3[15:8] 56 Read_pout3[7:0] 57 Read_pout3[15:8] Number of loops: (238 – 79)/58 = 2.7 *Note that PMBus data byte numbers start at 1 rather than 0. See Figure 13 Block Read. The data returned between bytes 79 and 237 of the previous table is interpreted using Position_last and the following table. The key to identifying the data located in byte 79 is to locate the DATA corresponding to POSITION = Position_last in the next table. Subsequent bytes are identified by decrementing the value of POSITION. For example: If Position_last = 8 then the first data returned in a block read is Status_temperature of page 0 followed by Read_temperature_1[15:8] of page 0 followed by Read_temperature_1[7:0] of page 0 and so on. See Table 3. Table 3. Interpreting Cyclical Loop Data POSITION DATA 0 Read_temperature_2[7:0] 1 Read_temperature_2[15:8] 2 Read_vout0[7:0] 3 Read_vout0[15:8] 4 Status_vout0[7:0] 5 Status_mfr_specific0[7:0] 6 Read_temperature_1_0[7:0] 7 Read_temperature_1_0[15:8] 8 Status_temperature0[7:0] 9 Status_iout0[7:0] 10 Read_iout0[7:0] 11 Read_iout0[15:8] 12 Read_pout0[7:0] 13 Read_pout0[15:8] 14 Read_vin[7:0] 15 Read_vin[15:8] 16 Status_input[7:0] 17 0x0 Total Bytes = 58 2975f For more information www.linear.com/LTC2975 77 LTC2975 PMBus Command Description MFR_FAULT_LOG Read Example PREAMBLE INFORMATION The following table fully decodes a sample fault log read with Position_last = 13 to help clarify the cyclical nature of the operation. BYTE BYTE NUMBER NUMBER DECIMAL HEX DATA 28 1C Mfr_pin_peak[15:8] Data Block Contents 29 1D Mfr_pin_min[7:0] PREAMBLE INFORMATION 30 1E Mfr_pin_min[15:8] BYTE BYTE NUMBER NUMBER DECIMAL HEX 31 1F Mfr_vout_peak1[7:0] 32 20 Mfr_vout_peak1[15:8] 33 21 Mfr_vout_min1[7:0] 34 22 Mfr_vout_min1[15:8] 35 23 Mfr_temperature_ peak1[7:0] 36 24 Mfr_temperature_ peak1[15:8] 37 25 Mfr_temperature_ min1[7:0] 38 26 Mfr_temperature_ min1[15:8] DATA DESCRIPTION 0 00 Position_last[7:0] = 13 Position of faultlog pointer when fault occurred. 1 01 SharedTime[7:0] 2 02 SharedTime[15:8] 3 03 SharedTime[23:16] 4 04 SharedTime[31:24] 5 05 SharedTime[39:32] 6 06 SharedTime[40] 7 07 Mfr_vout_peak0[7:0] 39 27 Mfr_iout_peak1[7:0] 8 08 Mfr_vout_peak0[15:8] 40 28 Mfr_iout_peak1[15:8] 41-bit shareclock counter value when fault occurred. Counter LSB is in 200µs increments. 9 09 Mfr_vout_min0[7:0] 41 29 Mfr_iout_min1[7:0] 10 0A Mfr_vout_min0[15:8] 42 2A Mfr_iout_min1[15:8] 11 0B Mfr_temperature_ peak0[7:0] 43 2B Mfr_vout_peak2[7:0] 12 0C Mfr_temperature_ peak0[15:8] 13 0D Mfr_temperature_ min0[7:0] 14 0E Mfr_temperature_ min0[15:8] 15 0F Mfr_iout_peak0[7:0] 16 10 Mfr_iout_peak0[15:8] 17 11 Mfr_iout_min0[7:0] 18 12 Mfr_iout_min0[15:8] 19 13 20 21 22 23 24 44 2C Mfr_vout_peak2[15:8] 45 2D Mfr_vout_min2[7:0] 46 2E Mfr_vout_min2[15:8] 47 2F Mfr_temperature_ peak2[7:0] 48 30 Mfr_temperature_ peak2[15:8] 49 31 Mfr_temperature_ min2[7:0] 50 32 Mfr_temperature_ min2[15:8] Mfr_vin_peak_[7:0] 51 33 Mfr_iout_peak2[7:0] 14 Mfr_vin_peak_[15:8] 52 34 Mfr_iout_peak2[15:8] 15 Mfr_vin_min_[7:0] 53 35 Mfr_iout_min2[7:0] 16 Mfr_vin_min_[15:8] 54 36 Mfr_iout_min2[15:8] 17 Mfr_iin_peak[7:0] 55 37 Mfr_vout_peak3[7:0] 18 Mfr_iin_peak[15:8] 56 38 Mfr_vout_peak3[15:8] 25 19 Mfr_iin_min[7:0] 57 39 Mfr_vout_min3[7:0] 26 1A Mfr_iin_min[15:8] 58 3A Mfr_vout_min3[15:8] 27 1B Mfr_pin_peak[7:0] 59 3B Mfr_temperature_ peak3[7:0] 78 DESCRIPTION 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description PREAMBLE INFORMATION CYCLICAL MUX LOOP DATA BYTE BYTE NUMBER NUMBER DECIMAL HEX LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL DATA 60 3C Mfr_temperature_ peak3[15:8] 61 3D 62 3E DESCRIPTION 84 54 8 Mfr_temperature_ min3[7:0] Status_ temperature0[7:0] 85 55 7 Mfr_temperature_ min3[15:8] Read_ temperature_1_0[15:8] 86 56 6 Read_ temperature_1_0[7:0] 87 57 5 Status_mfr_ specific0[7:0] 88 58 4 Status_vout0[7:0] 89 59 3 Read_vout0[15:8] 90 5A 2 Read_vout0[7:0] 91 5B 1 Read_ temperature_2[15:8] 92 5C 0 Read_ temperature_2[7:0] 63 3F Mfr_iout_peak3[7:0] 64 40 Mfr_iout_peak3[15:8] 65 41 Mfr_iout_min3[7:0] 66 42 Mfr_iout_min3[15:8] 67 43 Status_vout0[7:0] 68 44 Status_iout0[7:0] 69 45 Status_ temperature0[7:0] 70 46 Status_vout1[7:0] 71 47 Status_iout1[7:0] 72 48 Status_ temperature1[7:0] 73 49 Status_vout2[7:0] 74 4A Status_iout2[7:0] 75 4B Status_ temperature2[7:0] 76 4C Status_vout3[7:0] 77 4D Status_iout3[7:0] 78 4E Status_ temperature3[7:0] MUX LOOP 0 79 4F 13 Read_pout0[15:8] 80 50 12 Read_pout0[7:0] 81 51 11 Read_iout0[15:8] 82 52 10 Read_iout0[7:0] 83 53 9 Status_iout0[7:0] 54 BYTES PER LOOP CYCLICAL MUX LOOP DATA LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL End of Preamble CYCLICAL MUX LOOP DATA LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL MUX LOOP 0 54 BYTES PER LOOP Position_last MUX LOOP 1 93 5D 57 Read_pout3[15:8] 94 5E 56 Read_pout3[7:0] 95 5F 55 Read_iout3[15:8] 96 60 54 Read_iout3[7:0] 97 61 53 Status_iout3[7:0] 98 62 52 Status_ temperature3[7:0] 99 63 51 Read_ temperature_1_3[15:8] 100 64 50 Read_ temperature_1_3[7:0] 101 65 49 Status_mfr_ specific3[7:0] 102 66 48 Status_vout3[7:0] 103 67 47 Read_vout3[15:8] 104 78 46 Read_vout3[7:0] 105 69 45 Read_pout2[15:8] 106 6A 44 Read_pout2[7:0] 107 6B 43 Read_iout2[15:8] 108 6C 42 Read_iout2[7:0] 54 BYTES PER LOOP 2975f For more information www.linear.com/LTC2975 79 LTC2975 PMBus Command Description CYCLICAL MUX LOOP DATA CYCLICAL MUX LOOP DATA LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL MUX LOOP 1 54 BYTES PER LOOP MUX LOOP 1 109 6D 41 Status_iout2[7:0] 141 8D 9 Status_iout0[7:0] 110 6E 40 Status_ temperature2[7:0] 142 8E 8 Status_ temperature0[7:0] 111 6F 39 Read_ temperature_1_2[15:8] 143 8F 7 Read_ temperature_1_0[15:8] 112 70 38 Read_ temperature_1_2[7:0] 144 90 6 Read_ temperature_1_0[7:0] 113 71 37 Status_mfr_ specific2[7:0] 145 91 5 Status_mfr_ specific0[7:0] 114 72 36 Status_vout2[7:0] 146 92 4 Status_vout0[7:0] 115 73 35 Read_vout2[15:8] 147 93 3 Read_vout0[15:8] 116 74 34 Read_vout2[7:0] 148 94 2 Read_vout0[7:0] 117 75 33 Read_pout1[15:8] 149 95 1 118 76 32 Read_pout1[7:0] Read_ temperature_2[15:8] 119 77 31 Read_iout1[15:8] 150 96 0 120 78 30 Read_iout1[7:0] Read_ temperature_2[7:0] 121 79 29 Status_iout1[7:0] 122 7A 28 Status_ temperature2[7:0] 123 7B 27 Read_ temperature_1_1[15:8] 124 7C 26 Read_ temperature_1_1[7:0] 125 7D 25 Status_mfr_ specific1[7:0] 126 7E 24 Status_vout1[7:0] 127 7F 23 Read_vout1[15:8] 128 80 22 Read_vout1[7:0] 129 81 21 Read_pin[15:8] 130 82 20 Read_pin[7:0] 131 83 19 Read_in[15:8] 132 84 18 Read_in[7:0] 133 85 17 0x0 134 86 16 Status_input[7:0] 135 87 15 136 88 14 137 89 138 139 140 80 54 BYTES PER LOOP CYCLICAL MUX LOOP DATA LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL MUX LOOP 2 151 97 57 Read_pout3[15:8] 152 98 56 Read_pout3[7:0] 153 99 55 Read_iout3[15:8] 154 9A 54 Read_iout3[7:0] 155 9B 53 Status_iout3[7:0] 156 9C 52 Status_ temperature3[7:0] 157 9D 51 Read_ temperature_1_3[15:8] 158 9E 50 Read_ temperature_1_3[7:0] 159 9F 49 Status_mfr_ specific3[7:0] Read_vin[15:8] 160 A0 48 Status_vout3[7:0] Read_vin[7:0] 161 A1 47 Read_vout3[15:8] 13 Read_pout0[15:8] 162 A2 46 Read_vout3[7:0] 8A 12 Read_pout0[7:0] 163 A3 45 Read_pout2[15:8] 8B 11 Read_iout0[15:8] 164 A4 44 Read_pout2[7:0] 8C 10 Read_iout0[7:0] 165 A5 43 Read_iout2[15:8] 166 A6 42 Read_iout2[7:0] 54 BYTES PER LOOP 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description CYCLICAL MUX LOOP DATA CYCLICAL MUX LOOP DATA LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL MUX LOOP 2 54 BYTES PER LOOP MUX LOOP 2 167 A7 41 Status_iout2[7:0] 200 C8 8 168 A8 40 Status_ temperature2[7:0] Status_ temperature0[7:0] 201 C9 7 169 A9 39 Read_ temperature_1_2[15:8] Read_ temperature_1_0[15:8] 202 CA 6 170 AA 38 Read_ temperature_1_2[7:0] Read_ temperature_1_0[7:0] 203 CB 5 171 AB 37 Status_mfr_ specific2[7:0] Status_mfr_ specific0[7:0] 204 CC 4 Status_vout0[7:0] 172 AC 36 Status_vout2[7:0] 205 CD 3 Read_vout0[15:8] 173 AD 35 Read_vout2[15:8] 206 CE 2 Read_vout0[7:0] 174 AE 34 Read_vout2[7:0] 207 CF 1 175 AF 33 Read_pout1[15:8] Read_ temperature_2[15:8] 176 B0 32 Read_pout1[7:0] 208 D0 0 177 B1 31 Read_iout1[15:8] Read_ temperature_2[7:0] 178 B2 30 Read_iout1[7:0] 179 B3 29 Status_iout1[7:0] CYCLICAL MUX LOOP DATA 180 B4 28 Status_ temperature2[7:0] 181 B5 27 Read_ temperature_1_1[15:8] LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL 182 B6 26 Read_ temperature_1_1[7:0] 209 D1 57 Read_pout3[15:8] 210 D2 56 Read_pout3[7:0] 211 D3 55 Read_iout3[15:8] 212 D4 54 Read_iout3[7:0] 213 D5 53 Status_iout3[7:0] 214 D6 52 Status_ temperature_3[7:0] 215 D7 51 Read_ temperature_1_3[15:8] 216 D8 50 Read_ temperature_1_3[7:0] 217 D9 49 Status_mfr_ specific3[7:0] 218 DA 48 Status_vout3[7:0] 219 DB 47 Read_vout3[15:8] 220 DC 46 Read_vout3[7:0] 221 DD 45 Read_pout2[15:8] 222 DE 44 Read_pout2[7:0] 223 DF 43 Read_iout2[15:8] 224 E0 42 Read_iout2[7:0] 183 B7 25 Status_mfr_ specific1[7:0] 184 B8 24 Status_vout1[7:0] 185 B9 23 Read_vout1[15:8] 186 BA 22 Read_vout1[7:0] 187 BB 21 Read_pin[15:8] 188 BC 20 Read_pin[7:0] 189 BD 19 Read_in[15:8] 190 BE 18 Read_in[7:0] 191 BF 17 0x0 192 C0 16 Status_input[7:0] 193 C1 15 Read_vin[15:8] 194 C2 14 Read_vin[7:0] 195 C3 13 Read_pout0[15:8] 196 C4 12 Read_pout0[7:0] 197 C5 11 Read_iout0[15:8] 198 C6 10 Read_iout0[7:0] 199 C7 9 Status_iout0[7:0] MUX LOOP 3 54 BYTES PER LOOP 54 BYTES PER LOOP 2975f For more information www.linear.com/LTC2975 81 LTC2975 PMBus Command Description CYCLICAL MUX LOOP DATA CYCLICAL MUX LOOP DATA LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL LOOP BYTE BYTE BYTE NUMBER NUMBER NUMBER DECIMAL HEX DECIMAL MUX LOOP 3 54 BYTES PER LOOP MUX LOOP 3 225 E1 41 Status_iout2[7:0] 239 EF 0x00 226 E2 40 Status_ temperature2[7:0] 240 F0 0x00 Read_ temperature_1_2[15:8] 241 F1 0x00 242 F2 0x00 243 F3 0x00 244 F4 0x00 227 E3 39 228 E4 38 Read_ temperature_1_2[7:0] 229 E5 37 Status_mfr_ specific2[7:0] 245 F5 0x00 246 F6 0x00 247 F7 0x00 248 F8 0x00 249 F9 0x00 250 FA 0x00 251 FB 0x00 252 FC 0x00 253 FD 0x00 254 FE 0x00 230 E6 36 Status_vout2[7:0] 231 E7 35 Read_vout2[15:8] 232 E8 34 Read_vout2[7:0] 233 E9 33 Read_pout1[15:8] 234 EA 32 Read_pout1[7:0] 235 EB 31 Read_iout1[15:8] 236 EC 30 Read_iout1[7:0] 237 ED 29 Status_iout1[7:0] Last valid fault log byte 238 EE 0x00 Bytes EE - FE return 0x00 54 BYTES PER LOOP This is PMBUS byte 255. It must be read to clear Mfr_fault_log_ status_ram. Identification/Information COMMAND NAME CMD CODE DESCRIPTION TYPE PAGED FORMAT UNITS EEPROM DEFAULT REF VALUE PAGE CAPABILITY 0x19 Summary of PMBus optional communication protocols supported by this device. R Byte N Reg 0xB0 83 PMBUS_REVISION 0x98 PMBus revision supported by this device. Current revision is 1.1. R Byte N Reg 0x11 83 MFR_SPECIAL_ID 0xE7 Manufacturer code for identifying the LTC2975. R Word N Reg Y 547 83 MFR_SPECIAL_LOT 0xE8 Customer dependent codes that identify the factory programmed user configuration stored in EEPROM. Contact factory for default value. R Byte Y Reg Y 0x0223 82 NA 83 2975f For more information www.linear.com/LTC2975 LTC2975 PMBus Command Description CAPABILITY The CAPABILITY command provides a way for a host system to determine some key capabilities of the LTC2975. CAPABILITY Data Contents BIT(S) SYMBOL b[7] Capability_pec b[6:5] Capability_scl_max b[4] OPERATION Hard coded to 1 indicating Packet Error Checking is supported. Reading the Mfr_config_all_pec_en bit will indicate whether PEC is currently required. Hard coded to 01b indicating the maximum supported bus speed is 400kHz. Capability_smb_alert Hard coded to 1 indicating this device does have an ALERTB pin and does support the SMBus Alert Response Protocol. b[3:0] Reserved Always returns 0. PMBus_REVISION PMBus_REVISION Data Contents BIT(S) SYMBOL OPERATION b[7:0] PMBus_rev Reports the PMBus standard revision compliance. This is hard-coded to 0x11 for revision 1.1. MFR_SPECIAL_ID This register contains the manufacturer ID for the LTC2975. Always returns 0x0223. MFR_SPECIAL_LOT These paged registers contain information that identifies the user configuration that was programmed at the factory. Contact the factory to request a custom factory programmed user configuration and special lot number. User Scratchpad COMMAND NAME CMD CODE DESCRIPTION USER_DATA_00 0xB0 Manufacturer reserved for LTpowerPlay. R/W Word USER_DATA_01 0xB1 Manufacturer reserved for LTpowerPlay. USER_DATA_02 0xB2 OEM Reserved. USER_DATA_03 0xB3 USER_DATA_04 MFR_LTC_RESERVED_1 MFR_LTC_RESERVED_2 TYPE DEFAULT REF PAGED FORMAT UNITS EEPROM VALUE PAGE N Reg Y NA 83 R/W Word Y Reg Y NA 83 R/W Word N Reg Y NA 83 Scratchpad location. R/W Word Y Reg Y 0x0000 83 0xB4 Scratchpad location. R/W Word N Reg Y 0x0000 83 0xB5 Manufacturer reserved. R/W Word Y Reg Y NA 83 0xBC Manufacturer reserved. R/W Word Y Reg NA 83 USER_DATA_00, USER_DATA_01, USER_DATA_02, USER_DATA_03, USER_DATA_04, MFR_LTC_RESERVED_1 and MFR_LTC_RESERVED_2 These registers are provided as user scratchpad and additional manufacturer reserved locations. USER_DATA_03 and USER_DATA_04 are available for user scratchpad use. These 10 bytes (1 unpaged word plus 4paged words) might be used for traceability or revision information such as serial number, board model number, assembly location, or assembly date. 2975f For more information www.linear.com/LTC2975 83 LTC2975 Applications Information Overview The LTC2975 is a 4-channel Power System Management IC that is capable of sequencing, margining, trimming, supervising output voltage for OV/UV conditions, supervising output current for OC/UC conditions, fault management, voltage/current/ temperature readback for four DC/DC converter channels, and readback of high side input current, input voltage, input power, input energy, and junction temperature. Multiple Linear Technology Power System Managers can coordinate operation using the SHARE_CLK, FAULTB, and CONTROL pins. The LTC2975 utilizes a PMBus compliant interface and command set. Powering the LTC2975 The LTC2975 can be powered two ways. The first method requires that a voltage between 4.5V and 15V be applied to the VPWR pin. See Figure 23. An internal linear regulator converts VPWR down to 3.3V which drives all of the internal circuitry of the LTC2975. Alternatively, power from an external 3.3V supply may be applied directly to the VDD33 pins 11 and 12 using a voltage between 3.13V and 3.47V. See Figure 24. Tie VPWR to the 0.1µF VPWR VIN_SNS VDD33 VDD33 VDD25 0.1µF LTC2975* VDD25 GND 2975 F23 Setting Command Register Values The command register settings described herein are intended as a reference and for the purpose of understanding the registers in a software development environment. In actual practice, the LTC2975 can be completely configured for stand-alone operation with the DC1613 USB to I2C/ SMBus/ PMBus controller and software GUI using intuitive menu driven objects. MEASURING INPUT CURRENT The LTC2975 is capable of measuring the current of the input power source. The device also measures the input supply voltage, enabling it to calculate input power. The LTC2975 has an accurate internal time base allowing the chip to calculate input energy since energy is the product of power and time. The units for each of the measured parameters are amps, volts, watts, and millijoules. Input current is measured by placing a sense resistor, RSENSE, in series with the desired current load path as shown in Figure 25. If RSENSE has low thermal drift characteristics, the MFR_IIN_CAL_GAIN_TC register value may be set to zero. Otherwise, choose a setting for the MFR_IIN_CAL_GAIN_TC value in units of ppm/°C to correct for RSENSE thermal drift. 4.5V < VPWR < 15V 0.1µF VDD33 pins. All functionality is available when using this alternate power method. The higher voltages needed for the VOUT_EN pins and bias for the VSENSE pins are charge pumped from VDD33. *SOME DETAILS OMITTED FOR CLARITY Figure 23. Powering LTC2975 Directly from an Intermediate Bus For best results, it is recommended to locate RSENSE close to and isothermal with the LTC2975. 4.5V < VIN_SNS < 15V LTC2975* EXTERNAL 3.3V 0.1µF VPWR VDD33 VDD33 CIN 0.1µF IIN_SNSM LOAD VIN_SNS_CAP VDD25 GND 2975 F24 GND *SOME DETAILS OMITTED FOR CLARITY 2975 F25 *SOME DETAILS OMITTED FOR CLARITY Figure 24. Powering LTC2975 from External 3.3V Supply 84 RSENSE 350Ω LTC2975* VDD25 0.1µF IIN_SNSP VIN_SNS Figure 25. Powering LTC2975 from External 3.3V Supply 2975f For more information www.linear.com/LTC2975 LTC2975 Applications Information The input current sense path includes an internal, anti-aliasing low pass filter with typical 32dB rejection at 62.5kHz. To improve high frequency current sense common mode rejection, add a 0.01µF capacitor, CIN, to the VIN_SNS_CAP pin. The Mfr_ein_config_iin_range bits select one of three input current sense amplifier ranges: high, medium and low. The RSENSE value should be chosen to satisfy the input range. The maximum allowable input ranges are as follows: ±100mV range for high range, ±50mV for medium range and ±20mV for low range. For best accuracy, use the lowest range setting encompassing the maximum input signal. To help choose the RSENSE value and Mfr_ein_config_ iin_range setting for your application, use the Electrical Characteristics table for TUE_IIN, along with Figures 26 and 27. Figures 26 and 27 serve as extrapolated guides while the Electrical Characteristics table shows tested TUE_IIN conditions. After selecting RSENSE, write its value in mΩ to the MFR_IIN_CAL_GAIN register, and READ_IIN will return the sensed current in amps. Figures 26 and 27 show absolute value of the expected worst case READ_IIN Total Unadjusted Error, TUE_IIN, in µV and in relative % of current sense input voltage reading, VIIN_SNS, as a function of VIIN_SNS (VIIN_SNSP - VIIN_SNSP) for high range, medium range and low range settings. 700 10 600 HIGH RANGE TUE_IIN (RELATIVE %) TUE_IIN (µV) 500 400 300 MEDIUM RANGE 200 100 0 5 4 HIGH RANGE 3 MEDIUM RANGE 2 LOW RANGE 1 LOW RANGE 0 0.5 10 20 30 40 50 60 70 80 90 100 VIIN_SNS (mV) 10 1 2975 F26 Figure 26. TUE_IIN vs READ_IIN Input Voltage in µV VIN_SNS R1 100Ω RSENSE R2 100Ω LOAD C3 10µF 2975 F27 Figure 27. TUE_IIN vs READ_IIN Input Voltage in Percentage R3 10Ω 4.5V < VIN_SNS < 15V 100 VIIN_SNS (mV) LTC2975* VIN_SNS_CAP 350Ω C2 1µF D1 C2 1µF D2 CIN 0.01µF IIN_SNSP IIN_SNSM D3 D4 GND 2975 F28 *SOME DETAILS OMITTED FOR CLARITY Figure 28. Optional VIN_SNS Filtering 2975f For more information www.linear.com/LTC2975 85 LTC2975 Applications Information MEASURING INPUT VOLTAGE READ_VIN returns input voltage on the VIN_SNS pin. TUE_ VIN reflects READ_VIN measurement error. Large ripple on the VIN_SNS pin may affect READ_VIN, READ_PIN, and MFR_EIN accuracy. To reduce ripple induced measurement errors, consider adding the optional anti-aliasing filter components shown in Figure 28. R3 and C3 filter VIN_SNS with 30dB attenuation at 62.5kHz. R1, R2, C1, C2 add additional filtering for IIN_SNS inputs and prevent the internal diodes, D1 to D4, from turning on. MEASURING INPUT POWER READ_PIN returns input power in watts calculated from the product of the most recent VVIN_SNS and IIN_SNS measurements. Although the Electrical Characteristics table only specifies READ_PIN Total Unadjusted Error (TUE_PIN) under typical conditions, TUE_PIN is actually bounded by the sum of TUE_IIN and TUE_VIN. TUE_PIN ≤ TUE_IIN + TUE_VIN For example, if 15mV < |VIIN_SNS| < 50mV with the current sense amplifier set for medium range, TUE_IIN ≤ 1% and TUE_PIN is less than 1% (TUE_IIN) + 0.5% (TUE_VIN) = 1.5%. Since current sense ranges include positive and negative inputs, READ_PIN returns signed values indicating power transfer magnitude and direction. Measuring INPUT ENERGY The 12 byte data block, MFR_EIN, contains a 48-bit accumulated energy measurement in mJ, Energy_ value[47:0], and a 48-bit elapsed time in milliseconds since energy began accumulating, Energy_time[47:0]. Refer to INPUT CURRENT AND ENERGY and MFR_COMMAND_ PLUS sections of the PMBUS COMMAND DESCRIPTION for accumulated energy and elapsed time data access details. Energy_value can accumlate up to (248-1) mJ of energy before wrapping. Energy can accumulate for (248-1) ms, or about 8925 years, before Energy_time wraps. Accumulation of negative power measurements decreases Energy_value, and the energy meter saturates when it reaches 0 millijoules. 86 The energy meter time base error (TUE_ETB) specifies error in the internal energy time base accuracy: Energy_time is accurate with maximum error of TUE_ETB. Accumulated energy includes errors from current sense measurements, voltage sense measurements, and the internal time base. Energy_value error (TUE_EIN) is bounded by the summation of TUE_IIN, TUE_VIN, and TUE_ETB: TUE_EIN ≤ TUE_IIN + TUE_VIN + TUE_ETB For example, if VIIN_SNS = 20mV with high current sense amplifier range, TUE_IIN is less than 1% error, TUE_VIN is less than 0.5% error, and TUE_ETB is less than 1.5% error. Therefore the energy measurement error (TUE_EIN) is less than 3%. Sequence, Servo, Margin and Restart Operations Command Units On or Off Three control parameters determine how a particular channel is turned on and off: The CONTROL pins, the OPERATION command and the value of the input voltage measured at the VIN_SNS pin (VIN). In all cases, VIN must exceed VIN_ON in order to enable the device to respond to the CONTROL pins or OPERATION commands. When VIN drops below VIN_OFF an immediate OFF or sequence off after TOFF_DELAY of all channels will result (See Mfr_config_track_enn). Refer to the OPERATION section in the data sheet for a detailed description of the ON_OFF_CONFIG command. Some examples of typical ON/OFF configurations are: 1.A DC/DC converter may be configured to turn on any time VIN exceeds VIN_ON. 2.A DC/DC converter may be configured to turn on only when it receives an OPERATION command. 3.A DC/DC converter may be configured to turn on only via the CONTROL pin. 4.A DC/DC converter may be configured to turn on only when it receives an OPERATION command and the CONTROL pin is asserted. 2975f For more information www.linear.com/LTC2975 LTC2975 Applications Information On Sequencing The TON_DELAY command sets the amount of time that a channel will wait following the start of an ON sequence before its VOUT_EN pin will enable a DC/DC converter. Once the DC/DC converter has been enabled, the TON_RISE value determines the time at which the device soft-connects the DAC and servos the DC/DC converter output to the VOUT_COMMAND value. The TON_MAX_FAULT_LIMIT value determines the time at which the device checks for an undervoltage condition. If a TON_MAX_FAULT occurs, the channel can be configured to disable the DC/DC converter and propagate the fault to other channels using the bidirectional FAULTB pins. Figure 29 shows a typical on-sequence using the CONTROL pin. Note that overvoltage faults are checked against the VOUT_OV_FAULT_LIMIT value at all times the device is powered up and not in a reset state nor margining while ignoring OVs. VCONTROL VOUT_EN VOUT_OV_FAULT_LIMIT VOUT_COMMAND VDC(NOM) VOUT_UV_FAULT_LIMIT VOUT 2975 F29 TON_DELAY TON_RISE VDCn(NOM). Refer to the MFR_CONFIG_LTC2975 command for details on how to configure the output voltage servo. Servo Modes The ADC, DAC and internal processor comprise a digital servo loop that can be configured to operate in several useful modes. The servo target refers to the desired output voltage. Continuous/non-continuous trim mode: MFR_CONFIG_ LTC2975 b[7]. In continuous trim mode, the servo will update the DAC in a closed loop fashion each time it takes a VOUT reading. The update rate is determined by the time it takes to step through the ADC MUX which is no more than tUPDATE_ADC. See Electrical Characteristics table Note 5. In non-continuous trim mode, the servo will drive the DAC until the ADC measures the output voltage desired and then stop updating the DAC. As part of continuous/noncontinuous trim mode, fast servo mode can be used to speed up large output transitions, such as margin commands, or ON events. To use, set Mfr_config_fast_servo_off = 0. When enabled, fast servo is started by a change to the target voltage or a new softconnect. The DAC is ramped one lsb every tS_VDAC period until it is near the new target voltage, at which point slow servo mode is entered to avoid overshoot. Non-continuous servo on warn mode: MFR_CONFIG_ LTC2975 b[7] = 0, b[6] = 1. When in non-continuous mode, the LTC2975 will re-trim (re-servo) the output if the output drifts beyond the OV or UV warn limits. TON_MAX_FAULT_LIMIT Figure 29. Typical ON Sequence Using Control Pin On State Operation Once a channel has reached the ON state, the OPERATION command can be used to command the DC/DC converter’s output to margin high, margin low, or return to a nominal output voltage indicated by VOUT_COMMAND. The user also has the option of configuring a channel to continuously trim the output of the DC/DC converter to the VOUT_COMMAND voltage, or the channel’s VDACn output can be placed in a high impedance state thus allowing the DC/DC converter output voltage to go to its nominal value, DAC Modes The DACs that drive the VDACn pins can operate in several useful modes. See MFR_CONFIG_LTC2975. • Soft-connect. Using the LTC patented soft-connect feature, the DAC output is driven to within 1 LSB of the voltage at the DC/DC’s feedback node before connecting, to avoid introducing transients on the output. This mode is used when servoing the output voltage. During startup, the LTC2975 waits until TON_RISE has expired before connecting the DAC. This is the most common operating mode. • Disconnected. DAC output is high Z. 2975f For more information www.linear.com/LTC2975 87 LTC2975 Applications Information • DAC manual with soft-connect. Non servo mode. The DAC soft connects to the feedback node. Soft-connect drives the DAC code to match the voltage at the feedback node. After connection, the DAC is moved by writing DAC codes to the MFR_DAC. • DAC manual with hard connect. Non servo mode. The DAC hard connects to the feedback node using the current value in MFR_DAC. After connection, the DAC is moved by writing DAC codes to the MFR_DAC. Margining The LTC2975 margins and trims the output of a DC/DC converter by forcing a voltage across an external resistor connected between the DAC output and the feedback node or the trim pin. Preset limits for margining are stored in the VOUT_MARGIN_HIGH/LOW registers. Margining is actuated by writing the appropriate bits to the OPERATION register. Margining requires the DAC to be connected. Margin requests that occur when the DAC is disconnected will be ignored. Off Sequencing An off sequence is initiated using the CONTROL pin or the OPERATION command. The TOFF_DELAY value determines the amount of time that elapses from the beginning of the off sequence until each channel’s VOUT_EN pin is pulled low, thus disabling its DC/DC converter. VOUT Off Threshold Voltage The MFR_VOUT_DISCHARGE_THRESHOLD command register allows the user to specify the OFF threshold that the output voltage must decay below before the channel can enter/re-enter the ON state. The OFF threshold voltage is specified by multiplying MFR_VOUT_DISCHARGE_ THRESHOLD and VOUT_COMMAND. In the event that an output voltage has not decayed below its OFF threshold before attempting to enter the ON state, the channel will continue to be held off, the appropriate bit is set in the STATUS_MFR_SPECIFIC register, and the ALERTB pin will be asserted low. When the output voltage has decayed below its OFF threshold, the channel can enter the ON state. Automatic Restart via MFR_RESTART_DELAY Command and CONTROL Pin An automatic restart sequence can be initiated by driving the CONTROL pin to the off state for >10μs and then releasing it. The automatic restart disables all VOUT_EN pins that are mapped to a particular CONTROL pin for a time period = MFR_RESTART_DELAY and then starts all DC/ DC Converters according to their respective TON_DELAYs. (see Figure 30). VOUT_EN pins are mapped to one of the CONTROL pins by the MFR_CONFIG_LTC2975 command. This feature allows a host that is about to reset to restart the power in a controlled manner after it has recovered. CONTROL PIN BOUNCE VCONTROL VOUT_EN0 2975 F30 TOFF_DELAY0 MFR_RESTART_DELAY TON_DELAY0 Figure 30. Off Sequence with Automatic Restart 88 2975f For more information www.linear.com/LTC2975 LTC2975 Applications Information Fault Management Output Overvoltage, Undervoltage, Overcurrent and Undercurrent Faults The high-speed voltage supervisor OV and UV fault thresholds are configured using the VOUT_OV_FAULT_ LIMIT and VOUT_UV_FAULT_LIMIT commands, respectively. The VOUT_OV_FAULT_RESPONSE and VOUT_UV_FAULT_RESPONSE commands determine the responses to OV/UV faults. In addition, the highspeed current supervisor OC and UC fault thresholds are configured using the IOUT_OC_FAULT_LIMIT and IOUT_UC_FAULT_LIMIT commands, respectively. The IOUT_OC_FAULT_RESPONSE and IOUT_UC_FAULT_ RESPONSE commands determine the responses to OC/ UC faults. Fault responses can range from disabling the DC/DC converter immediately, waiting to see if the fault condition persists for some interval before disabling the DC/DC converter, or allowing the DC/DC converter to continue operating in spite of the fault. If a DC/DC converter is disabled, the LTC2975 can be configured to retry one to six times, retry continuously without limitation, or latch-off. The retry interval is specified using the MFR_RETRY_DELAY command. Latched faults are reset by toggling the CONTROL pin, using the OPERATION command, or removing and reapplying the bias voltage to the VIN_SNS pin. All fault and warning conditions result in the ALERTB pin being asserted low and the corresponding bits being set in the status registers. The CLEAR_FAULTS command resets the contents of the status registers and de-asserts the ALERTB output. Output Overvoltage, Undervoltage, and Overcurrent Warnings OV, UV, and OC warning thresholds are processed by the LTC2975’s ADC. These thresholds are set by the VOUT_OV_WARN_LIMIT, VOUT_UV_WARN_LIMIT, and IOUT_OC_WARN_LIMIT commands, respectively. Note that there is no IOUT UC warning threshold. If a warning occurs, the corresponding bits are set in the status registers and the ALERTB output is asserted low. Note that a warning will never cause a VOUT_EN output pin to disable a DC/DC converter. Configuring the AUXFAULTB Output The AUXFAULTB output may be used to indicate an output OV, OC, or UC fault. Use the MFR_CONFIG2_LTC2975 and MFR_CONFIG3_LTC2975 registers to configure the AUXFAULTB pin to assert low in response to VOUT_OV, IOUT_OC or IOUT_UC fault conditions. The AUXFAULTB output will stop pulling low when the LTC2975 is commanded to re-enter the ON state following a faulted-off condition. A charge-pumped 5µA pull-up to 12V is also available on the AUXFAULTB output. Refer to the MFR_CONFIG_ALL_ LTC2975 register description in the PMBUS COMMAND DESCRIPTION section for more information. Figure 31 shows an application circuit where the AUXFAULTB output is used to trigger a SCR crowbar on the intermediate bus in order to protect the DC/DC converter’s load from a catastrophic fault such as a stuck top-gate. Multi-Channel Fault Management Multi-channel fault management is handled using the bidirectional FAULTB pins. Figure 32 illustrates the connections between channels and the FAULTB pins. • The MFR_FAULTBn_PROPAGATE command acts like a programmable switch that allows faulted_off conditions from a particular channel (PAGE) to propagate to either FAULTB output. The MFR_FAULTBn_RESPONSE command controls similar switches on the inputs to each channel that allow any channel to shut down in response to any combination of the FAULTB pins. Channels responding to a FAULTB pin pulling low will attempt a new start sequence when the FAULTB pin in question is released by the faulted channel. • A FAULTB pin can also be asserted low by an external driver in order to initiate an immediate off-sequence after a 10μs deglitch delay. 2975f For more information www.linear.com/LTC2975 89 LTC2975 Applications Information RSENSE 0.007Ω 4.5V < VIBUS < 15V Q1 Si4894BDY VIN IIN_SNSM IIN_SNSP VIN_SNS VCC GATE LTC4210-1 24.3k 10k VSENSEP0 0.1µF 0.01µF TIMER GND 0.22µF 0.01µF 1k 1/4W VFB LOAD VSENSEM0 SGND VOUT_EN0 RUN/SS 10k GND 0.01µF S4010DS3 MMBT2907 4.99k DC/DC CONVERTER LTC2975* 68Ω ON VOUT VDAC0 VPWR 100Ω SENSE CBYPASS REFP REFM 10k GND AUXFAULTB VDD33 VDD33 0.1µF VDD25 VDD25 *SOME DETAILS OMITTED FOR CLARITY ONLY ONE OF FOUR CHANNELS SHOWN 0.1µF 2975 F31 Figure 31. Application Circuit with Crowbar Protection on Intermediate Bus Mfr_faultb0_response, page = 0 Mfr_faultb1_response, page = 0 CHANNEL 0 EVENT PROCESSOR PAGE = 0 Mfr_faultb0_response, page = 1 Mfr_faultb1_response, page = 1 CHANNEL 1 EVENT PROCESSOR PAGE = 1 Mfr_faultb0_response, page = 2 Mfr_faultb1_response, page = 2 CHANNEL 2 EVENT PROCESSOR PAGE = 2 Mfr_faultb0_response, page = 3 Mfr_faultb1_response, page = 3 CHANNEL 3 EVENT PROCESSOR PAGE = 3 FAULTED_OFF Mfr_faultb0_propagate_chan0 Mfr_faultb1_propagate_chan0 FAULTED_OFF FAULTB0 Mfr_faultb0_propagate_chan1 Mfr_faultb1_propagate_chan1 FAULTED_OFF Mfr_faultb0_propagate_chan2 FAULTB1 Mfr_faultb1_propagate_chan2 FAULTED_OFF Mfr_faultb0_propagate_chan3 Mfr_faultb1_propagate_chan3 2975 F32 Figure 32. Channel Fault Management Block Diagram 90 2975f For more information www.linear.com/LTC2975 LTC2975 Applications Information Interconnect Between Multiple LTC POWER MANAGERS Figure 33 shows how to interconnect the pins in a typical multi-LTC2975 array. • All VIN_SNS lines should be tied together in a star type connection at the point where VIN is to be sensed. This will minimize timing errors for the case where the ON_OFF_CONFIG is configured to start the LTC2975 based on VIN and ignore the CONTROL line and the OPERATION command. In multi-part applications that are sensitive to timing differences, it is recommended that the Vin_share_ enable bit of the MFR_CONFIG_ALL_LTC2975 register be set high in order to allow SHARE_CLK to synchronize on/ off sequencing in response to the VIN_ON and VIN_OFF thresholds. • Connecting all AUXFAULTB lines together will allow selected faults on any DC/DC converter’s output in the array to shut off a common input switch. • ALERTB is typically one line in an array of PMBus converters. The LTC2975 allows a rich combination of faults and warnings to be propagated to the ALERTB pin. • WDI/RESETB can be used to put the LTC2975 in the power-on reset state. Pull WDI/RESETB low for at least tRESETB to enter this state. • The FAULTB lines can be connected together to create fault dependencies. Figure 33 shows a configuration where a fault on any FAULTB will pull all others low. This is useful for arrays where it is desired to abort a startup sequence in the event any channel does not come up (see Figure 30). • PWRGD reflects the status of the outputs that are mapped to it by the MFR_PWRGD_EN command. Figure 33 shows all the PWRGD pins connected together, but any combination may be used. Application Circuits Trimming and Margining DC/DC Converters with External Feedback Resistors Figure 35 shows a typical application circuit for trimming/ margining a power supply with an external feedback network. The VSENSEP0 and VSENSEM0 differential inputs sense the load voltage directly, and a correction voltage is developed on the VDAC0 pin by the closed-loop servo algorithm. The VDAC0 output is connected to the DC/DC converter’s feedback node through resistor R30. For this configuration, set Mfr_config_dac_pol to 0. TO VIN OF DC/DCs TO HOST CONTROLLER TO INPUT SWITCH LTC2975 #1 VIN_SNS AUXFAULTB LTC2975 #n VIN_SNS AUXFAULTB SDA SCL ALERTB CONTROL0 SDA SCL ALERTB CONTROL0 WDI/RESETB FAULTB0 WDI/RESETB FAULTB0 SHARE_CLK PWRGD SHARE_CLK PWRGD GND GND 2975 F33 TO OTHER LTC POWER SYSTEM MANAGERS–10k EQUIVALENT PULL-UP RECOMMENDED ON EACH LINE EXCEPT SHARE_CLK (USE 5.49k) Figure 33. Typical Connections Between Multiple LTC Power System Managers 2975f For more information www.linear.com/LTC2975 91 LTC2975 Applications Information VCONTROL VOUT0 TON_DELAY0 VOUT1 TON_DELAY1 VOUT2 TON_DELAY2 • • • VOUTn • • • TON_DELAYn BUSSED VFAULTBn PINS 2975 F34 TON_MAX_FAULT1 Figure 34. Aborted On-Sequence Due to Channel 1 Short VIN 4.5V < VIBUS < 15V 0.1µF VPWR VIN_SNS VOUT VDAC0 VDD33 VDD33 VDD25 R30 VSENSEP0 LTC2975* R20 DC/DC CONVERTER VFB LOAD R10 0.1µF VSENSEM0 SGND VOUT_EN0 RUN/SS GND GND 2975 F35 * SOME DETAILS OMITTED FOR CLARITY ONLY ONE OF FOUR CHANNELS AND NO INPUT CURRENT SENSE SHOWN Figure 35. Application Circuit for DC/DC Converters with External Feedback Resistors 92 2975f For more information www.linear.com/LTC2975 LTC2975 Applications Information Four-Step Resistor Selection Procedure for DC/DC Converters with External Feedback Resistors The following four-step procedure should be used to calculate the resistor values required for the application circuit shown in Figure 35. 1.Assume values for feedback resistor R20 and the nominal DC/DC converter output voltage VDC(NOM), and solve for R10. VDC(NOM) is the output voltage of the DC/DC converter when the LTC2975’s VDAC0 pin is in a high impedance state. R10 is a function of R20, VDC(NOM), the voltage at the feedback node (VFB) when the loop is in regulation, and the feedback node’s input current (IFB). R20 • VFB R10 = VDC(NOM) – IFB • R20 – VFB (1) 2.Solve for the value of R30 that yields the maximum required DC/DC converter output voltage VDC(MAX). When VDAC0 is at 0V, the output of the DC/DC converter is at its maximum voltage. R30 ≤ R20 • VFB VDC(MAX) – VDC(NOM) (2) 3.Solve for the minimum value of VDAC0 that’s needed to yield the minimum required DC/DC converter output voltage VDC(MIN). The DAC has two full-scale settings, 1.38V and 2.65V. In order to select the appropriate full-scale setting, calculate the minimum required VFS_VDAC output voltage: VFS_VDAC > ( VDC(NOM) – VDC(MIN)) • R30 + VFB R20 (3) 4.Re-calculate the minimum, nominal, and maximum DC/ DC converter output voltages and the resulting margining resolution. ⎛ R20 ⎞ VDC(NOM) = VFB • ⎜1+ ⎟ +IFB • R20 ⎝ R10 ⎠ R20 • VFS_VDAC – VFB VDC(MIN) = VDC(NOM) – R30 R20 VDC(MAX) = VDC(NOM) + • VFB R30 R20 • VFS_VDAC VRES = R30 V/DAC LSB 1023 ( (4) ) (5) (6) (7) Trimming and Margining DC/DC Converters with a TRIM Pin Figure 36 illustrates a typical application circuit for trimming/margining the output voltage of a DC/DC converter with a TRIM Pin. The LTC2975’s VDAC0 pin connects to the TRIM pin through resistor R30. For this configuration, set the DAC polarity bit Mfr_config_dac_pol in MFR_CONFIG_LTC2975 to 1. DC/DC converters with a TRIM pin may be margined high or low by connecting an external resistor between the TRIM pin and either the VSENSEP or VSENSEM pin. The relationships between these resistors and the Δ% change in the output voltage of the DC/DC converter are typically expressed as: RTRIM _ DOWN = RTRIM • 50 – RTRIM ΔDOWN % (8) RTRIM _ UP = ⎡ V • (100 + ΔUP %) ⎛ 50 ⎞ ⎤ RTRIM • ⎢ DC –⎜ ⎟ – 1⎥ 2 • VREF • ΔUP % ⎝ ΔUP % ⎠ ⎦ ⎣ (9) where RTRIM is the resistance looking into the TRIM pin, VREF is the TRIM pin’s open-circuit output voltage and VDC is the DC/DC converter’s nominal output voltage. ΔUP% and ΔDOWN% denote the percentage change in the converter’s output voltage when margining up or down, respectively. 2975f For more information www.linear.com/LTC2975 93 LTC2975 Applications Information VIN 4.5V < VIBUS < 15V 0.1µF VPWR VIN_SNS VDD33 VSENSEP0 VDAC0 VDD33 VDD25 LTC2975* 0.1µF VO+ R30 TRIM VSENSE+ DC/DC CONVERTER LOAD VSENSEM0 VSENSE– VOUT_EN0 ON/OFFB VO– GND 2975 F36 * SOME DETAILS OMITTED FOR CLARITY ONLY ONE OF FOUR CHANNELS AND NO INPUT CURRENT SENSE SHOWN Figure 36. Application Circuit for DC/DC Converters with Trim Pin Two-Step Resistor and DAC Full-Scale Voltage Selection Procedure for DC/DC Converters with a TRIM Pin The following two-step procedure should be used to calculate the resistor value for R30 and the required full-scale DAC voltage (refer to Figure 36). 1.Solve for R30: ⎛ 50 – ΔDOWN % ⎞ R30 ≤ RTRIM • ⎜ ⎟ ΔDOWN % ⎠ ⎝ (10) 2.Calculate the maximum required output voltage for VDAC0: ⎛ Δ % ⎞ VDAC0 ≥ ⎜1+ UP ⎟ • VREF ΔDOWN % ⎠ ⎝ (11) between the voltage ripple and the delay through the filter. A value 1kΩ for RCM is suggested in order to minimize gain errors due to the current sense inputs’ internal resistance. Measuring Output with Inductor DCR Figure 38 shows the circuit for applications that require DCR current sense. A second order R-C filter is required in these applications in order to minimize the ripple voltage seen at the current sense inputs. A value of 1kΩ is suggested for RCM1 and RCM2 in order to minimize gain errors due the current sense inputs’ internal resistance. CCM1 should be selected to provide cancellation of the zero created by the DCR and inductance, i.e. CCM1 = L/(DCR • RCM1). CCM2 should be selected to provide a second stage corner frequency at < 1/10 of the RCM Note: Not all DC/DC converters follow these trim equations, especially newer bricks. Consult LTC Field Application Engineering. Measuring Output with a Sense Resistor RCM L CCM RSNS ISENSEP LTC2975 ISENSEM 2975 F37 LOAD CURRENT A circuit for measuring current with a sense resistor is shown in Figure 37. The balanced filter rejects both common mode and differential mode noise from the output of the DC/DC converter. The filter is placed directly across the sense resistor in series with the DC/DC converter’s inductor. Note that the current sense inputs must be limited to less than 6V with respect to ground. Select RCM and CCM such that the filter’s corner frequency is < 1/10 the DC/ DC converter’s switching frequency. This will result in a current sense waveform that offers a good compromise 94 CCM Figure 37.Sense Resistor Current Sensing Circuits RCM2 CCM1 CCM1 CCM2 RCM2 CCM2 ISENSEP LTC2975 ISENSEM 2975 F38 RCM1 SWX0 L RCM1 DCR Figure 38. DCR Current Sensing Circuits For more information www.linear.com/LTC2975 2975f LTC2975 Applications Information DC/DC converter’s switching frequency. In addition, CCM2 needs to be much smaller than CCM1 in order to prevent significant loading of the filter’s first stage. Single Phase Design Example As a design example for a DCR current sense application, assume L = 2.2μH, DCR = 10mΩ, and FSW = 500kHz. Let RCM1 = 1kΩ and solve for CCM1: CCM1 ≥ 2.2µH = 220nF 10mΩ • 1kΩ Let RCM2 = 1kΩ. In order to get a second pole at FSW/10 = 50kHz: CCM2 ≅ 1 = 3.18nF 2π • 50kHz • 1kΩ Let CCM2 = 3.3nF. Note that since CCM2 is much less than CCM1 the loading effects of the second stage filter on the matched first stage are not significant. Consequently, the delay time constant through the filter for the current sense waveform will be approximately 3μs. Measuring Multiphase Currents For current sense applications with more than one phase, R-C averaging may be employed. Figure 39 shows an example of this approach for a 3-phase system with DCR current sensing. The current sense waveforms are averaged SWX1 together prior to being applied to the second stage of the filter consisting of RCM2 and CCM2. Because the RCM1 resistors for the three phases are in parallel, the value of RCM1 must be multiplied by the number of phases. Also note that since the DCRs are effectively in parallel, the value for IOUT_CAL_GAIN will be equal to the inductor’s DCR divided by the number of phases. Care should be taken in the layout of the multiphase inductors to keep the PCB trace resistance from the DC side of each inductor to the summing node balanced in order to provide the most accurate results. Multiphase Design Example Using the same values for inductance and DCR from the previous design example, the value for RCM1 will be 3kΩ for a three phase DC/DC converter if CCM1 is left at 220nF. Similarly, the value for IOUT_CAL_GAIN will be DCR/3 = 3.33mΩ. Anti-aliasing Filter Considerations Noisy environments require an anti-aliasing filter on the input to the LTC2975’s ADC. The R-C circuit shown in Figure 40 is adequate for most situations. Keep R40 = R50 ≤ 200Ω to minimize ADC gain errors, and select a value for capacitors C10 and C20 that doesn’t add too much additional response time to the OV/UV supervisor, e.g. τ = 10μs (R = 100Ω, C = 0.10μF). RCM1 RCM1 RCM1 L RCM2 CCM1 CCM2 ISENSEP LTC2975 ISENSEM DCR 2975 F39 RCM1/3 CCM1 DCR L CCM2 DCR TO LOAD SWX2 RCM2 L SWX3 Figure 39. Multiphase DCR Current Sensing Circuits 2975f For more information www.linear.com/LTC2975 95 LTC2975 Applications Information VIN 4.5V < VIBUS < 15V 0.1µF VPWR VIN_SNS VOUT VDAC0 VDD33 VSENSEP0 VDD33 C10 LTC2975* VDD25 R20 VSENSEM0 R10 R50 SGND VOUT_EN0 GND DC/DC CONVERTER VFB LOAD C20 0.1µF R30 R40 RUN/SS *SOME DETAILS OMITTED FOR CLARITY ONLY ONE OF FOUR CHANNELS SHOWN GND 2975 F40 Figure 40. Anti-Aliasing Filter on VSENSE Lines 4.5V < VIBUS < 15V VIN_SNS VPWR LTC2975 1.23V TYP REFP 0.1µF SDA PMBus INTERFACE SCL ALERTB CONTROL REFM VSENSEP1 1µA AT 0.5V 0.1µF R1 = 4.99k VSENSEM1 R2 = 120k WDI/RESETB VEE = –12V FAULTB SHARE_CLK ASEL0 PWRGD ASEL1 WP GND WDI/RESETB 2975 F41 POWER_GOOD_ON = 0.5V FOR VEE POWER_GOOD = –11.414V WHERE VEE POWER_GOOD = VREFP – POWER_GOOD_ON (R2/R1 + 1) – 1µA • R2 ONLY ONE OF FOUR CHANNELS SHOWN, SOME DETAILS OMITTED FOR CLARITY Figure 41. Sensing Negative Voltages Sensing Negative Voltages Figure 41 shows the LTC2975 sensing a negative power supply (VEE). The R1/R2 resistor divider translates the negative supply voltage to the LTC2975’s VSENSEM1 input while the VSENSEP1 input is tied to the REFP pin which has a typical output voltage of 1.23V. The voltage divider should be configured in order to present about 0.5V to the voltage sense inputs when the negative supply reaches its POWER_GOOD_ON threshold so that the current flowing out of the VSENSEMn pin is minimized to ~1µA. The relationship between the POWER_GOOD_ON register value and the corresponding negative supply value can be be expressed as: 96 ⎛ R2 ⎞ VEE = VREFP – (READ_ VOUT ) • ⎜ + 1⎟ – 1µA • R2 ⎝ R1 ⎠ where READ_VOUT returns VSENSEP – VSENSEM Connecting the DC1613 USB to I2C/SMBus/PMBus Controller to the LTC2975 in System The DC1613 USB to I2C/SMBus/PMBus Controller can be interfaced to the LTC2975s on the user’s board for programming, telemetry and system debug. The controller, when used in conjunction with LTpowerPlay software, provides a powerful way to debug an entire power system. Failures are quickly diagnosed using telemetry, fault status registers and the fault log. The final configuration can be quickly developed and stored to the LTC2975’s EEPROM. 2975f For more information www.linear.com/LTC2975 LTC2975 Applications Information Figure 42 and Figure 43 illustrate application schematics for powering, programming and communicating with one or more LTC2975’s via the LTC I2C/SMBus/PMBus controller regardless of whether or not system power is present. Figure 42 shows the recommended schematic to use when the LTC2975 is powered by the system intermediate bus through its VPWR pin. Figure 43 shows the recommended schematic to use when the LTC2975 is powered by the system 3.3V through its VDD33 and VPWR pins. The LTC4412 ideal OR’ing circuit allows either the controller or system to power the LTC2975. Because of the controller’s limited current sourcing capability, only the LTC2975s, their associated pull-up resistors and the I2C/SMBus pull-up resistors should be powered from the ORed 3.3V supply. In addition, any device sharing I2C/SMBus bus connections with the LTC2975 should not have body diodes between the SDA/SCL pins and its VDD node because this will interfere with bus communication in the absence of system power. The LTC controller’s I2C/SMBus connections are optoisolated from the PC’s USB. The 3.3V from the controller and the LTC2975’s VDD33 pin can be paralleled because the LTC LDOs that generate these voltages can be back driven and draw <10μA. The controller’s 3.3V current limit is 100mA. Accurate DCR Temperature Compensation Using the DC resistance of the inductor as a current shunt element has several advantages – no additional power loss, lower circuit complexity and cost. However, the strong temperature dependence of the inductor resistance and the difficulty in measuring the exact inductor core temperature introduce errors in the current measurement. For copper, a change of inductor temperature of only 1°C corresponds to approximately 0.39% current gain change. Figure 44 shows a sample layout using the integrated DC/DC converter LTC3601 (right) and its corresponding thermal image (left). The converter is providing 1.8V, 1.5A to the output load. REPEAT OUTLINED CIRCUIT FOR EVERY LTC2975 150k 49.9k 4.5V TO 15V VPWR 0.1µF LTC2975* Si1303 ISOLATED 3.3V VDD33 SCL 0.1µF GND VDD33 SDA 0.1µF VDD25 TO LTC USB TO I2C/SMBUS/PMBUS CONTROLLER 10k 10k 5.49k SCL SDA SHARE_CLK WP GND 2975 F42 *PIN CONNECTIONS OMITTED FOR CLARITY TO/FROM OTHER LTC POWER SYSTEM MANAGERS Figure 42. LTC Controller Connections When VPWR Is Used 2975f For more information www.linear.com/LTC2975 97 LTC2975 Applications Information TP0101K-SOT23 SYSTEM 3.3V OR’D 3.3V 0.1µF LTC4412 VIN VPWR VDD33 SENSE GND GATE CTL STAT 0.1µF VDD33 VDD25 IDEAL DIODE LTC2975* ISOLATED 3.3V SCL SCL GND SDA SDA SHARE_CLK TO LTC USB TO I2C/SMBUS/PMBUS CONTROLLER *PIN CONNECTIONS OMITTED FOR CLARITY WP GND 2975 F43 TO/FROM OTHER LTC POWER SYSTEM MANAGERS NOTE: LTC CONTROLLER I2C CONNECTIONS ARE OPTO-ISOLATED ISOLATED 3.3V FROM LTC CONTROLLER CAN BE BACK DRIVEN AND WILL ONLY DRAW <10µA ISOLATED 3.3V CURRENT LIMIT IS 100mA Figure 43. LTC Controller Connections When LTC2975 Is Powered Directly from 3.3V LTC3601 INDUCTOR TEMPERATURE SENSOR 2975 F44 Figure 44. Thermal Image of a DC/DC Converter Showing the Difference Between the Actual Inductor Temperature and the Temperature Sensing Point 98 2975f For more information www.linear.com/LTC2975 LTC2975 Applications Information Heat dissipation in the inductor under high load conditions creates transient and steady state thermal gradients between the inductor and the temperature sensor, and the sensed temperature does not accurately represent the inductor core temperature. This temperature gradient is clearly visible in the thermal image of Figure 44. In addition, transient heating/cooling effects have to be accounted for in order to reduce the transient errors introduced when load current changes are faster than heat transfer time constants of the inductor. Both of these problems are addressed by introducing two additional parameters: the thermal resistance θIS from the inductor core to the onboard temperature sensor, and the inductor thermal time constant τ. The thermal resistance θIS [°C/W], is used to calculate the steady state difference between the sensed temperature TS and the internal inductor temperature TI for a given power dissipated in the inductor PI: TI – TS = θIS PI = θIS VDCR IOUT(1.1) The additional temperature rise is used for a more accurate estimate of the inductor DC resistance RI: RI = R0 (1 + a [TS – TREF + θIS VDCR IOUT])(1.2) In these equations, VDCR is the inductor DC voltage drop, IOUT is the RMS value of the output current, R0 is the inductor DC resistance at the reference temperature TREF and α is the temperature coefficient of the resistance. Since most inductors are made of copper, we can expect a temperature coefficient close to αCU = 3900ppm/°C. For a given α, the remaining parameters θIS and R0 can be calibrated at a single temperature using only two load currents: R0 = (R2 – R1) (P2+P1) – (R2+R1) (P2 – P1) a ( T2 – T1) (P2+P1) – (P2 – P1) (2+ a [ T1+ T2 – 2TREF ]) θIS = 1 a (R1+R2) ( T2 – T1) – (R2 – R1) (2+ a [ T1+ T2 – 2TREF ]) aR0 a ( T2 – T1) (P2+P1) – (P2 – P1) (2+ a [ T1+ T2 – 2TREF ]) (1.3) (1.4) The inductor resistance, RK = VDCR(K)/IOUT(K), power dissipation PK = VDCR(K) IOUT(K) and the sensed temperature TK, (K = 1, 2) are recorded for each load current. To increase the accuracy in calculating θIS, the two load currents should be chosen around I1 = 10% and I2 = 90% of the current range of the system. The inductor thermal time constant τ models the first order thermal response of the inductor and allows accurate DCR compensation during load transients. During a transition from low to high load current, the inductor resistance increases due to the self-heating. If we apply a single load step from the low current I1 to the higher current I2, the voltage across the inductor will change instantaneously from I1R1 to I2R1 and then slowly approach I2R2. Here R1 is the steady state resistance at the given temperature and load current I1, and R2 is the slightly higher DC resistance at I2, due to the inductor self-heating. Note that the electrical time constant τEL = L/R is several orders of magnitude shorter than the thermal one, and “instantaneous” is relative to the thermal time constant. The two settled regions give us the data sets (I1, T1, R1, P1) and (I2, T2, R2, P2) and the two-point calibration technique (1.3-1.4) is used to extract the steady-state parameters θIS and R0 (given a previously characterized average α). The relative current error calculated using the steady-state expression (1.2) will peak immediately after the load step, and then decay to zero with the inductor thermal time constant τ. ΔI (t) = a θIS ( V2 •I2 – V1•I1) e– t/ τ I (1.5) The time constant τ is calculated from the slope of the best-fit line y = ln(∆I/I) = a1 + a2t: τ=– 1 a2 (1.6) In summary, a single load current step is all that is needed to calibrate the DCR current measurement. The stable portions of the response give us the thermal resistance θIS and nominal DC resistance R0, and the settling characteristic is used to measure the inductor thermal time constant τ. To get the best performance, the temperature sensor has to be as close as possible to the inductor and away from other significant heat sources. For example in Figure 44, the bipolar sense transistor is close to the inductor and away from the switcher. Connect the collector of the PNP to the base. Route the base and emitter separately to the LTC2975. Connect base and collector to the signal ground close to LTC2975. 2975f For more information www.linear.com/LTC2975 99 LTC2975 Applications Information LTpowerPlay: An Interactive GUI for Power Managers LTpowerPlay is a powerful Windows based development environment that supports Linear Technology power manager ICs with EEPROM, including the LTC2975. The software supports a variety of different tasks. You can use LTpowerPlay to evaluate Linear Technology ICs by connecting to a demo board system. LTpowerPlay can also be used in an offline mode (with no hardware present) in order to build a multi-chip configuration file that can be saved and re-loaded at a later time. LTpowerPlay provides unprecedented diagnostic and debug features. It becomes a valuable diagnostic tool during board bring-up to program the power management scheme in a system. LTpowerPlay utilizes Linear Technology’s DC1613 USBto-I2C/SMBus/PMBus Controller to communicate with one of many potential targets including the DC2022 demo board set, the DC1508 socketed programming board, or a customer target system. The software also provides an automatic update feature to keep the software current with the latest set of device drivers and documentation. A great deal of context sensitive help is available within LTpowerPlay along with several tutorial demos. Complete information is available at: www.linear.com/ltpowerplay Figure 45. LTpowerPlay Snapshot 100 2975f For more information www.linear.com/LTC2975 LTC2975 Applications Information PCB Assembly and Layout Suggestions PCB Board Layout Bypass Capacitor Placement Mechanical stress on a PC board and soldering-induced stress can cause the LTC2975’s reference voltage and the voltage drift to shift. A simple way to reduce the stressrelated shifts is to mount the IC near the short edge of the PC board, or in a corner. The board acts as a stress boundary, or a region where the flexure of the board is minimal. The LTC2975 requires 0.1µF bypass capacitors between the VDD33 pins and GND, the VDD25 pin and GND, the REFP pin and REFM pin, and a 10nF capacitor between the VIN_SNS_CAP pin and GND. If the chip is being powered from the VPWR input, then that pin should also be bypassed to GND by a 0.1µF capacitor. In order to be effective, these capacitors should be made of a high quality ceramic dielectric such as X5R or X7R and be placed as close to the chip as possible. Exposed Pad Stencil Design The LTC2975’s package is thermally and electrically efficient. This is enabled by the exposed die attach pad on the under side of the package which must be soldered down to the PCB or mother board substrate. It is a good practice to minimize the presence of voids within the exposed pad inter-connection. Total elimination of voids is difficult, but the design of the exposed pad stencil is key. Figure 46 shows a suggested screen print pattern. The proposed stencil design enables out-gassing of the solder paste during reflow as well as regulating the finished solder thickness. See IPC7525A. QFN PACKAGE APERATURE DESIGN 50% TO 80% REDUCTION The LTC2975’s READ_IIN input current sense amplifier has very low offsets enabling accurate current, power, and energy readings. PC Board routing to current sense inputs may create a thermal voltage offset if differential routing paths cross dissimilar metal boundaries in the presence of a thermal gradient. To minimize thermal voltages, route differential current sense inputs as close together as possible, and minimize vias. If vias are necessary, make sure to place both positive and negative current sense path vias are close together to minimize the temperature difference. Unused ADC Sense Inputs Connect all unused ADC sense inputs (VSENSEPn or VSENSEMn) to GND. In a system where the inputs are connected to removable cards and may be left floating in certain situations, connect the inputs to GND using 100k resistors. Place the 100k resistors before any filter components, as shown in Figure 47, to prevent loading of the filter. GROUND PLANE VSENSEP 100k LTC2975 VSENSEM 100k 2975 F47 Figure 47. Connecting Unused Inputs to GND 2975 F46 Figure 46. Suggested Screen Pattern for Die Attach Pad 2975f For more information www.linear.com/LTC2975 101 LTC2975 Applications Information Design Checklist I2C Logic Signals • The address select pins (ASELn) are tri-level; Check Table 1. • Verify the absolute maximum ratings of the digital pins (SCL, SDA, ALERTB, FAULTBn, CONTROLn, SHARE_CLK, WDI, ASELn, PWRGD) are not exceeded. • Check addresses for collision with other devices on the bus and any global addresses. Output Enables • Connect all SHARE_CLK pins in the system together and pull up to 3.3V with a 5.49k resistor. • Use appropriate pull-up resistors on all VOUT_ENn pins. • Do not leave CONTROLn pins floating. Pull up to 3.3V with a 10k resistor. • Verify that the absolute maximum ratings of the VOUT_ENn pins are not exceeded. • Tie WDI/RESETB to VDD33 with a 10k resistor. Do not connect a capacitor to the WDI/RESETB pin. VIN Sense • Tie WP to either VDD33 or GND. Do not leave floating. • No external resistive divider is required to sense VIN; VIN_SNS already has an internal calibrated divider. Unused Inputs Input Current Sense • Verify that IIN_SNSP and IIN_SNSM pins do not exceed absolute maximum ratings. • Connect all unused VSENSEPn, VSENSEMn, ISENSEPn, ISENSEMn, and TSENSEn pins to GND. Do not float unused inputs. Refer to Unused ADC Sense Inputs in the Applications Information section. • Add a 10nF capacitor to VIN_SNS_CAP • If not used, connect IIN_SNSP and IIN_SNSM pins to the VIN_SNS pin. External Temperature Sense DAC Outputs • Verify the PNP sense transistor is close to the inductor and away from other significant heat sources. • Select appropriate resistor for desired margin range. Refer to the resistor selection tool in LTpowerPlay for assistance. • Verify the PNP sense transistor emitter routes to the LTC2975, and the base and collector connect to signal ground near the LTC2975. 102 • For a more complete list of design considerations and a schematic checklist, see the LTpowerPlay help menu. 2975f For more information www.linear.com/LTC2975 LTC2975 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UP Package 64-Lead Plastic QFN (9mm × 9mm) (Reference LTC DWG # 05-08-1705 Rev C) 0.70 ±0.05 7.15 ±0.05 7.50 REF 8.10 ±0.05 9.50 ±0.05 (4 SIDES) 7.15 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 9 .00 ± 0.10 (4 SIDES) 0.75 ± 0.05 R = 0.10 TYP R = 0.115 TYP 63 64 0.40 ± 0.10 PIN 1 TOP MARK (SEE NOTE 5) 1 2 PIN 1 CHAMFER C = 0.35 7.50 REF (4-SIDES) 7.15 ± 0.10 7.15 ± 0.10 (UP64) QFN 0406 REV C 0.200 REF 0.00 – 0.05 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION WNJR-5 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE, IF PRESENT 4. EXPOSED PAD SHALL BE SOLDER PLATED 5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 6. DRAWING NOT TO SCALE 0.25 ± 0.05 0.50 BSC BOTTOM VIEW—EXPOSED PAD 2975f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LTC2975 103 LTC2975 Typical Application RSENSE INTERMEDIATE BUS 0.1µF 3.3V VIN_SNS TSENSE0 56 55 9 51 VIN_SNS_CAP 8 IIN_SNSP 35 DNC 36 ASEL0 10 VPWR 12 VDD33 VDD25 11 10nF IIN_SNSM MMBT3906 14 VDD33 GND 15 TG 13 VDD25 VIN 28 WP 65 330nF ASEL1 0.1µF 330nF TSENSE2 27 MMBT3906 SWX VIN SWX 53 1 BG DC/DC CONVERTER VFB VDAC0 VDAC2 VSENSEP0 VSENSEP2 VSENSEM0 VSENSEM2 ISENSEM0 ISENSEM2 57 61 2 42 41 3 38 0.1µF 40 ISENSEP0 ISENSEP2 VOUT_EN0 VOUT_EN2 GND GND GND GND GND GND GND GND REFP LTC2975 REFM 330nF 16 TG BG DC/DC CONVERTER VFB LOAD LOAD RUN/SS SGND PGND VIN TG MMBT3906 TSENSE1 TSENSE3 62 SGND RUN/SS PGND 46 45 5 19 20 21 37 39 52 59 60 330nF 34 MMBT3906 SWX TG VIN SWX 54 63 BG DC/DC CONVERTER VFB VDAC1 VDAC3 VSENSEP1 VSENSEP3 58 49 LOAD LOAD 26 3.3V 25 18 29 30 31 17 23 22 33 32 ISENSEP3 WDI/RESETB CONTROL0 CONTROL1 CONTROL2 CONTROL3 AUXFAULTB 3.3V PWRGD VOUT_EN1 ALERTB 0V ISENSEP1 SCL 7 ISENSEM3 SDA 4 VSENSEM3 SHARE_CLK 43 VSENSEM1 ISENSEM1 FAULTB0 44 FAULTB1 64 RUN/SS SGND PGND VOUT_EN3 50 BG DC/DC CONVERTER VFB SGND RUN/SS PGND 48 47 6 2975 TA02 24 10k 10k 10k 3.3V 10k 5.49k 10k 10k 10k 10k 10k 10k 10k TO/FROM OTHER LTC POWER SYSTEM MANAGERS AND MICROCONTROLLER Related Parts PART NUMBER DESCRIPTION COMMENTS LTC2970 Dual I2C Power Supply Monitor and Margining Controller 5V to 15V, ±0.5% TUE 14-Bit ADC, 8-Bit DAC, Temperature Sensor LTC2974 4-Channel Power System Manager 0.25% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision LTC2977 8-Channel Power System Manager 0.25% TUE 16-Bit ADC, Voltage/Temperature Monitoring and Supervision LTM2987 16-Channel µModule PMBus Power System Manager 0.25% TUE 16-Bit ADC, Voltage/Temperature Monitoring and Supervision LTC3880 Dual Output PolyPhase Step-Down DC/DC Controller 0.5% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision LTC3883 Single Output PolyPhase Step-Down DC/DC Controller 0.5% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision LTM4676 Dual 13A or Single 26A µModule Regulator with Digital Power System Management 1% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision 104 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA For 95035-7417 more information www.linear.com/LTC2975 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/2975 2975f LT 1014 • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2014