LTC2980 16-Channel PMBus Power System Manager Features Description Sequence, Trim, Margin and Supervise 16 Power Supplies n Manage Faults, Monitor Telemetry and Create Fault Logs n PMBus™ Compliant Command Set n Supported by LTpowerPlay™ GUI n Margin or Trim Supplies to Within 0.25% of Target n Fast OV/UV Supervisors Per Channel n Coordinate Sequencing and Fault Management Across Multiple LTC PSM Devices n Automatic Fault Logging to Internal EEPROM n Operate Autonomously without Additional Software n Internal Temperature and Input Voltage Supervisors n Accurate Monitoring of 16 Output Voltages, Two Input Voltages and Internal Die Temperature n I2C/SMBus Serial Interface n Can Be Powered from 3.3V, or 4.5V to 15V n Programmable Watchdog Timer n Available in 144-Pin 12mm × 12mm BGA Package The LTC®2980 is a 16-channel Power System Manager used to sequence, trim (servo), margin, supervise, manage faults, provide telemetry and create fault logs. PMBus commands support power supply sequencing, precision point-of-load voltage adjustment and margining. DACs use a proprietary soft-connect algorithm to minimize supply disturbances. Supervisory functions include overvoltage and undervoltage threshold limits for sixteen power supply output channels and two power supply input channels, as well as over and under temperature limits. Programmable fault responses can disable the power supplies with optional retry after a fault is detected. Faults that disable a power supply can automatically trigger black box EEPROM storage of fault status and associated telemetry. An internal 16-bit ADC monitors sixteen output voltages, two input voltages, and die temperature. In addition, odd numbered channels can be configured to measure the voltage across a current sense resistor. A programmable watchdog timer monitors microprocessor activity for a stalled condition and resets the microprocessor if necessary. A single wire bus synchronizes power supplies across multiple LTC Power System Management (PSM) devices. Configuration EEPROM supports autonomous operation without additional software. n Applications n n n n n Computers and Network Servers Industrial Test and Measurement High Reliability Systems Medical Imaging Video L, LT, LTC, LTM, PolyPhase, Linear Technology and the Linear logo are registered trademarks and LTpowerPlay is a trademark of Linear Technology Corporation. PMBus is a trademark of SMIF, Inc. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 7382303, 7420359 and 7940091. TYPICAL APPLICATION Power Supply Accuracy 16-Channel PMBus Power System Manager 14 VIN 4.5V < VIBUS < 15V** VIN_SNS VDD33 VDACP0 TO INTERMEDIATE BUS CONVERTER ENABLE VIN_EN SDA PMBus INTERFACE WRITE-PROTECT TO/FROM OTHER LTC POWER SUPPLY MANAGERS VOUT VSENSEP0 LTC2980* SCL R30 R20 VFB LOAD VDACM0 DIGITALLY MANAGED POWER SUPPLY R10 ALERTB VSENSEM0 SGND CONTROL0 VOUT_EN0 RUN/SS GND WP FAULTB00 PWRGD WDI/RESETB ASEL0 SHARE_CLK GND ASEL1 2980 TA01a TO µP RESETB INPUT WATCHDOG TIMER INTERRUPT *SOME DETAILS OMITTED FOR CLARITY ONLY ONE OF SIXTEEN CHANNELS SHOWN NUMBER OF PARTS VPWR 3.3V** 34 PARTS SOLDERED DOWN 12 10 8 6 4 2 0 –0.25 –0.15 0.05 –0.05 ERROR (%) 0.15 0.25 2980 TA01b **MAY BE POWERED FROM EITHER AN EXTERNAL 3.3V SUPPLY OR THE INTERMEDIATE BUS 2980f For more information www.linear.com/LTC2980 1 LTC2980 Absolute Maximum Ratings Pin Configuration (Notes 1, 2, 3) Supply Voltages: VPWR...................................................... –0.3V to 15V VIN_SNS................................................... –0.3V to 15V VDD33..................................................... –0.3V to 3.6V VDD25................................................... –0.3V to 2.75V Digital Input/Output Voltages: ALERTB, SDA, SCL, CONTROL0, CONTROL1............................................. –0.3V to 5.5V PWRGD, SHARE_CLK, WDI/RESETB, WP.....................–0.3V to VDD33 + 0.3V FAULTB00, FAULTB01, FAULTB10, FAULTB11.................................–0.3V to VDD33 + 0.3V ASEL0, ASEL1...........................–0.3V to VDD33 + 0.3V Analog Voltages: REFP.................................................... –0.3V to 1.35V REFM..................................................... –0.3V to 0.3V VSENSEP[7:0].............................................. –0.3V to 6V VSENSEM[7:0].............................................. –0.3V to 6V VOUT_EN[3:0], VIN_EN................................ –0.3V to 15V VOUT_EN[7:4].............................................. –0.3V to 6V VDACP[7:0].................................................. –0.3V to 6V VDACM[7:0] ............................................. –0.3V to 0.3V Operating Junction Temperature Range: LTC2980C................................................. 0°C to 70°C LTC2980I............................................ –40°C to 105°C Storage Temperature Range................. –55°C to 125°C* Maximum Junction Temperature......................... 125°C* Maximum Solder Temperature............................... 260°C PIN 1 1 2 3 4 5 TOP VIEW 6 7 8 9 10 11 12 A B C D E F G H J K L M BGA PACKAGE 144-LEAD (12mm × 12mm × 1.29mm) TJMAX = 125°C, θJA = 32°C/W, θJCtop = 11°C/W, θJCbottom = 15°C/W, θJB = 18°C/W, WEIGHT = 1.6g, VALUES DETERMINED PER JEDEC 51-9, 51-12 *See OPERATION section of the LTC2977 data sheet for detailed EEPROM derating information for junction temperatures in excess of 105°C. ORDER INFORMATION PART NUMBER PAD OR BALL FINISH PART MARKING* DEVICE LTC2980CY#PBF SAC305 (RoHS) LTC2980Y LTC2980IY#PBF SAC305 (RoHS) LTC2980Y FINISH CODE PACKAGE TYPE MSL RATING OPERATING JUNCTION TEMPERATURE RANGE e1 BGA 3 0°C to 70°C e1 BGA 3 –40°C to 105°C Consult Marketing for parts specified with wider operating temperature ranges. *Device temperature grade is indicated by a label on the shipping container. Pad or ball finish code is per IPC/JEDEC J-STD-609. • Terminal Finish Part Marking: www.linear.com/leadfree • Recommended LGA and BGA PCB Assembly and Manufacturing Procedures: www.linear.com/umodule/pcbassembly • LGA and BGA Package and Tray Drawings: www.linear.com/packaging 2980f 2 For more information www.linear.com/LTC2980 LTC2980 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, VDD25 and REF pins floating, unless otherwise indicated. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power-Supply Characteristics VPWR VPWR Supply Input Operating Range l 4.5 15 V IPWR VPWR Supply Current 4.5V ≤ VPWR ≤ 15V, VDD33 Floating l 10 13 mA IVDD33 VDD33 Supply Current 3.13V ≤ VDD33 ≤ 3.47V, VPWR = VDD33 l 10 13 mA VUVLO_VDD33 VDD33 Undervoltage Lockout VDD33 Ramping Up, VPWR = VDD33 l 2.55 2.8 V 2.35 VDD33 Undervoltage Lockout Hysteresis VDD33 VDD25 120 Supply Input Operating Range VPWR = VDD33 l 3.13 Regulator Output Voltage 4.5V ≤ VPWR ≤ 15V l 3.13 3.47 V 3.26 3.47 V Regulator Output Short-Circuit Current VPWR = 4.5V, VDD33 = 0V l 75 90 140 mA Regulator Output Voltage l 2.35 2.5 2.6 V l 30 55 80 mA 3.13V ≤ VDD33 ≤ 3.47V Regulator Output Short-Circuit Current VPWR = VDD33 = 3.47V, VDD25 = 0V tINIT mV Initialization Time Time from VIN Applied Until the TON_DELAY Timer Starts 30 ms Voltage Reference Characteristics VREF Output Voltage (Note 4) 1.232 Temperature Coefficient Hysteresis V 3 (Note 5) ppm/°C 100 ppm ADC Characteristics Voltage Sense Input Range Differential Voltage: VIN_ADC = (VSENSEPn – VSENSEMn) l 0 6 V Single-Ended Voltage: VSENSEMn l –0.1 0.1 V Current Sense Input Range (Odd Numbered Channels Only) Single-Ended Voltage: VSENSEPn, VSENSEMn l –0.1 6 V Differential Voltage: VIN_ADC l –170 170 Voltage Sense Resolution (Uses L16 Format) 0V ≤ VIN_ADC ≤ 6V Mfr_config_adc_hires = 0 Current Sense Resolution (Odd Numbered Channels Only) 0mV ≤ |VIN_ADC| < 16mV (Note 6) 16mV ≤ |VIN_ADC| < 32mV 32mV ≤ |VIN_ADC| < 63.9mV 63.9mV ≤ |VIN_ADC| < 127.9mV 127.9mV ≤ |VIN_ADC| Mfr_config_adc_hires = 1 TUE_ADC_ VOLT_SNS Total Unadjusted Error (Note 4) Voltage Sense Mode VIN_ADC ≥ 1V l ±0.25 Voltage Sense Mode 0 ≤ VIN_ADC ≤ 1V l ±2.5 mV TUE_ADC_ CURR_SNS Total Unadjusted Error (Note 4) Current Sense Mode, Odd Numbered Channels Only, 20mV ≤ VIN_ADC ≤ 170mV l ±0.7 % of Reading Current Sense Mode, Odd Numbered Channels Only, VIN_ADC ≤ 20mV l ±140 µV l ±100 µV VIN_ADC N_ADC mV 122 µV/LSB 15.625 31.25 62.5 125 250 µV/LSB µV/LSB µV/LSB µV/LSB µV/LSB % of Reading VOS_ADC Offset Error Current Sense Mode, Odd Numbered Channels Only tCONV_ADC Conversion Time Voltage Sense Mode (Note 7) 6.15 ms Current Sense Mode (Note 7) 24.6 ms Temperature Input (Note 7) 24.6 ms 2980f For more information www.linear.com/LTC2980 3 LTC2980 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, VDD25 and REF pins floating, unless otherwise indicated. (Note 3) SYMBOL PARAMETER CONDITIONS tUPDATE_ADC Update Time Odd Numbered Channels in Current Sense Mode (Note 7) MIN CIN_ADC Input Sampling Capacitance fIN_ADC Input Sampling Frequency IIN_ADC Input Leakage Current VIN_ADC = 0V, 0V ≤ VCOMMONMODE ≤ 6V, Current Sense Mode l Differential Input Current VIN_ADC = 0.17V, Current Sense Mode l VIN_ADC = 6V, Voltage Sense Mode l TYP MAX UNITS 160 ms 1 pF 62.5 kHz ±0.5 µA 80 250 nA 10 15 µA DAC Output Characteristics N_VDACP Resolution 10 VFS_VDACP Full-Scale Output Voltage (Programmable) DAC Code = 0x3FF Buffer Gain Setting_0 DAC Polarity = 1 Buffer Gain Setting_1 l l INL_VDACP Integral Nonlinearity (Note 8) l ±2 LSB DNL_VDACP Differential Nonlinearity (Note 8) l ±2.4 LSB VOS_VDACP Offset Voltage (Note 8) l ±10 mV VDACP Load Regulation (VDACPn – VDACMn) VDACPn = 2.65V, IVDACPn Sourcing = 2mA 100 ppm/mA VDACPn = 0.1V, IVDACPn Sinking = 2mA 100 ppm/mA PSRR (VDACPn – VDACMn) DC: 3.13V ≤ VDD33 ≤ 3.47V, VPWR = VDD33 60 dB 100mV Step in 20ns with 50pF Load 40 dB DC CMRR (VDACPn – VDACMn) –0.1V ≤ VDACMn ≤ 0.1V 60 dB 1.32 2.53 1.38 2.65 Bits 1.44 2.77 V V Leakage Current VDACPn Hi-Z, 0V ≤ VDACPn ≤ 6V l ±100 nA Short-Circuit Current Low VDACPn Shorted to GND l –10 –4 mA Short-Circuit Current High VDACPn Shorted to VDD33 l 4 10 mA COUT Output Capacitance VDACPn Hi-Z 10 pF tS_VDACP DAC Output Update Rate Fast Servo Mode 250 µs DAC Soft-Connect Comparator Characteristics VOS_CMP Offset Voltage VDACPn = 0.2V l ±1 ±18 mV VDACPn = 1.3V l ±2 ±26 mV VDACPn = 2.65V l ±3 ±52 mV VIN_VS = (VSENSEPn Low Resolution Mode – VSENSEMn) High Resolution Mode l l 0 0 6 3.8 V V Single-Ended Voltage: VSENSEMn l –0.1 0.1 V Voltage Supervisor Characteristics VIN_VS N_VS TUE_VS tS_VS Input Voltage Range (Programmable) Voltage Sensing Resolution Total Unadjusted Error 0V to 3.8V Range: High Resolution Mode 4 mV/LSB 0V to 6V Range: Low Resolution Mode 8 mV/LSB 2V ≤ VIN_VS ≤ 6V, Low Resolution Mode l ±1.25 % of Reading 1.5V < VIN_VS ≤ 3.8V, High Resolution Mode l ±1.0 % of Reading 0.8V ≤ VIN_VS ≤ 1.5V, High Resolution Mode l ±1.5 % of Reading Update Period 12.21 µs 2980f 4 For more information www.linear.com/LTC2980 LTC2980 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, VDD25 and REF pins floating, unless otherwise indicated. (Note 3) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 15 V 90 110 kΩ VIN_SNS Input Characteristics VVIN_SNS VIN_SNS Input Voltage Range l 0 RVIN_SNS VIN_SNS Input Resistance l 70 TUEVIN_SNS VIN_ON, VIN_OFF Threshold Total Unadjusted Error READ_VIN Total Unadjusted Error 3V ≤ VVIN_SNS ≤ 8V l ±2.0 % of Reading VVIN_SNS > 8V l ±1.0 % of Reading 3V ≤ VVIN_SNS ≤ 8V l ±1.5 % of Reading VVIN_SNS > 8V l ±1.0 % of Reading Temperature Sensor Characteristics TUE_TS Total Unadjusted Error ±1 °C VOUT Enable Output (VOUT_EN [3:0]) Characteristics VVOUT_ENn Output High Voltage (Note 9) IVOUT_ENn = –5µA, VDD33 = 3.3V l 10 12.5 14.7 V IVOUT_ENn Output Sourcing Current VVOUT_ENn Pull-Up Enabled, VVOUT_ENn = 1V l –5 –6 –8 µA Output Sinking Current Strong Pull-Down Enabled, VVOUT_ENn = 0.4V l 3 5 8 mA Weak Pull-Down Enabled, VVOUT_ENn = 0.4V l 33 50 Output Leakage Current Internal Pull-Up Disabled, 0V ≤ VVOUT_ENn ≤ 15V l Output Sinking Current Strong Pull-Down Enabled, VOUT_ENn = 0.1V l Output Leakage Current 0V ≤ VVOUT_ENn ≤ 6V l 60 µA ±1 µA 9 mA ±1 µA V VOUT Enable Output (VOUT_EN [7:4]) Characteristics IVOUT_ENn 3 6 VIN Enable Output (VIN_EN) Characteristics VVIN_EN Output High Voltage IVIN_EN = –5µA, VDD33 = 3.3V l 10 12.5 14.7 IVIN_EN Output Sourcing Current VIN_EN Pull-Up Enabled, VVIN_EN = 1V l –5 –6 –8 µA Output Sinking Current VVIN_EN = 0.4V l 3 5 8 mA Leakage Current Internal Pull-Up Disabled, 0V ≤ VVIN_EN ≤ 15V l ±1 µA 0°C < TJ < 85°C During EEPROM Write Operations l 10,000 l 20 EEPROM Characteristics Endurance (Notes 10, 11) Retention (Notes 10, 11) TJ < 105°C Mass_Write Mass Write Operation Time (Note 12) STORE_USER_ALL, 0°C < TJ < 85°C During l EEPROM Write Operations Cycles Years 440 4100 ms Digital Inputs SCL, SDA, CONTROL0, CONTROL1, WDI/RESETB, FAULTB00, FAULTB01, FAULTB10, FAULTB11, WP VIH High Level Input Voltage l VIL Low Level Input Voltage l VHYST Input Hysteresis ILEAK Input Leakage Current 2.1 V 1.5 20 V mV 0V ≤ VPIN ≤ 5.5V, SDA, SCL, CONTROLn Pins Only l ±2 µA 0V ≤ VPIN ≤ VDD33 + 0.3V, FAULTBzn, WDI/RESETB, WP Pins Only l ±2 µA 2980f For more information www.linear.com/LTC2980 5 LTC2980 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, VDD25 and REF pins floating, unless otherwise indicated. (Note 3) SYMBOL PARAMETER CONDITIONS tSP Pulse Width of Spike Suppressed FAULTBzn, CONTROLn Pins Only MIN tFAULT_MIN Minimum Low Pulse Width for Externally Generated Faults tRESETB Pulse Width to Assert Reset VWDI/RESETB ≤ 1.5V l 300 tWDI Pulse Width to Reset Watchdog Timer VWDI/RESETB ≤ 1.5V l 0.3 fWDI Watchdog Interrupt Input Frequency CIN Digital Input Capacitance TYP MAX 10 SDA, SCL Pins Only UNITS µs 98 ns 110 ms µs 200 1 l 10 µs MHz pF Digital Input SHARE_CLK VIH High Level Input Voltage l VIL Low Level Input Voltage l fSHARE_CLK_IN Input Frequency Operating Range 1.6 V 0.8 V l 90 110 kHz tLOW Assertion Low Time VSHARE_CLK < 0.8V l 0.825 1.1 µs tRISE Rise Time VSHARE_CLK < 0.8V to VSHARE_CLK > 1.6V l 450 ns ILEAK Input Leakage Current 0V ≤ VSHARE_CLK ≤ VDD33 + 0.3V l ±1 µA CIN Input Capacitance 10 pF Digital Outputs SDA, ALERTB, PWRGD, SHARE_CLK, FAULTB00, FAULTB01, FAULTB10, FAULTB11 VOL Digital Output Low Voltage fSHARE_CLK_OUT Output Frequency Operating Range ISINK = 3mA l 5.49kΩ Pull-Up to VDD33 l 90 VDD33 – 0.5 100 0.4 V 110 kHz Digital Inputs ASEL0,ASEL1 VIH Input High Threshold Voltage l VIL Input Low Threshold Voltage l 0.5 V l ±95 µA l ±24 µA IIH, IIL High, Low Input Current IHIZ Hi-Z Input Current CIN Input Capacitance ASEL[1:0] = 0, VDD33 V 10 pF Serial Bus Timing Characteristics fSCL Serial Clock Frequency (Note 13) l 10 400 kHz tLOW Serial Clock Low Period (Note 13) l 1.3 µs tHIGH Serial Clock High Period (Note 13) l 0.6 µs tBUF Bus Free Time Between Stop and Start (Note 13) l 1.3 µs tHD,STA Start Condition Hold Time (Note 13) l 600 ns tSU,STA Start Condition Setup Time (Note 13) l 600 ns tSU,STO Stop Condition Setup Time (Note 13) l 600 ns tHD,DAT Data Hold Time (LTC2980 Receiving Data) (Note 13) l 0 ns Data Hold Time (LTC2980 Transmitting Data) (Note 13) l 300 Data Setup Time (Note 13) l 100 tSU,DAT 900 ns ns 2980f 6 For more information www.linear.com/LTC2980 LTC2980 Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, VDD25 and REF pins floating, unless otherwise indicated. (Note 3) SYMBOL PARAMETER tSP Pulse Width of Spike Suppressed (Note 13) CONDITIONS MIN tTIMEOUT_BUS Time Allowed to Complete any PMBus Mfr_config_all_longer_pmbus_timeout = 0 Command After Which Time SDA Will Mfr_config_all_longer_pmbus_timeout = 1 Be Released and Command Terminated TYP MAX 98 ns 25 200 l l UNITS 35 280 ms ms Additional Digital Timing Characteristics Minimum Off Time for Any Channel tOFF_MIN 100 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating for extended periods may affect device reliability and lifetime. Note 2: All currents into device pins are positive. All currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified. If power is supplied to the chip via the VDD33 pin only, connect VPWR and VDD33 pins together. Note 3: The LTC2980 electrical characteristics apply to each half of the device, unless otherwise noted. The specifications and functions are the same for both Device A pins and Device B pins. Note 4: The ADC total unadjusted error includes all error sources. First, a two-point analog trim is performed to achieve a flat reference voltage (VREF) over temperature. This results in minimal temperature coefficient, but the absolute voltage can still vary. To compensate for this, a highresolution, drift-free, and noiseless digital trim is applied at the output of the ADC, resulting in a very high accuracy measurement. Note 5: Hysteresis in the output voltage is created by package stress that differs depending on whether the module was previously at a higher or lower temperature. Output voltage is always measured at 25°C, but the module is cycled to 105°C or –40°C before successive measurements. Hysteresis is roughly proportional to the square of the temperature change. Note 6: The current sense resolution is determined by the L11 format and the mV units of the returned value. For example a full scale value of 170mV returns a L11 value of 0xF2A8 = 680 • 2–2 = 170. This is the lowest range ms that can represent this value without overflowing the L11 mantissa and the resolution for 1LSB in this range is 2–2 mV = 250µV. Each successively lower range improves resolution by cutting the LSB size in half. Note 7: The time between successive ADC conversions (latency of the ADC) for any given channel is given as: 36.9ms + (6.15ms • number of ADC channels configured in Low Resolution mode) + (24.6ms • number of ADC channels configured in High Resolution mode). Note 8: Nonlinearity is defined from the first code that is greater than or equal to the maximum offset specification to full-scale code, 1023. Note 9: Output enable pins are charge pumped from VDD33. Note 10: EEPROM endurance and retention are guaranteed by design, characterization and correlation with statistical process controls. The minimum retention specification applies for devices whose EEPROM has been cycled less than the minimum endurance specification. Note 11: EEPROM endurance and retention will be degraded when TJ > 105°C. Note 12: The LTC2980 will not acknowledge any PMBus commands while a mass write operation is being executed. This includes the STORE_USER_ALL and MFR_FAULT_LOG_STORE commands or a fault log store initiated by a channel faulting off. Note 13: Maximum capacitive load, CB, for SCL and SDA is 400pF. Data and clock rise time (tr) and fall time (tf) are: (20 + 0.1 • CB) (ns) < tr < 300ns and (20 + 0.1 • CB) (ns) < tf < 300ns. CB = capacitance of one bus line in pF. SCL and SDA external pull-up voltage, VIO, is 3.13V < VIO < 5.5V. PMBus TIMING DIAGRAM SDA tf tLOW tr tSU(DAT) tHD(STA) tf tSP tr tBUF SCL tHD(STA) START CONDITION tHD(DAT) tHIGH tSU(STA) tSU(STO) 2980 TD REPEATED START CONDITION STOP CONDITION START CONDITION 2980f For more information www.linear.com/LTC2980 7 LTC2980 Typical Performance Characteristics Temperature Sensor Error vs Temperature Reference Voltage vs Temperature 1.2325 ADC Total Unadjusted Error vs Temperature 2.0 0.25 1.2320 1.5 0.20 1.2315 1.0 1.2310 0.5 1.2305 1.2300 VSENSEP0 = 1.8V THREE TYPICAL PARTS 0.15 0.10 ERROR (%) ERROR (°C) REFERENCE OUTPUT VOLTAGE (V) THREE TYPICAL PARTS 0 –0.5 0.05 0 –0.05 –0.10 1.2295 –1.0 1.2290 –1.5 –0.20 1.2285 –2.0 –0.25 –50 –30 –10 10 30 50 70 TEMPERATURE (°C) –50 –30 –10 10 30 50 70 TEMPERATURE (°C) 90 110 –0.15 –50 –30 –10 10 30 50 70 90 110 130 TEMPERATURE (°C) ADC Zero Code Center Offset Voltage vs Temperature VOLTAGE SENSE MODE THREE TYPICAL PARTS 2.5 150 ERROR (LSBs) 100 OFFSET (µV) 50 0 –50 –100 ADC DNL 0.8 122µV/LSB 0.6 2.0 0.4 1.5 0.2 ERROR (LSBs) 200 ADC INL 3.0 1.0 0.5 –0.2 0 –0.4 –0.5 –0.6 –200 –1.0 –0.8 90 –1.5 –0.2 110 0.8 1.8 2.8 3.8 4.8 INPUT VOLTAGE (V) 2980 G04 600 400 200 –10 0 10 READ_VOUT (µV) 20 2980 G07 5.8 9 VSENSEP0 = 1.5V 0.8 HIGH RESOLUTION MODE THREE TYPICAL PARTS 0.6 8 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 0 –20 1.8 2.8 3.8 4.8 INPUT VOLTAGE (V) Input Sampling Current vs Differential Input Voltage 1.0 VIN = 0V HIGH RESOLUTION MODE 800 0.8 2980 G06 Voltage Supervisor Total Unadjusted Error vs Temperature SUPERVISOR ERROR (%) NUMBER OF READINGS 1000 –1.0 –0.2 2980 G05 ADC Noise Histogram 1200 5.8 INPUT SAMPLING CURRENT (µA) –50 –30 –10 10 30 50 70 TEMPERATURE (°C) 122µV/LSB 0 –150 –250 110 2980 G03 2980 G02 2980 G01 250 90 –1.0 –50 –30 –10 10 30 50 70 TEMPERATURE (°C) 90 110 2980 G08 7 6 5 4 3 2 1 0 0 1 2 3 4 INPUT VOLTAGE (V) 5 6 2980 G09 2980f 8 For more information www.linear.com/LTC2980 LTC2980 Typical Performance Characteristics 2.68 80 2.67 70 60 50 40 30 20 10 GAIN SETTING = 1 THREE TYPICAL PARTS 8 2.66 2.65 2.64 2.63 2.62 0 2 0 –2 –4 –6 0 –8 2.60 –50 –30 –10 10 30 50 70 TEMPERATURE (°C) 20 40 60 80 100 120 140 160 180 DIFFERENTIAL INPUT VOLTAGE (mV) 90 2980 G10 DAC Short-Circuit Current vs Temperature 1000 GAIN SETTING = 1 THREE TYPICAL PARTS OUTPUT IMPEDANCE (Ω) 9 8 7 6 5 –50 –30 –10 10 30 50 70 TEMPERATURE (°C) 90 110 110 2980 G11 –10 –50 –30 –10 10 30 50 70 TEMPERATURE (°C) DAC Output Impedance vs Frequency 110 2980 G12 34 PARTS SOLDERED DOWN 12 100 10 1 0.1 10 8 6 4 2 0.01 0.01 0.1 10 1 FREQUENCY (kHz) 100 2980 G13 1000 0 –0.25 –0.15 0.05 –0.05 ERROR (%) 0.15 2980 G14 0.25 2980 G15 DAC Soft-Connect Transient Response When Transitioning from ON State to Hi-Z State DAC Soft-Connect Transient Response When Transitioning from Hi-Z State to ON State DAC Transient Response to 1LSB DAC Code Change 90 Closed-Loop Servo Accuracy 14 NUMBER OF PARTS 10 SHORT-CIRCUIT CURRENT (mA) 4 2.61 10 GAIN SETTING = 1 THREE TYPICAL PARTS 6 DAC OUTPUT VOLTAGE (mV) 90 4 DAC Offset Voltage vs Temperature DAC Full-Scale Output Voltage vs Temperature DAC OUTPUT VOLTAGE (V) DIFFERENTIAL INPUT CURRENT (nA) ADC High Resolution Mode Differential Input Current CODE ‘h200 HI-Z 500µV/DIV HI-Z 10mV/DIV 10mV/DIV CONNECTED CODE ‘h1FF 2µs/DIV 2980 G16 500µs/DIV 100k SERIES RESISTANCE ON CODE: ‘h1FF CONNECTED 2980 G17 500µs/DIV 100k SERIES RESISTANCE ON CODE: ‘h1FF 2980 G18 2980f For more information www.linear.com/LTC2980 9 LTC2980 Typical Performance Characteristics VDD33 Regulator Output Voltage vs Temperature 3.28 THREE TYPICAL PARTS 3.26 3.24 3.27 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 3.28 3.26 3.25 3.24 –40°C 3.22 3.20 25°C SUPPLY CURRENT (mA) 3.29 Supply Current vs Supply Voltage (1/2 LTC2980) VDD33 Regulator Load Regulation 105°C 3.18 3.16 3.14 3.23 3.12 3.22 –50 –30 –10 10 30 50 70 TEMPERATURE (°C) 90 3.10 110 0 20 40 60 80 100 CURRENT SOURCING (mA) 120 2980 G19 6 8 12 10 SUPPLY VOLTAGE (V) 13.5 9.4 9.3 9.2 9.1 9.0 8.9 2980 G21 105°C 13.0 25°C 12.5 –40°C 12.0 11.5 11.0 10.5 90 9.5 110 0 1 2 3 4 5 CURRENT SOURCING (µA) 7 6 2980 G22 2980 G23 VOUT_EN[3:0] and VIN_EN Output VOL vs Current VOUT_EN[7:4] VOL vs Current 1.4 0.6 1.2 105°C 105°C 0.5 25°C 1.0 25°C 0.4 0.8 VOL (V) VOL (V) 16 10.0 8.8 –50 –30 –10 10 30 50 70 TEMPERATURE (°C) –40°C 0.6 0.3 –40°C 0.2 0.4 0.1 0.2 0 14 14.0 OUTUPT HIGH VOLTAGE (V) SUPPLY CURRENT (mA) 4 VOUT_EN[3:0] and VIN_EN Output High Voltage vs Current VPWR = 15V THREE TYPICAL PARTS 9.5 TEMPERATURE = 33°C THREE TYPICAL PARTS 2980 G20 Supply Current vs Temperature (1/2 LTC2980) 9.6 9.24 9.22 9.20 9.18 9.16 9.14 9.12 9.10 9.08 9.06 9.04 9.02 9.00 8.98 8.96 0 2 8 6 10 4 CURRENT SINKING (mA) 12 0 0 2980 G24 4 8 12 16 20 CURRENT SINKING (mA) 24 2980 G25 2980f 10 For more information www.linear.com/LTC2980 LTC2980 Pin Functions PIN NAME VSENSEP0 VSENSEM0 VSENSEP1 VSENSEM1 VSENSEP2 VSENSEM2 VSENSEP3 VSENSEM3 VSENSEP4 VSENSEM4 VSENSEP5 VSENSEM5 VSENSEP6 VSENSEM6 VSENSEP7 VSENSEM7 VOUT_EN0 VOUT_EN1 VOUT_EN2 VOUT_EN3 VOUT_EN4 VOUT_EN5 VOUT_EN6 VOUT_EN7 VIN_EN VIN_SNS PIN Device A Device B G5 G11 H6 H12 E5 E11 D6 D12 A6 A12 A5 A11 B5 B11 C5 C11 B4 B10 A4 A10 C2 C8 B2 B8 E2 E8 F2 F8 A2 A8 A1 A7 B1 B7 C1 C7 D1 D7 J1 J7 H1 H7 E1 E7 M1 M7 L1 L7 K1 K7 G1 G7 PIN TYPE In In In In In In In In In In In In In In In In Out Out Out Out Out Out Out Out Out In VPWR G2 G8 In VDD33 H2 H8 In/Out VDD33 J2 J8 In VDD25 WP PWRGD K2 M2 L2 K8 M8 L8 In/Out In Out SHARE_CLK K3 K9 In/Out WDI/RESETB L3 L9 In FAULTB00 M3 M9 In/Out FAULTB01 L4 L10 In/Out DESCRIPTION DC/DC Converter Differential (+) Output Voltage-0 Sensing Pin DC/DC Converter Differential (–) Output Voltage-0 Sensing Pin DC/DC Converter Differential (+) Output Voltage or Current-1 Sensing Pins DC/DC Converter Differential (–) Output Voltage or Current-1 Sensing Pins DC/DC Converter Differential (+) Output Voltage-2 Sensing Pin DC/DC Converter Differential (–) Output Voltage-2 Sensing Pin DC/DC Converter Differential (+) Output Voltage or Current-3 Sensing Pins DC/DC Converter Differential (–) Output Voltage or Current-3 Sensing Pins DC/DC Converter Differential (+) Output Voltage-4 Sensing Pin DC/DC Converter Differential (–) Output Voltage-4 Sensing Pin DC/DC Converter Differential (+) Output Voltage or Current-5 Sensing Pins DC/DC Converter Differential (–) Output Voltage or Current-5 Sensing Pins DC/DC Converter Differential (+) Output Voltage-6 Sensing Pin DC/DC Converter Differential (–) Output Voltage-6 Sensing Pin DC/DC Converter Differential (+) Output Voltage or Current-7 Sensing Pin DC/DC Converter Differential (–) Output Voltage or Current-7 Sensing Pin DC/DC Converter Enable-0 Pin. Output High Voltage Optionally Pulled Up to 12V by 5µA DC/DC Converter Enable-1 Pin. Output High Voltage Optionally Pulled Up to 12V by 5µA DC/DC Converter Enable-2 Pin. Output High Voltage Optionally Pulled Up to 12V by 5µA DC/DC Converter Enable-3 Pin. Output High Voltage Optionally Pulled Up to 12V by 5µA DC/DC Converter Enable-4 Pin. Open-Drain Pull-Down Output DC/DC Converter Enable-5 Pin. Open-Drain Pull-Down Output DC/DC Converter Enable-6 Pin. Open-Drain Pull-Down Output DC/DC Converter Enable-7 Pin. Open-Drain Pull-Down Output DC/DC Converter VIN ENABLE Pin. Output High Voltage Optionally Pulled Up to 12V by 5µA VIN SENSE Input. This Voltage is Compared Against the VIN On and Off Voltage Thresholds in Order to Determine When to Enable and Disable, Respectively, the Downstream DC/DC Converters VPWR Serves as the Unregulated Power Supply Input to the Chip (4.5V to 15V). If a 4.5V to 15V Supply Voltage is Unavailable, Short VPWR to VDD33 and Power the Chip Directly from a 3.3V Supply If Shorted to VPWR, it Serves as 3.13V to 3.47V Supply Input Pin. Otherwise it is a 3.3V Internally Regulated Voltage Output. If using the internal regulator to provide VDD33, do not connect to VDD33 pins of any other devices Input for Internal 2.5V Sub-Regulator. Short Pin J2 to Pin H2 and Pin J8 to Pin H8. If using the internal regulator to provide VDD33, do not connect to VDD33 pins of any other devices 2.5V Internally Regulated Voltage Output. Do not connect to VDD25 pins of any other devices Digital Input. Write-Protect Input Pin, Active High Power Good Open-Drain Output. Indicates When Outputs are Power Good. Can be Used as System Power-On Reset. The Latency of This Signal May Be as Long as the ADC Latency. See Note 7 Bidirectional Clock Sharing Pin. Connect a 5.49k Pull-Up Resistor to VDD33. Connect to all other SHARE_CLK pins in the system Watchdog Timer Interrupt and Chip Reset Input. Connect a 10k Pull-Up Resistor to VDD33. Rising Edge Resets Watchdog Counter. Holding This Pin Low for More Than tRESETB Resets the Chip Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-00. Connect a 10k Pull-Up Resistor to VDD33 Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-01. Connect a 10k Pull-Up Resistor to VDD33 2980f For more information www.linear.com/LTC2980 11 LTC2980 Pin Functions PIN NAME FAULTB10 FAULTB11 SDA SCL ALERTB CONTROL0 CONTROL1 ASEL0 ASEL1 REFP REFM VDACP0 VDACM0 VDACP1 VDACM1 VDACP2 VDACM2 VDACP3 VDACM3 VDACP4 VDACM4 VDACP5 VDACM5 VDACP6 VDACM6 VDACP7 VDACM7 GND PIN Device A Device B K4 K10 M4 M10 PIN TYPE In/Out In/Out DESCRIPTION Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-10. Connect a 10k Pull-Up Resistor to VDD33 Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-11. Connect a 10k Pull-Up Resistor to VDD33 PMBus Bidirectional Serial Data Pin PMBus Serial Clock Input Pin (400kHz Maximum) Open-Drain Output. Generates an Interrupt Request in a Fault/Warning Situation Control Pin 0 Input Control Pin 1 Input Ternary Address Select Pin 0 Input. Connect to VDD33, GND or Float to Encode 1 of 3 Logic States Ternary Address Select Pin 1 Input. Connect to VDD33, GND or Float to Encode 1 of 3 Logic States Reference Voltage Output Reference Return Pin DAC0 Output DAC0 Return. Connect to Channel 0 DC/DC Converter’s GND Sense or Return to GND DAC1 Output DAC1 Return. Connect to Channel 1 DC/DC Converter’s GND Sense or Return to GND DAC2 Output DAC2 Return. Connect to Channel 2 DC/DC Converter’s GND Sense or Return to GND DAC3 Output DAC3 Return. Connect to Channel 3 DC/DC Converter’s GND Sense or Return to GND DAC4 Output DAC4 Return. Connect to Channel 4 DC/DC Converter’s GND Sense or Return to GND DAC5 Output DAC5 Return. Connect to Channel 5 DC/DC Converter’s GND Sense or Return to GND DAC6 Output DAC6 Return. Connect to Channel 6 DC/DC Converter’s GND Sense or Return to GND DAC7 Output DAC7 Return. Connect to Channel 7 DC/DC Converter’s GND Sense or Return to GND Device A Ground Pins are Isolated from the Device B Ground Pins M5 M11 In/Out M6 M12 In L5 L11 Out L6 L12 In K6 K12 In K5 K11 In J6 J12 In J5 J11 Out H5 H11 Out F6 F12 Out G6 G12 Out E6 E12 Out F5 F11 Out C6 C12 Out B6 B12 Out D5 D11 Out C4 C10 Out E4 E10 Out D4 D10 Out A3 A9 Out B3 B9 Out D3 D9 Out C3 C9 Out E3 E9 Out D2 D8 Out F3, F4, F9, F10, Ground G3, G4, G9, G10, H3, H4, H9, H10, J3, J4 J9, J10 DNC F1 F7 Do Not Connect Do Not Connect to This Pin *Any unused VSENSEPn or VSENSEMn or VDACMn pins must be tied to GND. 2980f 12 For more information www.linear.com/LTC2980 LTC2980 Block Diagram G4 VDD25 DNC REFP GND REFM GND GND REFP REFM VDD25 VDD33 GND GND VDD33 G3 VIN_EN VPWR F3 F4 VDD33 VIN_SNS F1 VIN_SNS DNC K1 VDD33 VIN_EN G1 VPWR GND G2 GND GND G4 G5 H6 F6 G6 B1 E5 D6 E6 F5 C1 A6 A5 C6 B6 D1 B5 C5 D5 C4 J1 K5 J6 L6 K6 M3 L4 K4 M4 VSENSEP0 VSENSEM0 VDACP0 VDACM0 VOUT_EN0 VSENSEP1 VSENSEM1 VDACP1 VDACM1 VOUT_EN1 VSENSEP2 VSENSEM2 VDACP2 VDACM2 VOUT_EN2 VSENSEP3 VSENSEM3 VDACP3 VDACM3 VOUT_EN3 ASEL0 ASEL1 CONTROL0 CONTROL1 FAULTB00 FAULTB01 FAULTB10 FAULTB11 GND VSENSEP0 VSENSEP7 VSENSEM0 VSENSEM7 VDACP0 VDACP7 VDACM0 VDACM7 VOUT_EN0 VOUT_EN7 VSENSEP1 VSENSEP6 VSENSEM1 VSENSEM6 VDACP1 VDACP6 VDACM1 VDACM6 VOUT_EN1 VOUT_EN6 VSENSEP2 VSENSEP5 VSENSEM2 VDACP2 VDACM2 VSENSEM5 1/2 LTC2980 Device A (LTC2977) VDACP5 VDACM5 VOUT_EN2 VOUT_EN5 VSENSEP3 VSENSEP4 VSENSEM3 VSENSEM4 VDACP3 VDACM3 VOUT_EN3 ASEL0 ASEL1 CONTROL0 CONTROL1 FAULTB00 FAULTB01 FAULTB10 VDACP4 VDACM4 VOUT_EN4 SCL SDA ALERTB WDI SHARE_CLK WP PWRGD GND VSENSEP7 VSENSEM7 VDACP7 VDACM7 VOUT_EN7 VSENSEP6 VSENSEM6 VDACP6 VDACM6 VOUT_EN6 VSENSEP5 VSENSEM5 VDACP5 VDACM5 VOUT_EN5 VSENSEP4 VSENSEM4 VDACP4 VDACM4 VOUT_EN4 SCL SDA ALERTB WDI SHARE_CLK WP PWRGD H2 J2 K2 J5 H5 H3 H4 J3 J4 A2 A1 E3 D2 L1 E2 F2 D3 C3 M1 C2 B2 A3 B3 E1 B4 A4 E4 D4 H1 M6 M5 L5 L3 K3 M2 L2 FAULTB11 2980 BD 2980f For more information www.linear.com/LTC2980 13 LTC2980 Block Diagram G10 VDD25 DNC REFP GND REFM GND GND REFP REFM VDD25 VDD33 GND GND VDD33 G9 VIN_EN VPWR F9 F10 VDD33 VIN_SNS F7 VIN_SNS DNC K7 VDD33 VIN_EN G7 VPWR GND G8 GND GND G11 G4 H12 F12 G12 B7 E11 D12 E12 F11 C7 A12 A11 C12 B12 D7 B11 C11 D11 C10 J7 K11 J12 L12 K12 M9 L10 K10 M10 VSENSEP0 VSENSEM0 VDACP0 VDACM0 VOUT_EN0 VSENSEP1 VSENSEM1 VDACP1 VDACM1 VOUT_EN1 VSENSEP2 VSENSEM2 VDACP2 VDACM2 VOUT_EN2 VSENSEP3 VSENSEM3 VDACP3 VDACM3 VOUT_EN3 ASEL0 ASEL1 CONTROL0 CONTROL1 FAULTB00 FAULTB01 FAULTB10 FAULTB11 GND VSENSEP0 VSENSEP7 VSENSEM0 VSENSEM7 VDACP0 VDACP7 VDACM0 VDACM7 VOUT_EN0 VOUT_EN7 VSENSEP1 VSENSEP6 VSENSEM1 VSENSEM6 VDACP1 VDACP6 VDACM1 VDACM6 VOUT_EN1 VOUT_EN6 VSENSEP2 VSENSEP5 VSENSEM2 VDACP2 VDACM2 VSENSEM5 1/2 LTC2980 Device B (LTC2977) VDACP5 VDACM5 VOUT_EN2 VOUT_EN5 VSENSEP3 VSENSEP4 VSENSEM3 VSENSEM4 VDACP3 VDACM3 VOUT_EN3 ASEL0 ASEL1 CONTROL0 CONTROL1 FAULTB00 FAULTB01 FAULTB10 VDACP4 VDACM4 VOUT_EN4 SCL SDA ALERTB WDI SHARE_CLK WP PWRGD GND VSENSEP7 VSENSEM7 VDACP7 VDACM7 VOUT_EN7 VSENSEP6 VSENSEM6 VDACP6 VDACM6 VOUT_EN6 VSENSEP5 VSENSEM5 VDACP5 VDACM5 VOUT_EN5 VSENSEP4 VSENSEM4 VDACP4 VDACM4 VOUT_EN4 SCL SDA ALERTB WDI SHARE_CLK WP PWRGD H8 J8 K8 J11 H11 H9 H10 J9 J10 A8 A7 E9 D8 L7 E8 F8 D9 C9 M7 C8 B8 A9 B9 E7 B10 A10 E10 D10 H7 M12 M11 L11 L9 K9 M8 L8 FAULTB11 2980 BD 2980f 14 For more information www.linear.com/LTC2980 LTC2980 Operation Overview The LTC2980 contains two independent LTC2977 devices. Each half of the LTC2980 behaves the same as a standalone LTC2977 including independent power supply and ground pins. Refer to the LTC2977 data sheet for a detailed description of the device operation, the PMBus command set, and applications information. Device Address Since the LTC2980 consists of two independent LTC2977 devices, each half of the LTC2980 must be configured for a unique address. The I2C/SMBus addresses of the LTC2980 are configured in the same manner as for individual LTC2977 devices. The LTC2980 also responds to the LTC2977 global address and the SMBus alert response address, regardless of the state of the ASEL pins and the MFR_I2C_BASE_ADDRESS register. Please refer to the Device Address section in the LTC2977 data sheet for more details. MFR_SPECIAL_ID The LTC2980 contains unique MFR_SPECIAL_ID values to differentiate it from the LTC2977. Table 1 lists the MFR_SPECIAL_ID values for the LTC2980. Table 1. LTC2980 MFR_SPECIAL_ID Values LTC2980 DEVICE MFR_SPECIAL_ID Device A 0x8030 Device B 0x8040 2980f For more information www.linear.com/LTC2980 15 LTC2980 Applications Information Overview EXTERNAL 3.3V The LTC2980 is a digital power system manager that is capable of sequencing, margining, trimming, supervising output voltage for OV/UV conditions, providing fault management, and voltage readback for sixteen DC/DC converters. Input voltage and LTC2980 junction temperature readback are also available. Odd numbered channels can be configured to read back current sense resistor voltages. Multiple LTC2980s can be synchronized to operate in unison using the SHARE_CLK, FAULTB and CONTROL pins. The LTC2980 utilizes a PMBus compliant interface and command set. Powering the LTC2980 The LTC2980 can be powered two ways. The first method requires that a voltage between 4.5V and 15V be applied to the VPWR pin. See Figure 1. Internal linear regulators convert VPWR down to 3.3V which drives all of the internal circuitry in each device. Do not tie the VDD33(A) and VDD33(B) pins together since each half of the LTC2980 has independent voltage regulators. 4.5V < VPWRA < 15V 4.5V < VPWRB < 15V VPWR VIN_SNS VPWR VIN_SNS VDD33 VDD33 VDD33 VDD33 VDD25 VDD25 LTC2980* DEVICE A LTC2980* DEVICE B GND GND *SOME DETAILS OMITTED FOR CLARITY EXTERNAL 3.3V VPWR VPWR VDD33 VDD33 VDD33 VDD33 VDD25 VDD25 LTC2980* DEVICE A LTC2980* DEVICE B GND GND *SOME DETAILS OMITTED FOR CLARITY 2980 F02 Figure 2. Powering LTC2980 from External 3.3V Supply The method used to power each device in the LTC2980 is independent of the other device. Either method may be used in any combination. Application Circuits VIN Sense Voltages other than VIN can be monitored and supervised using the VIN_SNS pins. Each VIN_SNS pin has a calibrated internal divider allowing it to directly sense voltages up to 15V. Unused ADC Sense Inputs Connect all unused ADC sense inputs (VSENSEPn or VSENSEMn) to GND. In a system where the inputs are connected to removable cards and may be left floating in certain situations, connect the inputs to GND using 100k resistors, as shown in Figure 3. 2980 F01 VSENSEP Figure 1. Powering LTC2980 Directly from an Intermediate Bus 100k Alternatively, power from an external 3.3V supply may be applied directly to the VDD33 pins using a voltage between 3.13V and 3.47V. Tie VPWR to the VDD33 pins. See Figure 2. In this case, VDD33(A) and VDD33(B) may be tied together. All functionality is available when using this alternate power method. The higher voltages needed for the VOUT_EN[0:3] pins and bias for the VSENSE pins are charge pumped from VDD33. LTC2980 VSENSEM 100k 2980 F03 Figure 3. Undedicated Pull-Up Resistors 2980f 16 For more information www.linear.com/LTC2980 LTC2980 Applications Information PCB Assembly and Layout Suggestions VIN Sense Bypass Capacitor Placement n The LTC2980 requires 0.1µF bypass capacitors between the VDD33 pins and GND, the VDD25 pins and GND, and between the REFP and REFM pins. If the chip is being powered from the VPWR input, then that pin should also be bypassed to GND by a 0.1µF capacitor. In order to be effective, these capacitors should be made of high quality ceramic dielectric such as X5R or X7R and be placed as close to the chip as possible. The PCB layout should adhere to good layout guidelines. A multilayer PCB that dedicates a layer to power and ground is recommended. Low resistance and low inductance power and ground connections are important to minimize power supply noise and ensure proper device operation. No external resistive divider is required to sense VIN; VIN_SNS already has an internal calibrated divider. Logic Signals Verify the absolute maximum ratings of the digital pins (SCL, SDA, ALERTB, FAULTBzn, CONTROLn, SHARE_CLK, WDI, ASELn, PWRGD) are not exceeded. n Connect all SHARE_CLK pins in the system together and pull up to 3.3V with a 5.49k resistor. n Do not leave CONTROLn pins floating. Pull up to 3.3V with a 10k resistor. n Tie WDI/RESETB to VDD33 with a 10k resistor. Do not connect a capacitor to the WDI/RESETB pin. n Tie WP to either VDD33 or GND. Do not leave floating. n Design Checklist Unused Inputs I2C Each half of the LTC2980 must be configured for a unique address. Unique hardware ASELn values are recommended for simplest in system programming. The address select pins (ASELn) are tri-level; Check Table 1 of the LTC2977 data sheet. n Check addresses for collision with other devices on the bus and any global addresses. n Output Enables DAC Outputs Select appropriate resistor for desired margin range. Refer to the resistor selection tool in LTpowerPlay for assistance. n Power Supplies If powered from VPWR, do not connect the VDD33(A) and VDD33(B) pins together. Each VDD33 pin has an independent, internal regulator. n Use appropriate pull-up resistors on all VOUT_ENn pins. n Verify that the absolute maximum ratings of the VOUT_ENn pins are not exceeded. n Connect all unused VSENSEPn, VSENSEMn and DACMn pins to GND. Do not float unused inputs. n n For a more complete list of design considerations and a schematic checklist, see the LTpowerPlay help menu. 2980f For more information www.linear.com/LTC2980 17 LTC2980 Package Description LTC2980 Component BGA Pinout (Top View) DEVICE A 1 2 3 DEVICE B 4 5 6 7 8 9 10 11 12 A VSENSEM7 VSENSEP7 VDACP5 VSENSEM4 VSENSEM2 VSENSEP2 VSENSEM7 VSENSEP7 VDACP5 VSENSEM4 VSENSEM2 VSENSEP2 B VOUT_EN0 VSENSEM5 VDACM5 VSENSEP4 VSENSEP3 VDACM2 VOUT_EN0 VSENSEM5 VDACM5 VSENSEP4 VSENSEP3 VDACM2 C VOUT_EN1 VSENSEP5 VDACM6 VDACM3 VSENSEM3 VDACP2 VOUT_EN1 VSENSEP5 VDACM6 VDACM3 VSENSEM3 VDACP2 D VOUT_EN2 VDACM7 VDACP6 VDACM4 VDACP3 VSENSEM1 VOUT_EN2 VDACM7 VDACP6 VDACM4 VDACP3 VSENSEM1 E VOUT_EN5 VSENSEP6 VDACP7 VDACP4 VSENSEP1 VDACP1 VOUT_EN5 VSENSEP6 VDACP7 VDACP4 VSENSEP1 VDACP1 F DNC VSENSEM6 GND GND VDACM1 VDACP0 DNC VSENSEM6 GND GND VDACM1 VDACP0 G VIN_SNS VPWR GND GND VSENSEP0 VDACM0 VIN_SNS VPWR GND GND VSENSEP0 VDACM0 H VOUT_EN4 VDD33 GND GND REFM VSENSEM0 VOUT_EN4 VDD33 GND GND REFM VSENSEM0 GND GND GND GND J VOUT_EN3 VDD33 K VIN_EN VDD25 L VOUT_EN7 PWRGD M VOUT_EN6 WP SHARE_CLK FAULTB10 WDI FAULTB01 FAULTB00 FAULTB11 REFP ASEL1 VOUT_EN3 VDD33 ASEL0 CONTROL1 VIN_EN VDD25 ALERTB CONTROL0 VOUT_EN7 PWRGD SDA SCL VOUT_EN6 WP SHARE_CLK FAULTB10 WDI FAULTB01 FAULTB00 FAULTB11 REFP ASEL1 ASEL0 CONTROL1 ALERTB CONTROL0 SDA SCL 2980f 18 For more information www.linear.com/LTC2980 aaa Z 0.40 ±0.025 Ø 144x 2.500 2.500 SUGGESTED PCB LAYOUT TOP VIEW 1.500 PACKAGE TOP VIEW E 0.500 0.0000 0.500 4 1.500 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more information www.linear.com/LTC2980 tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 5.500 4.500 3.500 2.500 1.500 0.500 0.0000 0.500 1.500 2.500 3.500 4.500 5.500 Y X D aaa Z H2 4.500 3.500 3.500 4.500 5.500 SYMBOL A A1 A2 b b1 D E e F G H1 H2 aaa bbb ccc ddd eee H1 SUBSTRATE A1 b1 (Y144AH) NOM 1.29 0.32 0.97 0.40 0.35 12.00 12.00 1.00 11.00 11.00 0.27 0.70 Z MAX 1.34 0.37 1.02 0.45 0.40 NOTES DETAIL B PACKAGE SIDE VIEW A2 A 0.32 0.75 0.15 0.10 0.12 0.15 0.08 TOTAL NUMBER OF BALLS: 144 0.22 0.65 MIN 1.24 0.27 0.92 0.35 0.30 DIMENSIONS ddd M Z X Y eee M Z DETAIL A Øb (144 PLACES) DETAIL B MOLD CAP ccc Z Z (Reference LTC DWG # 05-08-1967 Rev Ø) // bbb Z PIN “A1” CORNER 5.500 BGA Package 144-Lead (12mm × 12mm × 1.29mm) e 11 b 10 9 7 G 6 5 e PACKAGE BOTTOM VIEW 8 4 3 2 DETAIL A 1 M L K J H G F E D C B A DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE BALL DESIGNATION PER JESD MS-028 AND JEP95 7 TRAY PIN 1 BEVEL ! PACKAGE IN TRAY LOADING ORIENTATION LTXXXXXX BGA 144 1213 REV Ø PACKAGE ROW AND COLUMN LABELING MAY VARY AMONG PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULLY 6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu 5. PRIMARY DATUM -Z- IS SEATING PLANE 4 3 PIN 1 7 SEE NOTES 3 SEE NOTES 2. ALL DIMENSIONS ARE IN MILLIMETERS. DRAWING NOT TO SCALE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 COMPONENT PIN “A1” F b 12 LTC2980 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 2980f 19 LTC2980 Typical Application 12V VFB 3.3V REGULATOR ASEL0 VIN_SNS VPWR ASEL1 VDD33 0.1µF VDD33 WP VDD25 GND REFP DNC REFM VIN_EN ASEL0 VIN_SNS VPWR ASEL1 VDD33 VDD33 0.1µF WDI/RESETB VSENSEP0 WDI/RESETB WP GND VDD25 VDACP0 DC/DC CONVERTER 0.1µF 0.1µF 0.1µF REFP VOUT DNC 0.1µF REFM VIN 3.3V IN OUT INTERMEDIATE BUS CONVERTER EN VIN_EN 48V VOUT VDACP0 VSENSEP0 LOAD LOAD VSENSEM0 VDACM0 VOUT_EN0 VDACP1 VSENSEP1 VSENSEP1 VSENSEM1 VSENSEM1 VDACM1 VOUT_EN1 VDACP2 VDACP2 VSENSEP2 VSENSEP2 VSENSEM2 LTC2980 DEVICE A VDACM2 LTC2980 DEVICE B VDACM2 VOUT_EN2 VDACP3 VDACP3 VSENSEP3 VSENSEP3 VSENSEM3 VSENSEM3 VDACM3 VOUT_EN3 VDACP4 VDACP4 VSENSEP4 VSENSEP4 VSENSEM4 VSENSEM4 VDACM4 VOUT_EN4 VDACP5 VDACP5 VSENSEP5 VSENSEP5 VSENSEM5 VSENSEM5 VOUT_EN5 VDACP6 VDACP6 VSENSEP6 VSENSEP6 VSENSEM6 VSENSEM6 VDACM6 DC/DC CONVERTER VDACM6 VOUT_EN6 VOUT_EN6 VDACP7 VDACP7 DC/DC CONVERTER VOUT_EN7 PWRGD CONTROL1 CONTROL0 ALERTB SCL VDACM7 SDA SHARE_CLK FAULTB11 FAULTB10 FAULTB01 FAULTB00 PWRGD CONTROL1 CONTROL0 ALERTB FAULTB11 FAULTB00 VOUT_EN7 FAULTB10 VDACM7 SCL VSENSEM7 SDA VSENSEP7 VSENSEM7 SHARE_CLK VSENSEP7 FAULTB01 DC/DC CONVERTER DC/DC CONVERTER VDACM5 VDACM5 VOUT_EN5 DC/DC CONVERTER DC/DC CONVERTER VDACM4 VOUT_EN4 DC/DC CONVERTER DC/DC CONVERTER VDACM3 VOUT_EN3 DC/DC CONVERTER DC/DC CONVERTER VSENSEM2 VOUT_EN2 DC/DC CONVERTER DC/DC CONVERTER VDACM1 VOUT_EN1 DC/DC CONVERTER SGND RUN/SS GND VOUT_EN0 VDACP1 DC/DC CONVERTER VFB VSENSEM0 VDACM0 RUN/SS SGND GND VIN DC/DC CONVERTER 2980 F04 10k 3.3V 5.49k 3.3V 10k TO/FROM OTHER LTC POWER SYSTEM MANAGERS AND MICROCONTROLLER Figure 4. LTC2980 16-Channel Application Circuit with External 3.3V Chip Power RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC2970 Dual I2C Power Supply Monitor and Margining Controller 5V to 15V, 0.5% TUE 14-Bit ADC, 8-Bit DAC, Temperature Sensor LTC2974 4-Channel PMBus Power System Manager 0.25% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision LTC2975 4-Channel PMBus Power System Manager 0.25% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision, Input Current and Power, Input Energy Accumulator LTC2977 8-Channel PMBus Power System Manager 0.25% TUE 16-Bit ADC, Voltage/Temperature Monitoring and Supervision LTM®2987 16-Channel µModule PMBus Power System Manager Dual LTC2977 with Integrated Passive Components LTC3880 Dual Output PolyPhase Step-Down DC/DC Controller 0.5% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision LTC3883 Single Output PolyPhase Step-Down DC/DC Controller 0.5% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision 2980f 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC2980 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC2980 LT0715 • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2015