LTM2987 - 16-Channel μModule PMBus Power System Manager

LTM2987
16-Channel µModule PMBus
Power System Manager
Features
Description
Sequence, Trim, Margin and Supervise 16 Power
Supplies
n Manage Faults, Monitor Telemetry and Create Fault
Logs
n PMBus™ Compliant Command Set
n Supported by LTpowerPlay™ GUI
n Margin or Trim Supplies to 0.25% Accuracy
n Fast OV/UV Supervisors Per Channel
n Coordinate Sequencing and Fault Management
Across Multiple LTC PSM Devices
n Automatic Fault Logging to Internal EEPROM
n Operate Autonomously without Additional Software
n Internal Temperature and Input Voltage Supervisors
n Accurate Monitoring of 16 Output Voltages, Two
Input Voltages and Internal Die Temperature
n I2C/SMBus Serial Interface
n Can Be Powered from 3.3V, or 4.5V to 15V
n Programmable Watchdog Timer
n Available in 144-Lead 15mm × 15mm BGA Package
The LTM®2987 is a 16-channel µModule® (micromodule)
Power System Manager used to sequence, trim (servo),
margin, supervise, manage faults, provide telemetry and
create fault logs. PMBus commands support power supply
sequencing, precision point-of-load voltage adjustment and
margining. DACs use a proprietary soft-connect algorithm
to minimize supply disturbances. Supervisory functions
include overvoltage and undervoltage threshold limits for
sixteen power supply output channels and two power supply
input channels, as well as over and under temperature limits.
Programmable fault responses can disable the power supplies with optional retry after a fault is detected. Faults that
disable a power supply can automatically trigger black box
EEPROM storage of fault status and associated telemetry.
An internal 16-bit ADC monitors sixteen output voltages,
two input voltages, and die temperature. In addition, odd
numbered channels can be configured to measure the
voltage across a current sense resistor. A programmable
watchdog timer monitors microprocessor activity for a
stalled condition and resets the microprocessor if necessary. A single wire bus synchronizes power supplies across
multiple LTC Power System Management (PSM) devices.
Configuration EEPROM supports autonomous operation
without additional software.
n
Applications
n
n
n
n
n
Computers and Network Servers
Industrial Test and Measurement
High Reliability Systems
Medical Imaging
Video
L, LT, LTC, LTM, µModule, PolyPhase, Linear Technology and the Linear logo are registered
trademarks and LTpowerPlay is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents including
7382303, 7420359 and 7940091.
TYPICAL APPLICATION
Power Supply Accuracy
16-Channel PMBus Power System Manager
20
VIN
4.5V < VIBUS < 15V**
VIN_SNS
3.3V**
VDD33
VDACP0
TO INTERMEDIATE
BUS CONVERTER ENABLE
VIN_EN
SDA
PMBus
INTERFACE
WRITE-PROTECT
TO/FROM OTHER
LTC POWER SUPPLY MANAGERS
VSENSEP0
LTM2987*
SCL
VDACM0
VSENSEM0
CONTROL0
VOUT_EN0
WP
FAULTB00
PWRGD
WDI/RESETB
ASEL0
SHARE_CLK
GND
R30
R20
ASEL1
2987 TA01a
DIGITALLY
MANAGED
POWER
SUPPLY
VFB
LOAD
ALERTB
18
VOUT
R10
SGND
TO µP RESETB INPUT
RUN/SS
GND
WATCHDOG
TIMER INTERRUPT
*SOME DETAILS OMITTED FOR CLARITY
ONLY ONE OF SIXTEEN CHANNELS SHOWN
46 PARTS SOLDERED DOWN
16
NUMBER OF PARTS
VPWR
14
12
10
8
6
4
2
0
–0.25
–0.15
0.05
–0.05
ERROR (%)
0.15
0.25
2987 TA01b
**MAY BE POWERED FROM EITHER AN
EXTERNAL 3.3V SUPPLY OR THE INTERMEDIATE BUS
2987f
For more information www.linear.com/LTM2987
1
LTM2987
Absolute Maximum Ratings
PIN CONFIGURATION
(Notes 1, 2, 3)
Supply Voltages:
VPWR to GND.......................................... –0.3V to 15V
VIN_SNS to GND...................................... –0.3V to 15V
VDD33 to GND........................................ –0.3V to 3.6V
VDD25 to GND...................................... –0.3V to 2.75V
Digital Input/Output Voltages:
ALERTB, SDA, SCL, CONTROL0,
CONTROL1............................................. –0.3V to 5.5V
PWRGD, SHARE_CLK,
WDI/RESETB, WP.....................–0.3V to VDD33 + 0.3V
FAULTB00, FAULTB01, FAULTB10,
FAULTB11.................................–0.3V to VDD33 + 0.3V
ASEL0, ASEL1...........................–0.3V to VDD33 + 0.3V
Analog Voltages:
REFP to GND....................................... –0.3V to 1.35V
REFM to GND......................................... –0.3V to 0.3V
VSENSEP[7:0] to GND.................................. –0.3V to 6V
VSENSEM[7:0] to GND................................. –0.3V to 6V
VOUT_EN[3:0], VIN_EN to GND................... –0.3V to 15V
VOUT_EN[7:4] to GND.................................. –0.3V to 6V
VDACP[7:0] to GND..................................... –0.3V to 6V
VDACM[7:0] to GND ................................. –0.3V to 0.3V
Pull-Up Resistors:
VPU........................................................ –0.3V to 5.5V
RPU1, RPU2, RPU3, RPU4......................... –0.3V to 5.5V
Operating Junction Temperature Range:
LTM2987C................................................ 0°C to 70°C
LTM2987I......................................... –40°C to 105°C*
Storage Temperature Range................. –55°C to 125°C*
Maximum Junction Temperature......................... 125°C*
Maximum Solder Temperature............................... 245°C
PIN 1 1
2
3
4
5
TOP VIEW
6
7
8
9
10
11
12
A
B
C
D
E
F
G
H
J
K
L
M
BGA PACKAGE
144-LEAD (15mm × 15mm × 3.42mm)
TJMAX = 125°C, θJA = 25.2°C/W, θJCtop = 15.6°C/W, θJCbottom = 7.1°C/W, θJB = 10.4°C/W,
WEIGHT = 1.6g, VALUES DETERMINED PER JEDEC 51-9, 51-12
*See OPERATION section of the LTC2977 data sheet for detailed EEPROM
derating information for junction temperatures in excess of 105°C.
ORDER INFORMATION
PART NUMBER
PAD OR BALL FINISH
PART MARKING*
DEVICE
FINISH CODE
PACKAGE
TYPE
MSL
RATING
OPERATING JUNCTION
TEMPERATURE RANGE
LTM2987CY#PBF
SAC305 (RoHS)
LTM2987Y
e1
BGA
3
0°C to 70°C
LTM2987IY#PBF
SAC305 (RoHS)
LTM2987Y
e1
BGA
3
–40°C to 105°C
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• Terminal Finish Part Marking:
www.linear.com/leadfree
• LGA and BGA Package and Tray Drawings:
www.linear.com/packaging
2987f
2
For more information www.linear.com/LTM2987
LTM2987
Electrical
Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, REFP and REFM pins floating, unless
otherwise indicated. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Power-Supply Characteristics
VPWR
VPWR Supply Input Operating Range
IPWR
VPWR Supply Current
4.5V ≤ VPWR ≤ 15V, VDD33 Floating
l
IVDD33
VDD33 Supply Current
3.13V ≤ VDD33 ≤ 3.47V, VPWR = VDD33
l
VUVLO_VDD33
VDD33 Undervoltage Lockout
VDD33 Ramping Up, VPWR = VDD33
l
l
4.5
VDD25
13
mA
2.35
10
13
mA
2.55
2.8
V
120
mV
Supply Input Operating Range
VPWR = VDD33
l
3.13
Regulator Output Voltage
4.5V ≤ VPWR ≤ 15V
l
3.13
3.26
3.47
V
Regulator Output Short-Circuit Current VPWR = 4.5V, VDD33 = 0V
l
75
90
140
mA
Regulator Output Voltage
l
2.35
2.5
2.6
V
l
30
55
80
mA
3.13V ≤ VDD33 ≤ 3.47V
Regulator Output Short-Circuit Current VPWR = VDD33 = 3.47V, VDD25 = 0V
tINIT
V
10
VDD33 Undervoltage Lockout
Hysteresis
VDD33
15
Initialization Time
Time from VIN Applied Until the TON_DELAY
Timer Starts
3.47
30
V
ms
Voltage Reference Characteristics
VREF
Output Voltage
1.232
Temperature Coefficient
Hysteresis
V
3
(Note 4)
ppm/°C
100
ppm
ADC Characteristics
VIN_ADC
Voltage Sense Input Range
Current Sense Input Range (Odd
Numbered Channels Only)
N_ADC
Voltage Sense Resolution (Uses L16
Format)
Current Sense Resolution (Odd
Numbered Channels Only)
Differential Voltage:
VIN_ADC = (VSENSEPn – VSENSEMn)
l
0
6
V
Single-Ended Voltage: VSENSEMn
l
–0.1
0.1
V
Single-Ended Voltage: VSENSEPn, VSENSEMn
l
–0.1
6
Differential Voltage: VIN_ADC
l
–170
170
0V ≤ VIN_ADC ≤ 6V
V
mV
122
µV/LSB
15.625
31.25
62.5
125
250
µV/LSB
µV/LSB
µV/LSB
µV/LSB
µV/LSB
Mfr_config_adc_hires = 0
0mV ≤ |VIN_ADC| < 16mV (Note 5)
16mV ≤ |VIN_ADC| < 32mV
32mV ≤ |VIN_ADC| < 63.9mV
63.9mV ≤ |VIN_ADC| < 127.9mV
127.9mV ≤ |VIN_ADC|
Mfr_config_adc_hires = 1
TUE_ADC_
VOLT_SNS
Total Unadjusted Error
TUE_ADC_
CURR_SNS
Total Unadjusted Error
Voltage Sense Mode VIN_ADC ≥ 1V
l
±0.25
Voltage Sense Mode 0 ≤ VIN_ADC ≤ 1V
l
±2.5
mV
Current Sense Mode, Odd Numbered
Channels Only, 20mV ≤ VIN_ADC ≤ 170mV
l
±0.7
% of
Reading
Current Sense Mode, Odd Numbered
Channels Only, VIN_ADC ≤ 20mV
l
140
µV
l
±35
µV
% of
Reading
VOS_ADC
Offset Error
Current Sense Mode, Odd Numbered
Channels Only
tCONV_ADC
Conversion Time
Voltage Sense Mode (Note 6)
6.15
ms
Current Sense Mode (Note 6)
24.6
ms
Temperature Input (Note 6)
24.6
ms
2987f
For more information www.linear.com/LTM2987
3
LTM2987
Electrical
Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, REFP and REFM pins floating, unless
otherwise indicated. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
tUPDATE_ADC
Maximum Update Time
Odd Numbered Channels in Current Sense
Mode (Note 6)
MIN
CIN_ADC
Input Sampling Capacitance
fIN_ADC
Input Sampling Frequency
IIN_ADC
Input Leakage Current
VIN_ADC = 0V, 0V ≤ VCOMMONMODE ≤ 6V,
Current Sense Mode
l
Differential Input Current
VIN_ADC = 0.17V, Current Sense Mode
l
VIN_ADC = 6V, Voltage Sense Mode
l
TYP
MAX
UNITS
160
ms
1
pF
62.5
kHz
±0.5
µA
80
250
nA
10
15
µA
DAC Output Characteristics
N_VDACP
Resolution
10
VFS_VDACP
Full-Scale Output Voltage
(Programmable)
DAC Code = 0x3FF Buffer Gain Setting_0
DAC Polarity = 1
Buffer Gain Setting_1
l
l
INL_VDACP
Integral Nonlinearity
(Note 7)
l
±2
LSB
DNL_VDACP
Differential Nonlinearity
(Note 7)
l
±2.4
LSB
VOS_VDACP
Offset Voltage
(Note 7)
l
±10
mV
VDACP
Load Regulation (VDACPn – VDACMn)
VDACPn = 2.65V, IVDACPn Sourcing = 2mA
100
ppm/mA
VDACPn = 0.1V, IVDACPn Sinking = 2mA
100
ppm/mA
PSRR (VDACPn – VDACMn)
DC: 3.13V ≤ VDD33 ≤ 3.47V, VPWR = VDD33
60
dB
100mV Step in 20ns with 50pF Load
40
dB
DC CMRR (VDACPn – VDACMn)
–0.1V ≤ VDACMn ≤ 0.1V
60
dB
1.3
2.5
1.38
2.65
Bits
1.44
2.77
V
V
Leakage Current
VDACPn Hi-Z, 0V ≤ VDACPn ≤ 6V
l
±100
nA
Short-Circuit Current Low
VDACPn Shorted to GND
l
–10
–4
mA
Short-Circuit Current High
VDACPn Shorted to VDD33
l
4
10
mA
COUT
Output Capacitance
VDACPn Hi-Z
10
pF
tS_VDACP
DAC Output Update Rate
Fast Servo Mode
250
µs
DAC Soft-Connect Comparator Characteristics
VOS_CMP
Offset Voltage
VDACPn = 0.2V
l
±1
±18
mV
VDACPn = 1.3V
l
±2
±26
mV
VDACPn = 2.65V
l
±3
±52
mV
VIN_VS = (VSENSEPn Low Resolution Mode
– VSENSEMn)
High Resolution Mode
l
l
0
0
6
3.8
V
V
Single-Ended Voltage: VSENSEMn
l
–0.1
0.1
V
Voltage Supervisor Characteristics
VIN_VS
N_VS
TUE_VS
tS_VS
Input Voltage Range (Programmable)
Voltage Sensing Resolution
Total Unadjusted Error
0V to 3.8V Range: High Resolution Mode
4
mV/LSB
0V to 6V Range: Low Resolution Mode
8
mV/LSB
2V ≤ VIN_VS ≤ 6V, Low Resolution Mode
l
±1.25
% of
Reading
1.5V < VIN_VS ≤ 3.8V, High Resolution
Mode
l
±1.0
% of
Reading
0.8V ≤ VIN_VS ≤ 1.5V, High Resolution
Mode
l
±1.5
% of
Reading
Update Rate
12.21
µs
2987f
4
For more information www.linear.com/LTM2987
LTM2987
Electrical
Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, REFP and REFM pins floating, unless
otherwise indicated. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
15
V
90
110
kΩ
VIN_SNS Input Characteristics
VVIN_SNS
VIN_SNS Input Voltage Range
l
0
RVIN_SNS
VIN_SNS Input Resistance
l
70
TUEVIN_SNS
VIN_ON, VIN_OFF Threshold Total
Unadjusted Error
READ_VIN Total Unadjusted Error
3V ≤ VVIN_SNS ≤ 8V
l
±2.0
% of
Reading
VVIN_SNS > 8V
l
±1.0
% of
Reading
3V ≤ VVIN_SNS ≤ 8V
l
±1.5
% of
Reading
VVIN_SNS > 8V
l
±1.0
% of
Reading
Temperature Sensor Characteristics
TUE_TS
Total Unadjusted Error
±1
°C
VOUT Enable Output (VOUT_EN [3:0]) Characteristics
VVOUT_ENn
Output High Voltage (Note 8)
IVOUT_ENn = –5µA, VDD33 = 3.3V
l
10
12.5
14.7
IVOUT_ENn
Output Sourcing Current
VVOUT_ENn Pull-Up Enabled, VVOUT_ENn = 1V l
–5
–6
–8
µA
Output Sinking Current
Strong Pull-Down Enabled,
VVOUT_ENn = 0.4V
l
3
5
8
mA
Weak Pull-Down Enabled, VVOUT_ENn = 0.4V l
33
50
Output Leakage Current
Internal Pull-Up Disabled,
0V ≤ VVOUT_ENn ≤ 15V
l
Output Sinking Current
Strong Pull-Down Enabled,
VOUT_ENn = 0.1V
l
Output Leakage Current
0V ≤ VVOUT_ENn ≤ 6V
l
V
60
µA
±1
µA
9
mA
±1
µA
V
VOUT Enable Output (VOUT_EN [7:4]) Characteristics
IVOUT_ENn
3
6
VIN Enable Output (VIN_EN) Characteristics
VVIN_EN
Output High Voltage
IVIN_EN = –5µA, VDD33 = 3.3V
l
10
12.5
14.7
IVIN_EN
Output Sourcing Current
VIN_EN Pull-Up Enabled, VVIN_EN = 1V
l
–5
–6
–8
µA
Output Sinking Current
VVIN_EN = 0.4V
l
3
5
8
mA
Leakage Current
Internal Pull-Up Disabled,
0V ≤ VVIN_EN ≤ 15V
l
±1
µA
EEPROM Characteristics
Endurance
(Notes 9, 10)
0°C < TJ < 85°C During EEPROM Write
Operations
l
10,000
Cycles
Retention
(Notes 9, 10)
TJ < 105°C
l
20
Years
Mass_Write
Mass Write Operation Time (Note 11)
STORE_USER_ALL, 0°C < TJ < 85°C During
EEPROM Write Operations
l
440
4100
ms
General Purpose Pull-Up Resistors
RPU
Pull-Up Resistance
10
kΩ
Digital Inputs SCL, SDA, CONTROL0, CONTROL1, WDI/RESETB, FAULTB00, FAULTB01, FAULTB10, FAULTB11, WP
VIH
High Level Input Voltage
l
VIL
Low Level Input Voltage
l
VHYST
Input Hysteresis
2.1
V
1.5
20
V
mV
2987f
For more information www.linear.com/LTM2987
5
LTM2987
Electrical
Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, REFP and REFM pins floating, unless
otherwise indicated. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
ILEAK
Input Leakage Current
0V ≤ VPIN ≤ 5.5V, SDA, SCL, CONTROLn
Pins Only
l
±2
µA
0V ≤ VPIN ≤ VDD33 + 0.3V, FAULTBzn,
WDI/RESETB, WP Pins Only
l
±2
µA
tSP
Pulse Width of Spike Suppressed
MIN
TYP
MAX
UNITS
FAULTBzn, CONTROLn Pins Only
10
µs
SDA, SCL Pins Only
98
ns
tFAULT_MIN
Minimum Low Pulse Width for
Externally Generated Faults
110
tRESETB
Pulse Width to Assert Reset
VWDI/RESETB ≤ 1.5V
l
300
tWDI
Pulse Width to Reset Watchdog Timer
VWDI/RESETB ≤ 1.5V
l
0.3
fWDI
Watchdog Interrupt Input Frequency
CIN
Digital Input Capacitance
ms
µs
200
1
l
10
µs
MHz
pF
Digital Input SHARE_CLK
VIH
High Level Input Voltage
l
VIL
Low Level Input Voltage
l
fSHARE_CLK_IN Input Frequency Operating Range
1.6
l
90
0.825
V
0.8
V
110
kHz
tLOW
Assertion Low Time
VSHARE_CLK < 0.8V
l
1.1
µs
tRISE
Rise Time
VSHARE_CLK < 0.8V to VSHARE_CLK > 1.6V
l
450
ns
ILEAK
Input Leakage Current
0V ≤ VSHARE_CLK ≤ VDD33 + 0.3V
l
±1
µA
CIN
Input Capacitance
10
pF
Digital Outputs SDA, ALERTB, PWRGD, SHARE_CLK, FAULTB00, FAULTB01, FAULTB10, FAULTB11
VOL
Digital Output Low Voltage
fSHARE_CLK_OUT Output Frequency Operating Range
ISINK = 3mA
l
5.49kΩ Pull-Up to VDD33
l
90
VDD33 – 0.5
100
0.4
V
110
kHz
Digital Inputs ASEL0,ASEL1
VIH
Input High Threshold Voltage
l
VIL
Input Low Threshold Voltage
l
0.5
V
l
±95
µA
l
±24
µA
IIH, IIL
High, Low Input Current
IHIZ
Hi-Z Input Current
CIN
Input Capacitance
ASEL[1:0] = 0, VDD33
V
10
pF
Serial Bus Timing Characteristics
fSCL
Serial Clock Frequency (Note 12)
l
10
400
tLOW
Serial Clock Low Period (Note 12)
l
1.3
µs
tHIGH
Serial Clock High Period (Note 12)
l
0.6
µs
tBUF
Bus Free Time Between Stop and Start
(Note 12)
l
1.3
µs
tHD,STA
Start Condition Hold Time (Note 12)
l
600
ns
tSU,STA
Start Condition Setup Time (Note 12)
l
600
ns
tSU,STO
Stop Condition Setup Time (Note 12)
l
600
ns
tHD,DAT
Data Hold Time (LTM2987 Receiving
Data) (Note 12)
l
0
ns
Data Hold Time (LTM2987
Transmitting Data) (Note 12)
l
300
900
kHz
ns
2987f
6
For more information www.linear.com/LTM2987
LTM2987
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TJ = 25°C. VPWR = VIN_SNS = 12V, VDD33, REFP and REFM pins floating, unless
otherwise indicated. (Note 3)
SYMBOL
PARAMETER
tSU,DAT
Data Setup Time (Note 12)
CONDITIONS
tSP
Pulse Width of Spike Suppressed
(Note 12)
tTIMEOUT_BUS
Time Allowed to Complete any PMBus Longer Timeout = 0
Command After Which Time SDA Will Longer Timeout = 1
Be Released and Command Terminated
MIN
l
TYP
MAX
100
ns
98
l
l
UNITS
25
200
ns
35
280
ms
ms
Additional Digital Timing Characteristics
tOFF_MIN
Minimum Off Time for Any Channel
100
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating for extended periods may affect device reliability and
lifetime.
Note 2: All currents into device pins are positive. All currents out of device
pins are negative. All voltages are referenced to ground unless otherwise
specified. If power is supplied to the chip via the VDD33 pin only, connect
VPWR and VDD33 pins together.
Note 3: The LTM2987 electrical characteristics apply to each half of the
device, unless otherwise noted. The specifications and functions are the
same for both Device A pins and Device B pins.
Note 4: Hysteresis in the output voltage is created by package stress that
differs depending on whether the module was previously at a higher or
lower temperature. Output voltage is always measured at 25°C, but the
module is cycled to 105°C or –40°C before successive measurements.
Hysteresis is roughly proportional to the square of the temperature
change.
Note 5: The current sense resolution is determined by the L11 format and
the mV units of the returned value. For example a full scale value of 170mV
returns a L11 value of 0xF2A8 = 680 • 2–2 = 170. This is the lowest range
that can represent this value without overflowing the L11 mantissa and the
resolution for 1LSB in this range is 2–2 mV = 250µV. Each successively
lower range improves resolution by cutting the LSB size in half.
ms
Note 6: The time between successive ADC conversions (latency of the
ADC) for any given channel is given as: 36.9ms + (6.15ms • number of
ADC channels configured in Low Resolution mode) + (24.6ms • number of
ADC channels configured in High Resolution mode).
Note 7: Nonlinearity is defined from the first code that is greater than or
equal to the maximum offset specification to full-scale code, 1023.
Note 8: Output enable pins are charge pumped from VDD33.
Note 9: EEPROM endurance and retention are guaranteed by design,
characterization and correlation with statistical process controls. The
minimum retention specification applies for devices whose EEPROM has
been cycled less than the minimum endurance specification.
Note 10: EEPROM endurance and retention will be degraded when
TJ > 105°C.
Note 11: The LTM2987 will not acknowledge any PMBus commands
while a mass write operation is being executed. This includes the
STORE_USER_ALL and MFR_FAULT_LOG_STORE commands or a
fault log store initiated by a channel faulting off.
Note 12: Maximum capacitive load, CB, for SCL and SDA is 400pF. Data
and clock rise time (tr) and fall time (tf) are:
(20 + 0.1 • CB) (ns) < tr < 300ns and (20 + 0.1 • CB) (ns) < tf < 300ns.
CB = capacitance of one bus line in pF. SCL and SDA external pull-up
voltage, VIO, is 3.13V < VIO < 5.5V.
2987f
For more information www.linear.com/LTM2987
7
LTM2987
PMBus TIMING DIAGRAM
SDA
tf
tLOW
tr
tSU(DAT)
tHD(SDA)
tf
tSP
tr
tBUF
SCL
tHD(STA)
START
CONDITION
tHD(DAT)
tHIGH
tSU(STA)
tSU(STO)
2987 TD
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
2987f
8
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LTM2987
Typical Performance Characteristics
Temperature Sensor Error
vs Temperature
Reference Voltage vs Temperature
1.2325
ADC Total Unadjusted Error
vs Temperature
1.5
THREE TYPICAL PARTS
REFERENCE OUTPUT VOLTAGE (V)
1.2320
0.25
1.0
0.15
1.2315
0.10
ERROR (°C)
1.2305
1.2300
ERROR (%)
0.5
1.2310
0
–0.5
90
110
VOLTAGE SENSE MODE
THREE TYPICAL PARTS
2.5
ERROR (LSBs)
100
50
0
–50
–100
122µV/LSB
2.0
0.4
1.5
0.2
1.0
0.5
0
–0.2
0
–0.4
–0.6
–200
–1.0
–0.8
90
–1.5
–0.2
110
0.8
1.8
2.8
3.8
4.8
INPUT VOLTAGE (V)
2987 G04
400
200
0
–20
–10
0
10
READ_VOUT (µV)
20
2987 G07
5.8
9
VSENSEP0 = 1.5V
0.8 HIGH RESOLUTION MODE
THREE TYPICAL PARTS
0.6
8
INPUT SAMPLING CURRENT (µA)
600
1.8
2.8
3.8
4.8
INPUT VOLTAGE (V)
Input Sampling Current
vs Differential Input Voltage
1.0
VIN = 0V
HIGH RESOLUTION MODE
800
0.8
2987 G06
Voltage Supervisor Total
Unadjusted Error vs Temperature
SUPERVISOR ERROR (%)
NUMBER OF READINGS
1000
–1.0
–0.2
5.8
2987 G05
ADC Noise Histogram
1200
122µV/LSB
0.6
–0.5
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
110
ADC DNL
0.8
–150
–250
90
2987 G03
ADC INL
3.0
150
OFFSET (µV)
–0.25
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
2987 G02
ADC Zero Code Center Offset
Voltage vs Temperature
200
–0.20
–1.5
–50 –30 –10 10 30 50 70 90 110 130
TEMPERATURE (°C)
2987 G01
250
–0.15
–1.0
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
0
–0.05
ERROR (LSBs)
1.2285
0.05
–0.10
1.2295
1.2290
VSENSEP0 = 1.8V
THREE TYPICAL PARTS
0.20
0.4
0.2
0
–0.2
–0.4
–0.6
7
6
5
4
3
2
–0.8
1
–1.0
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
0
90
110
2987 G08
0
1
2
3
4
INPUT VOLTAGE (V)
5
6
2987 G09
2987f
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9
LTM2987
Typical Performance Characteristics
2.68
80
2.67
70
60
50
40
30
20
10
GAIN SETTING = 1
THREE TYPICAL PARTS
8
2.66
2.65
2.64
2.63
2.62
4
2
0
–2
–4
–6
2.61
10
–8
2.60
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
20 40 60 80 100 120 140 160 180
DIFFERENTIAL INPUT VOLTAGE (mV)
0
90
2987 G10
DAC Short-Circuit Current vs
Temperature
GAIN SETTING = 1
THREE TYPICAL PARTS
110
–10
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
DAC Output Impedance vs
Frequency
7
6
5
110
2987 G12
Closed-Loop Servo Accuracy
20
18
8
90
2987 G11
100
46 PARTS SOLDERED DOWN
16
NUMBER OF PARTS
9
1000
OUTPUT IMPEDANCE (Ω)
10
GAIN SETTING = 1
THREE TYPICAL PARTS
6
DAC OUTPUT VOLTAGE (mV)
90
0
SHORT-CIRCUIT CURRENT (mA)
DAC Offset Voltage vs
Temperature
DAC Full-Scale Output Voltage vs
Temperature
DAC OUTPUT VOLTAGE (V)
DIFFERENTIAL INPUT CURRENT (nA)
ADC High Resolution Mode
Differential Input Current
10
1
0.1
14
12
10
8
6
4
2
4
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
90
110
0.01
0.01
2987 G13
0.1
10
1
FREQUENCY (kHz)
100
1000
0
–0.25
–0.15
0.05
–0.05
ERROR (%)
0.15
0.25
2987 G14
2987 G15
DAC Soft-Connect Transient
Response When Transitioning
from Hi-Z State to ON State
DAC Transient Response to 1LSB
DAC Code Change
DAC Soft-Connect Transient
Response When Transitioning
from ON State to Hi-Z State
CODE ‘h200
HI-Z
500µV/DIV
HI-Z
10mV/DIV
10mV/DIV
CONNECTED
CODE ‘h1FF
2µs/DIV
2987 G16
500µs/DIV
100k SERIES RESISTANCE ON
CODE: ‘h1FF
CONNECTED
2987 G17
500µs/DIV
100k SERIES RESISTANCE ON
CODE: ‘h1FF
2987 G18
2987f
10
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LTM2987
Typical Performance Characteristics
VDD33 Regulator Output Voltage
vs Temperature
3.28
THREE TYPICAL PARTS
3.26
OUTPUT VOLTAGE (V)
3.26
3.25
3.24
–40°C
3.22
3.20
25°C
SUPPLY CURRENT (mA)
3.24
3.27
105°C
3.18
3.16
3.14
3.23
3.12
3.22
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
90
3.10
110
0
20
40
60
80
100
CURRENT SOURCING (mA)
120
2987 G19
9.6
TEMPERATURE = 33°C
THREE TYPICAL PARTS
4
6
8
12
10
SUPPLY VOLTAGE (V)
16
2987 G21
14.0
VPWR = 15V
13.5
OUTUPT HIGH VOLTAGE (V)
9.4
9.3
9.2
9.1
9.0
8.9
105°C
13.0
25°C
12.5
–40°C
12.0
11.5
11.0
10.5
10.0
8.8
–50 –30 –10 10 30 50 70
TEMPERATURE (°C)
90
9.5
110
0
1
2
3
4
5
CURRENT SOURCING (µA)
7
6
2987 G22
2987 G23
VOUT_EN[3:0] and VIN_EN Output
VOL vs Current
VOUT_EN[7:4] VOL vs Current
1.4
0.6
1.2
105°C
105°C
0.5
25°C
1.0
25°C
0.4
0.8
–40°C
0.6
0.3
–40°C
0.2
0.4
0.1
0.2
0
14
VOUT_EN[3:0] and VIN_EN Output
High Voltage vs Current
9.5
SUPPLY CURRENT (mA)
9.24
9.22
9.20
9.18
9.16
9.14
9.12
9.10
9.08
9.06
9.04
9.02
9.00
8.98
8.96
2987 G20
Supply Current vs Temperature
(1/2 LTM2987)
VOL (V)
OUTPUT VOLTAGE (V)
3.28
VOL (V)
3.29
Supply Current vs Supply Voltage
(1/2 LTM2987)
VDD33 Regulator Load Regulation
0
2
8
6
10
4
CURRENT SINKING (mA)
12
0
0
2987 G24
4
8
12
16
20
CURRENT SINKING (mA)
24
2987 G25
2987f
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11
LTM2987
Pin Functions
PIN NAME
VSENSEP0
VSENSEM0
VSENSEP1
VSENSEM1
VSENSEP2
VSENSEM2
VSENSEP3
VSENSEM3
VSENSEP4
VSENSEM4
VSENSEP5
VSENSEM5
VSENSEP6
VSENSEM6
VSENSEP7
VSENSEM7
VOUT_EN0
VOUT_EN1
VOUT_EN2
VOUT_EN3
VOUT_EN4
VOUT_EN5
VOUT_EN6
VOUT_EN7
VIN_EN
VIN_SNS
PIN
Device A Device B
F7*
M7*
F6*
M6*
F12*
M12*
F11*
M11*
E12*
L12*
E11*
L11*
D12*
K12*
D11*
K11*
C12*
J12*
C11*
J11*
B12*
H12*
B11*
H11*
A12*
G12*
A11*
G11*
A7*
G7*
A6*
G6*
D7
K7
F8
M8
E8
L8
D8
K8
C8
J8
B8
H8
A8
G8
C7
J7
E5
L5
A5
G5
PIN TYPE
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
Out
Out
Out
Out
Out
Out
Out
Out
Out
In
VPWR
B5
H5
In
VDD33
A4
G4
In/Out
VDD33
VDD25
WP
PWRGD
A3
A2
A1
B1
G3
G2
G1
H1
In
In/Out
In
Out
SHARE_CLK
WDI/RESETB
B2
B4
H2
H4
In/Out
In
FAULTB00
C3
J3
In/Out
FAULTB01
D3
K3
In/Out
FAULTB10
C4
J4
In/Out
FAULTB11
D4
K4
In/Out
DESCRIPTION
DC/DC Converter Differential (+) Output Voltage-0 Sensing Pin
DC/DC Converter Differential (–) Output Voltage-0 Sensing Pin
DC/DC Converter Differential (+) Output Voltage or Current-1 Sensing Pins.
DC/DC Converter Differential (–) Output Voltage or Current-1 Sensing Pins.
DC/DC Converter Differential (+) Output Voltage-2 Sensing Pin
DC/DC Converter Differential (–) Output Voltage-2 Sensing Pin
DC/DC Converter Differential (+) Output Voltage or Current-3 Sensing Pins.
DC/DC Converter Differential (–) Output Voltage or Current-3 Sensing Pins.
DC/DC Converter Differential (+) Output Voltage-4 Sensing Pin
DC/DC Converter Differential (–) Output Voltage-4 Sensing Pin
DC/DC Converter Differential (+) Output Voltage or Current-5 Sensing Pins.
DC/DC Converter Differential (–) Output Voltage or Current-5 Sensing Pins.
DC/DC Converter Differential (+) Output Voltage-6 Sensing Pin
DC/DC Converter Differential (–) Output Voltage-6 Sensing Pin
DC/DC Converter Differential (+) Output Voltage or Current-7 Sensing Pin
DC/DC Converter Differential (–) Output Voltage or Current-7 Sensing Pin
DC/DC Converter Enable-0 Pin. Output High Voltage Optionally Pulled Up to 12V by 5µA
DC/DC Converter Enable-1 Pin. Output High Voltage Optionally Pulled Up to 12V by 5µA
DC/DC Converter Enable-2 Pin. Output High Voltage Optionally Pulled Up to 12V by 5µA
DC/DC Converter Enable-3 Pin. Output High Voltage Optionally Pulled Up to 12V by 5µA
DC/DC Converter Enable-4 Pin. Open-Drain Pull-Down Output.
DC/DC Converter Enable-5 Pin. Open-Drain Pull-Down Output.
DC/DC Converter Enable-6 Pin. Open-Drain Pull-Down Output.
DC/DC Converter Enable-7 Pin. Open-Drain Pull-Down Output.
DC/DC Converter VIN ENABLE Pin. Output High Voltage Optionally Pulled Up to 12V by 5µA
VIN SENSE Input. This Voltage is Compared Against the VIN On and Off Voltage Thresholds in
Order to Determine When to Enable and Disable, Respectively, the Downstream DC/DC Converters
VPWR Serves as the Unregulated Power Supply Input to the Chip (4.5V to 15V). If a 4.5V to 15V
Supply Voltage is Unavailable, Short VPWR to VDD33 and Power the Chip Directly from a 3.3V
Supply
If Shorted to VPWR, it Serves as 3.13V to 3.47V Supply Input Pin. Otherwise it is a 3.3V Internally
Regulated Voltage Output.
Input for Internal 2.5V Sub-Regulator. Short Pin A3 to Pin A4 and Pin G3 to Pin G4
2.5V Internally Regulated Voltage Output
Digital Input. Write-Protect Input Pin, Active High
Power Good Open-Drain Output. Indicates When Outputs are Power Good. Can be Used as
System Power-On Reset. The Latency of This Signal May Be as Long as the ADC Latency. See
Note 6
Bidirectional Clock Sharing Pin. Connect a 5.49k Pull-Up Resistor to VDD33
Watchdog Timer Interrupt and Chip Reset Input. Connect a 10k Pull-Up Resistor to VDD33. Rising
Edge Resets Watchdog Counter. Holding This Pin Low for More Than tRESETB Resets the Chip
Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-00. Connect a 10k
Pull-Up Resistor to VDD33
Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-01. Connect a 10k
Pull-Up Resistor to VDD33
Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-10. Connect a 10k
Pull-Up Resistor to VDD33
Open-Drain Output and Digital Input. Active Low Bidirectional Fault Indicator-11. Connect a 10k
Pull-Up Resistor to VDD33
2987f
12
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LTM2987
Pin Functions
PIN
Device A Device B
PIN TYPE
DESCRIPTION
C1
J1
In/Out
PMBus Bidirectional Serial Data Pin
D1
K1
In
PMBus Serial Clock Input Pin (400kHz Maximum)
E2
L2
Out
Open-Drain Output. Generates an Interrupt Request in a Fault/Warning Situation
E1
L1
In
Control Pin 0 Input
F1
M1
In
Control Pin 1 Input
F3
M3
In
Ternary Address Select Pin 0 Input. Connect to VDD33, GND or Float to Encode 1 of 3 Logic States
F2
M2
In
Ternary Address Select Pin 1 Input. Connect to VDD33, GND or Float to Encode 1 of 3 Logic States
F5
M5
Out
Reference Voltage Output
F4
M4
Out
Reference Return Pin
E7
L7
Out
DAC0 Output
E6*
L6*
Out
DAC0 Return. Connect to Channel 0 DC/DC Converter’s GND Sense or Return to GND
F10
M10
Out
DAC1 Output
F9*
M9*
Out
DAC1 Return. Connect to Channel 1 DC/DC Converter’s GND Sense or Return to GND
E10
L10
Out
DAC2 Output
E9*
L9*
Out
DAC2 Return. Connect to Channel 2 DC/DC Converter’s GND Sense or Return to GND
D10
K10
Out
DAC3 Output
D9*
K9*
Out
DAC3 Return. Connect to Channel 3 DC/DC Converter’s GND Sense or Return to GND
C10
J10
Out
DAC4 Output
C9*
J9*
Out
DAC4 Return. Connect to Channel 4 DC/DC Converter’s GND Sense or Return to GND
B10
H10
Out
DAC5 Output
B9*
H9*
Out
DAC5 Return. Connect to Channel 5 DC/DC Converter’s GND Sense or Return to GND
A10
G10
Out
DAC6 Output
A9*
G9*
Out
DAC6 Return. Connect to Channel 6 DC/DC Converter’s GND Sense or Return to GND
B7
H7
Out
DAC7 Output
B6*
H6*
Out
DAC7 Return. Connect to Channel 7 DC/DC Converter’s GND Sense or Return to GND
B3
H3
In
Common Connection for Internal Pull-Up Resistors
E3
L3
Out
General Purpose 10k Pull-Up Resistor 1
D2
K2
Out
General Purpose 10k Pull-Up Resistor 2
C2
J2
Out
General Purpose 10k Pull-Up Resistor 3
E4
L4
Out
General Purpose 10k Pull-Up Resistor 4
C6, D5, J6, K5,
Ground
Device A Ground Pins are Isolated from the Device B Ground Pins
D6
K6
DNC
C5
J5
Do Not Connect Do Not Connect to This Pin
*Any unused VSENSEPn or VSENSEMn or VDACMn pins must be tied to GND.
PIN NAME
SDA
SCL
ALERTB
CONTROL0
CONTROL1
ASEL0
ASEL1
REFP
REFM
VDACP0
VDACM0
VDACP1
VDACM1
VDACP2
VDACM2
VDACP3
VDACM3
VDACP4
VDACM4
VDACP5
VDACM5
VDACP6
VDACM6
VDACP7
VDACM7
VPU
RPU1
RPU2
RPU3
RPU4
GND
2987f
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13
LTM2987
Block Diagram
VPWR (B5, H5)
VDD33 (A4, G4)
100nF
VIN_SNS (A5, G5)
VDD33 (A3, G3)
VIN_EN (E5, L5)
VDD25 (A2, G2)
DNC (C5, J5)
100nF
100nF
REFP (F5, M5)
100nF
GND (C6, J6)
REFM (F4, M4)
VSENSEP0 (F7, M7)
REFP
REFM
VDD25
VDD33
VDD33
VPWR
VIN_SNS
100Ω
DNC
GND (D6, K6)
VIN_EN
GND
GND (D5, K5)
VSENSEP7
VSENSEP0
100nF
VSENSEM0 (F6, M6)
VDACP0 (E7, L7)
VSENSEM7
100Ω
VOUT_EN0
VOUT_EN7
VSENSEP1
VSENSEP6
VDACP1 (F10, M10)
VDACM1 (F9, M9)
VOUT_EN1 (F8, M8)
VSENSEP2 (E12, L12)
100Ω
VSENSEM6
VDACP1
VDACP6
VDACM1
VDACM6
VOUT_EN1
VOUT_EN6
VSENSEP2
VSENSEP5
VDACP2 (E10, L10)
VDACM2 (E9, L9)
VOUT_EN2 (E8, L8)
VSENSEP3 (D12, K12)
100Ω
VSENSEM5
VDACP2
VDACP5
VDACM2
VDACM5
VOUT_EN2
VOUT_EN5
VSENSEP3
VSENSEP4
VDACP3 (D10, K10)
VDACM3 (D9, K9)
VOUT_EN3 (D8, K8)
VSENSEP6 (A12, G12)
VSENSEM6 (A11, G11)
VDACP6 (A10, G10)
VDACM6 (A9, G9)
VOUT_EN6 (A8, G8)
100Ω
VSENSEP5 (B12, H12)
100Ω
VSENSEM5 (B11, H11)
VDACP5 (B10, H10)
VDACM5 (B9, H9)
VOUT_EN5 (B8, H8)
100Ω
VSENSEP4 (C12, J12)
100nF
100nF
100Ω
100Ω
100nF
VSENSEM2
100nF
VSENSEM3 (D11, K11)
100Ω
100nF
1/2 LTM2987 (LTC2977)*
100nF
100Ω
VOUT_EN7 (C7, J7)
100nF
VSENSEM1
100nF
VSENSEM2 (E11, L11)
VDACP7 (B7, H7)
100nF
100nF
100Ω
VSENSEM7 (A6, G6)
VDACM7 (B6, H6)
VDACM7
100nF
VSENSEM1 (F11, M11)
100Ω
VDACP7
VDACM0
VOUT_EN0 (D7, K7)
VSENSEP1 (F12, M12)
100nF
VSENSEM0
VDACP0
VDACM0 (E6, L6)
VSENSEP7 (A7, G7)
100nF
100nF
100Ω
100Ω
100nF
VSENSEM3
VSENSEM4
VDACP3
VDACP4
VDACM3
VDACM4
VOUT_EN3
VOUT_EN4
100Ω
VSENSEM4 (C11, J11)
VDACP4 (C10, J10)
VDACM4 (C9, J9)
VOUT_EN4 (C8, J8)
WP
SHARE_CLK
WDI
ALERTB
SDA
SCL
PWRGD
PWRGD (B1, H1)
WP (A1, G1)
SHARE_CLK (B2, H2)
WDI (B4, H4)
ALERTB (E2, L2)
SDA (C1, J1)
SCL (D1, K1)
FAULTB11
FAULTB11 (D4, K4)
FAULTB01
FAULTB00
FAULTB10
FAULTB10 (C4, J4)
FAULTB01 (D3, K3)
FAULTB00 (C3, J3)
10k
CONTROL1
RPU4 (E4, L4)
CONTROL0
10k
CONTROL1 (F1, M1)
RPU3 (C2, J2)
CONTROL0 (E1, L1)
10k
ASEL1
RPU2 (D2, K2)
ASEL1 (F2, M2)
10k
ASEL0 (F3, M3)
RPU1 (E3, L3)
ASEL0
VPU (B3, H3)
2987 BD
*NOTES: 1. ONLY 1/2 OF THE LTM2987 MODULE SHOWN
2. THE TWO 8-CHANNEL LTC2977 HALVES ARE IDENTICAL AND COMPLETELY ISOLATED
3. PIN NAMES REFER TO (DEVICE A, DEVICE B)
2987f
14
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LTM2987
Operation
Overview
The LTM2987 contains two independent LTC2977 devices
and most of the passive components required to make
a complete 16-channel power system manager. The
LTM2987 simplifies power system design by integrating
the required passive components, reducing the bill-ofmaterials and improving PC board routing efficiency.
Each half of the LTM2987 behaves the same as a standalone
LTC2977 including independent power supply and ground
pins. This feature can be used to increase redundancy in
a system while keeping the overall solution size small.
Refer to the LTC2977 data sheet for a detailed description
of the device operation, the PMBus command set, and
applications information.
Device Address
Since the LTM2987 consists of two independent LTC2977
devices, each half of the LTM2987 must be configured
for a unique address. The I2C/SMBus addresses of the
LTM2987 are configured in the same manner as for
individual LTC2977 devices. The LTM2987 also responds
to the LTC2977 global address and the SMBus Alert
Response address, regardless of the state of the ASEL
pins and the MFR_I2C_BASE_ADDRESS register. Please
refer to the Device Address section in the LTC2977 data
sheet for more details.
MFR_SPECIAL_ID
The LTM2987 contains unique MFR_SPECIAL_ID values
to differentiate it from the LTC2977. Table 1 lists the
MFR_SPECIAL_ID values for the LTM2987.
Table 1. LTM2987 MFR_SPECIAL_ID Values
LTM2987 DEVICE
MFR_SPECIAL_ID
Device A
0x8010
Device B
0x8020
2987f
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15
LTM2987
Applications Information
Overview
The LTM2987 is a Power System Manager that is capable of sequencing, margining, trimming, supervising output voltage for OV/UV conditions, providing
fault management, and voltage readback for sixteen
DC/DC converters. Input voltage and LTM2987 junction
temperature readback are also available. Odd numbered
channels can be configured to read back current sense
resistor voltages. Multiple LTM2987s can be synchronized
to operate in unison using the SHARE_CLK, FAULTB and
CONTROL pins. The LTM2987 utilizes a PMBus compliant
interface and command set.
4.5V < VPWRA < 15V
4.5V < VPWRB < 15V
VPWR
VIN_SNS
VPWR
VDD33
VDD33
VDD33
VDD25
VDD25
LTM2987*
DEVICE A
LTM2987*
DEVICE B
GND
GND
*SOME DETAILS
OMITTED FOR CLARITY
2987 F01
Figure 1. Powering LTM2987 Directly from an Intermediate Bus
Powering the LTM2987
The LTM2987 can be powered two ways. The first method
requires that a voltage between 4.5V and 15V be applied
to the VPWR pin. See Figure 1. Internal linear regulators
convert VPWR down to 3.3V which drives all of the internal circuitry in each device. Do not tie the VDD33(A) and
VDD33(B) pins together since each half of the LTM2987
has independent voltage regulators.
EXTERNAL 3.3V
The method used to power each device in the LTM2987
is independent of the other device. Either method may
be used in any combination.
Application Circuits
Undedicated Pull-Up Resistors
VIN_SNS
VDD33
Alternatively, power from an external 3.3V supply may
be applied directly to the VDD33 pins using a voltage
between 3.13V and 3.47V. Tie VPWR to the VDD33 pins.
See Figure 2. In this case, VDD33(A) and VDD33(B) may
be tied together. All functionality is available when using
this alternate power method. The higher voltages needed
for the VOUT_EN[0:3] pins and bias for the VSENSE pins are
charge pumped from VDD33.
Each half of the LTM2987 module has four undedicated
10k pull-up resistors as shown in Figure 3. The common
pull-up voltage is applied to the VPU pin, and the individual
pull-up resistors are on RPU1, RPU2, RPU3 and RPU4. These
pull-up resistors can be used for the open-drain pins such
as SDA, SCL, ALERTB or FAULTBzn in which case the
common pull-up voltage VPU should be connected to a
3.3V supply. To simplify the layout, the pin VPU is adjacent
to the VDD33 pin.
Anti-Aliasing Filter Considerations
Since most of the passive components required for operation are integrated into the LTM2987, no external filter
components are required.
1/2 LTM2987
VPU
EXTERNAL 3.3V
RPU1
10k
RPU2
10k
VPWR
VPWR
RPU3
10k
VDD33
VDD33
RPU4
10k
VDD33
VDD33
VDD25
VDD25
LTM2987*
DEVICE A
LTM2987*
DEVICE B
GND
GND
2987 F03
Figure 3. Undedicated Pull-Up Resistors
*SOME DETAILS
OMITTED FOR CLARITY
2987 F02
Figure 2. Powering LTM2987 from External 3.3V Supply
2987f
16
For more information www.linear.com/LTM2987
LTM2987
Applications Information
VIN Sense
Output Enables
Voltages other than VIN can be monitored and supervised
using the VIN_SNS pins. Each VIN_SNS pin has a calibrated
internal divider allowing it to directly sense voltages up
to 15V.
Use appropriate pull-up resistors on all VOUT_ENn pins.
n
Verify that the absolute maximum ratings of the VOUT_ENn
pins are not exceeded.
n
VIN Sense
Unused ADC Sense Inputs
Connect all unused ADC sense inputs (VSENSEPn or
VSENSEMn) to GND. In a system where the inputs are
connected to removable cards and may be left floating in
certain situations, connect the inputs to GND using 100k
resistors, as shown in Figure 4.
VSENSEP
100k
No external resistive divider is required to sense VIN;
VIN_SNS already has an internal calibrated divider.
n
Logic Signals
Verify the absolute maximum ratings of the digital
pins (SCL, SDA, ALERTB, FAULTBzn, CONTROLn,
SHARE_CLK, WDI, ASELn, PWRGD) are not exceeded.
n
Connect all SHARE_CLK pins in the system together
and pull up to 3.3V with a 5.49k resistor.
n
LTM2987
VSENSEM
100k
Do not leave CONTROLn pins floating. Pull up to 3.3V
with a 10k resistor.
n
2987 F04
Figure 4. Connecting Unused Inputs to GND
Tie WDI/RESETB to VDD33 with a 10k resistor. Do not
connect a capacitor to the WDI/RESETB pin.
n
PCB Assembly and Layout Suggestions
n
Bypass Capacitor Placement
Unused Inputs
Tie WP to either VDD33 or GND. Do not leave floating.
All required bypass capacitors are integrated into the
LTM2987. No additional bypass capacitance is required.
The PCB layout should adhere to good layout guidelines. A
multilayer PCB that dedicates a layer to power and ground
is recommended. Low resistance and low inductance
power and ground connections are important to minimize
power supply noise and ensure proper device operation.
DAC Outputs
Design Checklist
Power Supplies
I2C
Connect all unused VSENSEPn, VSENSEMn and DACMn
pins to GND. Do not float unused inputs.
n
Select appropriate resistor for desired margin range.
Refer to the resistor selection tool in LTpowerPlay for
assistance.
n
If powered from VPWR, do not connect the VDD33(A)
and VDD33(B) pins together. Each VDD33 pin has an
independent, internal regulator.
n
Each half of the LTM2987 must be configured for a
unique address. Unique hardware ASELn values are
recommended for simplest in system programming.
n
The address select pins (ASELn) are tri-level; Check
Table 1 of the LTC2977 data sheet.
n
For a more complete list of design considerations and
a schematic checklist, see the LTpowerPlay help menu.
Check addresses for collision with other devices on the
bus and any global addresses.
n
2987f
For more information www.linear.com/LTM2987
17
LTM2987
Package Description
LTM2987 Component BGA Pinout (Top View)
Device B
Device A
1
2
3
4
5
6
7
8
9
10
11
12
A
WP
VDD25
VDD33
VDD33
VIN_SNS
VSENSEM7
VSENSEP7
VOUT_EN6
VDACM6
VDACP6
VSENSEM6
VSENSEP6
B
PWRGD
SHARE_CLK
VPU
WDI
VPWR
VDACM7
VDACP7
VOUT_EN5
VDACM5
VDACP5
VSENSEM5
VSENSEP5
C
SDA
RPU3
FAULTB00 FAULTB10
DNC
GND
VOUT_EN7
VOUT_EN4
VDACM4
VDACP4
VSENSEM4
VSENSEP4
D
SCL
RPU2
FAULTB01 FAULTB11
GND
GND
VOUT_EN0
VOUT_EN3
VDACM3
VDACP3
VSENSEM3
VSENSEP3
E
CONTROL0
ALERTB
RPU1
VIN_EN
VDACM0
VDACP0
VOUT_EN2
VDACM2
VDACP2
VSENSEM2
VSENSEP2
RPU4
F
CONTROL1
ASEL1
ASEL0
REFM
REFP
VSENSEM0
VSENSEP0
VOUT_EN1
VDACM1
VDACP1
VSENSEM1
VSENSEP1
G
WP
VDD25
VDD33
VDD33
VIN_SNS
VSENSEM7
VSENSEP7
VOUT_EN6
VDACM6
VDACP6
VSENSEM6
VSENSEP6
H
PWRGD
SHARE_CLK
VPU
WDI
VPWR
VDACM7
VDACP7
VOUT_EN5
VDACM5
VDACP5
VSENSEM5
VSENSEP5
J
SDA
RPU3
FAULTB00 FAULTB10
DNC
GND
VOUT_EN7
VOUT_EN4
VDACM4
VDACP4
VSENSEM4
VSENSEP4
K
SCL
RPU2
FAULTB01 FAULTB11
GND
GND
VOUT_EN0
VOUT_EN3
VDACM3
VDACP3
VSENSEM3
VSENSEP3
L
CONTROL0
ALERTB
RPU1
RPU4
VIN_EN
VDACM0
VDACP0
VOUT_EN2
VDACM2
VDACP2
VSENSEM2
VSENSEP2
M CONTROL1
ASEL1
ASEL0
REFM
REFP
VSENSEM0
VSENSEP0
VOUT_EN1
VDACM1
VDACP1
VSENSEM1
VSENSEP1
2987f
18
For more information www.linear.com/LTM2987
aaa Z
0.630 ±0.025 Ø 144x
3.1750
3.1750
SUGGESTED PCB LAYOUT
TOP VIEW
1.9050
PACKAGE TOP VIEW
E
0.6350
0.0000
0.6350
4
1.9050
5.7150
4.4450
4.4450
5.7150
6.9850
Y
For more information www.linear.com/LTM2987
6.9850
5.7150
4.4450
3.1750
1.9050
0.6350
0.0000
0.6350
1.9050
3.1750
4.4450
5.7150
6.9850
X
D
2.45 – 2.55
aaa Z
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
aaa
bbb
ccc
ddd
eee
NOM
3.42
0.60
2.82
0.75
0.63
15.0
15.0
1.27
13.97
13.97
DIMENSIONS
0.15
0.10
0.20
0.30
0.15
MAX
3.62
0.70
2.92
0.90
0.66
NOTES
DETAIL B
PACKAGE SIDE VIEW
TOTAL NUMBER OF BALLS: 144
MIN
3.22
0.50
2.72
0.60
0.60
b1
0.27 – 0.37
SUBSTRATE
ddd M Z X Y
eee M Z
DETAIL A
Øb (144 PLACES)
DETAIL B
MOLD
CAP
ccc Z
A1
A2
A
(Reference LTC DWG # 05-08-1946 Rev A)
// bbb Z
PIN “A1”
CORNER
6.9850
BGA Package
144-Lead (15mm × 15mm × 3.42mm)
Z
e
b
11
10
9
7
G
6
e
5
PACKAGE BOTTOM VIEW
8
4
3
2
1
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
BALL DESIGNATION PER JESD MS-028 AND JEP95
7
TRAY PIN 1
BEVEL
!
PACKAGE IN TRAY LOADING ORIENTATION
LTMXXXXXX
µModule
M
L
K
J
H
G
F
E
D
C
B
A
7
SEE NOTES
PIN 1
BGA 144 1113 REV A
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu
5. PRIMARY DATUM -Z- IS SEATING PLANE
4
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
COMPONENT
PIN “A1”
3
SEE NOTES
F
b
12
DETAIL A
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTM2987
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
2987f
19
LTM2987
Typical Application
12V
VFB
ASEL0
LOAD
VDACP1
VSENSEP1
VSENSEP1
VSENSEM1
VSENSEM1
VDACM1
VDACM1
VDACP2
VSENSEP2
VSENSEP2
VSENSEM2
LTM2987
DEVICE A
VDACM2
LTM2987
DEVICE B
VSENSEM2
VDACM2
VOUT_EN2
VDACP3
VSENSEP3
VSENSEP3
VSENSEM3
VSENSEM3
VDACM3
VDACM3
VOUT_EN3
VDACP4
VSENSEP4
VSENSEP4
VSENSEM4
VSENSEM4
VDACM4
VDACM4
VOUT_EN4
VDACP5
VSENSEP5
VSENSEP5
VSENSEM5
VSENSEM5
VDACM5
VDACM5
VOUT_EN5
DC/DC
CONVERTER
VOUT_EN5
VDACP6
VDACP6
VSENSEP6
VSENSEP6
VSENSEM6
VSENSEM6
VDACM6
VDACM6
DC/DC
CONVERTER
VOUT_EN6
VOUT_EN6
VDACP7
VDACP7
3.3V
DC/DC
CONVERTER
RPU4
RPU3
RPU2
VOUT_EN7
RPU1
PWRGD
CONTROL1
CONTROL0
ALERTB
SCL
VDACM7
SDA
SHARE_CLK
FAULTB11
FAULTB10
FAULTB01
FAULTB00
PWRGD
CONTROL1
CONTROL0
ALERTB
FAULTB11
FAULTB10
FAULTB01
RPU4
RPU3
RPU2
FAULTB00
VDACM7
VOUT_EN7
SCL
VSENSEM7
SDA
VSENSEP7
VSENSEM7
SHARE_CLK
VSENSEP7
RPU1
DC/DC
CONVERTER
VOUT_EN4
VDACP5
DC/DC
CONVERTER
DC/DC
CONVERTER
VOUT_EN3
VDACP4
DC/DC
CONVERTER
DC/DC
CONVERTER
VOUT_EN2
VDACP3
DC/DC
CONVERTER
DC/DC
CONVERTER
VOUT_EN1
VDACP2
DC/DC
CONVERTER
SGND RUN/SS
GND
VOUT_EN0
VOUT_EN1
DC/DC
CONVERTER
VFB
LOAD
VDACM0
VDACP1
DC/DC
CONVERTER
VIN
DC/DC
CONVERTER
VSENSEM0
VDACM0
VOUT_EN0
DC/DC
CONVERTER
VOUT
VDACP0
VSENSEP0
VSENSEM0
RUN/SS SGND
GND
VIN_SNS
VPWR
ASEL1
VDD33
VDD33
WP
VDD25
GND
REFP
REFM
VPU
DNC
VIN_EN
ASEL0
VIN_SNS
VPWR
ASEL1
VDD33
VDD33
3.3V
REGULATOR
WDI/RESETB
VSENSEP0
DC/DC
CONVERTER
WDI/RESETB
VDD25
WP
GND
REFP
VDACP0
REFM
VOUT
VPU
3.3V
DNC
VIN
IN
OUT
INTERMEDIATE
BUS
CONVERTER
EN
VIN_EN
48V
2987 F05
5.49k
TO/FROM OTHER LTC POWER SYSTEM MANAGERS AND MICROCONTROLLER
Figure 5. LTM2987 16-Channel Application Circuit with External 3.3V Chip Power
RELATED PARTS
PART NUMBER DESCRIPTION
COMMENTS
LTC2970
Dual I2C Power Supply Monitor and Margining Controller
5V to 15V, 0.5% TUE 14-Bit ADC, 8-Bit DAC, Temperature Sensor
LTC2974
4-Channel PMBus Power System Manager
0.25% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and
Supervision
LTC2977
8-Channel PMBus Power System Manager
0.25% TUE 16-Bit ADC, Voltage/Temperature Monitoring and Supervision
LTC3880
Dual Output PolyPhase Step-Down DC/DC Controller
0.5% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision
LTC3883
Single Output PolyPhase Step-Down DC/DC Controller
0.5% TUE 16-Bit ADC, Voltage/Current/Temperature Monitoring and Supervision
2987f
20 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LTM2987
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LTM2987
LT 0414 • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2014