CA3280, CA3280A ® Data Sheet May 2002 Dual, 9MHz, Operational Transconductance Amplifier (OTA) FN1174.6 Features • Low Initial Input Offset Voltage: 500µV (Max) (CA3280A) The CA3280 and CA3280A types consist of two variable operational amplifiers that are designed to substantially reduce the initial input offset voltage and the offset voltage variation with respect to changes in programming current. This design results in reduced “AGC thump,” an objectionable characteristic of many AGC systems. Interdigitation, or crosscoupling, of critical portions of the circuit reduces the amplifier dependence upon thermal and processing variables. The CA3280 has all the generic characteristics of an operational voltage amplifier except that the forward transfer characteristics is best described by transconductance rather than voltage gain, and the output is current, not voltage. The magnitude of the output current is equal to the product of transconductance and the input voltage. This type of operational transconductance amplifier was first introduced in 1969, and it has since gained wide acceptance as a gateable, gain controlled building block for instrumentation and audio applications, such as linearization of transducer outputs, standardization of widely changing signals for data processing, multiplexing, instrumentation amplifiers operating from the nanopower range to high current and high speed comparators. For additional application information on this device and on OTAs in general, please refer to Application Notes: AN6818, AN6668, and AN6077. • Low Offset Voltage Change vs IABC: <500µV (Typ) for All Types • Low Offset Voltage Drift: 5µV/oC (Max) (CA3280A) • Excellent Matching of the Two Amplifiers for All Characteristics • Internal Current-Driven Linearizing Diodes Reduce the External Input Current to an Offset Component • Flexible Supply Voltage Range . . . . . . . . . . ±2V to ±15V Applications • Voltage Controlled Amplifiers • Voltage Controlled Oscillators • Multipliers • Demodulators • Sample and Hold • Instrumentation Amplifiers • Function Generators • Triangle Wave-to-Sine Wave Converters • Comparators • Audio Preamplifier Pinout CA3280 (PDIP) TOP VIEW ID, A1 1 A1 + - EMITTER, A1 2 Functional Diagram 16 +IN, A1 15 -IN, A1 V- 4 13 OUT, A1 NC 5 12 OUT, A2 - 11 V+, A2 IABC, A2 6 EMITTER, A2 7 14 1/2 CA3280 11 14 V+, A1 IABC, A1 3 - 10 -IN, A2 + 9 +IN, A2 A2 ID, A2 8 15 10 7 2 + 16 13 9 2K 2K 12 1 Ordering Information 8 4 PART NUMBER CA3280AE CA3280E TEMP. RANGE (oC) PACKAGE PKG. NO. -55 to 125 16 Ld PDIP E16.3 0 to 70 16 Ld PDIP E16.3 1 3 6 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved CA3280, CA3280A . Absolute Maximum Ratings Thermal Information Supply Voltage (Between V+ and V-) . . . . . . . . . . . . . . . . . . . .+36V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V+ to VInput Current at ID = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100µA Amplifier Bias Current (IABC) . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA Output Short Circuit Duration (Note 2). . . . . . . . . . . . . . . . Indefinite Linearizing Diode Bias Current, ID . . . . . . . . . . . . . . . . . . . . . . . 5mA Peak Input Current with Linearizing Diode. . . . . . . . . . . . . . . . . . ±ID Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 90 N/A Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC Operating Conditions Temperature Range CA3280 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC CA3280A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range (Typ) . . . . . . . . . . . . . . . . . . . . . ±2V to ±15V CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 2. Short circuit may be applied to ground or to either supply. For Equipment Design, at TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified Electrical Specifications CA3280 PARAMETER SYMBOL Input Offset Voltage VIO |∆VIO| Input Offset Voltage Drift TEST CONDITIONS CA3280A MIN TYP MAX MIN TYP MAX UNITS IABC = 1mA - - 3 - - 0.5 mV IABC = 100µA - 0.7 3 - 0.25 0.5 mV IABC = 10µA - - 3 - - 0.5 mV IABC = 1mA to 10µA, TA = Full Temp. Range - 0.8 4 - 0.8 1.5 mV IABC = 1µA to 1mA - 0.5 1 - 0.5 1 mV IABC = 100µA, TA = Full Temperature Range - 5 - - 3 5 µV/oC Amplifier Bias Voltage VABC IABC = 100µA - 1.2 - - 1.2 - V Peak Output Voltage VOM+ IABC = 500µA 12 13.7 - 12.5 13.7 - V 12 -14.3 - -13.3 -14.3 - V 12 13.9 - 12.5 13.9 - V 12 -14.5 - -13.5 -14.5 - V -13 - 13 -13 - 13 V 10Hz - 20 - - 20 - nV/√Hz 1kHz - 8 - - 8 - nV/√Hz 10kHz - 7 - - 7 - nV/√Hz VOMVOM+ IABC = 5µA VOMCommon Mode Input Voltage Range Noise Voltage VICR IABC = 100µA eN IABC = 500µA Input Offset Current IIO IABC = 500µA -Z 0.3 0.7 - 0.3 0.7 µA Input Bias Current IIB IABC = 500µA - 1.8 5 - 1.8 5 µA IABC = 500µA, TA = Full Temperature Range - 3 8 - 3 8 µA 2 CA3280, CA3280A For Equipment Design, at TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified (Continued) Electrical Specifications CA3280 PARAMETER SYMBOL MIN TYP MAX MIN TYP MAX UNITS Source 350 410 650 350 410 650 µA Sink -350 -410 -650 -350 -410 -650 µA Source 3 4.1 7 3 4.1 7 µA IOM- Sink -3 -4.1 -7 -3 -4.1 -7 µA IOM -, IOM+ IABC = 500µA, TA = Full Temperature Range 350 450 550 350 450 550 µA ID = 100µA - 10 - - 10 - µA Offset Current ID = 10µA - 0.5 1 - 0.5 1 µA Dynamic Impedance ID = 100µA - 700 - - 700 - Ω IABC = 100µA 250 400 800 250 400 800 µA IABC = 500µA - 2 2.4 - 2 2.4 mA IABC = 0, VO = 0V - 0.015 0.1 - 0.015 0.1 nA IABC = 0, VO = 30V - 0.15 1 - 0.15 1 nA Peak Output Current IOM+ TEST CONDITIONS CA3280A IABC = 500µA IOMIOM+ Peak Output Current Sink and Source Linearization Diodes Diode Network Supply Current Amplifier Supply Current (Per Amplifier) I+ Amplifier Output Leakage Current IOL IABC = 5µA Common Mode Rejection Ratio CMRR IABC = 100µA 80 100 - 94 100 - dB Power Supply Rejection Ratio PSRR IABC = 100µA 86 105 - 94 105 - dB IABC = 100µA, RL = ∞, VO = 20VP-P 94 100 - 94 100 - dB 50 100 - 50 100 - kV/V Open Loop Voltage Gain AOL Forward Transconductance GM IABC = 50µA, Large Signal - 0.8 1.2 - 0.8 1.2 mS gM IABC = 1mA, Small Signal - 16 22 - 16 22 mS RI IABC = 10µA 0.5 - - 0.5 - - MΩ f = 1kHz - 94 - - 94 - dB THD f = 1kHz, IABC = 1.5mA, RL = 15kΩ, VO = 20VP-P - 0.4 - - 0.4 - % Bandwidth fT IABC = 1mA, RL = 100Ω - 9 - - 9 - MHz Slew Rate, Open Loop SR IABC = 1mA - 125 - - 125 - V/µs Capacitance CI IABC = 100µA Input - 4.5 - - 4.5 - pF Output - 7.5 - - 7.5 - pF - 63 - - 63 - MΩ Input Resistance Channel Separation Open Loop Total Harmonic Distortion CO Output Resistance RO 3 IABC = 100µA CA3280, CA3280A Test Circuits and Waveforms V+ +30V INPUT 16 14 30V 0V 15 I TEST POINT 1/2 CA3280 + 16 15 13 + 1/2 CA3280 - 1kΩ 1 0.1 µF OUTPUT 13 3 4 4 0.1µF 14 30kΩ V- V+ 10kΩ 3 30kΩ 1kΩ FIGURE 1. LEAKAGE CURRENT TEST CIRCUIT FIGURE 2. CHANNEL SEPARATION TEST CIRCUIT V+ 15V 14 10kΩ 16 IOUT 1/2 CA3280 13 10kΩ 15 4 3 1kΩ 1 V-15V VIN IABC IABC = 650µA, ID = 200µA; Vertical = 200µA/Div.; Horizontal = 1V/Div. IDIODE FIGURE 3A. EFFECTS OF DIODE LINEARIZATION, WITH DIODE PROGRAMMING TERMINAL ACTIVE V+ 15V 11 10kΩ 9 1/2 CA3280 12 IOUT 10kΩ 10 6 4 1kΩ 8 IDIODE IABC V-15V VIN IABC = 650µA; ID = 0; Vertical = 200µA/Div.; Horizontal = 25mV/Div. FIGURE 3B. WITH DIODE PROGRAMMING TERMINAL CUTOFF FIGURE 3. CA3280 TRANSFER CHARACTERISTICS 4 CA3280, CA3280A Application Information Figures 4 and 5 show the equivalent circuits for the current source and linearization diodes in the CA3280. The current through the linearization network is approximately equal to the programming current. There are several advantages to driving these diodes with a current source. First, only the offset current from the biasing network flows through the input resistor. Second, another input is provided to extend the gain control dynamic range. And third, the input is truly differential and can accept signals within the common mode range of the CA3280. Typical Applications The structure of the variable operational amplifier eliminates the need for matched resistor networks in differential to single ended converters, as shown in Figure 6. A matched resistor network requires ratio matching of 0.01% or trimming for 80dB of common-mode rejection. The CA3280, with its excellent common mode rejection ratio, is capable of converting a small (±25mV) differential input signal to a single-ended output without the need for a matched resistor network. Figure 7 shows the CA3280 in a typical gain control application. Gain control can be performed with the amplifier bias current (lABC). With no diode bias current, the gain is merely gMRL. For example, with an lABC of 1mA, the gM is approximately 16mS. With the CA3280 operating into a 5kΩ resistor, the gain is 80. The need for external buffers can be eliminated by the use of low value load resistors, but the resulting increase in the required amplifier bias current reduces the input impedance of the CA3280. The linearization diode impedance also decreases as the diode bias current increases, which further loads the input. The diodes, in addition to acting as a linearization network, also operate as an additional attenuation system to accommodate input signals in the volt range when they are applied through appropriate input resistors. Figure 10 shows a triangle wave to sine wave converter using the CA3280. Two 100kΩ resistors are connected between the differential amplifier emitters and V+ to reduce the current flow through the differential amplifier. This allows the amplifier to fully cut off during peak input signal excursions. THD is appropriately 0.37% for this circuit. RD = SMALL SIGNAL DIODE IMPEDANCE V+ RD ≈ 70 52Ω ID(mA) x 1.34 = ID RD VOA VOA ID IABC ID IABC V- FIGURE 4. VOA SHOWING LINEARIZATION DIODES AND CURRENT DRIVE FIGURE 5. BLOCK DIAGRAM OF LINEARIZED VOA 10VP-P INPUT +15V V+ = +15V OUTPUT 21VP-P 14mV AGC FEEDTHRU 400µV NOISE AT MAX GAIN 68kΩ 600Ω 68kΩ 1 16 3 2kΩ 16 DIFFERENTIAL INPUT 2kΩ 15 14 10kΩ 14 + 1/2 CA3280 V+ 13 - SINGLEENDED OUTPUT 330kΩ + 1/2 CA3280 - 15 100kΩ 13 4 15kΩ 4 10kΩ 1 V- 3 10kΩ 20kΩ V- = -15V -15V FIGURE 6. DIFFERENTIAL TO SINGLE ENDED CONVERTER 5 VOLTAGE CONTROL FIGURE 7. TYPICAL GAIN CONTROL CIRCUIT CA3280, CA3280A 3 +15V 2kΩ 16 + 1/2 CA3280 33pF 51Ω 10kΩ 14 13 - 15 1800pF 2kΩ 2kΩ 6 9 51Ω 10kΩ + 1/2 CA3280 33pF - 10 -15V 1N914 14 4 6 7 OUTPUT 100kΩ 12 300pF 10kΩ 5 100Ω 1 1 3 2 TO 10kΩ 6 1/2 CD4013 4 8 TO 10kΩ 3 -15V 0.05µF FIGURE 8. TWO CHANNEL LINEAR MULTIPLEXER V+ 3.6kΩ V+ = +7.5V 14 16 0.1µF + 1/2 CA3280 200Ω 15 13 3 V+ 560kΩ + 11 10 6 4 V+ - 6 1/2 CA3280 - 2 2.7kΩ 3.3kΩ CA3160 15 - 115pF 3 910kΩ V- 7 - 200Ω 100kΩ V+ 9 V- + 8 4 0.1µF 100kΩ 12 1 VV- = -7.5V V+ 3.3kΩ V10kΩ MAX FREQ. SET 5.6kΩ 4 - 60pF 500Ω 1kΩ MIN FREQ. SET 2kΩ 1N914 1N914 FIGURE 9. CA3280 USED IN CONJUNCTION WITH A CA3160 TO PROVIDE A FUNCTION GENERATOR WITH A TUNABLE RANGE OF 2Hz TO 1MHz +15V 170mVP-P 2kΩ 16 15 0.1 µF 30kΩ 14 6.8 1 MΩ MΩ 3 + 1/2 CA3280 13 100kΩ - 2 +15V +15V 51Ω 11 -15V +15V 1MΩ 10 100kΩ -15V 200Ω 6 9 2kΩ + 1/2 CA3280 7 12 3.9 kΩ 100kΩ 4 -15V FIGURE 10. TRIANGLE WAVE-TO-SINE WAVE CONVERTER 6 CA3280, CA3280A Typical Performance Curves IABC = 3mA 104 101 TA = 25oC SUPPLY CURRENT (mA) SMALL SIGNAL FORWARD TRANSCONDUCTANCE (mS) 105 IABC = 300µA 103 IABC = 30µA 102 IABC = 3.0µA 101 IABC = 0.3µA 1 I = 0.03µA 0.1 ABC 101 102 103 104 105 106 107 108 TA = 25oC VS = ±15V 1 10-1 10-2 10-1 109 101 1 FIGURE 11. AMPLIFIER GAIN vs FREQUENCY 2 INPUT OFFSET VOLTAGE (mV) INPUT OFFSET CURRENT (nA) FIGURE 12. SUPPLY CURRENT vs DIODE CURRENT VS = ±15V TA = -55oC TA = 25oC TA = 125oC 102 101 1 101 1 102 1 0 TA = 125oC TA = 25oC TA = -55oC -1 -2 TA = 125oC -3 -4 -5 103 101 102 AMPLIFIER BIAS CURRENT (µA) 1 AMPLIFIER BIAS CURRENT (µA) FIGURE 13. INPUT OFFSET CURRENT vs AMPLIFIER BIAS CURRENT 103 FIGURE 14. INPUT OFFSET VOLTAGE vs AMPLIFIER BIAS CURRENT 16 106 VS = ±15V 105 INPUT CURRENT (pA) 15 PEAK OUTPUT VOLTAGE (V) 103 DIODE CURRENT (µA) FREQUENCY (Hz) 103 102 14 13 TA = 125oC TA = 25oC TA = -55oC 0 -13 TA = 125oC TA = 25oC TA = -55oC -14 TA = 125oC 104 103 102 TA = 25oC 101 -15 -16 1 101 102 103 AMPLIFIER BIAS CURRENT (µA) FIGURE 15. PEAK OUTPUT VOLTAGE vs AMPLIFIER BIAS CURRENT 7 1 0 1 2 3 4 5 6 7 8 9 DIFFERENTIAL INPUT VOLTAGE (V) FIGURE 16. INPUT CURRENT vs INPUT DIFFERENTIAL VOLTAGE 10 CA3280, CA3280A Typical Performance Curves (Continued) 1800 AMPLIFIER BIAS VOLTAGE (mV) LEAKAGE CURRENT (nA) 104 103 V9 = V10 = V12 = 30V 102 10 1 V9 = V10 = V12 = 0V 10-1 10-2 -75 VS = ±15V 1600 TA = -55oC 1400 TA = 25oC 1200 1000 TA = 100oC 800 TA = 125oC 600 400 -50 -25 0 25 50 75 100 125 150 175 101 1 TEMPERATURE (oC) FIGURE 18. AMPLIFIER BIAS VOLTAGE vs AMPLIFIER BIAS CURRENT 103 TA = 25oC 20 PEAK OUTPUT CURRENT (µA) 1/ f NOISE VOLTAGE (nV/√Hz) 22 18 16 14 12 10 IABC = 500µA 8 6 4 VS = ±15V TA = -55oC TA = 25oC TA = 125oC 102 101 TA = 125oC TA = -55oC TA = 25oC 2 1 0 101 102 103 104 105 101 1 FIGURE 19. 1/f NOISE vs FREQUENCY 103 FIGURE 20. PEAK OUTPUT CURRENT vs AMPLIFIER BIAS CURRENT 105 106 TA = 25oC VS = +15V 105 SMALL SIGNAL FORWARD TRANSCONDUCTANCE (µS) DIODE RESISTANCE (Ω) 102 AMPLIFIER BIAS CURRENT (µA) FREQUENCY (Hz) 104 103 102 101 10-1 103 AMPLIFIER BIAS CURRENT (µA) FIGURE 17. LEAKAGE CURRENT vs TEMPERATURE 24 102 1 101 102 103 DIODE CURRENT (µA) FIGURE 21. DIODE RESISTANCE vs DIODE CURRENT 8 104 104 TA = -55oC TA = 25oC TA = 125oC 103 102 101 1 10-1 10-3 10-2 10-1 1 101 102 103 104 AMPLIFIER BIAS CURRENT (µA) FIGURE 22. AMPLIFIER GAIN vs AMPLIFIER BIAS CURRENT CA3280, CA3280A Typical Performance Curves 104 VS = ±15V VS = ±15V 103 INPUT BIAS CURRENT (nA) SUPPLY CURRENT (µA) 104 (Continued) 102 TA = 125oC 101 TA = -55oC, 25oC 1 103 102 TA = 125oC TA = 25oC 101 TA = -55oC 10-1 10-1 101 1 102 103 AMPLIFIER BIAS CURRENT (µA) FIGURE 23. SUPPLY CURRENT vs AMPLIFIER BIAS CURRENT 9 1 10-1 1 101 102 AMPLIFIER BIAS CURRENT (µA) FIGURE 24. INPUT BIAS CURRENT vs AMPLIFIER BIAS CURRENT 103 CA3280, CA3280A Dual-In-Line Plastic Packages (PDIP) N E16.3 (JEDEC MS-001-BB ISSUE D) E1 INDEX AREA 1 2 3 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE N/2 INCHES -B- SYMBOL -AE D BASE PLANE -C- A2 SEATING PLANE A L D1 e B1 D1 eA A1 eC B 0.010 (0.25) M C L C A B S C eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. MILLIMETERS MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - B 0.014 0.022 0.356 0.558 - B1 0.045 0.070 1.15 1.77 8, 10 C 0.008 0.014 0.204 0.355 - D 0.735 0.775 18.66 19.68 5 D1 0.005 - 0.13 - 5 E 0.300 0.325 7.62 8.25 6 E1 0.240 0.280 6.10 7.11 5 e 0.100 BSC 2.54 BSC - 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication No. 95. eA 0.300 BSC 7.62 BSC 6 eB - 0.430 - 10.92 7 4. Dimensions A, A1 and L are measured with the package seated in JEDEC seating plane gauge GS-3. L 0.115 0.150 2.93 3.81 4 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . N 16 16 9 Rev. 0 12/93 7. eB and eC are measured at the lead tips with the leads unconstrained. eC must be zero or greater. 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10