DATASHEET

HA-5137A
TM
Data Sheet
April 2000
File Number
2908.5
63MHz, Ultra-Low Noise Precision
Operational Amplifier
Features
The HA-5137 operational amplifier features an unparalleled
combination of precision DC and wideband high speed
characteristics. Utilizing the Intersil Dielectric Isolation
technology and advanced processing techniques, this
unique design unites low noise ( 3nV ⁄ Hz ) precision
instrumentation performance with high speed (20V/µs)
wideband capability.
• Wide Gain Bandwidth (AV ≥ 5) . . . . . . . . . . . . . . . 63MHz
This amplifier’s impressive list of features include low VOS
(10µV), wide gain bandwidth (63MHz), high open loop gain
(1800V/mV), and high CMRR (126dB). Additionally, this
flexible device operates over a wide supply range (±5V to
±20V) while consuming only 140mW of power.
Using the HA-5137 allows designers to minimize errors while
maximizing speed and bandwidth in applications requiring
gains greater than five.
This device is ideally suited for low level transducer signal
amplifier circuits. Other applications which can utilize the
HA-5137’s qualities include instrumentation amplifiers, pulse
or RF amplifiers, audio preamplifiers, and signal conditioning
circuits.
This device can easily be used as a design enhancement by
directly replacing the 725, OP25, OP06, OP07, OP27 and
OP37 where gains are greater than five. For the military
grade product, refer to the HA-5137/883 data sheet.
• Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V/µs
• Low Noise. . . . . . . . . . . . . . . . . . . . . . . 3nV/ Hz at 1kHz
• Low VOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10µV
• High CMRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126dB
• High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1800V/mV
Applications
• High Speed Signal Conditioners
• Wide Bandwidth Instrumentation Amplifiers
• Low Level Transducer Amplifiers
• Fast, Low Level Voltage Comparators
• Highest Quality Audio Preamplifiers
• Pulse/RF Amplifiers
• For Further Design Ideas See Application Note AN553
Ordering Information
PART NUMBER
HA7-5137A-5
TEMP.
RANGE (oC)
0 to 75
PACKAGE
8 Ld CERDIP
PKG.
NO.
F8.3A
Pinout
HA-5137A
(CERDIP)
TOP VIEW
BAL
1
-IN
2
+IN
3
V-
4
+
1
8
BAL
7
V+
6
OUT
5
NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
HA-5137A
Absolute Maximum Ratings TA = 25oC
Thermal Information
Voltage Between V+ and V- Terminals. . . . . . . . . . . . . . . . . . . . 44V
Differential Input Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . 0.7V
Output Current . . . . . . . . . . . . . . . . . . . . Full Short Circuit Protection
Thermal Resistance (Typical, Note 2)
θJA (oC/W) θJC (oC/W)
CERDIP Package. . . . . . . . . . . . . . . . .
115
28
Maximum Junction Temperature (Hermetic Package) . . . . . . . 175oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range
HA-5137A-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. For differential input voltages greater than 0.7V, the input current must be limited to 25mA to protect the back-to-back input diodes.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
VSUPPLY = ±15V, CL ≤ 50pF, RS ≤ 100Ω
Electrical Specifications
PARAMETER
INPUT CHARACTERISTICS
Offset Voltage
TEST CONDITIONS
Average Offset Voltage Drift
Bias Current
Offset Current
Common Mode Range
Differential Input Resistance (Note 3)
Input Noise Voltage (Note 4)
Input Noise Voltage Density
(Note 5)
Input Noise Current Density
(Note 5)
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
0.1Hz to 10Hz
f = 10Hz
f = 100Hz
f = 1000Hz
f = 10Hz
f = 100Hz
f = 1000Hz
RL = 2kΩ,
VOUT = ±10V
VCM = ±10V
Common Mode Rejection Ratio
Minimum Stable Gain
Gain-Bandwidth-Product
f = 10kHz
f = 1MHz
OUTPUT CHARACTERISTICS
Output Voltage Swing
RL = 600Ω
RL = 2kΩ
Full Power Bandwidth (Note 6)
Output Resistance
Output Current
TRANSIENT RESPONSE (Note 7)
Rise Time
Slew Rate
Settling Time
Overshoot
POWER SUPPLY CHARACTERISTICS
Supply Current
2
Open Loop
VOUT = ±3V
Note 8
TEMP.
(oC)
MIN
TYP
MAX
UNITS
25
Full
Full
-
10
30
0.2
25
60
0.6
µV
µV
µV/oC
25
Full
25
Full
Full
25
25
25
25
25
25
25
25
±10.3
1.5
-
10
20
7
15
±11.5
6
0.08
3.5
3.1
3.0
1.7
1.0
0.4
40
60
35
50
0.18
8.0
4.5
3.8
4.0
2.3
0.6
nA
nA
nA
nA
V
MΩ
µVP-P
25
Full
Full
25
25
25
1000
600
114
5
60
-
1800
1200
126
80
63
-
V/mV
V/mV
dB
V/V
MHz
MHz
25
Full
25
25
25
±10.0
±11.7
220
16.5
±11.5
±13.8
320
70
25
-
V
V
kHz
Ω
mA
25
25
25
25
14
-
20
1.0
20
100
40
ns
V/µs
µs
%
25
Full
-
3.5
-
4.0
mA
mA
nV/
nV/
nV/
pA/
Hz
Hz
Hz
Hz
pA/ Hz
pA/ Hz
HA-5137A
VSUPPLY = ±15V, CL ≤ 50pF, RS ≤ 100Ω (Continued)
Electrical Specifications
PARAMETER
Power Supply Rejection Ratio
NOTES:
TEST CONDITIONS
VS = ±4V to ±18V
TEMP.
(oC)
Full
MIN
-
TYP
2
MAX
4
UNITS
µV/V
3. This parameter value is based upon design calculations.
4. Refer to Typical Performance section of the data sheet.
5. The limits for this parameter are based on lab characterization, and reflect lot-to-lot variation.
Slew Rate
6. Full power bandwidth guaranteed based on slew rate measurement using: FPBW = ----------------------------- .
2πV PEAK
7. Refer to Test Circuits section of the data sheet.
8. Settling time is specified to 0.1% of final value for a 10V output step and AV = -5.
Test Circuits and Waveforms
IN
+
OUT
-
1.6kΩ
50pF
400Ω
FIGURE 1. LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUIT
IN
IN
OUT
OUT
Vertical Scale: Input = 1V/Div.
Output = 5V/Div.
Horizontal Scale: 1µs/Div.
Vertical Scale: Input = 20mV/Div.
Output = 100mV/Div.
Horizontal Scale: 100ns/Div.
LARGE SIGNAL RESPONSE
SMALL SIGNAL RESPONSE
+15V
2N4416
1000Ω
TO
OSCILLOSCOPE
5kΩ
2kΩ
+15V
400Ω
IN
NOTES:
+
OUT
-
50pF
-15V
2kΩ
FIGURE 2. SETTLING TIME TEST CIRCUIT
3
9. AV = -5.
10. Feedback and summing resistors should be
0.1% matched.
11. Clipping diodes are optional. HP5082-2810
recommended.
Schematic Diagram
V+
7
1
R25
R1
R16
R15
C7
8
BALANCE
R2
R20
QP35
D1
4
QN45
R21
R17
QP32
QP37
QP43
QP38
QP44
QP55
C5
QN19
QD8
QN46
C4
QN13
QP56
QN14
QN47
R1A
R2A
QN15
C1
QN29
QP17
QN3
QP36
QP27
QN2
QP26
6
R18
OUTPUT
QN1A
QN2A
QN18
QN1
QP40
QN6
QN42A
QN48
QN25
QN49
QN50
C2
R5
R6
R8
R10
QN10
QN11
4
V-
SUBSTRATE
3
2
+INPUT
-INPUT
C3
QN5
QN39
QD60
QP30
R19
QN42
R4
QN24
R13
QD34
QN7
QD23
QZ58
R12
QP36A
QD22
QN57
QP26
QD41
QN12
QD59
R3
QN4
QD54
QD53
R9
R24
QD9
C6
QN20
QD33
R22
R23
QP21
HA-5137A
R14
R7
QN52
QN51
QP16
HA-5137A
Application Information
RP
10K
1
2
3
8
7
+
V+
6
4
5
Tested Offset Adjustment Range is |VOS + 1mV| minimum referred to output. Typical range is ±4mV with RP = 10kΩ.
NOTE:
FIGURE 3. SUGGESTED OFFSET VOLTAGE ADJUSTMENT
CS
R1
+
-
R2
R1
+
R3
R3
R2
C3
NOTE: Low resistances are preferred for low noise applications as a 1kΩ resistor has 4nV/√Hz of thermal noise. Total resistances of greater than
10kΩ on either input can reduce stability. In most high resistance applications, a few picofarads of capacitance across the feedback resistor will
improve stability.
FIGURE 4. SUGGESTED STABILITY CIRCUITS
Unless Otherwise Specified: TA = 25oC, VSUPPLY = ±15V
12
30
NOISE VOLTAGE (nV/√Hz)
OFFSET VOLTAGE (µV)
20
10
0
-10
-20
-30
-40
10
5
8
4
6
3
NOISE VOLTAGE
4
2
1
2
-50
-60
-60
6
VS = ±15V, TA = 25oC
NOISE CURRENT
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (oC)
FIGURE 5. OFFSET VOLTAGE DRIFT vs TEMPERATURE
5
0
1
10
100
1K
10K
100K
FREQUENCY (Hz)
FIGURE 6. NOISE CHARACTERISTICS
0
1M
NOISE CURRENT (pA/√Hz)
Typical Performance Curves
HA-5137A
Typical Performance Curves
140
TA = 25oC
0.12
120
0.1
100
CMRR (dB)
INPUT NOISE VOLTAGE (µVP-P)
0.14
Unless Otherwise Specified: TA = 25oC, VSUPPLY = ±15V (Continued)
0.08
0.06
80
60
0.04
40
0.02
20
0
10
0
4
6
8
10
12
14
16
18
20
100
1K
10K
100K
1M
10M
FREQUENCY (Hz)
SUPPLY VOLTAGE (±V)
FIGURE 8. CMRR vs FREQUENCY
FIGURE 7. NOISE vs SUPPLY VOLTAGE
2.60
1.10
BANDWIDTH AND SLEW RATE
(NORMALIZED TO 1 AT ±15V)
2.58
SUPPLY CURRENT (mA)
2.56
2.54
2.52
2.50
2.48
2.46
2.44
1.00
BANDWIDTH
0.90
-SLEW RATE
0.80
+SLEW RATE
0.70
0.60
2.42
2.40
0.50
6
8
10
12
14
16
18
20
5
10
SUPPLY VOLTAGE (±V)
FIGURE 9. SUPPLY CURRENT vs SUPPLY VOLTAGE
20
FIGURE 10. BANDWIDTH AND SLEW RATE vs SUPPLY
VOLTAGE
140
40
30
100
GAIN (dB)
120
PSRR (dB)
15
SUPPLY VOLTAGE (±V)
-PSRR
80
60
+PSRR
GAIN
20
10
0
0
PHASE
-10
90
-20
40
20
0
10
180
100
1K
10K
100K
FREQUENCY (Hz)
FIGURE 11. PSRR vs FREQUENCY
6
1M
10M
100
1K
10K
100K
1M
10M
PHASE (DEGREES)
4
100M
FREQUENCY (Hz)
FIGURE 12. CLOSED LOOP GAIN AND PHASE vs FREQUENCY
HA-5137A
Typical Performance Curves
17
1.05
SLEW RATE NORMALIZED TO 1 AT 30oC
TA = 25oC
16
AVOL (100kV/V) AND VOUT (V)
Unless Otherwise Specified: TA = 25oC, VSUPPLY = ±15V (Continued)
AVOL
15
14
13
VOUT
12
11
10
9
8
7
6
5
4
2
0
4
6
8
1.03
1.02
1.01
1.0
0.99
0.98
0.97
0.96
0.95
-60
10
RL = 2K, CL = 50pF, TA = 25oC
1.04
-40
-20
FIGURE 13. AVOL AND VOUT vs LOAD RESISTANCE
28
40
60
80
100
120
RL = 2K, CL = 50pF, TA = 25oC
24
OUTPUT VOLTAGE (VP-P)
2.80
SUPPLY CURRENT (mA)
20
FIGURE 14. NORMALIZED SLEW RATE vs TEMPERATURE
VO = 0V, VS = ±15V
2.82
0
TEMPERATURE (oC)
LOAD RESISTANCE (kΩ)
2.78
2.76
2.74
2.72
20
16
12
8
2.70
4
2.68
-55
25
TEMPERATURE (oC)
125
FIGURE 15. SUPPLY CURRENT vs TEMPERATURE
0
0.4
0.8
1.2
1.6
FREQUENCY (MHz)
2
FIGURE 16. VOUT MAX (UNDISTORTED SINEWAVE OUTPUT)
vs FREQUENCY
140
120
GAIN
80
60
40
20
0
-45
PHASE
0
-90
-135
10
100
1K
10K
100K
1M
10M
PHASE SHIFT (DEGREES)
GAIN (dB)
100
-180
100M
FREQUENCY (Hz)
FIGURE 17. OPEN LOOP GAIN AND PHASE vs FREQUENCY
7
ACL = 25,000V/V
Horizontal Scale = 1s/Div.
Vertical Scale = 0.002µV/Div., EN = 0.08µVP-P RTI
FIGURE 18. PEAK-TO-PEAK NOISE VOLTAGE (0.1Hz TO 10Hz)
HA-5137A
Die Characteristics
DIE DIMENSIONS:
PASSIVATION:
Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.)
Silox Thickness: 12kÅ ±2kÅ
Nitride Thickness: 3.5kÅ ±1.5kÅ
104 mils x 65 mils x 19 mils
2650µm x 1650µm x 483µm
METALLIZATION:
TRANSISTOR COUNT:
Type: Al, 1% Cu
Thickness: 16kÅ ±2kÅ
63
SUBSTRATE POTENTIAL (POWERED UP):
PROCESS:
V-
Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5137A
BAL
BAL
-IN
V+
+IN
OUT
V-
8
NC
HA-5137A
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
c1
F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A)
LEAD FINISH
8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
-D-
-A-
BASE
METAL
E
M
-Bbbb S
C A-B S
-C-
S1
0.200
-
5.08
-
0.026
0.36
0.66
2
b1
0.014
0.023
0.36
0.58
3
b2
0.045
0.065
1.14
1.65
-
b3
0.023
0.045
0.58
1.14
4
c
0.008
0.018
0.20
0.46
2
c1
0.008
0.015
0.20
0.38
3
D
-
0.405
-
10.29
5
E
0.220
0.310
5.59
7.87
5
eA
e
ccc M C A - B S
eA/2
c
aaa M C A - B S D S
D S
NOTES
-
b2
b
MAX
0.014
α
A A
MIN
b
A
L
MILLIMETERS
MAX
A
Q
SEATING
PLANE
MIN
M
(b)
D
BASE
PLANE
SYMBOL
b1
SECTION A-A
D S
INCHES
(c)
NOTES:
1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH
e
0.100 BSC
2.54 BSC
-
eA
0.300 BSC
7.62 BSC
-
eA/2
0.150 BSC
3.81 BSC
-
L
0.125
0.200
3.18
5.08
-
Q
0.015
0.060
0.38
1.52
6
S1
0.005
-
0.13
-
7
α
90o
105o
90o
105o
-
aaa
-
0.015
-
0.38
-
bbb
-
0.030
-
0.76
-
ccc
-
0.010
-
0.25
-
M
-
0.0015
-
0.038
2, 3
N
8
8
8
Rev. 0 4/94
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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9
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