[ /Title (HA5147) /Subject (120M Hz, UltraLow Noise Precision Operational Amplifiers) /Autho r () /Keywords (Intersil Corporation, Semiconductor, single, operational amplifier, low power op amp, low input bias HA-5147 ® Data Sheet July 12, 2006 FN2910.9 120MHz, Ultra-Low Noise Precision Operational Amplifiers Features The HA-5147 operational amplifier features an unparalleled combination of precision DC and wideband high speed characteristics. Utilizing the Intersil D. I. technology and advanced processing techniques, this unique design unites low noise (3.2nV/√Hz) precision instrumentation performance with high speed (35V/µs) wideband capability. • Wide Gain Bandwidth (AV ≥ 10). . . . . . . . . . . . . . 120MHz • Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V/µs This amplifier’s impressive list of features include low VOS (30mV), wide gain bandwidth (120MHz), high open loop gain (1500V/mV), and high CMRR (120dB). Additionally, this flexible device operates over a wide supply range (±5V to ±20V) while consuming only 140mW of power. Using the HA-5147 allows designers to minimize errors while maximizing speed and bandwidth in applications requiring gains greater than ten. • Low Noise . . . . . . . . . . . . . . . . . . . . . 3.2nV/√Hz at 1kHz • Low VOS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30µV • High CMRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120dB • High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1500V/mV • Pb-Free Available (RoHS Compliant) Applications • High Speed Signal Conditioners • Wide Bandwidth Instrumentation Amplifiers • Low Level Transducer Amplifiers This device is ideally suited for low level transducer signal amplifier circuits. Other applications which can utilize the HA-5147’s qualities include instrumentation amplifiers, pulse or RF amplifiers, audio preamplifiers, and signal conditioning circuits. • Fast, Low Level Voltage Comparators This device can easily be used as a design enhancement by directly replacing the 725, OP25, OP06, OP07, OP27 and OP37 where gains are greater than ten. For military grade product, refer to the HA-5147/883 data sheet. Pinout • Highest Quality Audio Preamplifiers • Pulse/RF Amplifiers • For Further Design Ideas See Application Note AN553 HA-5147 (CERDIP) TOP VIEW BAL 1 -IN 2 +IN 3 V- 4 + 8 BAL 7 V+ 6 OUT 5 NC Ordering Information PART NUMBER PART MARKING TEMP. RANGE (oC) PACKAGE PKG. DWG. # HA7-5147-2 HA7- 5147-2 -55 to 125 8 Ld CerDIP F8.3A HA7-5147R5254 (Note) HA7- 5147R5254 -55 to 125 8 Ld CerDIP with Pb-free Hot Solder DIP Lead Finish (SnAgCu) F8.3A NOTE: Intersil Pb-free hermetic packaged products employ SnAgCu or Au termination finish, which are RoHS compliant termination finishes and compatible with both SnPb and Pb-free soldering operations. Ceramic dual in-line packaged products (CerDIPs) do contain lead (Pb) in the seal glass and die attach glass materials. However, lead in the glass materials of electronic components are currently exempted per the RoHS directive. Therefore, ceramic dual inline packages with Pb-free termination finish are considered to be RoHS compliant. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003, 2006. All Rights Reserved All other trademarks mentioned are the property of their respective owners. HA-5147 Absolute Maximum Ratings TA = 25oC Thermal Information Voltage Between V+ and V- Terminals . . . . . . . . . . . . . . . . . . . 44V Differential Input Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . 0.7V Output Current . . . . . . . . . . . . . . . . . . . Full Short Circuit Protection Thermal Resistance (Typical, Note 2) Operating Conditions θJA (oC/W) θJC (oC/W) CERDIP Package. . . . . . . . . . . . . . . . . 135 50 Maximum Junction Temperature (Hermetic Package). . . . . . . .175oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC Temperature Range HA-5147-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. For differential input voltages greater than 0.7V, the input current must be limited to 25mA to protect the back-to-back input diodes. 2. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications VSUPPLY = ±15V, CL ≤ 50pF, RS ≤ 100Ω TEMP. (oC) MIN TYP MAX UNITS 25 - 30 100 µV Full - 70 300 µV Average Offset Voltage Drift Full - 0.4 1.8 µV/oC Bias Current 25 - 15 80 nA Full - 35 150 nA 25 - 12 75 nA Full - 30 135 nA Common Mode Range Full ±10.3 ±11.5 - V Differential Input Resistance (Note 3) 25 0.8 4 - MΩ PARAMETER TEST CONDITIONS INPUT CHARACTERISTICS Offset Voltage Offset Current Input Noise Voltage (Note 4) 0.1Hz to 10Hz 25 - 0.09 0.25 µVP-P Input Noise Voltage Density (Note 5) f = 10Hz 25 - 3.8 8.0 nV/√Hz f = 100Hz - 3.3 4.5 nV/√Hz f = 1000Hz - 3.2 3.8 nV/√Hz - 1.7 - pA/√Hz f = 100Hz - 1.0 - pA/√Hz f = 1000Hz - 0.4 0.6 pA/√Hz 25 10 - - V/V 25 700 1500 - V/mV Full 300 800 - V/mV Input Noise Current Density (Note 5) f = 10Hz 25 TRANSFER CHARACTERISTICS Minimum Stable Gain VOUT = ±10V, RL = 2kΩ Large Signal Voltage Gain Common Mode Rejection Ratio VCM = ±10V Full 100 120 - dB Gain-Bandwidth-Product f = 10kHz 25 120 140 - MHz - 120 - MHz f = 1MHz 2 HA-5147 Electrical Specifications VSUPPLY = ±15V, CL ≤ 50pF, RS ≤ 100Ω (Continued) PARAMETER TEMP. (oC) MIN TYP MAX UNITS RL = 600Ω 25 ±10.0 ±11.5 - V RL = 2kΩ Full ±11.4 ±13.5 - V 25 445 500 - kHz 25 - 70 - Ω 25 16.5 25 - mA 25 - 22 50 ns TEST CONDITIONS OUTPUT CHARACTERISTICS Output Voltage Swing Full Power Bandwidth (Note 6) Output Resistance Open Loop Output Current TRANSIENT RESPONSE (Note 7) Rise Time Slew Rate VOUT = ±3V 25 28 35 - V/µs Settling Time Note 8 25 - 400 - ns 25 - 20 40 % 25 - 3.5 - mA Full - - 4.0 mA Full - 16 51 µV/V Overshoot POWER SUPPLY CHARACTERISTICS Supply Current VS = ±4V to ±18V Power Supply Rejection Ratio NOTES: 3. This parameter value is based upon design calculations. 4. Refer to Typical Performance section of the data sheet. 5. The limits for this parameter are guaranteed based on lab characterization, and reflect lot-to-lot variation. Slew Rate 6. Full power bandwidth guaranteed based on slew rate measurement using: FPBW = ----------------------------- . 2πV PEAK 7. Refer to Test Circuits section of the data sheet. 8. Settling time is specified to 0.1% of final value for a 10V output step and AV = -10. 3 HA-5147 Test Circuits and Waveforms IN + OUT 1.8kΩ 50pF 200Ω FIGURE 1. LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUIT IN IN OUT OUT Vertical Scale: Input = 10mV/Div. Output = 100mV/Div. Horizontal Scale: 100ns/Div. Vertical Scale: Input = 0.5V/Div. Output = 5V/Div. Horizontal Scale: 500ns/Div. SMALL SIGNAL RESPONSE LARGE SIGNAL RESPONSE +15V 2N4416 500Ω TO OSCILLOSCOPE 5kΩ 2kΩ +15V + VOUT AUT - VIN 200Ω 50pF -15V 2kΩ NOTES: 9. AV = -10. 10. Feedback and summing resistors should be 0.1% matched. 11. Clipping diodes are optional. HP5082-2810 recommended. FIGURE 2. SETTLING TIME TEST CIRCUIT 4 Schematic Diagram 7 1 R25 R1 R16 R15 C7 8 BALANCE R2 QP32 QP37 R20 QP43 QP35 D1 QN45 R21 R17 QP38 QP44 QP55 5 C5 QN19 D8 QN46 C4 QN13 QP56 QN47 R1A QN51 R14 QN2 QN12 QP 27 R7 QP26 R3 QP16 QP26 6 OUTPUT QP36A D41 QP40 QN2A QN1A QN18 QN1 QN42 QN6 QN42A R5 R6 R8 R10 QN10 QN11 4 3 S S QN50 QN49 QN39 2 C3 QN5 QN48 QN25 D60 QP30 R19 R4 QN24 QN57 R13 D34 QN7 D23 D59 R12 R18 D22 Z58 QN20 D33 C2 R22 R23 R11 QP21 HA-5147 QP36 QN29 QP17 QN4 D54 D53 R9 R24 D9 QN15 C1 QN52 C6 QN3 QN14 R2A HA-5147 Application Information V+ RP 10K 8 1 7 - 2 NOTE: Tested Offset Adjustment Range is |VOS +1mV| minimum referred to output. Typical range is ±4mV with RP = 10kΩ. 6 + 5 3 4 FIGURE 3. SUGGESTED OFFSET VOLTAGE ADJUSTMENT CS R1 + - R2 R1 - R3 R2 + R3 CS NOTE: Low resistances are preferred for low noise applications as a 1kΩ resistor has 4nV/√Hz of thermal noise. Total resistances of greater than 10kΩ on either input can reduce stability. In most high resistance applications, a few picofarads of capacitance across the feedback resistor will improve stability. FIGURE 4. SUGGESTED STABILITY CIRCUITS TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified 12 30 VOLTAGE NOISE (nV/√Hz) OFFSET VOLTAGE (µV) 20 10 0 -10 -20 -30 -40 -60 -60 10 5 8 4 6 3 NOISE VOLTAGE 4 2 -50 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC) FIGURE 5. TYPICAL OFFSET VOLTAGE vs TEMPERATURE 6 6 VS = ±15V, TA = 25oC 0 NOISE CURRENT 1 10 100 1K 10K FREQUENCY (Hz) 100K FIGURE 6. NOISE CHARACTERISTICS 2 1 0 1M CURRENT NOISE (pA/√Hz) Typical Performance Curves HA-5147 Typical Performance Curves TA = 25oC VS = ±15V TA = 25oC 160 0.12 0.1 120 0.08 CMRR (dB) 0.06 0.04 80 40 0.02 0 4 6 8 10 12 14 16 18 0 10 20 100 1K 10K SUPPLY VOLTAGE (±V) FIGURE 7. NOISE vs SUPPLY VOLTAGE 0 1M 10M FIGURE 8. CMRR vs FREQUENCY 120 TA = 25oC 100 GAIN (dB) 20 40 PSRR (dB) 100K FREQUENCY (Hz) 60 80 GAIN 60 40 0 20 80 PHASE 0 90 100 120 180 10 100 1K 10K 100K 1M 100 1K 10K FREQUENCY (Hz) SLEW RATE NORMALIZED TO 1 AT 30oC AVOL (100kV/V) AND VOUT (V) 1.05 AVOL 15 14 13 VOUT 12 11 10 9 8 7 6 5 4 0 2 4 6 8 LOAD RESISTANCE (kΩ) FIGURE 11. AVOL AND VOUT vs LOAD RESISTANCE 7 10M 100M FIGURE 10. OPEN LOOP GAIN AND PHASE vs FREQUENCY TA = 25oC 16 1M FREQUENCY (Hz) FIGURE 9. PSRR vs FREQUENCY 17 100K PHASE (DEGREES) INPUT NOISE VOLTAGE (µVP-P) 0.14 TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified (Continued) 10 1.04 RL = 2K, CL = 50pF, TA = 25oC 1.03 1.02 1.01 1.0 0.99 0.98 0.97 0.96 0.95 -60 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (oC) FIGURE 12. NORMALIZED SLEW RATE vs TEMPERATURE HA-5147 Typical Performance Curves TA = 25oC, VSUPPLY = ±15V, Unless Otherwise Specified (Continued) 28 2.82 RL = 2K, CL = 50pF, TA = 25oC VO = 0V, VS = ±15V 24 OUTPUT VOLTAGE (VP-P) SUPPLY CURRENT (mA) 2.80 2.78 2.76 2.74 2.72 2.70 16 12 8 4 2.68 -55 25 125 TEMPERATURE (oC) 0 0.4 0.8 1.2 1.6 2 FREQUENCY (MHz) FIGURE 13. SUPPLY CURRENT vs TEMPERATURE FIGURE 14. VOUT MAX (UNDISTORTED SINEWAVE OUTPUT) vs FREQUENCY RL = 2K, CL = 50pF, TA = 25oC 40 30 GAIN 20 10 0 0 PHASE 90 180 1K 10K 100K 1M 10M PHASE (DEGREES) GAIN (dB) 20 100M FREQUENCY (Hz) FIGURE 15. CLOSED LOOP GAIN AND PHASE vs FREQUENCY 8 ACL = 25,000V/V; EN = 0.08µVP-P RTI Horizontal Scale = 1s/Div.; Vertical Scale = 0.002µV/Div. FIGURE 16. PEAK-TO-PEAK NOISE VOLTAGE (0.1Hz TO 10Hz) HA-5147 Die Characteristics DIE DIMENSIONS: PASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.) Silox Thickness: 12kÅ ±2kÅ Nitride Thickness: 3.5kÅ ±1.5kÅ 104 mils x 65 mils x 19 mils 2650µm x 1650µm x 483µm METALLIZATION: TRANSISTOR COUNT: Type: Al, 1% Cu Thickness: 16kÅ ±2kÅ 63 SUBSTRATE POTENTIAL (POWERED UP): PROCESS: V- Bipolar Dielectric Isolation Metallization Mask Layout HA-5147 BAL BAL -IN V+ +IN OUT V- 9 NC HA-5147 Ceramic Dual-In-Line Frit Seal Packages (CERDIP) 8 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE -D- -A- BASE METAL E M -Bbbb S C A-B S (c) Q -C- SEATING PLANE S1 b2 C A-B S eA/2 NOTES - 0.200 - 5.08 - 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 D - 0.405 - 10.29 5 E 0.220 0.310 5.59 7.87 5 c aaa M C A - B S D S D S MAX 0.014 eA e b MIN b α A A MILLIMETERS MAX A A L MIN M (b) SECTION A-A D S INCHES SYMBOL b1 D BASE PLANE ccc M F8.3A MIL-STD-1835 GDIP1-T8 (D-4, CONFIGURATION A) LEAD FINISH c1 NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer’s identification shall not be used as a pin one identification mark. e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC - eA/2 0.150 BSC 3.81 BSC - L 0.125 0.200 3.18 5.08 - Q 0.015 0.060 0.38 1.52 6 S1 0.005 - 0.13 - 7 105o 90o 105o - 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. α 90o aaa - 0.015 - 0.38 - 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. bbb - 0.030 - 0.76 - ccc - 0.010 - 0.25 - M - 0.0015 - 0.038 2, 3 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. N 8 8 5. This dimension allows for off-center lid, meniscus, and glass overrun. 8 Rev. 0 4/94 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10