ISL59420/21EVAL1 Evaluation Board User’s Guide ® Application Note August 10, 2005 AN1187.1 Introduction High Frequency Layout Considerations The ISL59420/21EVAL1 evaluation board contains all the circuitry needed to characterize critical performance parameters of the ISL59420, ISL59421 single 2:1 MUXamplifier, over a variety of applications. At frequencies of 500MHz and higher, circuit board layout may limit performance. The following layout guidelines are implemented on the evaluation board: The ISL59420, ISL59421 are single-output, gain-selectable 2:1 MUX-amps. The unity-gain bandwidths are 400MHz for the ISL59420 and 900MHz for the ISL59421. Each contain a common set of logic inputs for channel selection (S) threestate output control (HIZ) and an enable control input that powers down the device (EN). The evaluation board circuit and layout is optimized for either 50Ω or 75Ω terminations, and implements a basic single 2:1 video MUX-amp. The board is supplied with 75Ω input signal terminations and a 75Ω back-termination resistor on each of the 3 outputs, making it suitable for driving video cable. The user has the option of replacing the 75Ω resistors with 50Ω resistors for other applications. The control lines contain 50Ω resistors to match the 50Ω output impedance of high speed pulse generators. Control line termination resistors are recommended for rise and fall times under 10ns to minimize unwanted transients. If DC is used for the control logic, the resistors may be removed; or the applied DC voltage can be reduced to 2.5V to reduce the dissipation in the termination resistor. The layout contains component options to include an output series resistor (RS) followed by a parallel resistor (RL) capacitor (CL) network to ground. This option allows the user to select several different output configurations. Examples are shown in Figures 2A, 2B, and 2C. The evaluation board is supplied with the 75Ω back termination resistors shown in Figure 2C. • No series connected vias are used in signal I/O lines, as they can add unwanted inductance. • Signal trace lengths are minimized to reduce transmission line effects and the need for strip-line tuning of the signal traces. • High frequency decoupling caps are placed as close to the device power supply pin as possible - without series vias between the capacitor and the device pin. Power Sequencing Proper power supply sequencing is -V first, then +V. In addition, the +V and -V supply pin voltage rate-of-rise must be limited to ±1V/µs or less. The evaluation board contains parallel-connected low VON Schottky diodes on each supply terminal to minimize the risk of latch up due to incorrect sequencing. In addition, extra 10µF decoupling capacitors are added to each supply to aid in reducing the applied voltage rate-of-rise. Reference Documents • ISL59420 Data Sheet, FN7459 • ISL59421 Data Sheet, FN7458 S0 EN0 IN0 Amplifier Performance and Output Configurations DECODE EN1 The ISL59420, ISL59421 output amplifier is externally gainselectable with the non-inverting input directly coupled to the 2:1 MUX output. The inverting input is pinned out to the evaluation board. Resistor RF is set to the value shown in Figure 2D, and in conjunction with the amplifier internal capacitance, provides optimum frequency response with minimal gain peaking. The output amplifier is ideally suited for driving high impedance high speed selectable-gain buffers when gain compensation is needed. GBW decreases slightly at the lower output load impedances typical of backterminated cable driving applications. Reference data sheets for additional performance data. 1 • Signal I/O lines are the same lengths and widths to match propagation delay and trace parasitics. IN1 + OUT AMPLIFIER BIAS HIZ ENABLE FIGURE 1. ISL59420, ISL59421 FUNCTIONAL BLOCK CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1187 TABLE 1. LOGIC TABLE S HIZ ENABLE OUT 0 0 0 IN0 1 0 0 IN1 - - 1 Power-down - 1 - High Z VIN 50Ω OR 75Ω VIN RS, 0Ω + - *Cb1 ~0.5pF RF *Cb2 ~3pF CL 1.5pF RL 500Ω * Cb1, Cb2 are approximate PCB trace capacitances. TEST EQUIPMENT ISL59420, ISL59421 50Ω OR 75Ω + RF RS 50Ω OR 75Ω Cb1 ~0.5pF 50Ω OR 75Ω + RF RS 475Ω Cb1 RL ~0.5pF 50Ω OR 75Ω 50Ω OR 75Ω * Cb1 is approximate PCB trace capacitance. FIGURE 2A. TEST CIRCUIT WITH OPTIMAL OUTPUT LOAD VIN TEST EQUIPMENT ISL59420, ISL59421 ISL59420, ISL59421 50Ω OR 75Ω FIGURE 2B. TEST CIRCUIT FOR 50Ω OR 75Ω TERMINATIONS PART # RF VALUE ISL59420 200Ω ISL59421 357Ω * Cb1 is approximate PCB trace capacitance. FIGURE 2C. BACK-TERMINATED TEST CIRCUIT FOR CABLE APPLICATION FIGURE 2D. RF TABLE FOR FIGURE 2 CIRCUITS ISL59420/21EVAL1 Top View 2 AN1187.1 August 10, 2005 Application Note 1187 ISL59420/21EVAL1 Schematic Diagram S 1S JSO R19 49.9Ω IN0 R8-75Ω EN JSO IN1 R14-49.9Ω RF ISL59420 ISL59421 2 GND IN- 10 OUT OUT 9 3 IN0 V+ 8 4 EN V- 7 5 IN1 HIZ 6 R9-75Ω RS - 75Ω R22 C11 JHIZ HIZ R12 - 49.9Ω D1 C2 C1 C3 10µF 0.1µF 10nF C7 1nF + D2 GND. V- + C8 C5 C4 C6 10µF 0.1µF 10nF 1nF V+ ISL59420/21EVAL1 Components Parts List DEVICE # DESCRIPTION COMMENTS C7, C8 CAP, SMD, 0603, 1000pF, 25V, 10%, X7R Power Supply Decoupling C1, C4 CAP, SMD, 0603, 0.01µF, 25V, 10%, X7R Power Supply Decoupling C2, C5 CAP, SMD, 0603, 0.1µF, 25V, 10%, X7R Power Supply Decoupling C3, C6 CAP, SMD, 0805, 10µF, 6.3V, 10%, X5R Power Supply Decoupling D1, D2 Diode-Schottky, 2 Pin, 45V, 7.5A MBR0550T (Motorola) Reverse Polarity Protection Resistor, SMD, 0603, 75Ω, 1/10W, 1% Signal Input/output Termination R12, R14, R19 Resistor, SMD, 0603, 49.9Ω, 1/16W, 1% Logic Input Termination RF - ISL59420 Resistor, SMD, 0603, 200Ω, 1/10W, 1% Feedback Resistor RF - ISL59421 Resistor, SMD, 0603, 357Ω, 1/10W, 1% Feedback Resistor C11 CAP, SMD, 0603 Optional, not populated R22 Resistor, SMD, 0603 Optional, not populated U1 ISL59420/21 - 400/900 MHz Multiplexing Amplifier, 10PIN, QSOP Device Under Test R8, R9, RS Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 3 AN1187.1 August 10, 2005