ISL59424EVAL1 Evaluation Board User’s Guide ® Application Note April 19, 2005 AN1183.0 Introduction High Frequency Layout Considerations The ISL59424EVAL1 evaluation board contains all the circuitry needed to measure critical performance parameters of the ISL59424 1GHz triple 2:1 MUX-amplifier, over a variety of applications. At frequencies of 500MHz and higher, circuit board layout may limit performance. The following layout guidelines are implemented on the evaluation board: The ISL59424 contains 3 separate 2:1 multiplexers, each followed by a unity gain buffer controlled by common set of logic inputs (Figure 1, Table 1). Control features include a high speed (20ns) HIZ output control for individual selection of MUX amps that share a common video output line. A control logic latch (LE) enables multiple devices to share a common input control logic bus. The ENABLE control can be used to save power by powering the device down. The evaluation board circuit and layout is optimized for either 50Ω or 75Ω terminations, and implements a basic triple 2:1 video MUX-amp. The board is supplied with 75Ω input signal terminations and a 75Ω back-termination resistor on each of the 3 outputs, making it suitable for driving video cable. The user has the option of replacing the 75Ω resistors with 50Ω resistors for other applications. The control lines contain 50Ω resistors to match the 50Ω output impedance of high speed pulse generators. Control line termination resistors are recommended for rise and fall times under 10ns to minimize unwanted transients. If DC is used for the control logic, the resistors may be removed; or the applied DC voltage can be reduced to 2.5V to reduce the dissipation in the termination resistor. The layout contains component options to include an output series resistor (RS) followed by a parallel resistor (RL) capacitor (CL) network to ground. This option allows the user to select several different output configurations. Examples are shown in Figures 2A, 2B, and 2C. The evaluation board is supplied with the 75Ω back termination resistors shown in Figure 2C. Amplifier Performance and Output Configurations • No series connected vias are used in signal I/O lines, as they can add unwanted inductance. • Signal trace lengths are minimized to reduce transmission line effects and the need for strip-line tuning of the signal traces. • High frequency decoupling caps are placed as close to the device power supply pin as possible - without series vias between the capacitor and the device pin. Power Sequencing Proper power supply sequencing is -V first, then +V. In addition, the +V and -V supply pin voltage rate-of-rise must be limited to ±1V/µs or less. The evaluation board contains parallel-connected low VON Schottky diodes on each supply terminal to minimize the risk of latch up due to incorrect sequencing. In addition, extra 10µF decoupling capacitors are added to each supply to aid in reducing the applied voltage rate-of-rise. Reference Documents • ISL59424 Data Sheet, FN7456 S EN0 DECODE EN1 DL Q C DL Q C OUTA,B,C IN0(A,B,C) IN1(A,B,C) AMPLIFIER BIAS LE The ISL59424 output amplifiers are designed for maximum gain-bandwidth performance when loaded with ~500Ω (RL) in parallel with ~5pF (CL) to ground, directly at the output pin (Figure 2A). They are ideally suited for driving high impedance high speed selectable-gain buffers when gain compensation is needed. In these applications, output trace capacitance to 5pF actually optimizes AC performance. For trace capacitance below 5pF, an additional capacitor between the output pin to ground may be added to achieve the 5pF optimum. GBW decreases slightly at the lower output load impedances typical of back-terminated cable driving applications. Reference the data sheet for additional performance data. 1 • Signal I/O lines are the same lengths and widths to match propagation delay and trace parasitics. HIZ ENABLE A logic high on LE will latch the last S state. This logic state is preserved when cycling HIZ or ENABLE functions. FIGURE 1. ISL59424 FUNCTIONAL BLOCK DIAGRAM CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1183 TABLE 1. LOGIC TABLE ISL59424 VIN 50Ω OR 75Ω +1 S HIZ ENABLE LE OUT 0 0 0 0 IN0A,B,C 1 0 0 0 IN1A,B,C - - 1 - Power down - 1 0 - High Z - - - 1 Last S Selection TEST EQUIPMENT ISL59424 RS, 0Ω VIN *Cb2 ~3pF *Cb1 ~0.5pF RL 500Ω * Cb1, Cb2 are approximate PCB trace capacitances. ISL59424 50Ω OR 75Ω 475Ω Cb1 RL ~0.5pF 50Ω OR 75Ω 50Ω OR 75Ω * Cb1 is approximate PCB trace capacitance. FIGURE 2A. TEST CIRCUIT WITH OPTIMAL OUTPUT LOAD VIN +1 50Ω OR 75Ω CL 1.5pF RS +1 FIGURE 2B. TEST CIRCUIT FOR 50Ω OR 75Ω TERMINATIONS RS 50Ω OR 75Ω Cb1 ~0.5pF TEST EQUIPMENT 50Ω OR 75Ω * Cb1 is approximate PCB trace capacitance. FIGURE 2C. BACK-TERMINATED TEST CIRCUIT FOR CABLE APPLICATION ISL59424EVAL1 Top View 2 AN1183.0 April 19, 2005 Application Note 1183 ISL59424EVAL1 Schematic Diagram ISL59424 1 IN0B IN0B R2 75Ω IN0C R10 75Ω IN1A R11 75Ω GNDA 24 2 NIC IN0A 23 3 IN0C NIC 22 4 GNDB NIC 21 5 IN1A HIZ 20 R1 75Ω IN1C R3 75Ω JLEBAR LEBAR JHIZ HIZ R12 - 49.9Ω ENABLE 19 6 GNDC 7 IN1B IN1B IN0A R9 75Ω ENBAR RSA - 75Ω R14 - 49.9Ω OUTA 18 8 NIC JENBAR C11 V+ 17 R22 RSB - 75Ω 9 IN1C OUTB 16 10 NIC V- 15 OUTA C10 OUTC R21 RSC - 75Ω 11 NIC OUTC 14 12 LE S 13 C9 S R6 - 49.9Ω R19 49.9Ω D1 C7 C2 C1 C3 10µF 0.1µF 10nF 1nF D2 GND V- OUTC R20 JSO + C8 C4 C6 C5 10µF 0.1µF 10nF 1nF V+ ISL59424EVAL1 Components Parts List DEVICE # DESCRIPTION COMMENTS C7,C8 CAP, SMD, 0603, 1000pF, 25V, 10%, X7R Power Supply Decoupling C1,C4 CAP, SMD, 0603, 0.01µF, 25V, 10%, X7R Power Supply Decoupling C2,C5 CAP, SMD, 0603, 0.1µF, 25V, 10%, X7R Power Supply Decoupling C3,C6 CAP, SMD, 0805, 10µF, 6.3V, 10%, X5R Power Supply Decoupling D1,D2 Diode-Schottky, 2 Pin, 45V, 7.5A MBR0550T (Motorola) Reverse Polarity Protection Resistor, SMD, 0603, 75Ω, 1/10W, 1%, Signal Input/output Termination Resistor, SMD, 0603, 49.9Ω, 1/16W, 1%, Logic Input Termination C9, C10, C11 Capacitor, SMD, 0603 Optional, not populated R20, R21, R22 Resistor, SMD, 0603 Optional, not populated ISL59424IU - 1GHz Multiplexing Amplifier, 24P, QFN Device Under Test R1-R3, R9-R11, RSA, RSB, RSC R6, R12, R14, R19, U1 Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 3 AN1183.0 April 19, 2005