isl54405eval3z user guide

User Guide 002
ISL54405EVAL3Z Evaluation Board User Guide
Description
switches to allow the user to easily interface with the IC to
evaluate its functions, features, and performance in the
various modes of operation.
The ISL54405EVAL3Z evaluation board is designed to provide
a quick and easy method for evaluating the ISL54405 Stereo
2:1 Multiplexer IC.
This application note will guide the user through the process of
configuring and using the evaluation board to evaluate the
ISL54405 device.
The ISL54405 device is a unique IC. To use this evaluation
board properly requires a thorough knowledge of the operation
of the IC. Refer to the ISL54405 datasheet for an
understanding of the functions and features of the device.
Studying the device’s truth table along with its pinout and
block diagram on pages 1, 2 and 3 of the datasheet is the best
way to get a quick understanding of how the part works.
Key Features
• RCA audio female jacks and BNC connectors
• Selectable 32Ω and 20kΩ resistor loads on the signal lines
• Convenient test points and connections for test equipment
A picture of the main evaluation board is shown in Figure 4.
The ISL54405 uTQFN IC is soldered onto the evaluation board.
It is located in the center of the board and is designated as U1.
• Toggle switches for easy control of MUTE and SEL logic pins
The ISL54405 IC is a single supply, bidirectional, dual
single-pole/double-throw (SPDT) analog switch designed to
function as a differential 2:1 multiplexer. It was designed for
consumer and professional audio switching applications
such as Computer Sound Cards and Home Theater products.
It can be used to route a single stereo source to different
line outs/loads (Figure 3) or to multiplex two stereo sources to
a single load (Figure 1).
References
• Banana jacks for power, ground and logic control
ISL54405 datasheet
TB494 Technical Brief “Intersil ISL54405 Hi-Fidelity Stereo 2:1
Multiplexer with Click and Pop Elimination”
Ordering Information
PART NUMBER
The part has various configurations of operation. The
evaluation board contains standard jumpers, RCA connectors,
BNC connectors, banana connectors, load resistors, and toggle
ISL54405EVAL3Z
DESCRIPTION
ISL54405 Evaluation Board
DC POWER
SUPPLY
+3.3V
-
5V_Supply
J4
+
VDD
GND
J3
J2
J23
J1
J13
AC/DC
J6
R16
J27
J7 R3
R
J9
J28
R4
R18
SEL
H
S1
R19 L
J5
DIR_SEL
MUTE
H
S2
L
J26
J25
J10
SEL
L
J14
J15
U1
R14
R12
J11
J20
MUTE
V Logic
R8
L2
R
AUDIO
DRIVER
#1
R15
J21
J24
L1
R17
J22
L
J8
J12
J16
J17
R13
J29
R9
R1
L
AUDIO
R
DRIVER
#2
J18
J19
R2
ISL54405EVAL3Z EVALUATION BOARD
FIGURE 1. ISL54405EVAL3Z MULTIPLEXING TWO STEREO SOURCES TO A SINGLE SPEAKER LOAD
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
User Guide 002
Functional Description
The ISL54405EVAL3Z Evaluation Board provides a simple
platform to demonstrate the features and evaluate the
performance of the ISL54405 IC. It provides easy access to the
pins of the ISL54405 and convenient connectors/test points for
connecting test equipment. The schematic, bill of materials and
top silkscreen for the board are available on pages 8 through 10.
Figures 6 through 13 show performance data taken using the
evaluation board and an Audio Precision Dual Domain System
Two Cascade Plus (SYS-2722) Generator/Analyzer. A video using
this test equipment with the ISL54405 evaluation board is
available at: ISL54405 Video.
The sections that follow will discuss using the evaluation board.
Basic Layout of Evaluation Board
The basic layout of the evaluation board is as follows: Refer to
Figure 5 or the actual ISL54405EVAL3Z Rev A evaluation board.
Located in the center of the board is the ISL54405 IC (U1). The
evaluation board has a pin 1 dot, to show how the IC should be
oriented onto the evaluation board. The IC pin 1 indicator dot
needs to be aligned with the evaluation board pin 1 dot indicator.
The board comes with the IC soldered onto it.
Power for the IC is located at the top of the board through
banana jacks J1 (VDD), J2 (GND), and J3 (5V_SUPPLY). A DC
voltage source must be connected between either VDD and GND
or 5V_SUPPLY and GND to power the part. For 3.3V operation,
connect to the J1 (VDD) jack and leave J3 (5V_SUPPLY) floating.
For 5V operation, connect to the J3 (5V_SUPPLY) jack and leave
J1 (VDD) floating.
Access to the L and R COM side of the switch are through either
the RCA female jacks J7 (L) and J9 (R) or BNC connectors J6 (L)
and J8 (R) located on the left side of the board. The connectors J6
and J7 are connected in parallel and connectors J8 and J9 are
connected in parallel.
Access to the L1, R1, L2, and R2 side of the switch is through
either the RCA female jacks J13 (L1), J15 (L2), J17 (R1), and J19
(R2) or BNC connectors J12 (L1), J14 (L2), J16 (R1) and J18 (R2)
located on the right side of the board. Note: The connectors J12
and J13 are connected in parallel, connectors J14 and J15 are
connected in parallel, connectors J16 and J17 are connected in
parallel, and connectors J18 and J19 are connected in parallel.
Logic control for the AC/DC and DIR_SEL logic pins of the IC are
through banana jacks J4 (AC/DC) and J5 (DIR_SEL). Logic control
for the SEL pin is through either the banana jack J10 (SEL) or the
toggle switch S1 (SEL). Logic control of the MUTE pin is through
either the banana jack J11 (MUTE) or the toggle switch S2 (MUTE).
For convenience, each of the COM I/O traces (L and R) and the
signal pin I/O traces (L1, R1, L2, and R2) have selectable 32Ω or
20kΩ load resistors to ground. Either the 32Ω resistor or 20kΩ
resistor can be connected to a trace by installing the appropriate
jumper. No jumper would be installed if a resistor is not required
as in the case when you would be connecting an actual speaker to
the evaluation board. See the board schematic “ISL54405EVAL3Z
Circuit Schematic” for the reference designators of the jumpers
and resistors associated with each I/O.
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In addition to the jumper selectable load resistors described in
the previous paragraph, each of the traces also has a series
resistor in each line (R1 at L, R2 at R, R6 at R2, R7 at R1, R10 at
L1, and R11 at L2). These resistors come populated with a 0Ω
resistor. These 0Ω resistors can be changed out with other value
resistors or a capacitor if evaluating an AC coupled configuration.
Power Supply
The ISL54405 IC requires either a 3.3V or 5V DC power supply for
proper operation.
For 3.3V operation, the power supply is connected at banana
jacks J1 (VDD) and J2 (GND). The power supply should be capable
of delivering 500µA of current. Nothing should be connected at
banana jack J3 (5V_SUPPLY).
For 5V operation, the power supply is connected at banana jacks
J3 (5V_SUPPLY) and J2 (GND). The power supply should be
capable of delivering 500µA of current. Nothing should be
connected at banana jack J1 (VDD).
Evaluation Board Logic Control
The ISL54405 IC has four logic control pins; the AC/DC, DIR_SEL,
MUTE, and SEL. The MUTE and SEL control pins determine the
state of the switches. The AC/DC and DIR_SEL control pins
determine the location of the ancillary 40Ω shunt resistors and if
they are active or not. See the Truth Table on page 3 of the
ISL54405 datasheet.
The ISL54405 logic is 1.8V CMOS compatible (Low ≤ 0.5V and
High ≥ 1.4V) over a supply range of 3.0V to 3.6V at the VDD pin or
4.5V to 5.5V at the 5V_SUPPLY pin. This allows control by a 1.8V
or a 3V microcontroller.
Access to the AC/DC and DIR_SEL pins are through banana jacks
J4 (AC/DC) and J5 (DIR_SEL) respectively. These pins should be
driven HIGH or LOW by a microcontroller or permanently tied
HIGH or LOW depending on the configuration and functionality
that you are evaluating. The banana jacks allow the user to use
standard Pomona banana plug cables to quickly connect these
logic pins to ground or VDD to evaluate the various configurations
of the ISL54405 part.
Access to the MUTE pin is through the banana jack J11 (MUTE) or
the toggle switch S2 (MUTE). A jumper needs to be installed at
jumper J26 to use the toggle switch.
Access to the SEL pin is through the banana jack J10 (SEL) or the
toggle switch S1 (SEL). A jumper needs to be installed at jumper
J25 to use the toggle switch.
The voltage connected at the high position (H) of the S1 and S2
toggle switches is determined by a jumper connected at jumper
J24. To connect it to VDD, install a jumper at J24 position 2-3. To
connect it to the J20 (VLOGIC) banana jack, install a jumper at
J24 position 2-1. The VLOGIC jack is used whenever you want to
use the toggle switches but have the control voltage at a different
voltage than VDD. For example, VDD at 3.3V and VLOGIC high at
1.8V.
To control the MUTE and SEL from a microcontroller or external
logic source you would remove the J25 and /or J26 jumpers and
connected the logic controller at banana jacks J10 and/or J11.
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User Guide 002
SEL, MUTE CONTROL PINS
Audio COM Pins (L and R)
The state of the ISL54405 device is determined by the voltage at
the MUTE pin and the SEL pin. When MUTE is HIGH all channels
of the ISL54405 multiplexer are OFF. When MUTE is LOW then
the logic level at the SEL pin will determine which differential
channels are ON. If SEL = LOW; L1/R1 are ON. If SEL = HIGH;
L2/R2 are ON.
The evaluation board has two audio RCA female jacks labeled
L (J7) and R (J9), which give you access to the COM pins of the
ISL54405 IC. Each of these jacks have a BNC connector (J6 and
J8, respectively) wired in parallel with the RCA jack.
The MUTE has an internal pull-up resistor to the internal 3.3V
supply rail and can be driven high or tri-stated (floated) by a
microcontroller.
These pins are 1.8V logic compatible. When powering the part by
the VDD pin, the logic voltage can be as high as the VDD voltage,
which is typically 3.3V. When powering the part by the
5V_SUPPLY pin, the logic voltage can be as high as the
5V_SUPPLY voltage, which is typically 5V.
The RCA jacks allow easy connection of a stereo speaker or a
stereo audio source/generator. The BNC connectors allow easy
connection of audio measurement and test equipment.
Audio Signal Pins (L1, L2, R1, R2)
The evaluation board has RCA type connectors wired in parallel
with BNC connectors which give access to the signal pins (L1, R1,
L2, R2) of the IC.
Logic Levels:
MUTE = Logic “0” (Low) when ≤ 0.5V
MUTE = Logic “1” (High) when ≥ 1.4V or floating
SEL = Logic “0” (Low) when ≤ 0.5V
SEL = Logic “1” (High) when ≥ 1.4V
You can connect an audio source/generator or speaker/
amplifier load at these connectors. For example, Figure 1 shows
two stereo sources connected at the signal pins (audio source 1
connected at L1 and R1; audio source 2 connected at L2 and
R2). A stereo speaker set is connected at the COM pins (L and R).
In this application the ISL54405 is used to multiplex two stereo
audio sources to a single stereo speaker load.
AC/DC AND DIR_SEL CONTROL PINS
Applications
The ISL54405 contains ancillary 40Ω shunt circuitry on its COM
pins (L, R) and on its signal pins (L1, R1, L2, R2) that can be used
for click/pop elimination in certain applications and used to get
superior muting when connected to high impedance receiver
loads (10kΩ - 20kΩ).
The ISL54405 was designed primarily for consumer and
professional audio switching applications such as computer
sound cards and home theater products. In a typical sound card
application the ISL54405 is used for the following applications:
The activation of this circuitry and whether it is located on the
COM or signal side of the switch is determined by the logic levels
applied at the AC/DC and DIR_SEL pins. The DIR_SEL control pin
is only active when AC/DC is logic “1”.
Note: An active shunt is only connected (ON) when the SPDT
switch cell it is connected to is OFF. When in the MUTE state
(MUTE = Logic “1”) all activated shunts are ON.
When AC/DC is logic “0”, all of the shunt circuitry on both sides of
the switch are deactivated and not operable.
When AC/DC is logic “1”, then the DIR_SEL logic level determines
whether the shunt circuitry will be activated on the COM side
of the switch or on the signal side of the switch. When
DIR_SEL = Logic “1”, the shunts on the COM side (L, R) are
activated and inoperable on the signal side (L1, R1, L2, R2) of
the switch. When DIR_SEL = Logic “0” the shunts are activated
on the signal side (L1, R1, L2, R2) and inoperable on the COM
side (L, R).
Logic Levels:
AC/DC, DIR_SEL = Logic “0” (Low) when ≤ 0.5V
AC/DC, DIR_SEL = Logic “1” (High) when ≥ 1.4V or floating.
The AC/DC and DIR_SEL have internal pull-up resistors to the
internal 3.3V supply rail and can be driven HIGH or tri-stated
(floated) by the microcontroller. They should be driven to ground
for a logic “0” (LOW). Note: For 5V applications the AC/DC and
DIR_SEL pins should never be driven to the external 5V rail. They
need to be driven with 1.8V logic or 3V logic circuit.
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• To route a single stereo source to either the front or back line
outs of the computer sound card.
• To multiplex two stereo sources to a single line out of the
computer sound card.
Test Points
The board has various test points for ease of connecting probes
to make measurements. The test points available are described
in Table 1.
TABLE 1.
DESIGNATOR
DESCRIPTION
TP1
VDD test point
TP2
Ground test point
TP3
5V_SUPPLY test point
TP4
L test point
TP5
R test point
TP6
SEL logic input test point
TP7
MUTE logic input test point
TP8
L1 test point
TP9
L2 test point
TP10
R1 test point
TP11
R2 test point
TP12
DIR_SEL logic input test point
TP13
AC/DC logic input test point
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User Guide 002
Board Component Definitions
DESIGNATOR
DESCRIPTION
U1
ISL54405 uTQFN IC
J1
VDD power supply connection (3.3VDC)
J2
Ground connection
J3
5V_SUPPLY power supply connection (5VDC)
J4
AC/DC logic input
J5
DIR_SEL logic input
J6, J7
L common side I/O
J8, J9
R common side I/O
J10
SEL logic input
J11
MUTE logic input
J12, J13
L1 signal side I/O
J14, J15
L2 signal side I/O
J16, J17
R1 signal side I/O
J18, J19
R2 signal side I/O
J20
External logic DC voltage for MUTE and SEL
J21
Load jumper for R1 (Position 1-2 for 20kΩ, Position 2-3 for 32Ω)
J22
Load jumper for L2 (Position 1-2 for 20kΩ, Position 2-3 for 32Ω)
J23
Load jumper for L1 (Position 1-2 for 20kΩ, Position 2-3 for 32Ω)
J27
Load jumper for L COM (Position 1-2 for 20kΩ, Position 2-3 for 32Ω)
J28
Load jumper for R COM (Position 1-2 for 20kΩ, Position 2-3 for 32Ω)
J29
Load jumper for R2 (Position 1-2 for 20kΩ, Position 2-3 for 32Ω)
J24
S1 and S2 voltage jumper, (Position 1-2 voltage at J20, Position 2-3 connect to VDD
J25
SEL jumper (install jumper to use S1 switch)
J26
MUTE jumper (install jumper to use S2 switch)
S1
SEL switch
S2
MUTE switch
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DC POWER
SUPPLY
+3.3V
-
5V_Supply
AC/DC
+
GND
J3
VDD
J2
J23
J1
J13
J4
J6
R16
J27
J7 R3
R
J9
J28
R4
R18
SEL
H
S1
R19 L
J10
SEL
J14
J24
R12
J11
J20
MUTE
V Logic
R8
L2
R
DRIVER
#1
R15
J21
J26
J25
J5
DIR_SEL
R14
MUTE
H
S2
L
AUDIO
L
J15
U1
L1
R17
J22
L
J8
J12
J16
J17
R13
J29
R9
R1
L
AUDIO
R
DRIVER
#2
J18
J19
R2
ISL54405EVAL3Z EVALUATION BOARD
FIGURE 2. BASIC EVALUATION TEST SETUP BLOCK DIAGRAM (Multiplexing Two Stereo Sources to One Speaker)
Using the Board to Multiplex
Between Two Audio Sources
Refer to Figure 2.
Lab Equipment
The equipment, external supplies and signal sources needed to
operate the board are:
1. 3.3V DC power supply.
2. Two stereo audio sources or audio signal generators.
3. Set of stereo speakers or use on board resistor loads.
Initial Board Setup Procedure
1. Attach the main evaluation board to the DC power supply at
J1 (VDD) and J2 (GND). Positive terminal at J1 and negative
terminal at J2. The supply should be capable of delivering
3.0V to 5V and 1mA of current. Set the supply voltage to 3.3V.
2. Configure the board to use the S1 (SEL) and S2 (MUTE) toggle
switches by installing jumpers at J25, J26 and J24 at location
2-3. In this configuration, when a toggle switch is in L position,
the logic pin will be driven to ground. When its in the H
position, the logic pin will be driven to the VDD voltage of 3.3V.
3. Disable all ancillary 40Ω shunt resistors by connecting J4
(AC/DC) and J5 (DIR_SEL) to J2 (GND).
4. Put the S2 (MUTE) toggle switch in the “H” position. This will
put the IC into the mute state.
5. Put the S1 (SEL) toggle switch in the “L” position.
6. Connect the audio source 1 left channel to the J13 (L1) RCA
connector or the J12 (L1) BNC connector and the right
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channel to the J17 (R1) RCA connector or J16 (R1) BNC
connector.
7. Connect the audio source 2 left channel to the J15 (L2) RCA
connector or the J14 (L2) BNC connector and the right
channel to the J19 (R2) RCA connector or J18 (R2) BNC
connector.
8. Connect one speaker to the J7 (L) RCA connector or the J6 (L)
BNC connector and the other speaker to the J9 (R) RCA
connector or J8 (R) BNC connector.
Audio Mute and Playback Operation
1. Verify that the toggle switch S2 (MUTE) is in the “H” position.
All switches will be off.
2. Turn audio driver #1 on.
3. Turn audio driver #2 on.
4. Put the S1 (SEL) toggle switch in the “L” position.
5. Take the S2 (MUTE) toggle switch to the “L” position.
6. The audio signal from driver #1 should be heard in the
speakers.
7. Take the S2 (MUTE) toggle switch to the “H” position. Audio
sources will be muted.
8. Put the S1 (SEL) toggle switch in the “H” position.
9. Take the S2 (MUTE) toggle switch to the “L” position.
10. The audio signal from driver #2 should be heard in the
speakers.
11. Toggle the S1 (SEL) switch to the “L” position to play source
#1. Toggle it back to the “H” position to play source #2.
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DC POWER
SUPPLY
+3.3V
-
+
5V_Supply GND
AC/DC
VDD
J3
J2
J23
J1
J13
J4
R16
J27
J6
J7 R3
Audio
Driver
L
J28
J8
R
R
J9
R4
R18
SEL
H
S1
R19 L
MUTE
H
S2
L
J26
J25
J10
J5
DIR_SEL
SEL
L
R14
R12
J11
J20
MUTE
V Logic
R8
L2
L
R15
J21
J24
#2
J14
J15
U1
L1
R17
J22
L
#1
J12
J16
J17
R13
J29
R9
R1
R
J18
J19
R2
R
ISL54405EVAL3Z EVALUATION BOARD
FIGURE 3. BASIC EVALUATION TEST SETUP BLOCK DIAGRAM (Multiplex One Stereo Source to Two Stereo Speakers)
Using the Board to Multiplex
Between Two Stereo Speakers
6. Connect the audio source left channel to the J7 (L) RCA
connector or the J6 (L) BNC connector and the right channel
to the J9 (R) RCA connector or J8 (R) BNC connector.
7. Connect one stereo speaker to the J13 (L1) RCA connector or
the J12 (L1) BNC connector and the right channel to the J17
(R1) RCA connector or J16 (R1) BNC connector.
Refer to Figure 3.
Lab Equipment
The equipment, external supplies and signal sources needed to
operate the board are listed below:
1. 3.3V DC power supply.
2. Stereo Audio source or audio signal generator.
3. Two sets of stereo speakers or use on board resistor loads.
Initial Board Setup Procedure
1. Attach the main evaluation board to the DC power supply at
J1 (VDD) and J2 (GND). Positive terminal at J1 and negative
terminal at J2. The supply should be capable of delivering
3.0V to 5V and 1mA of current. Set the supply voltage to 3.3V.
2. Configure the board to use the S1 (SEL) and S2 (MUTE) toggle
switches by installing jumpers at J25, J26 and J24 at location
2-3. In this configuration, when a toggle switch is in L position,
the logic pin will be driven to ground. When its in the H
position, the logic pin will be driven to the VDD voltage of 3.3V.
3. Disable all ancillary 40Ω shunt resistors by connecting J4
(AC/DC) and J5 (DIR_SEL) to J2 (GND).
4. Put the S2 (MUTE) toggle switch in the “H” position. This will
put the IC in to the mute state.
8. Connect the other stereo speaker to the J15 (L2) RCA
connector or the J14(L2) BNC connector and the other speaker
to the J19 (R2) RCA connector or J18 (R2) BNC connector.
Audio Mute and Playback Operation
1. Verify that the toggle switch S2 (MUTE) is in the “H” position.
All switches will be off.
2. Turn the audio driver on.
3. Put the S1 (SEL) toggle switch in the “L” position.
4. Take the S2 (MUTE) toggle switch to the “L” position.
5. The audio signal from driver should be heard in the speaker
connected at L1 and R1.
6. Take the S2 (MUTE) toggle switch to the “H” position. Audio
source will be muted.
7. Put the S1 (SEL) toggle switch in the “H” position.
8. Take the S2 (MUTE) toggle switch to the “L” position.
9. The audio signal from driver should be heard in the speaker
connected at L2 and R2.
10. Toggle the S1 (SEL) switch to route the audio signal between
the two stereo speakers.
5. Put the S1 (SEL) toggle switch in the “L” position.
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ISL54405EVAL3Z Evaluation Board
FIGURE 4. TOP SIDE
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ISL54405EVAL3Z Circuit Schematic
DIR_SEL
AC/DC
J5
5V_SU
J4
TP12
PPLY
J3
TP13
1
8
TP3
TP4
VDD
GND
J2
J1
C1
C5
10µF
C2
10µF
C6
0.1µF
C3
0.1µF
C7
0.01µF
R10
VDD
J12
0
L1
A
J13
TP1
0.01µF
TP2
A
R1
J6
C4
J14
0
0.1µF
J27
16 15 14 13
1
2
3
4
TP5
A
A
0
12
11
10
9
U1
UT QFN16
A
J16
TP10
5 6 7 8
J8
J15
TP9
R2
0
L2
A
R7
R1
0
A
J17
32.4
V LOGIC
A
J24
J29
J25
S1
SEL
SEL
H
L
J26
S2
MUTE
J22
J21
J23
J18
0
32.4
R17
20k
R16
32.4
20k
R15
R14
32.4
R13
20k
R12
32.4
R9
R8
0
R5
A
R2
A
J19
H
A
L
J11
MUTE
R6
TP7
TP6
J10
A
VDD
J20
A
J9
TP11
A
20k
R19
R
20k
R4
J28
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A
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J7
R11
TP8
A
32.4
R18
20k
A
R3
L
A
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ISL54405EVAL3Z Bill of Materials (Revision A)
QTY UNITS
1
ea
2
ea
3
REFERENCE
DESIGNATOR
DESCRIPTION
MFR
MANUFACTURER’s
PART NUMBER
PWB-PCB, ISL54405EVAL3Z, Rev A, uTQFN, ROHS
IMAGINEERING ISL54405EVAL3ZREVAPCB
INC
C3, C7
CAP, SMD, 0805, 0.01µF, 50V, 10%, X7R, ROHS
KEMET
C0805C103K5RACTU
ea
C2, C4, C6
CAP, SMD, 0805, 0.1µF, 50V, 10%, X7R, ROHS
KEMET
C0805C104K5RACTU
2
ea
C1, C5
CAP, SMD, 1210, 10µF, 25V, 10%, X7R, ROHS
AVX
12103C106KAT2A
8
ea
J1-J5, J10, J11, J20 CONN - JACK, BANANA - SS - SDRLESS, VERTICAL, ROHS
JOHNSON
108-0740-001
COMPONENTS
6
ea
J6, J8, J12, J14, J16, CONN - BNC, RECEPTACLE, TH, 4 POST, 50Ω, GOLDCONTACT, ROHS
J18
AMPHENOL
31-5329-52RFX
3
ea
TP1, TP3, TP12
CONN-MINI TEST PT, VERTICAL, RED, ROHS
KEYSTONE
5000
2
ea
TP2, TP13
CONN-MINI TEST PT, VERTICAL, BLK, ROHS
KEYSTONE
5001
8
ea
TP4-TP11
CONN-MINI TEST PT, VERTICAL, WHITE, ROHS
KEYSTONE
5002
7
ea
J21-J24, J27-J29
CONN-HEADER, 1X3, BREAKAWY 1X36, 2.54mm, ROHS
BERG/FCI
68000-236HFL
2
ea
J25, J26
CONN-HEADER, 1X2, RETENTIVE, 2.54mm, 0.230X0.120, ROHS
BERG/FCI
69190-202HLF
6
ea
CUI, INC
RCJ-013
1
ea
U1
ic-DUAL, SPDT ANALOG SWITCH, 16P, uTQFN, 2.6X1.8, ROHS
INTERSIL
ISL54405IRUZ
1
ea
R5
RES, SMD, 0805, 0Ω, 1/8W, TF, ROHS
YAGEO
RC0805JR-070RL
6
ea
R3, R4, R8, R12,
R14, R16
RES, SMD, 0805, 20k, 1/8W, 1%, TF, ROHS
VENKEL
CR0805-8W-2002FT
6
ea
YAGEO
RC1206FR-0732R4L
6
ea
VENKEL
CR1210-4W-000
4
ea
Four Corners
SCREW, 4-40X1/4in, PAN, SS, PHILLIPS
4
ea
Four Corners
STANDOFF, 4-40X3/4in, F/F, HEX, ALUMINUM, ROHS
KEYSTONE
2204 (.250 OD)
1
ea
Place assy in bag
BAG, STATIC, 1 0X12, ZIP LOC
INTERSIL
212403-015
2
ea
S1, S2
SWITCH-MINI TOGGLE, TH, SPDT, 0.4VA, ON-OFF-ON, ROHS, GOLD
C&K
ET03SD1CBE
COMPONENTS
1
ea
J7, J9, J13, J15, J17, CONN-RCA PHONO JACK, WHITE, 3.6mm, R/A, ROHS, PCB MNT
J19
R9, R13, R15, R17- RES, SMD, 1206, 32.4Ω, 1/4W, 1%, TF, ROHS
R19
R1, R2, R6, R7, R10, RES, SMD, 1210, 0Ω, 1/4W, TF, ROHS
R11
AFFIX TO BACK OF LABEL-DATE CODE_LINE 1: YRWK/REV#, LINE 2: BOM NAME
PCB
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INTERSIL
LABEL-DATE CODE
UG002.0
September 23, 2014
User Guide 002
Board Silk Screen
FIGURE 5. TOP LAYER SILK SCREEN
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UG002.0
September 23, 2014
User Guide 002
Typical Performance Curves
0.0010
0.0009 VDD = 3.3V
0.0008 RLOAD = 20kΩ
0.0007 A-WEIGHTED FILTER
0.0006
VDD = 3.3V
RLOAD = 32Ω
A-WEIGHTED FILTER
0.0010
0.0009
0.0008
0.0007
0.0006
0.0005
0.0005
THD+N (%)
THD+N (%)
0.0020
Unless noted: VIN = 12V, VOUT = 3.3V, fSW = 400kHz, TA = +25°C
1VP-P
0.0004
510mVP-P
0.0003
0.0004
2VRMS
0.0003
1.9VRMS
1.8VRMS
0.0002
0.0002
1.5VRMS
0.0001
20
50
100
200
500 1k
2k
FREQUENCY (Hz)
5k
10k
0.0001
20
20k
FIGURE 6. THD+N vs SIGNAL LEVELS vs FREQUENCY
80
VDD = 3.3V OR V_Supply = 5V
90 RLOAD = 20kΩ
VSIGNAL = 2VRMS
120
C/P SHUNT ON SIGNAL SIDE
130
140
NO C/P SHUNT
C/P SHUNT ON LOAD SIDE
150
10k
20k
C/P SHUNT ON
SIGNAL SIDE
110
120
140
150
170
160
50
100
200
500
1k
2k
5k
-85 VDD = 3.3V
-90 RLOAD = 32Ω
-95 VSIGNAL = 0.707VRMS
CROSSTALK (dB)
-100
-105
-110
-115
-120
-125
-130
-135
-140
-145
200
500
1k
2k
5k
FREQUENCY (Hz)
FIGURE 10. CHANNEL-TO-CHANNEL CROSSTALK
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100
200
500
1k
2k
5k
10k 20k
FIGURE 9. OFF-ISOLATION, 2VRMS SIGNAL, 20kΩLOAD
-80
100
50
FREQUENCY (Hz)
FIGURE 8. OFF-ISOLATION, 0.707VRMS SIGNAL, 32ΩLOAD
50
C/P SHUNT ON LOAD SIDE
170
20
10k 20k
FREQUENCY (Hz)
20
NO C/P SHUNT
130
160
180
20
CROSS TALK (dB)
5k
100
110
-150
200
500 1k
2k
FREQUENCY (Hz)
80
OFF- ISOLATION (dB)
OFF- ISOLATION (dB)
100
100
FIGURE 7. THD+N vs SIGNAL LEVELS vs FREQUENCY
VDD = 3.3V OR V_Supply = 5V
RLOAD = 32Ω
VSIGNAL = 0.707VRMS
90
50
10k 20k
-80
-85 VDD = 3.3V
-90 RLOAD = 20kΩ
-95 VSIGNAL = 2VRMS
-100
-105
-110
-115
-120
-125
-130
-135
-140
-145
-150
-155
-160
-165
-170
20
50
100 200
500
1k
2k
5k
10k 20k
FREQUENCY (Hz)
FIGURE 11. CHANNEL-TO-CHANNEL CROSSTALK
UG002.0
September 23, 2014
User Guide 002
Typical Performance Curves
0.050
0.05
VDD = 3.3V
0.040 VSIGNAL = 2VRMS
0.03
0.035
0.02
0.030
0.01
0.025
0.020
RLOAD = 20kΩ
-0.02
-0.03
0.005
-0.04
1k
FREQUENCY (Hz)
FIGURE 12. INSERTION LOSS vs FREQUENCY
10k
20k
RELATIVE TO 1kHz
-0.01
0.010
100
VSIGNAL = 2VRMS
0.00
0.015
0.000
20
VDD = 3.3V
0.04
RLOAD = 20kΩ
GF (dB)
INSERTION LOSS (dB)
0.045
Unless noted: VIN = 12V, VOUT = 3.3V, fSW = 400kHz, TA = +25°C (Continued)
-0.05
20
100
1k
10k 20k
FREQUENCY (Hz)
FIGURE 13. GAIN vs FREQUENCY
Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is
cautioned to verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
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UG002.0
September 23, 2014