ISL23512 ESIGNS NEW DButton R Push O Single Controlled Potentiometer F D E ND M ENT COMME E PL ACE R D t a E r N OT R E D te MEN p o rt C e n ECOMSheet 21, 2008 c NO RData ical Sup rsil.com/tsJanuary n h c e T r u te o n t .i c w ta con or w w TERSIL 1-888-IN Low Noise, Low Power, 16 Taps, Push Button Controlled Potentiometer The Intersil ISL23512 is a three-terminal digitally-controlled potentiometer (XDCP) implemented by a resistor array composed of 15 resistive elements and a wiper switching network. The ISL23512 features a push button control, a shutdown mode, as well as an industry-leading µTQFN package. The push button control has individual PU and PD inputs for adjusting the wiper. To eliminate redundancy, the wiper position will automatically increment or decrement if one of these inputs is held longer than 1s. Forcing both PU and PD low for more than 2s activates shutdown mode. Shutdown mode disconnects the top of the resistor chain and moves the wiper to the lowest position, minimizing power consumption. The three terminals accessing the resistor chain naturally configure the ISL23512 as a voltage divider. A rheostat is easily formed by floating an end terminal or connecting it to the wiper. (XDCP™) FN6590.1 Features • Solid-state volatile potentiometer • Push button controlled • Single or Auto increment/decrement - Fast Mode after 1s button press • Shutdown Mode • 16 wiper tap points - Zero scale wiper position on power-up • Low power CMOS - VCC = 2.7V to 5.5V - Terminal voltage, 0 to VCC - Standby current, 3µA max • RTOTAL value = 10k • Packages - 10 Ld µTQFN (2.05mmx1.55mm) - Pb-free (RoHS compliant) Applications • Volume Control Pinout ISL23512 (10 LD ΜTQFN) TOP VIEW • LED/LCD Brightness Control NC • Programming Bias Voltages O • Contrast Control 10 PU 1 9 VCC PD 2 8 NC RH 3 7 RL VSS 4 5 • Ladder Networks 6 RW NC Ordering Information PART NUMBER (Notes 1, 2) ISL23512WFRU10Z-TK PART MARKING RTOTAL (k) TEMPERATURE RANGE (°C) 10 -40 to +125 GB PACKAGE (Pb-free) 10 Ld µTQFN PKG. DWG. # L10.2.1x1.6A NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2. Please refer to TB347 for details on reel specifications. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007, 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ISL23512 Pin Descriptions µTQFN PIN SYMBOL 1 PU The PU is a negative-edge triggered input with internal pull-up. Toggling PU will move the wiper close to RH terminal. 2 PD The PD is a negative-edge triggered input with internal pull-up. Toggling PD will move the wiper close to RL terminal. 3 RH The RH and RL pins of the ISL23512 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is Vss and the maximum is Vcc. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the PU/PD input. BRIEF DESCRIPTION 4 VSS Ground 6 RW The RW pin is the wiper terminal of the potentiometer, which is equivalent to the movable terminal of a mechanical potentiometer. 7 RL The RH and RL pins of the ISL23512 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is Vss and the maximum is Vcc. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction selected by the PU/PD input. 5, 8, 10 NC No connection. 9 VCC Supply Voltage. Block Diagrams VCC (SUPPLY VOLTAGE) PU PD PU PD CONTROL BLOCK 4-BIT UP/DOWN COUNTER RH 15 14 RH 13 RW 12 ONE OF SIXTEEN DECODER TRANSFER GATES RESISTOR ARRAY RW RL 2 1 VSS (GROUND) 0 RL GENERAL 2 DETAILED FN6590.1 January 21, 2008 ISL23512 Absolute Maximum Ratings Thermal Information Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Voltage at PU and PD Pin with Respect to GND . . -0.3V to VCC+0.3 VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V Voltage at any DCP Pin with Respect to GND. . . . . . . . -0.3V to VCC IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA Latchup . . . . . . . . . . . . . . . . . . . . . . . . . Class II, Level A @ +125°C ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .250V Thermal Resistance (Typical, Notes 3, 4) JA (°C/W) JC (°C/W) 10 Ld µTQFN . . . . . . . . . . . . . . . . . . . . 150 48.3 Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Temperature Range (Extended Industrial). . . . . . . .-40°C to +125°C VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15mW Wiper Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3.0mA CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 3. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 4. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. Potentiometer Specifications SYMBOL RTOTAL Over recommended operating conditions, unless otherwise specified. PARAMETER RH to RL Resistance TEST CONDITIONS MIN (Note 18) W option RH to RL Resistance Tolerance TYP (Note 5) 10 -20 W option ±80 Wiper Resistance Wiper current = VCC/RTOTAL 130 VRH, VRL VRH and VRL Terminal Voltages VRH and VRL to GND CH/CL/CW (Note 17) Potentiometer Capacitance ILkgDCP Leakage on DCP Pins 0 % ppm/°C (Note 16) 400 VCC V 10/10/25 Voltage at pin from GND to VCC 0.1 UNIT k +20 End-to-End Temperature Coefficient RW MAX (Note 18) pF 1 µA -1 1 LSB (Note 6) -0.5 0.5 LSB (Note 6) VOLTAGE DIVIDER MODE (0V @ RL; VCC @ RH; measured at RW unloaded) INL (Note 10) Integral Non-linearity DNL (Note 9) Differential Non-linearity Monotonic over all tap positions ZSerror (Note 7) Zero-scale Error W option 0 0.3 3 LSB (Note 6) FSerror (Note 8) Full-scale Error W option -3 -0.3 0 LSB (Note 6) TCV (Note 11) Ratiometric Temperature Coefficient DCP register set to 8 hex ±4 ppm/°C RESISTOR MODE (Measurements between RW and RL with RH not connected, or between RW and RH with RL not connected) RINL (Note 15) Integral Non-linearity DCP register set between 1 hex and F hex; monotonic over all tap positions RDNL (Note 14) Differential Non-linearity Roffset (Note 13) Offset 3 -1.5 1.5 MI (Note 12) W option -1 1 MI (Note 12) W option 0 3 MI (Note 12) 1 FN6590.1 January 21, 2008 ISL23512 DC Electrical Specifications SYMBOL Over recommended operating conditions, unless otherwise specified. PARAMETER ICC VCC Active Current VCC = 5.5V, perform wiper move operation ISB Stand-by Current Monotonic over all tap positions ILkg PU, PD Input Leakage Current VIN = VSS to VCC VIH PU, PD Input HIGH Voltage VIL PU, PD Input LOW Voltage CIN (Note 17) PU, PD Input Capacitance Rpull_up (Note 17) Pull-up Resistor for PU and PD AC Electrical Specifications MIN (Note 18) TEST CONDITIONS TYP MAX (Note 5) (Note 18) 0.6 -2 UNIT 150 µA 3 µA +2 µA VCC x 0.7 V VCC x 0.1 VCC = 3.3V, TA = +25°C, f = 1MHz V 10 pF 1 M Over recommended operating conditions, unless otherwise specified. Limits are established by characterization. SYMBOL PARAMETER tGAP Time Between Two Separate Push Button Events tDB Debounce Time MIN (Note 18) TYP (Note 5) MAX (Note 18) 2 UNIT ms 15 30 ms tS SLOW Wiper Change on a Slow Mode 100 250 375 ms tS FAST Wiper Change on a Fast Mode 25 50 75 ms tstdn (Note 17) tR VCC Time to Enter Shutdown Mode (Keep PU and PD Low) VCC Power-up Rate 2 0.2 s 50 V/ms NOTES: 5. Typical values are for TA = +25°C and 3.3V supply voltage. 6. LSB: [V(RW)15 – V(RW)0]/15. V(RW)15 and V(RW)0 are voltage on RW pin for the DCP register set to F hex and 0 hex respectively. LSB is the incremental voltage when changing from one tap to an adjacent tap. 7. ZS error = V(RW)0/LSB. 8. FS error = [V(RW)15 – VCC]/LSB. 9. DNL = [V(RW)i – V(RW)i-1]/LSB -1, for i = 1 to 15; i is the DCP register setting. 10. INL = [V(RW)i – i • LSB – V(RW)]/LSB for i = 1 to 15 Max V RW i – Min V RW i 10 6 11. TC = --------------------------------------------------------------------------------------------- --------------------- for i = 5 to 15 decimal, T = -40°C to +125°C. Max( ) is the maximum value of the wiper V Max V RW i + Min V RW i 2 +165°C voltage and Min ( ) is the minimum value of the wiper voltage over the temperature range. 12. MI = |RW15 – RW0|/15. MI is a minimum increment. RW15 and RW0 are the measured resistances for the DCP register set to 0F hex and 00 hex respectively. 13. Roffset = RW0/MI, when measuring between RW and RL. Roffset = RW15/MI, when measuring between RW and RH. 14. RDNL = (RWi – RWi-1)/MI, for i = 1 to 15. 15. RINL = [RWi – (MI • i) – RW0]/MI, for i = 1 to 15. 6 for i = 5 to 15, T = -40°C to +125°C. Max( ) is the maximum value of the resistance and Min ( ) is Max Ri – Min Ri 10 TC R = ---------------------------------------------------------------- --------------------- the minimum value of the resistance over the temperature range. Max Ri + Min Ri 2 +165°C 17. Limits should be considered typical and are not production tested. 16. 18. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested. 4 FN6590.1 January 21, 2008 ISL23512 Slow Mode Timing tDB tGAP PU MI* VW *MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage. Fast Mode Timing tDB PU tS FAST tS SLOW MI* VW 1s *MI in the AC timing diagram refers to the minimum incremental change in the wiper voltage. Shutdown Mode Timing tDB 2 SECONDS SHUTDOWN MODE PU PD VW 5 FN6590.1 January 21, 2008 ISL23512 Typical Performance Curves 3.0 160 VCC = 5.5V +125ºC 2.5 VCC = 5V 120 2.0 +25ºC 100 ICC (µA) WIPER RESISTANCE () 140 80 60 1.0 40 -40ºC 0 3 6 VCC = 2.7V 0.5 20 0 1.5 9 12 0 15 -40 -15 10 35 60 85 110 TEMPERATURE (°C) TAP POSITION (DECIMAL FIGURE 1. WIPER RESISTANCE vs TAP POSITION [ I(RW) = VCC/RTOTAL ] FOR 10k (W) FIGURE 2. STANDBY ICC vs TEMPERATURE 0.05 0.10 VCC = 5.5V 0.03 0.05 INL (LSB) DNL (LSB) VCC = 5.5V 0.01 -0.01 0.00 VCC = 2.7V -0.05 -0.03 VCC = 2.7V -0.05 0 3 6 9 12 -0.10 0 15 3 TAP POSITION (DECIMAL FIGURE 3. DNL vs TAP POSITION IN VOLTAGE DIVIDER MODE FOR 10k (W) 15 0 VCC = 2.7V 0.0025 0.0020 VCC = 5.5V 0.0015 0.0010 0.0005 -40 -15 10 35 60 85 TEMPERATURE (ºC) FIGURE 5. ZS ERROR vs TEMPERATURE 6 110 FULL SCALE ERROR (LSB) ZERO SCALE ERROR (LSB) 12 FIGURE 4. INL vs TAP POSITION IN VOLTAGE DIVIDER MODE FOR 10k (W) 0.0030 0 9 6 TAP POSITION (DECIMAL) -0.2 -0.4 VCC = 5.5V -0.6 -0.8 VCC = 2.7V -1 -40 -15 10 35 60 85 110 TEMPERATURE (ºC) FIGURE 6. FS ERROR vs TEMPERATURE FN6590.1 January 21, 2008 ISL23512 Typical Performance Curves (Continued) 0.2 0.5 VCC = 2.7V VCC = 2.7V 0.3 RINL (LSB) RDNL (LSB) 0.1 0.0 VCC = 5.5V -0.1 -0.2 3 0 0.1 -0.1 VCC = 5.5V -0.3 6 9 12 -0.5 15 0 3 TAP POSITION (DECIMAL) 9 12 15 TAP POSITION (DECIMAL) FIGURE 7. DNL vs TAP POSITION IN RHEOSTAT MODE FOR 10k (W) FIGURE 8. INL vs TAP POSITION IN RHEOSTAT MODE FOR 10k (W) 1.2 30 VCC = 5.5V 25 0.6 TCv (ppm/ºC) RTOTAL CHANGE (%) 6 VCC = 2.7V 0.0 20 VCC = 2.7V VCC = 5.5V 15 10 -0.6 5 -1.2 -40 0 -15 10 35 60 TEMPERATURE (ºC) 85 110 5 7 9 11 13 15 TAP POSITION (DECIMAL) FIGURE 10. TC FOR VOLTAGE DIVIDER MODE IN ppm FIGURE 9. END TO END RTOTAL % CHANGE vs TEMPERATURE 300 INPUT SINEWAVE TCr (ppm/ºC) 250 200 VCC = 2.7V 150 100 VCC = 5.5V 50 0 MIDSCALE OUTPUT 3dB CUT OFF = 500kHz 5 7 9 11 13 15 TAP POSITION (DECIMAL) FIGURE 11. TC FOR RHEOSTAT MODE IN ppm 7 FIGURE 12. FREQUENCY RESPONSE (500kHz) FN6590.1 January 21, 2008 ISL23512 Power-up and Power-down Requirements There are no restrictions on the power-up or power-down conditions of Vcc and the voltages applied to the potentiometer pins provided that Vcc is always more positive than or equal to VRH and VRL, i.e., Vcc VRH,VRL. The Vcc ramp rate specification is always in effect. Pin Descriptions RH and RL The RH and RL pins of the ISL23512 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum voltage is Vss and the maximum is Vcc. The terminology of RH and RL references the relative position of the terminal in relation to wiper movement direction. RW The RW pin is the wiper terminal of the potentiometer, which is equivalent to the movable terminal of a mechanical potentiometer. The default wiper position at power-up is at 0 tap. PU The debounced PU input is used to increment the wiper position. An on-chip pull-up holds the PU input HIGH. A switch closure to ground or a LOW logic level will, after a debounce time, move the wiper to the next adjacent higher tap position. Internal debounce circuitry prevents inadvertent switching of the wiper position if PU or PD remain LOW for less than 15ms, typical. Each of the buttons can be pushed either once for a single increment/decrement or continuously for multiple increments/decrements. The number of increments/decrements of the wiper position depend on how long the button is being pushed. When making a continuous push, after the first second, the increment/decrement speed increases. For the first second, the device will be in the slow scan mode. Then, if the button is held for longer than 1s, the device will go into the fast scan mode. As soon as the button is released, the ISL23512 will return to a stand-by condition. If both PU and PD buttons are pulled low more than 15ms from each other, all commands are ignored upon release of ALL buttons. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. Shutdown Mode The ISL23512 enters into Shutdown Mode if both PU and PD inputs are kept LOW for 2s. In this mode, the resistors array is totally disconnected from its RH pin and the wiper is moved to the position closest to the RL pin, as shown in Figure 13. RH PD The debounced PD input is used to decrement the wiper position. An on-chip pull-up holds the PD input HIGH. A switch closure to ground or a LOW logic level will, after a debounce time, move the wiper to the next adjacent lower tap position. RW RL FIGURE 13. DCP CONNECTION IN SHUTDOWN MODE Device Operation There are three sections of the ISL23512: the input control, the counter and decode section and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch, connecting a point on the resistor array to the wiper output. The resistor array is comprised of 15 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. The ISL23512 is designed to interface directly to two push button switches for effectively moving the wiper up or down. The PU and PD inputs increment or decrement a 4-bit counter respectively. The output of this counter is decoded to select one of the sixteen wiper positions along the resistive array. The wiper increment input, PU and the wiper decrement input, PD are both connected to an internal pull-up so that they normally remain HIGH. When pulled LOW by an external push button switch or a logic LOW level input, the wiper will be switched to the next adjacent tap position. 8 Note that PU and PD inputs must be pulled LOW within tDB time window of 15ms (see “Shutdown Mode Timing” on page 5) otherwise all commands will be ignored until both inputs are released. Holding either PU or PD input LOW for more than 15ms will exit shutdown mode and return wiper to prior shutdown position. If PU or PD will be held LOW for more than 250ms, the ISL23512 will start auto-increment or auto-decrement of wiper position. RTOTAL with VCC Removed The end-to-end resistance of the array will fluctuate once VCC is removed. FN6590.1 January 21, 2008 ISL23512 Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN) D 6 INDEX AREA 2X A L10.2.1x1.6A B N 10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS E SYMBOL 0.10 C 1 2X 2 0.10 C 0.10 C C A A1 SIDE VIEW (DATUM A) PIN #1 ID 1 4xk 2 NX L 0.50 0.55 - - - 0.05 - 0.127 REF - b 0.15 0.20 0.25 5 D 2.05 2.10 2.15 - E 1.55 1.60 1.65 - 0.50 BSC - k 0.20 - - L 0.35 0.40 0.45 NX b e 2 Nd 4 3 Ne 1 3 0 - 12 CL (A1) L 5 e SECTION "C-C" TERMINAL TIP C C 4 NOTES: 5 BOTTOM VIEW NX (b) - 10 Rev. 3 6/06 0.10 M C A B 0.05 M C 3 (ND-1) X e - N (DATUM B) N-1 NOTES 0.45 N MAX A e SEATING PLANE NOMINAL A1 A3 TOP VIEW 0.05 C MIN FOR ODD TERMINAL/SIDE 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. Nd and Ne refer to the number of terminals on D and E side, respectively. 4. All dimensions are in millimeters. Angles are in degrees. 5. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 7. Maximum package warpage is 0.05mm. 8. Maximum allowable burrs is 0.076mm in all directions. 9. Same as JEDEC MO-255UABD except: No lead-pull-back, "A" MIN dimension = 0.45 not 0.50mm "L" MAX dimension = 0.45 not 0.42mm. 10. For additional information, to assist with the PCB Land Pattern Design effort, see Intersil Technical Brief TB389. b 2.50 1.75 0.05 MIN L 2.00 0.80 0.275 0.10 MIN DETAIL “A” PIN 1 ID 0.25 0.50 LAND PATTERN 10 For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 9 FN6590.1 January 21, 2008