DATASHEET

EL1507
®
Data Sheet
March 26, 2007
Medium Power Differential Line Driver
Features
The EL1507 is a very low power dual operational amplifier
designed for central office and customer premise line driving
for DMT ADSL solutions. This device features a high drive
capability of 400mA while consuming only 7.5mA of supply
current per amplifier from ±12V supplies. This driver
achieves a typical distortion of less than -75dBc, at 1MHz
into a 50Ω load. The EL1507 is available in the thermallyenhanced 16 Ld SO package, as well as a 16 Ld QFN
package. Both are specified for operation over the full
-40°C to +85°C temperature range.
• Drives 360mA at 16VP-P on ±12V supplies
• 40VP-P differential output drive into 100Ω
• -75dBc typical driver output distortion driving 50Ω at 1MHz
and 1/2-IS bias current
• Low quiescent current of 3.5mA per amplifier in 1/2-IS
mode
• Power down disable mode
• Pb-free plus anneal available (RoHS compliant)
The EL1507 has two control pins, C0 and C1. With the
selection of C0 and C1, the device can be set into full-IS
power, ¾-IS power, ½-IS power, and power down disable
modes. The EL1507 maintains excellent distortion and load
driving capabilities even in the lowest power settings.
Applications
Ordering Information
• Video distribution amplifier
PART NUMBER
PART
MARKING
TAPE &
REEL
PACKAGE
PKG.
DWG. #
EL1507CS
EL1507CS
-
16 Ld SOIC MDP0027
EL1507CS-T7
EL1507CS
7”
16 Ld SOIC MDP0027
EL1507CS-T13
EL1507CS
13”
16 Ld SOIC MDP0027
EL1507CSZ
(See Note)
EL1507CSZ
-
16 Ld SOIC MDP0027
(Pb-Free)
EL1507CSZ-T7
(See Note)
EL1507CSZ
7”
16 Ld SOIC MDP0027
(Pb-Free)
EL1507CSZ-T13 EL1507CSZ
(See Note)
13”
16 Ld SOIC MDP0027
(Pb-Free)
EL1507CL
1507CL
-
16 Ld QFN
MDP0046
EL1507CL-T7
1507CL
7”
16 Ld QFN
MDP0046
EL1507CL-T13
1507CL
13”
16 Ld QFN
MDP0046
EL1507CLZ
(See Note)
1507CLZ
-
16 Ld QFN
(Pb-Free)
MDP0046
EL1507CLZ-T7
(See Note)
1507CLZ
7”
16 Ld QFN
(Pb-Free)
MDP0046
EL1507CL-T13
(See Note)
1507CLZ
13”
16 Ld QFN
(Pb-Free)
MDP0046
FN7013.3
• ADSL G.DMT and G.lite CO line driving
• G.SHDSL, HDSL2 line driver
• ADSL CPE line driving
• Video twisted-pair line driver
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2001, 2005-2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
EL1507
Pinouts
13 OUTB
14 VS+
15 VOUTB
VIN-A
3
14 VIN-B
1
GND*
4
13 GND*
INA- 2
GND*
5
12 GND*
VIN+A
6
11 VIN+B
GND
7
VS-
8
INA+ 3
12
+
AMP A
GND 4
10 C1
9
11 INB10 INB+
9 C1
5
POWER
CONTROL
LOGIC
+
AMP B
C0 8
+ -
+
6
6
2
16 VS+
VS- 7
VOUTA
16 OUTA
1
-
NC
15
EL1507
(16 LD QFN)
TOP VIEW
EL1507
(16 LD SO)
TOP VIEW
C0
NOTE: *These GND Pins are heat spreaders
2
FN7013.3
March 26, 2007
EL1507
Absolute Maximum Ratings (TA = +25°C)
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 75mA
Operating Temperature Range . . . . . . . . . . . . . . . . .-40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-60°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . .-40°C to +150°C
Power Dissipation . . . . . .See Power Supplies & Dissipation section
VS+ to VS- Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.4V
VS+ Voltage to Ground . . . . . . . . . . . . . . . . . . . . . . -0.3V to +26.4V
VS- Voltage to Ground . . . . . . . . . . . . . . . . . . . . . . . . -26.4V to 0.3V
Input C0/C1 to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
VIN+ Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS- to VS+
Current Into Any Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8mA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER
VS = ±12V, RF= 1.5kΩ, RL= 75Ω to GND, TA = +25°C. unless otherwise specified.
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
BW
-3dB Bandwidth
AV = +4
70
MHz
HD
Total Harmonic Distortion
f = 1MHz, VO = 16VP-P, RL = 50Ω
-75
dBc
dG
Differential Gain
AV = +2, RL = 37.5Ω
0.17
%
dθ
Differential Phase
AV = +2, RL = 37.5Ω
0.1
°
SR
Slew Rate
VOUT from -4.5V to +4.5V
500
V/µs
350
DC PERFORMANCE
VOS
Offset Voltage
-17
17
mV
ΔVOS
VOS Mismatch
-10
10
mV
ROL
Transimpedance
3.5
MΩ
VOUT from -4.5V to +4.5V
1
2
INPUT CHARACTERISTICS
IB+
Non-Inverting Input Bias Current
-5
5
µA
IB-
Inverting Input Bias Current
-30
30
µA
ΔIB-
IB- Mismatch
-20
20
µA
eN
Input Noise Voltage
2.8
nV/√ Hz
iN+
+Input Noise Current
1.8
pA/√ Hz
iN-
-Input Noise Current
19
pA/√ Hz
VIH
Input High Voltage
C0 & C1 inputs
VIL
Input Low Voltage
C0 & C1 inputs
IIH1
Input High Current for C1
C1 = 5V
IIH0
Input High Current for C0
IIL
Input Low Current for C1 or C0
2.3
V
1.5
V
0.2
8
µA
C0 = 5V
0.1
4
µA
C1 = 0V, C0 = 0V
-1
1
µA
OUTPUT CHARACTERISTICS
VOUT
Loaded Output Swing Single Ended
RL = 100Ω to GND
±10.3
±10.9
V
VOUT P
Loaded Output Swing Single Ended
RL = 25Ω to GND
9.5
10.2
V
VOUT N
Loaded Output Swing Single Ended
RL = 25Ω to GND
-8.2
-9.8
V
IOUT
Output Current
RL = 0Ω
500
mA
VS
Supply Voltage
Single supply
IS+ (Full Power)
Positive Supply Current per Amplifier
All outputs at 0V, C0 = C1 = 0V
SUPPLY
3
5
7.5
24
V
9
mA
FN7013.3
March 26, 2007
EL1507
Electrical Specifications
PARAMETER
VS = ±12V, RF= 1.5kΩ, RL= 75Ω to GND, TA = +25°C. unless otherwise specified. (Continued)
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
IS- (Full Power)
Negative Supply Current per Amplifier All outputs at 0V, C0 = C1 = 0V
-7
-8.5
mA
IS+ (3/4 Power)
Positive Supply Current per Amplifier
6
7.5
mA
IS- (3/4 Power)
Negative Supply Current per Amplifier All outputs at 0V, C0 = 5V, C1 = 0V
-5.5
-7
mA
IS+ (1/2 Power)
Positive Supply Current per Amplifier
All outputs at 0V, C0 = 0V, C1 = 5V
3.9
5.1
mA
IS- (1/2 Power)
Negative Supply Current per Amplifier All outputs at 0V, C0 = 0V, C1 = 5V
-3.3
-4.6
mA
IS+ (Power Down)
Positive Supply Current per Amplifier
0.6
1
mA
IS- (Power Down)
Negative Supply Current per Amplifier All outputs at 0V, C0 = C1 = 5V
0
0.75
mA
IGND
GND Supply Current per Amplifier
0.6
1
mA
All outputs at 0V, C0 = 5V, C1 = 0V
All outputs at 0V, C0 = C1 = 5V
All outputs at 0V
Typical Performance Curves
GAIN (dB)
24
22
VS=±12V
AV=10
RL=100Ω
VS=±12V
AV=5
18 RL=100Ω
1kΩ
20
1.5kΩ
16
GAIN (dB)
28
1kΩ
14
1.5kΩ
10
2kΩ
2kΩ
12
6
8
100K
1M
10M
2
100K
100M
FREQUENCY (Hz)
22
VS=±12V
AV=10
RL=100Ω
18
1kΩ
20
1.5kΩ
16
VS=±12V
AV=5
RL=100Ω
1kΩ
14
1.5kΩ
10
2kΩ
2kΩ
12
8
100K
100M
FIGURE 2. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CS - FULL POWER MODE)
GAIN (dB)
GAIN (dB)
24
10M
FREQUENCY (Hz)
FIGURE 1. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CS - FULL POWER MODE)
28
1M
6
1M
10M
100M
FREQUENCY (Hz)
FIGURE 3. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CS - 3/4 POWER MODE)
4
2
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 4. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CS - 3/4 POWER MODE)
FN7013.3
March 26, 2007
EL1507
Typical Performance Curves
28
22
VS=±12V
AV=5
18 RL=100Ω
VS=±12V
AV=10
24 RL=100Ω
1kΩ
1kΩ
20
GAIN (dB)
GAIN (dB)
1.5kΩ
1.5kΩ
16
14
2kΩ
10
2kΩ
12
6
8
100K
1M
10M
2
100K
100M
FREQUENCY (Hz)
22
VS=±12V
AV=10
RL=100Ω
18
1kΩ
20
1.5kΩ
16
VS=±12V
AV=5
RL=100Ω
1kΩ
14
1.5kΩ
10
2kΩ
2kΩ
12
8
100K
6
1M
10M
2
100K
100M
1M
10M
FIGURE 7. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CL - FULL POWER MODE)
FIGURE 8. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CL - FULL POWER MODE)
22
28
VS=±12V
AV=10
24 RL=100Ω
18
VS=±12V
AV=5
RL=100Ω
1.5kΩ
16
GAIN (dB)
1kΩ
1kΩ
20
14
1.5kΩ
10
2kΩ
2kΩ
6
12
8
100K
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
GAIN (dB)
100M
FIGURE 6. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CS - 1/2 POWER MODE)
GAIN (dB)
GAIN (dB)
24
10M
FREQUENCY (Hz)
FIGURE 5. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CS - 1/2 POWER MODE)
28
1M
1M
10M
100M
FREQUENCY (Hz)
FIGURE 9. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CL - 3/4 POWER MODE)
5
2
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 10. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CL - 3/4 POWER MODE)
FN7013.3
March 26, 2007
EL1507
Typical Performance Curves
28
VS=±12V
AV=5
18 RL=100Ω
1kΩ
20
1.5kΩ
16
GAIN (dB)
GAIN (dB)
24
22
VS=±12V
AV=10
RL=100Ω
1kΩ
1.5kΩ
14
2kΩ
10
2kΩ
12
6
8
100K
1M
10M
2
100K
100M
FREQUENCY (Hz)
22
22pF
10pF
14
GAIN (dB)
GAIN (dB)
22
0pF
6
-2
VS=±12V
AV=5
RL=100Ω
RF=1.5kΩ
1M
10M
0pF
6
-10
100K
100M
GAIN (dB)
10pF
14
0pF
-2
-10
100K
22
22pF
6
10M
100M
FIGURE 14. FREQUENCY RESPONSE vs CLOAD
(EL1507CL - FULL POWER MODE)
30
VS=±12V
AV=5
RL=100Ω
RF=1.5kΩ
1M
FREQUENCY (Hz)
FIGURE 13. FREQUENCY RESPONSE vs CLOAD
(EL1507CS - FULL POWER MODE)
GAIN (dB)
10pF
14
FREQUENCY (Hz)
22
22pF
-2
-10
100K
30
100M
FIGURE 12. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CL - 1/2 POWER MODE)
30
VS=±12V
AV=5
RL=100Ω
RF=1.5kΩ
10M
FREQUENCY (Hz)
FIGURE 11. DIFFERENTIAL FREQUENCY RESPONSE vs RF
(EL1507CL - 1/2 POWER MODE)
30
1M
VS=±12V
AV=5
RL=100Ω
RF=1.5kΩ
22pF
10pF
14
0pF
6
-2
1M
10M
100M
FREQUENCY (Hz)
FIGURE 15. FREQUENCY RESPONSE vs CLOAD
(EL1507CS - 3/4 POWER MODE)
6
-10
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 16. FREQUENCY RESPONSE vs CLOAD
(EL1507CL - 3/4 POWER MODE)
FN7013.3
March 26, 2007
EL1507
Typical Performance Curves
30
22pF
22
10pF
0pF
GAIN (dB)
22
GAIN (dB)
30
VS=±12V
AV=5
RL=100Ω
RF=1.5kΩ
14
6
-2
VS=±12V
AV=5
RL=100Ω
RF=1.5kΩ
14
0pF
6
-2
-10
100K
1M
10M
-10
100K
100M
1M
FREQUENCY (Hz)
AV=5, RF=1.5kΩ,
50
FULL PO
45
FU
40
3/4 PO
LL
P
OW
1 /2 P
35
WE
3/4 PO
W ER
OW
-50
R
-60
WE R
ER
6
-65
HD3
-70
HD2
-75
ER
1/2 P
7
OW E
R
-80
8
9
10
11
HD2
HD3
-85
-90
12
2
10
±VS (V)
16
14
-50
-60
HD (dB)
IS (mA)
12
10
8
-65
IS- (1/2 POWER)
2
IS- (3/4 POWER)
2
4
6
8
10
12
±VS (V)
FIGURE 21. SUPPLY CURRENT vs SUPPLY VOLTAGE
7
42
EL1507CL
EL1507CS
HD3
HD2
HD2
-80
HD3
-85
IS+ (1/2 POWER)
0
34
-70
-75
6
0
VS=±12V
AV=10
RL=100Ω
RF=1.5kΩ
f=1MHz
-55
IS+ (3/4 POWER)
4
26
FIGURE 20. DIFFERENTIAL HARMONIC DISTORTION vs
DIFFERENTIAL OUTPUT AMPLITUDE
(FULL POWER MODE)
IS+ (FULL POWER)
IS- (FULL POWER)
18
VOP-P (V)
FIGURE 19. DIFFERENTIAL BANDWIDTH vs SUPPLY
VOLTAGE
18
EL1507CL
EL1507CS
VS=±12V
AV=5
RL=100Ω
RF=1.5kΩ
f=1MHz
-55
EL1507CL
EL1507CS
5
100M
FIGURE 18. FREQUENCY RESPONSE vs CLOAD
(EL1507CL - 1/2 POWER MODE)
HD (dB)
BANDWIDTH (MHz)
55
10M
FREQUENCY (Hz)
FIGURE 17. FREQUENCY RESPONSE vs CLOAD
(EL1507CS - 1/2 POWER MODE)
30
22pF
10pF
-90
2
10
18
26
34
42
VOP-P (V)
FIGURE 22. DIFFERENTIAL HARMONIC DISTORTION vs
DIFFERENTIAL OUTPUT AMPLITUDE
(3/4 POWER MODE)
FN7013.3
March 26, 2007
EL1507
Typical Performance Curves
-50
RF=1.5kΩ
AV=5
-50 RL=100Ω
f=150kHz
ALL POWER
-60 LEVELS
CS & CL
-70
VS=±12V
AV=10
RL=100Ω
RF=1.5kΩ
f=1MHz
-55
-60
HD (dB)
THD (dB)
-40
VS=±12V
VS=±6V
-65
EL1507CL
EL1507CS
HD3
HD2
-70
HD2
-75
-80
-80
HD3
-85
-90
2
10
18
26
34
-90
42
2
10
18
VOP-P (V)
FIGURE 23. DIFFERENTIAL TOTAL HARMONIC DISTORTION
vs DIFFERENTIAL OUTPUT AMPLITUDE
-55
THD (dB)
-45
VS=±12V
AV=5
RL=100Ω
RF=1.5kΩ
f=1MHz
-60
-55
-60
1/2 POWER
-70
FULL POWER
HD3
-70
HD3
HD2
-80
HD2
-85
2
10
18
34
26
-90
42
2
4
6
8
VOP-P (V)
-50
-45
-55
-60
1/2 POWER
-65
3/4 POWER
-70
14
16
18
20
EL1507CL
EL1507CS
VS=±6V
AV=5
RL=100Ω
RF=1.5kΩ
f=1MHz
-50
HD (dB)
THD (dB)
-60
12
FIGURE 26. DIFFERENTIAL HARMONIC DISTORTION vs
DIFFERENTIAL OUTPUT AMPLITUDE
(3/4 POWER MODE)
VS=±12V
AV=5
RL=100Ω
RF=1.5kΩ
f=1MHz
-55
10
VOP-P (V)
FIGURE 25. DIFFERENTIAL TOTAL HARMONIC DISTORTION
vs DIFFERENTIAL OUTPUT AMPLITUDE
(EL1507CS)
HD3
-65
-70
HD3
HD2
-75
-80
-75
-80
42
EL1507CL
EL1507CS
-65
-75
-75
-80
VS=±6V
AV=5
RL=100Ω
RF=1.5kΩ
f=1MHz
-50
3/4 POWER
-65
34
FIGURE 24. DIFFERENTIAL HARMONIC DISTORTION vs
DIFFERENTIAL OUTPUT AMPLITUDE
(1/2 POWER MODE)
HD (dB)
-50
26
VOP-P (V)
2
12
22
32
42
VOP-P (V)
FIGURE 27. DIFFERENTIAL TOTAL HARMONIC DISTORTION
vs DIFFERENTIAL OUTPUT AMPLITUDE
(EL1507CL)
8
HD2
-85
FULL POWER
-90
2
4
6
8
10
12
14
16
18
20
VOP-P (V)
FIGURE 28. DIFFERENTIAL HARMONIC DISTORTION vs
DIFFERENTIAL OUTPUT AMPLITUDE
(1/2 POWER MODE)
FN7013.3
March 26, 2007
EL1507
Typical Performance Curves
-50
-55
HD (dB)
-60
-45
EL1507CL
EL1507CS
VS=±6V
AV=5
RL=100Ω
RF=1.5kΩ
f=1MHz
-55
-65
HD3
-70
HD2
-75
2
6
4
8
10
3/4 POWER
-65
1/2 POWER
FULL POWER
-75
HD2
-85
-60
-70
HD3
-80
-90
VS=±6V
AV=5
RL=100Ω
RF=1.5kΩ
f=1MHz
-50
THD (dB)
-45
12
14
16
18
-80
20
2
4
6
8
VOP-P (V)
FIGURE 29. DIFFERENTIAL HARMONIC DISTORTION vs
DIFFERENTIAL OUTPUT AMPLITUDE
(FULL POWER MODE)
-45
OUTPUT IMPEDANCE (Ω)
THD (dB)
-55
-60
-65
1/2 POWER
3/4 POWER
-70
-75
-80
14
16
18
20
10
VS=±12V
AV=1
RF=1.5kΩ
1
0.1
0.01
FULL POWER
2
4
6
8
10
12
14
16
18
0.001
10K
20
100K
VOP-P (V)
-30
0
PSRR (dB)
20
-50
B→A
A→B
-20
-40
PSRR-
PSRR+
-60
-90
-110
10K
100M
FIGURE 32. OUTPUT IMPEDANCE vs FREQUENCY
(ALL POWER LEVELS)
-10
-70
10M
1M
FREQUENCY (Hz)
FIGURE 31. DIFFERENTIAL TOTAL HARMONIC DISTORTION
vs DIFFERENTIAL OUTPUT AMPLITUDE
(EL1507CL)
CHANNEL SEPARATION (dB)
12
FIGURE 30. DIFFERENTIAL TOTAL HARMONIC DISTORTION
vs DIFFERENTIAL OUTPUT AMPLITUDE
(EL1507CS)
100
VS=±6V
AV=5
RL=100Ω
RF=1.5kΩ
f=1MHz
-50
10
VOP-P (V)
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 33. CHANNEL SEPARATION vs FREQUENCY
(ALL POWER LEVELS)
9
-80
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 34. PSRR vs FREQUENCY
FN7013.3
March 26, 2007
EL1507
Typical Performance Curves
100
40
0
-40
PHASE
-80
100k
-120
-160
10K
GAIN
-200
PHASE (°)
MAGNITUDE (Ω)
1M
-240
1K
-280
100
1K
10K
100K
IB10
EN
IB+
1
10
-320
100M
10M
1M
VOLTAGE NOISE (nV/√Hz),
CURRENT NOISE (pA/√Hz)
10M
100
FIGURE 35. TRANSIMPEDANCE (ROL) vs FREQUENCY
0.14
VS=±12V
0.35
1/2 POWER
0.3
0.25
3/4 POWER
0.2
0.15
0.1
FULL POWER
0.05
0
0
1
2
3
100K
1M
10M
FIGURE 36. VOLTAGE AND CURRENT NOISE vs FREQUENCY
DIFFERENTIAL PHASE (°)
DIFFERENTIAL GAIN (%)
0.4
10K
1K
FREQUENCY (Hz)
FREQUENCY (Hz)
4
5
VS=±6V
0.12
1/2 POWER
0.1
3/4 POWER
0.08
0.06
FULL POWER
0.04
0.02
0
0
1
2
3
4
5
NUMBER OF 150Ω LOADS
NUMBER OF 150Ω LOADS
FIGURE 37. DIFFERENTIAL GAIN
FIGURE 38. DIFFERENTIAL PHASE
0.12
DIFFERENTIAL PHASE (°)
VS=±12V
0.1
1/2 POWER
0.08
CH 2
FULL POWER
0.06
CH 1
3/4 POWER
0.04
VOUT
C0 , C1
Δ=48ns
M=40ns
CH 1=2V
CH 2=2V
0.02
0
0
1
2
3
4
NUMBER OF 150Ω LOADS
FIGURE 39. DIFFERENTIAL PHASE
10
5
40ns/DIV
FIGURE 40. ENABLE RESPONSE
FN7013.3
March 26, 2007
EL1507
Typical Performance Curves
DIFFERENTIAL GAIN (%)
0.45
VS=±6V
0.4
0.35
CH 2
1/2 POWER
VOUT
0.3
0.25
3/4 POWER
0.2
0.15
0.1
FULL POWER
0.05
0
CH 1
0
1
2
3
4
C0 , C1
M=400ns
CH 1=2V
CH 2=2V
5
NUMBER OF 150Ω LOADS
400ns/DIV
FIGURE 41. DIFFERENTIAL GAIN
FIGURE 42. DISABLE RESPONSE
490
14
FULL POWER
12
470
SLEW RATE (V/µS)
SUPPLY CURRENT (mA)
16
3/4 POWER
10
8
1/2 POWER
6
4
DISABLED
2
0
-50
-25
0
25
50
450
430
410
390
370
75
100
125
350
-50
150
-25
0
FIGURE 43. POSITIVE SUPPLY CURRENT vs TEMPERATURE
75
100
125
150
FIGURE 44. SLEW RATE vs TEMPERATURE
18
11.8
16
OUTPUT VOLTAGE (±V)
INPUT BIAS CURRENT (µA)
50
TEMPERATURE (°C)
TEMPERATURE (°C)
14
12
10
IB-
8
6
4
2
IB+
-25
0
25
50
75
100
125
150
TEMPERATURE (°C)
FIGURE 45. INPUT BIAS CURRENT vs TEMPERATURE
11
10.8
9.8
8.8
7.8
6.8
5.8
0
-2
-50
25
RL=100Ω
4.8
-50 -25
0
25
50
75
100
125
150
TEMPERATURE (°C)
FIGURE 46. OUTPUT VOLTAGE vs TEMPERATURE
FN7013.3
March 26, 2007
EL1507
10
3.5
8
3
TRANSIMPEDANCE (MΩ)
OFFSET VOLTAGE (mV)
Typical Performance Curves
6
4
2
0
-2
-50
-25
0
25
50
75
100
125
2.5
2
1.5
1
0.5
0
150
-50
-25
0
TEMPERATURE (°C)
FIGURE 47. OFFSET VOLTAGE vs TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
4.5
1.136W
1
SO16
θJA=110°C/W
0.8
833mW
0.6
QFN16
θJA=150°C/W
0.4
50
75
100
125
150
FIGURE 48. TRANSIMPEDANCE vs TEMPERATURE
POWER DISSIPATION (W)
POWER DISSIPATION (W)
1.2
25
TEMPERATURE (°C)
0.2
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - QFN EXPOSED
DIEPAD SOLDERED TO PCB PER JESD51-5
4
3.5 3.125W
QFN16
3
θJA=40°C/W
2.5
2
1.563W
1.5
SO16
1
θJA=80°C/W
0.5
0
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 49. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
12
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 50. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN7013.3
March 26, 2007
EL1507
Input Connections
Applications Information
The EL1507 consists of two high-power line driver amplifiers
that can be connected for full duplex differential line
transmission. The amplifiers are designed to be used with
signals up to 4MHz and produce low distortion levels. A
typical interface circuit is shown in Figure 51 below.
DRIVER
INPUT
+
-
ROUT
LINE +
Power Supplies & Dissipation
RF
RG
ZLINE
RF
LINE RF
RECEIVE
OUT -
R
RIN
+
RECEIVE
AMPLIFIERS
Due to the high power drive capability of the EL1507, much
attention needs to be paid to power dissipation. The power
that needs to be dissipated in the EL1507 has two main
contributors. The first is the quiescent current dissipation.
The second is the dissipation of the output stage.
ROUT
+
RECEIVE
OUT +
The EL1507 amplifiers are somewhat sensitive to source
impedance. In particular, they do not like being driven by
inductive sources. More than 100nH of source impedance
can cause ringing or even oscillations. This inductance is
equivalent to about 4” of unshielded wiring, or 6” of
unterminated transmission line. Normal high-frequency
construction obviates any such problem.
+
RF
R
RIN
The quiescent power in the EL1507 is not constant with
varying outputs. In reality, 7mA of the 15mA needed to
power the drivers is converted in to output current.
Therefore, in the equation below we should subtract the
average output current, IO, or 7mA, whichever is the lowest.
We’ll call this term IX.
Therefore, we can determine a quiescent current with the
equation:
P Dquiescent = V S × ( I S – 2I X )
FIGURE 51. TYPICAL LINE INTERFACE CONNECTION
The amplifiers are wired with one in positive gain and the
other in a negative gain configuration to generate a
differential output for a single-ended input. They will exhibit
very similar frequency responses for gains of three or
greater and thus generate very small common-mode outputs
over frequency, but for low gains the two drivers RF's need
to be adjusted to give similar frequency responses. The
positive-gain driver will generally exhibit more bandwidth and
peaking than the negative-gain driver.
If a differential signal is available to the drive amplifiers, they
may be wired so:
+
-
2RG
RF
where:
VS is the supply voltage (VS+ to VS-)
IS is the maximum quiescent supply current (IS+ + IS-)
IX is the lesser of IO or 7mA (generally IX = 7mA)
The dissipation in the output stage has two main
contributors. Firstly, we have the average voltage drop
across the output transistor and secondly, the average
output current. For minimal power dissipation, the user
should select the supply voltage and the line transformer
ratio accordingly. The supply voltage should be kept as low
as possible, while the transformer ratio should be selected
so that the peak voltage required from the EL1507 is close to
the maximum available output swing. There is a trade off,
however, with the selection of transformer ratio. As the ratio
is increased, the receive signal available to the receivers is
reduced.
RF
Once the user has selected the transformer ratio, the
dissipation in the output stages can be selected with the
following equation:
+
VS
P Dtransistors = 2 × I O × ⎛ ------- – V O ⎞
⎝ 2
⎠
FIGURE 52. DRIVERS WIRED FOR DIFFERENTIAL INPUT
Each amplifier has identical positive gain connections, and
optimum common-mode rejection occurs. Further, DC input
errors are duplicated and create common-mode rather than
differential line errors.
where:
VS is the supply voltage (VS+ to VS-)
VO is the average output voltage per channel
IO is the average output current per channel
13
FN7013.3
March 26, 2007
EL1507
The overall power dissipation (PDISS) is obtained by adding
PDquiescent and PDtransistor.
is true of badly terminated lines connected without a series
matching resistor.
Then, the θJA requirement needs to be calculated. This is
done using the equation:
Power Supplies
( T JUNCT – T AMB )
θ JA = ------------------------------------------------P DISS
where:
TJUNCT is the maximum die temperature (150°C)
TAMB is the maximum ambient temperature
PDISS is the dissipation calculated above
θJA is the junction to ambient thermal resistance for the
package when mounted on the PCB
This θJA value is then used to calculate the area of copper
needed on the board to dissipate the power.
The SO power packages are designed so that heat may be
conducted away from the device in an efficient manner. To
disperse this heat, the center leads are internally connected
to the mounting platform of the die. Heat flows through the
leads into the circuit board copper, then spreads and
convects to air. Thus, the ground plane on the component
side of the board becomes the heatsink. This has proven to
be a very effective technique. A separate application note
details the 16 Ld QFN PCB design considerations.
The power supplies should be well bypassed close to the
EL1507. A 3.3µF tantalum capacitor for each supply works well.
Since the load currents are differential, they should not travel
through the board copper and set up ground loops that can
return to amplifier inputs. Due to the class AB output stage
design, these currents have heavy harmonic content. If the
ground terminal of the positive and negative bypass capacitors
are connected to each other directly and then returned to circuit
ground, no such ground loops will occur. This scheme is
employed in the layout of the EL1507 demonstration board,
and documentation can be obtained from the factory.
Feedback Resistor Value
The bandwidth and peaking of the amplifiers varies with supply
voltage somewhat and with gain settings. The feedback resistor
values can be adjusted to produce an optimal frequency
response. Here is a series of resistor values that produce an
optimal driver frequency response (<1dB peaking) for different
supply voltages and gains:
TABLE 1. OPTIMUM DRIVER FEEDBACK RESISTOR FOR
VARIOUS GAINS AND SUPPLY VOLTAGES
Driver Voltage Gain
Supply
Voltage
2.5
5
10
Single Supply Operation
±5V
2k
1.8k
1.5k
The EL1507 can also be powered from a single supply
voltage. When operating in this mode, the GND pins can still
be connected directly to GND. To calculate power
dissipation, the equations in the previous section should be
used, with VS equal to half the supply rail.
±12V
2k
1.8k
1.5k
Output Loading
While the drive amplifiers can output in excess of 400mA
transiently, the internal metallization is not designed to carry
more than 75mA of steady DC current and there is no
current-limit mechanism. This allows safely driving rms
sinusoidal currents of 2 x 75mA, or 150mA. This current is
more than that required to drive line impedances to large
output levels, but output short circuits cannot be tolerated.
The series output resistor will usually limit currents to safe
values in the event of line shorts. Driving lines with no series
resistor is a serious hazard.
The amplifiers are sensitive to capacitive loading. More than
25pF will cause peaking of the frequency response. The same
Power Control Function
The EL1507 contains two forms of power control operation.
Two digital inputs, C0 and C1, can be used to control the supply
current of the EL1507 drive amplifiers. As the supply current is
reduced, the EL1507 will start to exhibit slightly higher levels of
distortion and the frequency response will be limited. The 4
power modes of the EL1507 are set up as shown in the table
below:
TABLE 2. POWER MODES OF THE EL1507
C1
C0
0
0
IS Full Power Mode
0
1
¾-IS Power Mode
1
0
½-IS Power Mode
1
1
Power Down
Operation
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
14
FN7013.3
March 26, 2007
EL1507
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M C A B
e
H
C
A2
GAUGE
PLANE
SEATING
PLANE
A1
0.004 C
0.010 M C A B
L
b
0.010
4° ±4°
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SYMBOL
SO-14
SO16 (0.300”)
(SOL-16)
SO20
(SOL-20)
SO24
(SOL-24)
SO28
(SOL-28)
TOLERANCE
NOTES
A
0.068
0.068
0.068
0.104
0.104
0.104
0.104
MAX
-
A1
0.006
0.006
0.006
0.007
0.007
0.007
0.007
±0.003
-
A2
0.057
0.057
0.057
0.092
0.092
0.092
0.092
±0.002
-
b
0.017
0.017
0.017
0.017
0.017
0.017
0.017
±0.003
-
c
0.009
0.009
0.009
0.011
0.011
0.011
0.011
±0.001
-
D
0.193
0.341
0.390
0.406
0.504
0.606
0.704
±0.004
1, 3
E
0.236
0.236
0.236
0.406
0.406
0.406
0.406
±0.008
-
E1
0.154
0.154
0.154
0.295
0.295
0.295
0.295
±0.004
2, 3
e
0.050
0.050
0.050
0.050
0.050
0.050
0.050
Basic
-
L
0.025
0.025
0.025
0.030
0.030
0.030
0.030
±0.009
-
L1
0.041
0.041
0.041
0.056
0.056
0.056
0.056
Basic
-
h
0.013
0.013
0.013
0.020
0.020
0.020
0.020
Reference
-
16
20
24
28
Reference
-
N
SO-8
SO16
(0.150”)
8
14
16
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
15
FN7013.3
March 26, 2007
EL1507
QFN (Quad Flat No-Lead) Package Family
MDP0046
QFN (QUAD FLAT NO-LEAD) PACKAGE FAMILY
(COMPLIANT TO JEDEC MO-220)
A
MILLIMETERS
D
N
(N-1)
(N-2)
B
1
2
3
PIN #1
I.D. MARK
E
(N/2)
2X
0.075 C
2X
0.075 C
N LEADS
TOP VIEW
0.10 M C A B
(N-2)
(N-1)
N
b
L
SYMBOL QFN44 QFN3
TOLERANCE
NOTES
A
0.90
0.90
0.90
0.90
±0.10
-
A1
0.02
0.02
0.02
0.02
+0.03/-0.02
-
b
0.25
0.25
0.23
0.22
±0.02
-
c
0.20
0.20
0.20
0.20
Reference
-
D
7.00
5.00
8.00
5.00
Basic
-
Reference
8
Basic
-
Reference
8
Basic
-
D2
5.10
3.80
5.80 3.60/2.48
E
7.00
7.00
8.00
1
2
3
6.00
E2
5.10
5.80
5.80 4.60/3.40
e
0.50
0.50
0.80
0.50
L
0.55
0.40
0.53
0.50
±0.05
-
N
44
38
32
32
Reference
4
ND
11
7
8
7
Reference
6
NE
11
12
8
9
Reference
5
MILLIMETERS
PIN #1 I.D.
3
QFN32
SYMBOL QFN28 QFN2
QFN20
QFN16
A
0.90
0.90
0.90
0.90
0.90
±0.10
-
A1
0.02
0.02
0.02
0.02
0.02
+0.03/
-0.02
-
b
0.25
0.25
0.30
0.25
0.33
±0.02
-
c
0.20
0.20
0.20
0.20
0.20
Reference
-
D
4.00
4.00
5.00
4.00
4.00
Basic
-
D2
2.65
2.80
3.70
2.70
2.40
Reference
-
(E2)
(N/2)
NE 5
7
(D2)
BOTTOM VIEW
0.10 C
e
C
SEATING
PLANE
TOLERANCE NOTES
E
5.00
5.00
5.00
4.00
4.00
Basic
-
E2
3.65
3.80
3.70
2.70
2.40
Reference
-
e
0.50
0.50
0.65
0.50
0.65
Basic
-
L
0.40
0.40
0.40
0.40
0.60
±0.05
-
N
28
24
20
20
16
Reference
4
ND
6
5
5
5
4
Reference
6
NE
8
7
5
5
4
Reference
5
Rev 11 2/07
0.08 C
N LEADS
& EXPOSED PAD
SEE DETAIL "X"
NOTES:
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Tiebar view shown is a non-functional feature.
SIDE VIEW
3. Bottom-side pin #1 I.D. is a diepad chamfer as shown.
4. N is the total number of terminals on the device.
(c)
C
5. NE is the number of terminals on the “E” side of the package
(or Y-direction).
2
A
(L)
A1
N LEADS
DETAIL X
6. ND is the number of terminals on the “D” side of the package
(or X-direction). ND = (N/2)-NE.
7. Inward end of terminal may be square or circular in shape with radius
(b/2) as shown.
8. If two values are listed, multiple exposed pad options are available.
Refer to device-specific datasheet.
16
FN7013.3
March 26, 2007