Si8472DB www.vishay.com Vishay Siliconix N-Channel 20 V (D-S) MOSFET FEATURES PRODUCT SUMMARY RDS(on) (Ω) ID (A) a, e 0.044 at VGS = 4.5 V 4.5 0.050 at VGS = 2.5 V 4.2 0.056 at VGS = 1.8 V 4 0.070 at VGS = 1.5 V 1.5 VDS (V) 20 Qg (TYP.) • TrenchFET® power MOSFET • Ultra small 1 mm x 1 mm maximum outline • Ultra-thin 0.548 mm maximum height 6.8 nC • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 MICRO FOOT® 1 x 1 1 x xxx xx x S 3 m m m 1m Backside View 1 APPLICATIONS S 2 D • Baseband switch • DC/DC conversion - Boost converters 1 G 4 D Bump Side View • Smart phones, portable media players G Marking Code: xxxx = 8472 xxx = Date / lot traceability code S N-Channel MOSFET Ordering Information: Si8472DB-T2-E1 (lead (Pb)-free and halogen-free) ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ = 150 °C) TA = 25 °C TA = 70 °C TA = 25 °C TA = 70 °C Pulsed Drain Current (t = 300 μs) Continuous Source-Drain Diode Current Maximum Power Dissipation LIMIT VDS VGS 20 ±8 4.5 a 3.6 a 3.3 b 2.6 b 20 1.5 a 0.65 b 1.8 a 1.1 a 0.78 b 0.5 b -55 to +150 260 260 ID IDM TC = 25 °C TA = 25 °C TA = 25 °C TA = 70 °C TA = 25 °C TA = 70 °C Operating Junction and Storage Temperature Range Package Reflow Conditions c SYMBOL IS PD TJ, Tstg VPR IR/Convection UNIT V A W °C Notes a. Surface mounted on 1" x 1" FR4 board with full copper, t = 10 s. b. Surface mounted on 1" x 1" FR4 board with minimum copper, t = 10 s. c. Refer to IPC/JEDEC® (J-STD-020), no manual or hand soldering. d. In this document, any reference to case represents the body of the MICRO FOOT device and foot is the bump. e. Based on TA = 25 °C. THERMAL RESISTANCE RATINGS PARAMETER t = 10 s Maximum Junction-to-Ambient a, b Maximum Junction-to-Ambient c, d t = 10 s Notes a. Surface mounted on 1" x 1" FR4 board with full copper. b. Maximum under steady state conditions is 100 °C/W. c. Surface mounted on 1" x 1" FR4 board with minimum copper. d. Maximum under steady state conditions is 190 °C/W. S15-1510-Rev. B, 29-Jun-15 SYMBOL TYPICAL MAXIMUM UNIT RthJA 55 125 70 160 °C/W Document Number: 63300 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8472DB www.vishay.com Vishay Siliconix SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 μA 20 - - V - 16 - - -2.6 - Static Drain-Source Breakdown Voltage VDS Temperature Coefficient ΔVDS/TJ ID = 250 μA mV/°C VGS(th) Temperature Coefficient ΔVGS(th)/TJ Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 0.4 - 0.9 V IGSS VDS = 0 V, VGS = ± 8 V - - ± 100 nA VDS = 20 V, VGS = 0 V - - 1 VDS = 20 V, VGS = 0 V, TJ = 70 °C - - 10 VDS ≤ -5 V, VGS = 4.5 V 10 - - VGS = 4.5 V, ID = 1.5 A - 0.036 0.044 VGS = 2.5 V, ID = 1 A - 0.041 0.050 VGS = 1.8 V, ID = 1 A - 0.046 0.056 VGS = 1.5 V, ID = 0.5 A - 0.050 0.070 VDS = 10 V, ID = 1.5 A - 16 - - 630 - - 105 - - 42 - Gate-Source Leakage Zero Gate Voltage Drain Current IDSS On-State Drain Current a ID(on) Drain-Source On-State Resistance a Forward Transconductance RDS(on) a gfs μA A Ω S Dynamic b Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Rg Turn-On Delay Time - 12 18 - 6.8 11 VDS = 10 V, VGS = 4.5 V, ID = 1.5 A - 0.8 - - 1.1 - VGS = 0.1 V, f = 1 MHz - 5.3 - - 7 15 - 15 30 - 30 60 tf - 10 20 td(on) - 5 10 - 15 30 - 30 60 - 10 20 - - 1.5 - - 20 - 0.7 1.2 tr td(off) Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time VDS = 10 V, VGS = 8 V, ID = 1.5 A td(on) Rise Time Turn-Off Delay Time VDS = 10 V, VGS = 0 V, f = 1 MHz tr td(off) Fall Time VDD = -10 V, RL = 6.7 Ω ID ≅ 1.5 A, VGEN = -4.5 V, Rg = 1 Ω VDD = -10 V, RL = 6.7 Ω ID ≅ -1.5 A, VGEN = -8 V, Rg = 1 Ω tf pF nC Ω ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulse Diode Forward Current ISM Body Diode Voltage VSD TA = 25 °C IS = 1.5 A, VGS = 0 A V Body Diode Reverse Recovery Time trr - 15 30 ns Body Diode Reverse Recovery Charge Qrr - 6 15 nC Reverse Recovery Fall Time ta - 7 - Reverse Recovery Rise Time tb - 8 - IF = 1.5 A, dI/dt = 100 A/μs, TJ = 25 °C ns Notes a. Pulse test; pulse width ≤ 300 μs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S15-1510-Rev. B, 29-Jun-15 Document Number: 63300 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8472DB www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 20 10 VGS = 5 V thru 2 V 8 VGS = 1.5 V ID - Drain Current (A) ID - Drain Current (A) 16 12 8 4 6 TC = 25 °C 4 TC = 125 °C 2 VGS = 1 V TC = - 55 °C 0 0 0.0 0.5 1.0 1.5 VDS - Drain-to-Source Voltage (V) 2.0 0.0 0.3 0.6 0.9 1.2 VGS - Gate-to-Source Voltage (V) Output Characteristics Transfer Characteristics 800 0.10 Ciss VGS = 1.5 V 600 0.08 C - Capacitance (pF) RDS(on) - On-Resistance (Ω) 1.5 0.06 VGS = 1.8 V VGS = 2.5 V 400 200 0.04 Coss VGS = 4.5 V Crss 0.02 0 0 4 8 12 16 20 0 4 8 12 16 ID - Drain Current (A) VDS - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current and Gate Voltage Capacitance 8 20 1.5 ID = 1.5 A RDS(on) - On-Resistance (Normalized) VGS - Gate-to-Source Voltage (V) 7 VDS = 10 V 6 5 VDS = 16 V VDS = 5 V 4 3 2 1 0 0 2 4 6 8 10 12 1.4 VGS = 4.5 V, 2.5 V, 1.8 V; ID = 1.5 A 1.3 1.2 1.1 VGS = 1.5 V; ID = 0.5 A 1.0 0.9 0.8 0.7 - 50 - 25 0 25 50 75 100 125 150 Qg - Total Gate Charge (nC) TJ - Junction Temperature (°C) Gate Charge On-Resistance vs. Junction Temperature S15-1510-Rev. B, 29-Jun-15 Document Number: 63300 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8472DB www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 0.10 100 ID = 1.5 A RDS(on) - On-Resistance (Ω) IS - Source Current (A) 0.08 10 TJ = 150 °C TJ = 25 °C 1 0.06 TJ = 125 °C 0.04 TJ = 25 °C 0.02 0.00 0.1 0.0 0.2 0.4 0.6 0.8 1.0 VSD - Source-to-Drain Voltage (V) 0 1.2 1 2 3 4 5 VGS - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 0.8 25 0.7 20 Power (W) VGS(th) (V) 0.6 ID = 250 μA 0.5 15 10 0.4 5 0.3 0.2 - 50 - 25 0 25 50 75 100 125 0 0.001 150 0.01 TJ - Temperature (°C) 0.1 1 10 100 1000 Time (s) Threshold Voltage Single Pulse Power, Junction-to-Ambient 100 Limited by RDS(on)* ID - Drain Current (A) 10 100 μs 1 ms 1 10 ms 0.1 100 ms 10 s, 1 s DC TA = 25 °C BVDSS Limited 0.01 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Safe Operating Area, Junction-to-Ambient S15-1510-Rev. B, 29-Jun-15 Document Number: 63300 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8472DB www.vishay.com Vishay Siliconix 5 1.5 4 1.2 Power Dissipation (W) ID - Drain Current (A) TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 3 2 0.9 0.6 0.3 1 0.0 0 0 25 50 75 100 TA - Case Temperature (°C) 125 Current Derating a 150 25 50 75 100 125 150 TA - Ambient Temperature (°C) Power Derating Note • When mounted on 1" x 1" FR4 with full copper. Note a. The power dissipation PD is based on TJ (max.) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. S15-1510-Rev. B, 29-Jun-15 Document Number: 63300 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8472DB www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 Notes: 0.1 0.05 PDM 0.02 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = RthJA = 100 °C/W 3. TJM - TA = PDMZthJA(t) Single Pulse 4. Surface Mounted 0.01 10 -4 10 -3 10 -2 10 -1 1 100 10 1000 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient (1" x 1" FR4 Board with Full Copper) 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 Notes: 0.1 0.1 PDM 0.05 t1 t2 1. Duty Cycle, D = 0.02 t1 t2 2. Per Unit Base = RthJA = 190 °C/W 3. TJM - TA = PDMZthJA(t) Single Pulse 4. Surface Mounted 0.01 10 -4 10 -3 10 -2 10 -1 1 Square Wave Pulse Duration (s) 10 100 1000 Normalized Thermal Transient Impedance, Junction-to-Ambient (1" x 1" FR4 Board with Minimum Copper) Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?63300. S15-1510-Rev. B, 29-Jun-15 Document Number: 63300 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix MICRO FOOT®: 4-Bumps (1 mm x 1 mm, 0.5 mm Pitch, 0.286 mm Bump Height) 4x Ø b1 S D G 4x 0.30 to 0.31 (Note 3) Solder mask-0.4 s e e XXXX XXX S D Mark on backside of die s e e D Recommended land pattern A2 b A1 A b1 Note 5 K Bump (Note 1) Notes 1. Bumps are 95.5/3.8/0.7 Sn/Ag/Cu. 2. Backside surface is coated with a Ti/Ni/Ag layer. 3. Non-solder mask defined copper landing pad. 4. Laser mark on the backside surface of die. 5. “b1” is the diameter of the solderable substrate surface, defined by an opening in the solder resist layer solder mask defined. 6. • is the location of pin 1 DIM. MILLIMETERS INCHES MIN. NOM. MAX. MIN. NOM. MAX. A 0.458 0.504 0.550 0.0180 0.0198 0.0217 A1 0.214 0.250 0.286 0.0084 0.0098 0.0113 A2 0.244 0.254 0.264 0.0096 0.0100 0.0104 b 0.297 0.330 0.363 0.0117 0.0130 0.0143 b1 0.250 e 0.500 0.0098 0.0197 s 0.210 0.230 0.250 0.0083 0.0091 0.0096 D 0.920 0.960 1.000 0.0362 0.0378 0.0394 K 0.029 0.065 0.102 0.0011 0.0026 0.0040 Note • Use millimeters as the primary measurement. ECN: T15-0176-Rev. A, 27-Apr-15 DWG: 6039 Revision: 27-Apr-15 1 Document Number: 69370 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000