Si8851EDB www.vishay.com Vishay Siliconix P-Channel 20 V (D-S) MOSFET FEATURES PRODUCT SUMMARY VDS (V) -20 RDS(on) () Max. ID (A) a, d 0.0080 at VGS = -4.5 V -16.7 0.0086 at VGS = -3.7 V -16.1 0.0110 at VGS = -2.5 V -14.2 0.0185 at VGS = -1.8 V -11 • TrenchFET® power MOSFET Qg (Typ.) • Small 2.4 mm x 2 mm outline area • Low 0.4 mm max. profile 70 nC • Typical ESD protection 6000 V HBM • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 Power MICRO FOOT® 2.4 x 2 5 APPLICATIONS 4 0.4 mm 2m m 1 885 x xx A1 2.4 mm G D S Backside View F E 3 C D 2 B S • Battery switch / load switch 1 • Power management A • For smart phones, tablet PCs, and mobile computing G D Bump Side View Ordering Information: P-Channel MOSFET Si8851EDB-T2-E1 (Lead (Pb)-free and halogen-free) ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS -20 Gate-Source Voltage VGS ±8 TA = 70 °C TA = 25 °C -13.4 a ID -7.7 b -6.2 b TA = 70 °C Pulsed Drain Current (t = 100 μs) Continuous Source-Drain Diode Current IDM TC = 25 °C TA = 25 °C TA = 70 °C TA = 25 °C -2.6 a IS -0.55 b 3.1 a 2a PD Package Reflow Conditions c W 0.66 b 0.43 b TA = 70 °C Operating Junction and Storage Temperature Range A -80 TA = 25 °C Maximum Power Dissipation V -16.7 a TA = 25 °C Continuous Drain Current (TJ = 150 °C) UNIT TJ, Tstg -55 to +150 VPR 260 IR/Convection 260 °C Notes a. Surface mounted on 1" x 1" FR4 board with full copper, t = 5 s. b. Surface mounted on 1" x 1" FR4 board with minimum copper, t = 5 s. c. Refer to IPC/JEDEC® (J-STD-020), no manual or hand soldering. d. Based on TA = 25 °C. THERMAL RESISTANCE RATINGS PARAMETER SYMBOL Maximum Junction-to-Ambient a, b t=5s Maximum Junction-to-Ambient c, d t=5s RthJA Typical Maximum 30 40 145 188 Unit °C/W Notes a. Surface mounted on 1" x 1" FR4 board with full copper. b. Maximum under steady state conditions is 85 °C/W. c. Surface mounted on 1" x 1" FR4 board with minimum copper. d. Maximum under steady state conditions is 330 °C/W. S15-1120-Rev. B, 18-May-15 Document Number: 64197 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8851EDB www.vishay.com Vishay Siliconix SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = -250 μA -20 - - V - -11 - - 3 - Static Drain-Source Breakdown Voltage VDS/TJ VDS Temperature Coefficient VGS(th) Temperature Coefficient VGS(th)/TJ Gate-Source Threshold Voltage VGS(th) Gate-Source Leakage IGSS Zero Gate Voltage Drain Current IDSS On-State Drain Current a ID(on) Drain-Source On-State Resistance a Forward Transconductance a RDS(on) gfs ID = -250 μA VDS = VGS, ID = -250 μA -0.45 - -1 VDS = 0 V, VGS = ± 4.5 V - - ± 0.5 VDS = 0 V, VGS = ± 8 V - - ± 10 VDS = -20 V, VGS = 0 V - - -1 VDS = -20 V, VGS = 0 V, TJ = 70 °C - - -10 VDS -5 V, VGS = -4.5 V -5 - - VGS = -4.5 V, ID = -7 A - 0.0060 0.0080 VGS = -3.7 V, ID = -7 A - 0.0065 0.0086 VGS = -2.5 V, ID = -5 A - 0.0081 0.0110 VGS = -1.8 V, ID = -3 A - 0.0130 0.0185 VDS = -10 V, ID = -7 A - 50 - - 6900 - - 640 - - 715 - - 120 180 - 70 105 - 8 - - 14 - - 2.3 - - 35 70 mV/°C V μA A S Dynamic b Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Rg VDS = -10 V, VGS = 0 V, f = 1 MHz VDS = -10 V, VGS = -8 V, ID = -5 A VDS = -10 V, VGS = -4.5 V, ID = -5 A VGS = -0.1 V, f = 1 MHz td(on) tr VDD = -10 V, RL = 2 ID -5 A, VGEN = -4.5 V, Rg = 1 - 40 80 - 115 230 tf - 35 70 td(on) - 15 30 td(off) tr td(off) VDD = -10 V, RL = 2 ID -5 A, VGEN = -8 V, Rg = 1 - 10 20 - 110 220 - 25 50 - - -2.6 - - -80 IS = -5 A, VGS = 0 V - -0.8 -1.2 IF = -5 A, dI/dt = 100 A/μs, TJ = 25 °C tf pF nC ns Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulse Diode Forward Current (t = 100 μs) ISM Body Diode Voltage VSD TA = 25 °C A V Body Diode Reverse Recovery Time trr - 40 80 ns Body Diode Reverse Recovery Charge Qrr - 30 60 nC Reverse Recovery Fall Time ta - 16 - Reverse Recovery Rise Time tb - 24 - ns Notes a. Pulse test; pulse width 300 μs, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S15-1120-Rev. B, 18-May-15 Document Number: 64197 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8851EDB www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 2.00 10-1 10-2 1.20 IGSS - Gate Current (A) IGSS - Gate Current (mA) 1.60 TJ = 25 °C 0.80 10-3 10-4 TJ = 150 °C 10-5 TJ = 25 °C 10-6 0.40 10-7 0.00 10-8 0 2 4 6 8 10 12 14 0 2 4 VGS - Gate-Source Voltage (V) 6 8 10 12 14 VGS - Gate-to-Source Voltage (V) Gate Current vs. Gate-Source Voltage Gate Current vs. Gate-Source Voltage 20 80 VGS = 5 V thru 2.5 V ID - Drain Current (A) ID - Drain Current (A) 16 VGS = 2 V 60 40 20 12 8 TC = 25 °C 4 TC = 125 °C VGS = 1.5 V 0 0.0 TC = - 55 °C 0 0.5 1.0 1.5 2.0 VDS - Drain-to-Source Voltage (V) 2.5 0.0 3.0 0.3 Output Characteristics 0.9 1.2 1.5 Transfer Characteristics 0.060 10000 VGS = 1.8 V 0.050 8000 C - Capacitance (pF) RDS(on) - On-Resistance (Ω) 0.6 VGS - Gate-to-Source Voltage (V) 0.040 0.030 0.020 VGS = 3.7 V VGS = 2.5 V Ciss 6000 4000 2000 0.010 Coss Crss VGS = 4.5 V 0.000 0 0 20 40 60 80 ID - Drain Current (A) On-Resistance vs. Drain Current and Gate Voltage S15-1120-Rev. B, 18-May-15 0 4 8 12 16 20 VDS - Drain-to-Source Voltage (V) Capacitance Document Number: 64197 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8851EDB www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 1.4 ID = 5 A RDS(on) - On-Resistance (Normalized) VGS - Gate-to-Source Voltage (V) 8 VDS = 5 V 6 VDS = 10 V 4 VDS = 16 V 2 0 VGS = 4.5, 3.7 V, ID = 7 A 1.3 VGS = 2.5 V, ID = 5 A 1.2 1.1 VGS = 1.8 V, ID = 5 A 1.0 0.9 0.8 0.7 0 20 40 60 80 100 120 - 50 - 25 0 Gate Charge 50 75 100 125 150 On-Resistance vs. Junction Temperature 0.030 100 TJ = 150 °C 0.025 10 RDS(on) - On-Resistance (Ω) IS - Source Current (A) 25 TJ - Junction Temperature (°C) Qg - Total Gate Charge (nC) TJ = 25 °C 1 ID = 7 A 0.020 0.015 TJ = 125 °C 0.010 TJ = 25 °C 0.005 0.000 0.1 0.0 0.2 0.4 0.6 0.8 1.0 0 1.2 1 VSD - Source-to-Drain Voltage (V) 2 3 4 5 VGS - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage On-Resistance vs. Gate-to-Source Voltage 0.9 30 0.8 25 0.7 Power (W) VGS(th) (V) 20 0.6 ID = 250 μA 0.5 15 0.4 10 0.3 5 0.2 - 50 - 25 0 25 50 75 TJ - Temperature (°C) Threshold Voltage S15-1120-Rev. B, 18-May-15 100 125 150 0 0.001 0.01 0.1 1 Time (s) 10 100 1000 Single Pulse Power, Junction-to-Ambient Document Number: 64197 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8851EDB www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 1000 Limited by RDS(on)* IDM Limited 100 ID - Drain Current (A) ID Limited 100 us 10 1 ms 10 ms 1 100 ms 1s 10 s DC 0.1 TA = 25 °C 0.01 0.01 BVDSS Limited 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) * VGS > minimum VGS at which RDS(on) is specified Safe Operating Area, Junction-to-Ambienta 4.00 20 3.50 3.00 2.50 Power (W) ID - Drain Current (A) 15 10 2.00 1.50 1.00 5 0.50 0.00 0 0 25 50 75 100 125 150 TA - Ambient Temperature (°C) Current Derating a 0 25 50 75 100 125 150 TA - Ambient Temperature (°C) Power Deratinga Note a. When mounted on 1" x 1" FR4 with full copper and t = 5 s S15-1120-Rev. B, 18-May-15 Document Number: 64197 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si8851EDB www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 Notes: 0.1 PDM 0.1 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = R thJA = 330 °C/W 0.05 3. T JM - T A = PDMZthJA(t) 0.02 0.01 0.0001 Single Pulse 0.001 0.01 4. Surface Mounted 0.1 1 10 100 1000 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient (on 1" x 1" FR4 Board with minimum Copper) Normalized Effective Transient Thermal Impedance 1 Duty Cycle = 0.5 0.2 Notes: 0.1 0.1 PDM 0.05 t1 t2 1. Duty Cycle, D = t1 t2 2. Per Unit Base = R thJA = 65 °C/W 0.02 3. T JM - T A = PDMZthJA(t) 4. Surface Mounted Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Ambient (on 1" x 1" FR4 Board with maximum Copper) Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?64197. S15-1120-Rev. B, 18-May-15 Document Number: 64197 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix MICRO FOOT®: 30-Bumps (2.4 mm x 2 mm, 0.4 mm Pitch, 0.184 mm Bump Height) 30x Ø 0.205 to 0.225 Solder mask~Ø 0.215 30x Ø b1 Index-bump (Note 6) 4 2 G G S S S S S D D D D D S S S S S D D D D D S S S S S e e e A e D e B e C E e 0.40 D E e e D e XXXX F s XXX D e e 1 e 3 e 5 0.40 s Top side (die back) e e e e D Recommended land pattern Bump side view K A1 Bump (Note 1) A2 A b b1 Notes 1. Bumps are 95.5/3.8/0.7 Sn/Ag/Cu. 2. Backside surface is coated with a Ti/Ni/Ag layer. 3. Non-solder mask defined copper landing pad. 4. Laser marks on the silicon die back. 5. “b1” is the diameter of the solderable substrate surface, defined by an opening in the solder resist layer solder mask defined. 6. • is the location of pin 1 DIM. MILLIMETERS INCHES MIN. NOM. MAX. MIN. NOM. MAX. A 0.328 0.365 0.402 0.0129 0.0144 0.0158 A1 0.136 0.160 0.184 0.0054 0.0063 0.0072 A2 0.192 0.205 0.218 0.0076 0.0081 0.0086 b 0.200 0.220 0.240 0.0079 0.0087 0.0094 b1 0.175 e 0.0069 0.400 0.0157 s 0.160 0.180 0.200 0.0063 0.0071 D 1.920 1.960 2.000 0.0756 0.0772 0.0079 0.0787 E 2.320 2.360 2.400 0.0913 0.0929 0.0945 K 0.040 0.070 0.100 0.0016 0.0028 0.0039 Note • Use millimeters as the primary measurement. ECN: T15-0177-Rev. A, 27-Apr-15 DWG: 6040 Revision: 27-Apr-15 1 Document Number: 69366 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000