ESD0P8RFL Data Sheet (550 KB, EN)

ESD0P8RFL
RF ESD Protection Diodes
• ESD protection of RF antenna /
interfaces or ultra high speed data lines acc. to:
IEC61000-4-2 (ESD): ± 20 kV (air / contact)
IEC61000-4-4 (EFT): 40 A (5/50 ns)
IEC61000-4-5 (surge): 10 A (8/20 µs)
• Very low line capacitance: 0.8 pF @ 1 GHz
( 0.4 pF per diode)
• Ultra low series inductance: 0.4 nH per diode
• Very low clamping voltage
• Ultra small leadless package 1.2 x 0.8 x 0.39 mm
• Pb-free (RoHS compliant) package
Applications in anti-parallel configuration
• For low RF signal levels without superimposed
DC voltage: e.g. GPS, XM-Radio, Sirius, DVB,
DMB, DAB, Remote Keyless Entry
Applications in rail-to-rail configuration
• For high RF signal levels or low RF signal levels
with superimposed DC voltage: e.g. HDMI, S-ATA,
Gbit Ethernet
• For more technical details on ESD and Antenna
protection please refer to Application Note
No.103 on www.infineon.com/tvsdiodes
ESD0P8RFL
4
3
D2
D1
1
2
Type
Package
Configuration
Marking
ESD0P8RFL
TSLP-4-7
anti-parallel
E8
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ESD0P8RFL
Maximum Ratings at TA = 25°C, unless otherwise specified
Parameter
Symbol
Value
Unit
ESD contact discharge1)
VESD
20
kV
Peak pulse current (tp = 8 / 20 µs)2)
Ipp
10
A
Operating temperature range
Top
-55...150
°C
Storage temperature
Tstg
-65...150
Electrical Characteristics at TA = 25°C, unless otherwise specified
Parameter
Symbol
Values
Unit
min.
typ.
max.
Characteristics -
Reverse working voltage3)
VRWM
-
-
50
V
Reverse current3)
IR
-
-
100
nA
VFC
-
12
15
V
CT
-
0.8
-
pF
LS
-
0.4
-
nH
VR = 50 V
Forward clamping voltage2)
IPP = 10 A
Line capacitance4)
VR = 0 V, f = 1 GHz
Series inductance (per diode)
1V
ESD according to IEC61000-4-2, only valid in anti-parallel or rail-to-rail connection.
Please refer to the application examples.
2I
pp according to IEC61000-4-5, only valid in anti-parallel or rail-to-rail connection.
Please refer to the application examples.
valid in rail-to-rail configuration with VCC ≥V RWM
4Total capacitance line to ground (2 diodes in parallel)
3Only
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ESD0P8RFL
Forward clamping voltage VFC = ƒ(IPP)
tp = 8 / 20 µs
Reverse current IR = ƒ(VR )
TA = Parameter
leakage in rail-to-rail configuration
10 -5
A
12
V
125°C
10 -6
10
85°C
10
-7
8
IR
VFC
9
7
10 -8
25°C
6
10 -9
5
4
10 -10
3
2
10 -11
-40°C
1
0
1
2
3
4
5
6
7
A
8
10 -12
0
10
10
20
30
40
50
Ipp
V
70
VR
Forward current IF = ƒ (VF)
Line capacitance CT = ƒ (f)
TA = Parameter
VR = 0 V
leakage in anti-parallel configuration
100
1.5
µA
60
125°C
85°C
pF
CT
IF
40
25°C
20
-40°C
0
-20
-40°C
25°C
-40
85°C
0.5
125°C
-60
-80
-100
-600
-400
-200
0
200
mV
0
0
600
VF
500
1000
1500
2000
MHz
3000
f
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ESD0P8RFL
Insertion loss IL = -|S21|2 = ƒ(f)
VR = 0 V, Z = 50 Ω
0
dB
|S21|²
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
-1
0
500
1000
1500
2000
MHz
3000
f
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ESD0P8RFL
1. Application example
1 RF signal channel, anti-parallel configuration,
please refer also to Application Note No.103
1 protected signal line,
superimposed DC voltage up to
±VF (diode forward volatge)
I/O
ESD
sensitive
circuit
Line to ground capacitance
0.8 pF @1 GHz
The protection diode should be
placed very close to the location
where the ESD or other transients
can occur to keep loops and
inductances as small as possible.
Grounded pins should be
connected in parallel directly to a
ground plane on the board.
2. Application example
1 RF signal channel, rail-to-rail configuration
1 protected signal line,
superimposed DC voltage up to
+Vcc (voltage supply)
I/O
ESD
sensitive
circuit
Line to ground capacitance
0.8 pF @1 GHz
+Vcc
5
Cathode of one diode should be
connected to the positive supply
voltage +Vcc and anode of the
opposite diode should be
connected directly to a ground
plane on the board. Clamped
input voltage at I/O port is limited
to Vcc + VF at positive transients
and 0V - VF at negative transients
(VF ... diode forward voltage
drop).
2011-06-27
Package TSLP-4-7
ESD0P8RFL
Package Outline
Bottom view
0.8 ±0.05
4 x 0.25 ±0.035 1)
0.75 ±0.05
0.05 MAX.
3
2
4
1
2
3
1
1.2 ±0.05
0.39 +0.01
-0.03
4 x 0.35 ±0.035
1)
Top view
4
0.45 ±0.05
Pin 1 marking
1) Dimension applies to plated terminal
Foot Print
For board assembly information please refer to Infineon website "Packages"
0.8
0.4
0.38
0.42
1.18
0.4
1.2
0.4
0.38
0.78
0.28
0.3
0.28
0.3
0.22
0.2
Copper
Stencil apertures
Solder mask
Marking Layout (Example)
BAR90-07LRH
Type code
Pin 1 marking
Laser marking
Standard Packing
Reel ø180 mm = 15.000 Pieces/Reel
0.5
1.45
8
4
Pin 1
marking
1.05
6
2011-06-27
ESD0P8RFL
Edition 2009-11-16
Published by
Infineon Technologies AG
81726 Munich, Germany
 2009 Infineon Technologies AG
All Rights Reserved.
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of conditions or characteristics. With respect to any examples or hints given herein,
any typical values stated herein and/or any information regarding the application of
the device, Infineon Technologies hereby disclaims any and all warranties and
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intellectual property rights of any third party.
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For further information on technology, delivery terms and conditions and prices,
please contact the nearest Infineon Technologies Office (<www.infineon.com>).
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For information on the types in question, please contact the nearest Infineon
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