TVS Diode Transient Voltage Suppressor Diodes ESD203-B1-02 Series Bi-directional ESD / Transient / Surge Protection Diodes ESD203-B1-02ELS ESD203-B1-02EL Data Sheet Revision 1.3, 2013-12-19 Final Power Management & Multimarket ESD203-B1-02 Series Revision History: Rev. 1.2,, 2013-11-26 Page or Item Subjects (major changes since previous revision) Revision 1.3, 2013-12-19 5 Update of Table 2-2) Trademarks of Infineon Technologies AG AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™. Other Trademarks Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited. Last Trademarks Update 2010-10-26 Final Data Sheet 2 Revision 1.3, 2013-12-19 ESD203-B1-02 Series Bi-directional ESD / Transient / Surge Protection Diodes 1 Bi-directional ESD / Transient / Surge Protection Diodes 1.1 Features • • • • • ESD/Transient/Surge protection of one data / Vbus line exceeding standard: – IEC61000-4-2 (ESD): ±30 kV (air/contact discharge) – IEC61000-4-4 (EFT): ±50 A (5/50 ns) – IEC61000-4-5 (surge): ±5 A (8/20 μs) Bi-directional symmetrical working voltage: VRWM = ±13.2 V Low capacitance: CL = 6 pF (typ.) Very low ESD clamping voltage, very low dynamic resistance: RDYN = 0.29 Ω (typ.) Pb-free (RoHS compliant) and halogen free package 1.2 • Application Examples ESD protection of keypad, touchpad, buttons, audio lines, ect. 1.3 Product Description Pin 1 Pin 2 Pin 1 marking (lasered) Pin 1 TSLP-2 Pin 1 Pin 2 Pin 2 TSSLP-2 a) Pin configuration b) Schematic diagram P G-TS (S)LP -2_Dual_Diode_S erie_P inConf_and_S c hematic Diag. v s d Figure 1-1 Pin Configuration and Schematic Diagram Table 1-1 Ordering Information Type Package Configuration Marking code ESD203-B1-02ELS TSSLP-2-4 1 line, bi-directional H ESD203-B1-02EL TSLP-2-20 1 line, bi--directional H Final Data Sheet 3 Revision 1.3, 2013-12-19 ESD203-B1-02 Series Characteristics 2 Characteristics 2.1 Maximum Ratings Table 2-1 Maximum Ratings at TA = 25 °C, unless otherwise specified1) Parameter Symbol Values Unit Min. Typ. Max. VESD - - 30 kV IPP - - 5 A Peak pulse power (tp = 8/20 μs) PPK - - 115 W Operating temperature range TOP -55 - 125 °C Storage temperature Tstg -65 - 150 °C 2) ESD air / contact discharge Peak pulse current (tp = 8/20 μs) 3) 3) 1) Device is electrically symmetrical 2) VESD according to IEC61000-4-2 3) IPP according to IEC61000-4-5 Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. 2.2 Electrical Characteristics at TA = 25 °C, unless otherwise specified !"# Figure 2-1 Definitions of electrical characteristics Final Data Sheet 4 Revision 1.3, 2013-12-19 ESD203-B1-02 Series Characteristics Table 2-2 DC Characteristics at TA = 25 °C, unless otherwise specified1) Parameter Symbol Values Unit Min. Typ. Max. Note / Test Condition Reverse working voltage VRWM - - 13.2 V Reverse current IR - 1 50 nA Trigger voltage Vt1 13.7 - - V Holding voltage Vh 13.7 16 - V IR = 10 mA Unit Note / Test Condition pF VR = 0 V, f = 1 MHz VR = 12 V 1) Device is electrically symmetrical Table 2-3 AC Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol Line capacitance Table 2-4 CL Values Min. Typ. Max. - 6 9 ESD and Surge Characteristics at TA = 25 °C, unless otherwise specified Parameter Symbol 1) Clamping voltage VCL 2) Clamping voltage Dynamic resistance 1) RDYN Values Unit Note / Test Condition V ITLP = 16 A Min. Typ. Max. - 17 - - 23 - ITLP = 30 A - 17 - IPP = 1 A - 20 23 IPP = 5 A - 0.29 - Ω 1) ANSI/ESD STM5.5.1 - Electrostatic Discharge Sensitive Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 Ω, tp = 100 ns, tr , = 0.6 ns, ITLP and VTLP averaging window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP characteristic between ITLP1 = 5 A and ITLP2 = 40 A. Please refer to Application Note AN210[1] 2) IPP according to IEC61000-4-5 (tp = 8/20 μs) Final Data Sheet 5 Revision 1.3, 2013-12-19 ESD203-B1-02 Series Typical Characteristics at TA = 25 °C, unless otherwise specified 3 Typical Characteristics at TA = 25 °C, unless otherwise specified -6 10 -7 10 -8 IR [A] 10 -9 10 -10 10 10-11 -12 10 -15 -10 -5 0 VR [V] 5 10 15 Figure 3-1 Reverse current: IR = f(VR) 9 8.5 8 7.5 CL [pF] 7 6.5 6 5.5 5 4.5 4 3.5 3 -14 -12 -10 -8 -6 -4 -2 0 2 VR [V] 4 6 8 10 12 14 Figure 3-2 Line capacitance: CL = f(VR), f = 1MHz Final Data Sheet 6 Revision 1.3, 2013-12-19 ESD203-B1-02 Series Typical Characteristics at TA = 25 °C, unless otherwise specified 40 ESD203-B1-02series RDYN 20 30 15 20 10 10 5 0 0 -10 -5 -20 -10 Equivalent VIEC [kV] ITLP [A] RDYN = 0.29 Ω RDYN = 0.29 Ω -30 -15 -40 -20 -30 -20 -10 0 10 20 30 VTLP [V] Figure 3-3 Clamping voltage (TLP): ITLP = f(VTLP) according ANSI/ESD STM5.5.1 - Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 Ω, tp = 100 ns, tr = 0.6 ns, ITLP and VTLP averaging window: t1 = ns to t2 = 60 ns, extraction of dynamic resistance using squares fit to TLP characteristics between ITLP1 = 5 A and ITLP2 = 40 A. Please refer to Application Note AN210 [1] Final Data Sheet 7 Revision 1.3, 2013-12-19 ESD203-B1-02 Series Typical Characteristics at TA = 25 °C, unless otherwise specified ESD203-B1-02series RDYN 5 4 3 RDYN = 0.75 Ω 2 IPP [A] 1 0 -1 -2 RDYN = 0.75 Ω -3 -4 -5 -20 -15 -10 -5 0 VCL [V] 5 10 15 20 Figure 3-4 Pulse current (IEC61000-4-5) versus clamping voltage: IPP = f(VCL) Final Data Sheet 8 Revision 1.3, 2013-12-19 ESD203-B1-02 Series Typical Characteristics at TA = 25 °C, unless otherwise specified 125 Scope: 6 GHz, 20 GS/s 100 VCL [V] 75 VCL-max-peak = 64 V 50 VCL-30ns-peak = 16 V 25 0 -25 -50 0 50 100 150 200 tp [ns] 250 300 350 400 450 Figure 3-5 IEC61000-4-2 : VCL = f(t), 8 kV positive pulse from pin 1 to pin 2 25 Scope: 6 GHz, 20 GS/s 0 VCL [V] -25 -50 VCL-max-peak = -64 V -75 VCL-30ns-peak = -16 V -100 -125 -50 0 50 100 150 200 tp [ns] 250 300 350 400 450 Figure 3-6 IEC61000-4-2 : VCL = f(t), 8 kV negative pulse from pin 1 to pin 2 Final Data Sheet 9 Revision 1.3, 2013-12-19 ESD203-B1-02 Series Typical Characteristics at TA = 25 °C, unless otherwise specified 125 Scope: 6 GHz, 20 GS/s 100 VCL [V] 75 VCL-max-peak = 104 V 50 VCL-30ns-peak = 20 V 25 0 -25 -50 0 50 100 150 200 tp [ns] 250 300 350 400 450 Figure 3-7 IEC61000-4-2 : VCL = f(t), 15 kV positive pulse from pin 1 to pin 2 25 Scope: 6 GHz, 20 GS/s 0 VCL [V] -25 -50 VCL-max-peak = -99 V -75 VCL-30ns-peak = -19 V -100 -125 -50 0 50 100 150 200 tp [ns] 250 300 350 400 450 Figure 3-8 IEC61000-4-2 : VCL = f(t), 15 kV negative pulse from pin 1 to pin 2 Final Data Sheet 10 Revision 1.3, 2013-12-19 ESD203-B1-02 Series Package Information 4 Package Information 4.1 TSSLP-2-4 Top view Bottom view 0.31 +0.01 -0.02 0.32 ±0.05 0.355 0.62 ±0.05 2 Cathode marking 0.05 MAX. 0.26 ±0.035 0.2 ±0.035 1) 1 1) 1) Dimension applies to plated terminals TSSLP-2-3, -4-PO V01 Figure 4-1 TSSLP-2-4: Package outline (dimension in mm) 0.19 0.24 Solder mask 0.19 0.57 0.14 0.62 Copper 0.19 0.27 0.24 0.32 Stencil apertures TSSLP-2-3, -4-FP V02 Figure 4-2 TSSLP-2-4: Footprint (dimension in mm) g 0.35 Tape type Ex Ey Punched Tape 0.43 0.73 Embossed Tape 0.37 0.67 8 Ey 4 Cathode marking Deliveries can be both tape types (no selection possible). Specification allows identical processing (pick & place) by users. Ex TSSLP-2-3, -4-TP V03 Figure 4-3 TSSLP-2-4: Tape and reel (dimension in mm) Figure 4-4 TSSLP-2-4: Marking example Final Data Sheet 11 Revision 1.3, 2013-12-19 ESD203-B1-02 Series Package Information 4.2 TSLP-2-20 Top view Bottom view 0.31 +0.01 -0.02 0.6 ±0.05 1±0.05 2 1 0.25 ±0.035 1) 0.65 ±0.05 0.05 MAX. 0.5 ±0.035 1) Cathode marking 1) Dimension applies to plated terminals TSLP-2-19, -20-PO V01 Figure 4-5 TSLP-2-20: Package outline(dimension in mm), proposal 0.35 0.28 0.38 0.93 0.3 1 Copper 0.28 0.45 0.35 0.6 Solder mask Stencil apertures TSLP-2-19, -20-FP V01 Figure 4-6 TSLP-2-20: Footprint (dimension in mm), proposal 0.4 1.16 Cathode marking 8 4 0.76 TSLP-2-19, -20-TP V02 Figure 4-7 TSLP-2-20: Tape information (dimension in mm), proposal Type code 12 Cathode marking TSLP-2-19, -20-MK V01 Figure 4-8 TSLP-2-20: Marking example Final Data Sheet 12 Revision 1.3, 2013-12-19 ESD203-B1-02 Series References References [1] Infineon AG - Application Note AN210: Effective ESD Protection design at System Level Using VF-TLP Characterization Methodology Final Data Sheet 13 Revision 1.3, 2013-12-19 w w w . i n f i n e o n . c o m Published by Infineon Technologies AG