VRM8.5 Multiple-Output Motherboard Power Controllers (ISL6523EVAL1, ISL6524EVAL1) TM Application Note May 2001 AN9925 Author: Bogdan M. Duduman Introduction Today’s high-performance desktop PC architectures demand power solutions featuring increased integration and reduced system-level costs. The Intersil ISL6523 and ISL6524 are complex controllers that integrate two and one, respectively, switching regulators, as well as two and three, respectively, linear controllers in a single package. The switching converters employ voltage-mode control architecture and high circuit performance is insured by the use of high gain-bandwidth product error amplifiers, highaccuracy references, and continuously adaptive shootthrough protection. The ICs offer a full range of protection features including overcurrent, overvoltage, as well as fault condition signaling and/or shutdown. All these combined features makes them ideal for microprocessor point-of-use power supply solutions. The ISL6523 and ISL6524 were designed to provide most of the active-state power needs of a typical Tualatin-based system. Some Coppermine-T and Celeron-based systems may also benefit from the ISL6523 or ISL6524. [1,2] The ISL6523EVAL1 and ISL6524EVAL1 evaluation boards embody 4-output regulator solutions targeted at supplying power to the microprocessor core (1.05V - 1.825V), AGTL+ communication bus (1.2V), 4X AGP video (1.5V), and the ICH/MCH chip set core (1.8V). Evaluation Board Setup Important! The evaluation boards were not designed to support a continuous VCORE output current in excess of 15A for extended periods of time. When testing either board to VOUT1 output currents in excess of 15A, restrict the ON time to less than 2 minutes, followed by at least 4 minutes OFF. To facilitate the evaluation of the ISL6523 or ISL6524 in a typical setting, both evaluation boards were designed to be powered primarily from an ATX power supply [3]. However, the boards have hook-up turret terminals that allow them to be powered from standard laboratory power supplies. Circuit Setup Before connecting an input supply to the board, consult the circuit schematics and familiarize yourself with the various connection options offered by either evaluation board. ➤ Set the Power-On Switch Ensure the ‘ATX ON’ (SW2) switch is in the off position (lever pointing away from ‘ATX ON’ marking). ➤ Set Core Voltage SW1 SW1, by means of the on-chip D/A converter, sets the output voltage for the VCORE (VOUT1) output according to the 1 corresponding table detailed in the IC’s data sheet. Consult the data sheet and set the status of the VID pins according to the core output voltage level you wish to regulate to. ➤ Hookup Guide Using Standard Bench Supplies Connect a 5V, 16A supply to the +5VIN input, a 3.3V, 6A, supply to the +3.3VIN input, and a +12V, 100mA to the +12VIN input. Using a small jumper wire, connect the +5VIN and +5VSB inputs. Connect typical loads to all the evaluation board’s outputs. Consult Table 1 for maximum loads supported by the design of the board in the configuration received; read the ‘Modifications’ section for information on modifying either evaluation board to meet your special needs. ➤ Hookup Guide Using a Standard ATX Supply Connect the 20-pinATX connector to the on-board J1 mating connector. Connect typical loads to all the evaluation board’s outputs. Consult Table 1 for maximum loads supported by the design of the board in the configuration received; read the ‘Modifications’ section for information on modifying either evaluation board to meet your special needs. Operation ➤ Provide Power to the Board Turn on the bench supplies. If using an ATX supply, plug it into the mains, and if it has an AC switch, turn it on. The ‘ATX OFF’ LED should light up, indicating the presence of 5V standby on board. Flip on the ‘ATX ON’ switch and the ‘ATX OFF’ LED should turn off. Shortly thereafter ‘VTT PGOOD’, ‘POWER GOOD’ and ‘ATX PGOOD’ LEDs should light up indicating power good status on all the outputs, as well as the input voltages provided by the ATX supply. If bench supplies are used, the‘ATX OFF’ LED will only report the status of the SW2 switch, and the ‘ATX PGOOD’ LED will not light up under any circumstance; the other indicators will preserve their functionality. ➤ Examine Start-Up Waveforms / Output Quality Under Varying Loads Start-up is immediate following application of bias voltage. Using an oscilloscope or other laboratory equipment, you may study the ramp-up and/or regulation of the controlled voltages under various loading conditions. For maximum versatility, we recommend the use of a programmable electronic load. Fault Handling In case of a fault condition (output undervoltage on the linear outputs, or overcurrent on the switching output), the entire IC shuts down and undergoes a re-start attempt. Three consecutive fault situations on any of the outputs (single fault on VOUT4, 1.8V output) latch the chip off. Review the appropriate data sheet section for more detail. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2001, All Rights Reserved Application Note 9925 Reference Design TABLE 1. ISL6523EVAL1 MAXIMUM OUTPUT LOADING IOUT dIOUT/dt TOLERANCE (STATIC/ DYNAMIC) VCORE (VOUT1) 22.0A(pk) 14.0A(avg) 20A/µs Note 1 1.2VVTT (VOUT2) 10.0A(pk) 4.0A(avg) 1A/µs 5% /9% 1.5VAGP (VOUT3) 3.0A(pk) 1.0A(avg) 1A/µs 3% /5% 1.8VMCH (VOUT4) 3.0A(pk) 1.0A(avg) 1A/µs 3% /5% 80 60 ISL6524EVAL1 40 VCORE (VOUT1) 22.0A(pk) 14.0A(avg) 20A/µs Note 1 1.2VVTT (VOUT2) 6.0A(pk) 1.0A(avg) 1A/µs 5% /9% 1.5VAGP (VOUT3) 3.0A(pk) 1.0A(avg) 1A/µs 3% /5% 1.8VMCH (VOUT4) 3.0A(pk) 1.0A(avg) 1A/µs 3% /5% General VOUT1 DEVIATION FROM DAC SETPOINT (mV) The evaluation board is built on 2-ounce, 4-layer, printed circuit board (contact Intersil for layout plots). Most of the components specific to the evaluation board alone, which are not needed in a real computer application, are placed on the bottom side of the board. Left on top of the evaluation board are the components necessary to exemplify a typical application, as well as the user interface (input/output terminals, test points, switches, etc.). 20 0 -20 -40 -60 IDEAL LOAD LINE STATIC TOLERANCE DYNAMIC TOLERANCE -80 0 2 4 6 8 10 12 IOUT (A) OUTPUT VOLTAGE ISL6523EVAL1 NOTE: 1. See Figure 1 for regulation tolerance details. 14 16 18 20 22 FIGURE 1. VOUT1 REGULATION ENVELOPE From a thermal performance perspective, do not operate the evaluation board for extended periods of time at output current levels exceeding the design envelope, as detailed in Table 1. VOUT1 Regulation Performance The core regulator (VOUT1) was designed to meet the regulation envelope detailed in Figure 1. With a DAC-set regulation point of 1.750V, the output voltage conforms to the regulation limits shown. Although the droop pictured (difference between voltage at a lesser load and voltage at a higher load) will be the same regardless of the DAC setting, the offset shown will exhibit a proportional dependence. The resistive divider sets this offset at 2.57%. For example, the ideal load line at no load and 1.600V DAC setting will actually originate at 41mV positive offset. Figures 2 through 8 depict the evaluation boards’ performance during typical operational situations.To simulate minimum loading conditions, unless otherwise specified, the outputs were loaded with 65Ω resistive loads. As performance is very similar amongst the two evaluation boards, some characteristics were shown for only one of them, with the implicit understanding of similarity (as appropriate). Design Envelope Although an actual computer system application may have somewhat different requirements, the ISL6523EVAL1 and ISL6524EVAL1 boards were designed to meet the maximum output loading described in Table 1. Dynamic output tolerances and current ratings can be adjusted by properly selecting the components external to the ISL6523 or ISL6524. 2 Soft-Start Start-Up Figure 2 shows a typical ISL6524EVAL1 start-up. For this capture, the ATX supply powering the board is turned on, at time T0. At time T1, the 1.8VMCH output starts ramping up, maintaining less than a 2V difference to the ATX3.3V output (sensed at the VAUX pin). At time T2, all input voltages reach regulation, and the 1.2VVTT output starts its ramp-up. At time T3, the 1.2VVTT output reaches VTT_PGOOD threshold and SS13 is released. Shortly after T3, the still rising SS24 brings the 1.8VMCH output in regulation. At T4, the SS13 clamp starts releasing outputs 1 and 3 (VCORE and 1.5VAGP), allowing them to ramp up to their regulation levels. At time T5, all outputs controlled by the ISL6524 are within regulation limits. Application Note 9925 should yield a 1ms delay). At time T2, all conditions met, PGOOD goes high. 3.3VIN Note that the two power good pins are pulled high to VTT and VCORE, respectively. If TTL compatibility is desired, feel free to populate the provided spare footprints to ATX3.3V level (while de-populating the default pull-up resistors). 500mV/DIV. 1.8VMCH Transient Response VCORE 1.2VVTT 1.5VAGP GND> For transient response testing, the evaluation boards were subjected to the loading presented in Table 2. Each output response was recorded while the corresponding transient load was applied. The results are presented in Figures 4 and 5. TABLE 2. TRANSIENT OUTPUT LOADING DESCRIPTION 2.5ms/DIV. T0 T1 T2 T3 T4 T5 OUTPUT IOUT(MIN) (A) Power Good Operation The ISL6523 and ISL6524 output two PGOOD indicators (both open-collector outputs). VTTPG is maintained high (pulled high by external pull-up resistor) as long as the 1.2VVTT output exceeds 1.08V (90%; as sensed at the VSEN pin). PGOOD is high for as long as VCORE is within power good limits (+/-10%), all linears are above their undervoltage (UV) thresholds, and VTTPG is also high. 500mV/DIV. dIOUT/dt (A/µs) FREQUENCY (Hz) ISL6523EVAL1 FIGURE 2. ISL6524EVAL1 START-UP 1.8VMCH VCORE IOUT(MAX) (A) 1.5VAGP VCORE (VOUT1) 2.0 22.0 1.0 2500 1.2VVTT (VOUT2) 1.0 10.0 1.0 2000 1.5VAGP (VOUT3) 0.3 3.0 1.0 1500 1.8VMCH (VOUT4) 0.3 3.0 1.0 3000 ISL6524EVAL1 VCORE (VOUT1) 2.0 22.0 1.0 2500 1.2VVTT (VOUT2) 0.5 6.0 1.0 2000 1.5VAGP (VOUT3) 0.3 3.0 1.0 1500 1.8VMCH (VOUT4) 0.3 3.0 1.0 3000 NOTE: All transients 30% duty cycle. 1.2VVTT VTTPG PGOOD T1 T2 1.75V> FIGURE 3. ISL6524EVAL1 POWER GOOD INDICATORS VCORE 20mV/DIV. 2.5ms/DIV. T0 50mV/DIV. GND> 1.20V> 3 1.80V> 1.5VAGP 20mV/DIV. 1.50V> 20mV/DIV. 1.2VVTT Figure 3 details the operation of the power good functions. Following the 1.2VVTT output rising above 1.08V at time T0, VTTPG goes high simultaneously with enabling of the VCORE regulator, approximately 4.5ms later. This timing delay is given by the SS13 capacitor charging under a 28µA constant current, to about 1.25V (bottom of internal oscillator ramp). To reduce the delay, while preserving the same ramping rate for the VCORE output, insert a resistor (footprint provided; R18 and R22, respectively) of up to 100kΩ in series with the SS13 soft-start capacitor (100kΩ resistor 1.8VMCH 100µs/DIV. FIGURE 4. ISL6524EVAL1 OUTPUT TRANSIENT RESPONSE 50mV/DIV. Application Note 9925 VCORE 1.2VVTT 1.50V> 1.5VAGP 20mV/DIV. 1.80V> 20mV/DIV. 1.20V> 50mV/DIV. 1.75V> The chip has two independent fault counters. Three consecutive fault events on either outputs 1 or 3, or three consecutive fault events on output 2 will set the latch. Figure 7 details an example of such a situation where the overload is removed before the counter increments to three and latches the chip off. Time T0 marks the application of the current overload. At time T1 a second fault is recorded, but the overload is removed at time T2. Second restart attempt at time T3 is successful, bringing the output in regulation and resetting the fault counter. 1.8VMCH FAULT DURATION 100µs/DIV. +5VIN FIGURE 5. ISL6523EVAL1 OUTPUT TRANSIENT RESPONSE 1.00V/DIV. SS24 (TP7) Output Short-Circuit Protection FAULT DURATION VOUT1 GND> IOUT1 10A/DIV. In response to an overcurrent event on the switcher’s output, or an undervoltage event on any of the linear outputs, the entire chip is shut down. Figure 6 exemplifies such a scenario on VOUT1 of the ISL6524EVAL1. At time T0, an overload is applied to the core regulator output. Output current on this output increases, ultimately tripping the overcurrent (OC) protection. The fault counter is incremented and SS24 capacitor is discharged, timing a restart attempt. The restart takes place as the SS24 ramps up, and as the output voltage builds up, a second OC event is triggered at T1. The fault counter is incremented and the process repeats at time T2. At time T3 the fault counter reaches a count of three and the chip latches off. SS24 discharges down to about 1V, remaining at this level until bias voltage is removed. 5ms/DIV. T0 T1 T2 T3 FIGURE 6B. ISL6524EVAL1 VOUT1 OVERCURRENT PROTECTION RESPONSE ISL6524EVAL1 Switching Regulator Efficiency Figure 7 highlights the evaluation board’s conversion efficiency with only the switching section loaded (VCORE). The measurement was performed at room temperature with the linear outputs open and 100 LFM of air flow. +5VIN 90 VOUT1 500mV/DIV. GND> 10A/DIV. I OUT1 10ms/DIV. T0 T1 T2 T3 86 EFFICIENCY (%) SS24 (TP7) 1.00V/DIV. 88 84 82 80 78 76 74 72 0 FIGURE 6A. ISL6524EVAL1 VOUT1 OVERCURRENT PROTECTION RESPONSE 2 4 6 8 10 12 14 OUTPUT CURRENT (A) 16 FIGURE 7. ISL6524EVAL1 SWITCHING REGULATOR MEASURED EFFICIENCY (ALL LINEAR OUTPUTS UNLOADED) 4 18 20 Application Note 9925 Modifications Adjusting the Output Voltage All linear outputs controlled by the ISL6523 and ISL6524 are adjustable by means of the resistive divider connecting the VSEN pins to their respective outputs. If adjusting the output voltage of the linear regulators, please pay attention to the recommended resistor value selection guidelines described in the data sheet. As the chips feature internal resistive dividers that set the output voltages, in order to minimize DC set-point interference with these resistors, it is recommended the parallel combination of the external resistive divider components be kept below 2kΩ to 5kΩ. Furthermore, the ISL6524 has provisions (by grounding the FIX pin) for bypassing the internal resistive dividers. between two output voltage settings. The recommended circuits for the dual processor GTL VTT and universal AGP support implementation are shown in Figures 8 and 9. As both the ISL6523 and ISL6524 were designed to regulate the voltage present at the VSEN2 pin to 1.2V, the resistive divider made out of Rs and Rp1 raise the DC regulation setting of this output to 1.25V, while Qx is off. When Qx is turned on (by means of a high TUAL5 signal), Rp2 is connected in parallel to Rp1, raising the DC regulation setting of this output to 1.5V. +3.3VIN DRIVE3 VOUT3 (AGP) +1.5V / +3.3V UGATE2 +1.25V / +1.5V PHASE2 + Rs VSEN2 1 2 + ISL6523 VOUT2 (VTT) 200Ω VSEN3 Rp 162Ω 18 19 ISL6523/4 Qx 2N7002 11 200Ω Ω FIGURE 9. ISL6523, ISL6524 UNIVERSAL AGP SUPPORT IMPLEMENTATION Rp2 953Ω Ω Rp1 4.75kΩ Ω TO TUAL5 SIGNAL Same theory of operation applies to the circuit in Figure 9, with the exception that while Qx is off (low TYPEDET signal) the output is regulated to the internally-set 1.5V. A TYPEDET high signal turns on Qx and raises the output voltage to 3.3V. If AGP2X support is provided (3.3V output), remember that for a low voltage drop across the pass element, a low rDS(ON) MOSFET needs to be selected (Q4 in circuit schematics). Qx 2N7002 DRIVE2 VOUT2 (VTT) 1 Rs VSEN2 11 ISL6524 +1.25V / +1.5V + TO TYPEDET SIGNAL Rs 200Ω Rp2 953Ω Rp1 4.75kΩ TO TUAL5 SIGNAL Qx 2N7002 FIGURE 8. ISL6523, ISL6524 DUAL PROCESSOR GTL IMPLEMENTATION Recommended Implementation for Dual Processor GTL VTT and Universal AGP Support As both ICs have fixed output voltages, it is necessary to implement an external circuit that helps switch a given output 5 Important to mention is the fact that for either regulator on either IC, a sudden turn-on of Qx while the corresponding output is within regulation may trigger an undervoltage and/or overcurrent event, resulting in a chip shutdown and consequent re-start. If Qx is to be turned on while the outputs are regulating, an RC low-pass network needs be placed in series with its gate, in order to slow down its turnon (if a pull-up is used to generate the logic high signal, then only the capacitor needs to be added). For this low-pass RC network, a time constant of about 200-300µs is recommended. Improving Output Voltage Tolerance The key to improving the output voltage tolerance is identifying the parameters which affect it, and then taking steps toward improving them. Application Note 9925 AC Tolerance High dV/dt spikes present in the output voltage waveform under highly dynamic load application (high dI/dt) are due to the ESR and the ESL of the output capacitance. These spikes coincide with the transient load’s rising and falling edges, and decreasing their amplitude can be achieved by using lower ESR/ESL output capacitors (such as surfacemount tantalum capacitors), and/or the addition of more ceramic capacitors, which have inherently low ESR/ESL. DC Tolerance The no-load DC output voltage tolerance reduces virtually to the tolerance of the controller and that of the resistors in the DC feedback path. As the regulation tolerance of the controller is a design constraint, the only way to improve the DC regulation reduces to using precision resistors in the DC feedback path. If output inductor based droop is employed (as shown in the default shipping configuration), the output voltage droop will also exhibit a temperature variation. As temperature will affect the DC resistance of the output inductor, the slope of the output droop will increase slightly with temperature. VRM8.5 (Rev. 1.0) Compliance Although the transient response of the ISL6523EVAL1 and ISL6524EVAL1 evaluation boards may prove satisfactory, to build a well designed application around any of these two controllers requires careful consideration of all the parameters involved in the output regulation. Such careful analysis of these two designs suggests that to yield a 22A VRM8.5 compliant regulator, one more capacitor is needed 6 in parallel with the VOUT1 output (same type as already populated). Additionally, to support the increased input RMS current of a continuous 22A load, another input capacitor is also required in parallel with C1 (same type as C1). However, compliance with this set of standards is not directly related to the use of a certain capacitor technology. Several solutions to meeting the output regulation requirements can be derived, using capacitors from various vendors, with distinctly different characteristics. Conclusion The ISL6523EVAL1 and ISL6524EVAL1 evaluation boards showcase highly integrated approaches to providing system power control in late Pentium 3 computer systems. Typical implementation requires minimum effort and a reduced number of external components, yet provides a full array of standard features. References For Intersil documents available on the internet, see web site www.intersil.com/ [1] ISL6523 Data Sheet, Intersil Corporation, Power Management Products Division, Document No. FN9024, 2001. [2] ISL6524 Data Sheet, Intersil Corporation, Power Management Products Division, Document No. FN9015, 2001. [3] ATX Specification, Version 2.02, October 1998, Intel Corporation (http://www.teleport.com/~atx/). Application Note 9925 ISL6523EVAL1 Schematic +5VIN +5VIN 4, 6, 19, 20 ATX CONNECTOR J1 L1 1µH +12VIN 10 + C1 680µF +12VIN +3.3VIN 1, 2, 11 GND GND +5VSB 9 GND C2 1µF PGOOD 8 C3 1nF PS_ON 14 3, 5, 7, 13, 15, 16, 17 C5 1µF C4 1nF VCC R2 10 GND 2.2kΩ VOUT2 (VTT) OCSET2 + C6 1µF UGATE2 26 25 11 24 R7 10kΩ R6 SPARE 22 VTTPG TP4 VAUX +3.3VIN C15 10µF Q4 HUF76107 DRIVE3 +1.5V C17 1µF R13 + 0Ω C18 560µF DRIVE4 C20 1µF R15 + 21 18 19 6 5 4 VSEN4 0Ω R16 SPARE C21 560µF 15 12 14 17 GND 13 VOUT1 (CORE) (1.050V to 1.825V) PHASE1 1.8µH Q2 HUF76143 LGATE1 + R21 SHORT R22 SPARE R5 4.99kΩ PGND VSEN1 C12 0.30µF R8 FB1 COMP1 C13 270pF C16 R11 2.2nF 43kΩ C14 R10 22nF 33Ω R12 267kΩ VID25 ‘VID25’ VID0 ‘VID0’ VID1 ‘VID1’ VID2 ‘VID2’ VID3 ‘VID3’ SS24 SW1 TP6 C19 0.1µF SS13 C22 0.1µF R17 100Ω R18 0Ω 7 R20 SHORT L3 3.32kΩ 20 16 R14 SPARE TP7 +1.8V U1 ISL6523 3 Q5 2SD1802 VOUT4 (MCH) 9 7 VSEN3 Q1 HUF76139 UGATE1 + TP5 VOUT3 (AGP) TP3 10kΩ 2 CR1 HSM835 VSEN2 PGOOD 1 27 PHASE2 C7 1000µF R1 SPARE TP1 OCSET1 1.5kΩ R4 2.0µH +1.2V 23 8 Q3 HUF76121 L2 TP2 R3 28 PB1 ‘SHUTDOWN’ R9 12.1kΩ C11 1µF C8-10 3x1000µF Application Note 9925 ISL6523EVAL1 Schematic (Continued) +5VSB RN1 4x680Ω 5VSB (J1) PGOOD (J1) ‘ATX PGOOD’ ‘VTT PGOOD’ LP2 LP3 LP1 ‘ATX OFF’ 7,8 PS_ON (J1) 4 5,6 2 7,8 LP4 ‘POWER GOOD’ 5,6 2 1 VTTPG (U1) QA1 3 1 4 3 QA2 PGOOD (U1) R19 30Ω C23 10nF SW2 ‘ATX ON’ ISL6524EVAL1 Schematic +5VSB RN1 4x680Ω 5VSB (J1) PGOOD (J1) ‘ATX PGOOD’ ‘VTT PGOOD’ LP2 LP3 LP1 ‘ATX OFF’ 7,8 PS_ON (J1) 5,6 2 7,8 5,6 2 1 VTTPG (U1) PGOOD (U1) R23 30Ω C22 10nF SW2 ‘ATX ON’ 8 4 LP4 ‘POWER GOOD’ QA1 3 1 4 QA2 3 Application Note 9925 ISL6524EVAL1 Schematic (Continued) +5VIN +5VIN 4, 6, 19, 20 ATX CONNECTOR J1 L1 1µH +12VIN 10 + C1 680µF +12VIN +3.3VIN 1, 2, 11 +5VSB 9 GND GND PS_ON 14 3, 5, 7, 13, 15, 16, 17 C2 1µF R1 SPARE PGOOD 8 R24 SPARE FIX GND VCC R2 28 23 2 R3 SPARE TP1 OCSET1 1.5kΩ 8 DRIVE2 TP2 VOUT2 (VTT) VSEN2 PGOOD 10kΩ 1 11 27 Q1 HUF76139 UGATE1 +1.2V C6 1000µF C5 1µF FAULT/RT 26 10 TP4 25 R6 SPARE R9 SPARE 24 R10 10kΩ 22 VTTPG TP5 9 U1 21 VAUX C14 10µF Q4 HUF76107 PHASE1 DRIVE3 +1.5V C16 1µF + R16 0Ω C17 560µF Q5 2SD1802 +1.8V C19 1µF R18 + 18 6 19 5 4 3 TP8 VOUT4 (MCH) 20 16 R17 SPARE DRIVE4 VSEN4 0Ω R19 SPARE C20 560µF R7 4.99kΩ PGND R8 SPARE VSEN1 C11 0.30µF R11 FB1 COMP1 15 12 14 17 GND 13 C12 270pF C15 R14 2.2nF 43kΩ C13 R13 22nF 33Ω R15 267kΩ VID25 ‘VID25’ VID0 ‘VID0’ VID1 ‘VID1’ VID2 ‘VID2’ VID3 ‘VID3’ SS24 SW1 TP7 C18 0.1µF SS13 C21 0.1µF R20 100Ω R22 0Ω 9 + R5 SHORT 3.32kΩ 7 VSEN3 1.8µH Q2 HUF76143 LGATE1 + TP6 VOUT1 (CORE) R21 SHORT (1.050V to 1.825V) L2 ISL6524 +3.3VIN VOUT3 (AGP) TP3 R4 Q3 HUF76107 + GND C3 1µF C4 1nF PB1 ‘SHUTDOWN’ R12 12.1kΩ C10 1µF C7-9 3x1000µF Application Note 9925 ISL6523EVAL1 Bill of Material s REFERENCE DESIGNATOR PART NUMBER CASE / FOOTPRINT DESCRIPTION MANUF. OR VENDOR QTY C1 6SP680M Oscon Capacitor, 6.3V, 680µF 10 x 10.5 Sanyo C2 1206YC105KAT2A Ceramic Capacitor, X7R, 16V, 1.0µF 1206 AVX 1 1 C3, 4 0603YC102KAT2A Ceramic Capacitor, X7R, 16V, 1.0nF 0603 AVX 2 C5, 6, 11, 17, 20 1206YC105KAT2A Ceramic Capacitor, X7R, 10V, 1.0µF 0805 AVX 5 C7-10 2SP1000M Oscon Capacitor, 2V, 1000µF 10 x 10.5 Sanyo 4 C12 0805ZC304KAT2A Ceramic Capacitor, X7R, 10V, 0.30µF 0805 AVX 1 C13 06033C271KAT2A Ceramic Capacitor, X7R, 25V, 270pF 0603 AVX 1 C14 06033C223KAT2A Ceramic Capacitor, X7R, 25V, 22nF 0603 AVX 1 C15 TAJB106M006R Tantalum Capacitor, 6.3V, 10µF 3.0 x 4.0 AVX 1 C16 06033C222KAT2A Ceramic Capacitor, X7R, 25V, 2.2nF 0603 Any 1 C18, C21 4SP560M Oscon Capacitor, 4V, 560µF 8 x 10.5 Sanyo 2 C19, C22 0603ZC104KAT2A Ceramic Capacitor, X7R, 10V, 0.1µF 0603 AVX 2 C23 0603YC103KAT2A Ceramic Capacitor, X7R, 16V, 10nF 0603 AVX 1 CR1 HSM835J Schottky Diode, 35V, 8A DO-214AB Microsemi 1 J1 39-29-9203 20-pin Mini-Fit, Jr.TM Header Connector Molex 1 L1 1.0µH Inductor 6 Turns of 16AWG onT44-52 Core 8 x 15 Any 1 L2 2.0µH Inductor 8 Turns of 16AWG on T50-52 Core 8 x 17 Any 1 L3 1.8µH Inductor 6 Turns of 16-18AWG on T68-52 Core 10 x 21 Any 1 LP1-4 L63111CT-ND Miniature LED, Through-Board Indicator Digikey 4 Q1 HUF76139S3S UltraFETTM MOSFET, 30V, 7.5mΩ TO-263AB Intersil 1 Q2 HUF76143S3S UltraFETTM MOSFET, 30V, 5.5mΩ TO-263AB Intersil 1 TO-252AA Intersil 1 TO-252AA Intersil 1 Q3 HUF76121D3S Q4 HUF76107D3S UltraFETTM MOSFET, 30V, 23mΩ UltraFETTM MOSFET, 30V, 52mΩ Q5 2SD1802 NPN Bipolar, 50V, 3A TO-252AA Sanyo 1 QA1, 2 ZXMD63N02X Small-Signal Dual MOSFET, 20V, 0.2Ω MSOP-8 Zetex 2 PB1 P8007S-ND Push-Button, Miniature Digikey 1 R2 2.2kΩ Resistor, 5%, 0.1W 0603 Any 1 R3 1.5kΩ Resistor, 5%, 0.1W 0603 Any 1 R4, 7 10kΩ Resistor, 5%, 0.1W 0603 Any 2 R5 4.99kΩ Resistor, 1%, 0.1W 0603 Any 1 R8 3.32kΩ Resistor, 1%, 0.1W 0603 Any 1 R9 12.1kΩ Resistor, 1%, 0.1W 0603 Any 1 R10 33Ω Resistor, 5%, 0.1W 0603 Any 1 R11 43kΩ Resistor, 5%, 0.1W 0603 Any 1 R12 267kΩ Resistor, 1%, 0.1W 0603 Any 1 R13, 15, 18 0Ω Shorting Resistor 0603 Any 3 R17 100Ω Resistor, 5%, 0.1W 0603 Any 1 R19 30Ω Resistor, 5%, 0.1W 0603 Any 1 R1, 6, 14, 16 Spare 0603 R20, 21 Spare 2512 R22 Spare RN1 Y9681CT-ND Digikey 1 0603 4-Resistor Network, 680Ω, 5%, 0.1W 3.2 x 1.6 SW1 CKN3057-ND Miniature Dip Slide Switch, 5-Pole Digikey 1 SW2 GT12MSCKE Miniature Switch, Single Pole, Single Throw C&K 1 TP2, 3, 5, 7 1314353-00 Test Point, Scope Probe Tektronics 4 TP1, 4, 6 SPCJ-123-01 Test Point Jolo 3 U1 ISL6523CB Dual Switcher and Dual Linear Controller SOIC-28 Intersil 1 Terminal Post Keystone 16 1514-2 +5VSB, +5VIN, +3.3VIN, +12VIN, +VOUT1, +VOUT2, +VOUT3, +VOUT4, GND 10 Mini-Fit, Jr.™ is a trademark of Molex, Inc. UltraFET® is a registered trademark of Intersil Americas Inc. Application Note 9925 ISL6524EVAL1 Bill of Material s REFERENCE DESIGNATOR PART NUMBER DESCRIPTION CASE / FOOTPRINT MANUF. OR VENDOR QTY C1 6SP680M Oscon Capacitor, 6.3V, 680µF 10 x 10.5 Sanyo 1 C2 1206YC105KAT2A Ceramic Capacitor, X7R, 16V, 1.0µF 1206 AVX 1 2 C4 0603YC102KAT2A Ceramic Capacitor, X7R, 16V, 1.0nF 0603 AVX C3, 5, 10, 16, 19 1206YC105KAT2A Ceramic Capacitor, X7R, 10V, 1.0µF 0805 AVX 5 C6-9 2SP1000M Oscon Capacitor, 2V, 1000µF 10 x 10.5 Sanyo 4 C11 0805ZC304KAT2A Ceramic Capacitor, X7R, 10V, 0.30µF 0805 AVX 1 C12 06033C271KAT2A Ceramic Capacitor, X7R, 25V, 270pF 0603 AVX 1 C13 06033C223KAT2A Ceramic Capacitor, X7R, 25V, 22nF 0603 AVX 1 C14 TAJB106M006R Tantalum Capacitor, 6.3V, 10µF 3.0 x 4.0 AVX 1 C15 06033C222KAT2A Ceramic Capacitor, X7R, 25V, 2.2nF 0603 Any 1 C17, C20 4SP560M Oscon Capacitor, 4V, 560µF 8 x 10.5 Sanyo 2 C18, C21 0603ZC104KAT2A Ceramic Capacitor, X7R, 10V, 0.1µF 0603 AVX 2 C22 0603YC103KAT2A Ceramic Capacitor, X7R, 16V, 10nF 0603 AVX 1 J1 39-29-9203 20-pin Mini-Fit, Jr.TM Header Connector Molex 1 L1 1.0µH Inductor 6 Turns of 16AWG on T44-52 Core 8 x 15 Any 1 10 x 21 Any 1 Digikey 4 Intersil 1 L2 1.8µH Inductor 6 Turns of 16-18AWG on T68-52 Core LP1-4 L63111CT-ND Miniature LED, Through-Board Indicator Q1 HUF76139S3S UltraFETTM MOSFET, 30V, 7.5mΩ TO-263AB Q2 HUF76143S3S TO-263AB Intersil 1 Q3, Q4 HUF76107D3S UltraFETTM MOSFET, 30V, 5.5mΩ UltraFETTM MOSFET, 30V, 52mΩ TO-252AA Intersil 2 Q5 2SD1802 NPN Bipolar, 50V, 3A TO-252AA Sanyo QA1, QA2 ZXMD63N02X Small-Signal Dual MOSFET, 20V, 0.2Ω MSOP-8 Zetex 2 PB1 P8007S-ND Push-Button, Miniature Digikey 1 R2 1.5kΩ Resistor, 5%, 0.1W 0603 Any 1 R7 4.99kΩ Resistor, 1%, 0.1W 0603 Any 1 R4, R10 10kΩ Resistor, 5%, 0.1W 0603 Any 2 R11 3.32kΩ Resistor, 1%, 0.1W 0603 Any 1 R12 12.1kΩ Resistor, 1%, 0.1W 0603 Any 1 R13 33Ω Resistor, 5%, 0.1W 0603 Any 1 R14 43kΩ Resistor, 5%, 0.1W 0603 Any 1 R15 267kΩ Resistor, 1%, 0.1W 0603 Any 1 1 R16, R18, R22 0Ω Shorting Resistor 0603 Any 3 R20 100Ω Resistor, 5%, 0.1W 0603 Any 1 R23 30Ω Resistor, 5%, 0.1W 0603 Any 1 R1, R3, R6, R8, R9, R17, R19, R24 Spare R5, R21 Spare RN1 Y9681CT-ND Digikey 1 0603 2512 4-Resistor Network, 680Ω, 5%, 0.1W 3.2 x 1.6 SW1 CKN3057-ND Miniature Dip Slide Switch, 5-Pole Digikey 1 SW2 GT12MSCKE Miniature Switch, Single Pole, Single Throw C&K 1 TP2, 3, 6, 8 1314353-00 Test Point, Scope Probe Tektronics 4 TP1, 4, 5, 7 SPCJ-123-01 Test Point Jolo 4 U1 ISL6524CB Dual Switcher and Dual Linear Controller SOIC-28 Intersil 1 +5VSB, +5VIN, +3.3VIN, +12VIN, +VOUT1, +VOUT2, +VOUT3, +V OUT4, GND 1514-2 Terminal Post Keystone 16 11 Application Note 9925 All Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at website www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. 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