IRFR9010, IRFU9010, SiHFR9010, SiHFU9010 Datasheet

IRFR9010, IRFU9010, SiHFR9010, SiHFU9010
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Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Surface Mountable (Order as IRFR9010,
SiHFR9010)
• Straight Lead Option (Order as IRFU9010,
SiHFU9010)
• Repetitive Avalanche Ratings
• Dynamic dV/dt Rating
• Simple Drive Requirements
• Ease of Paralleling
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
- 50
RDS(on) ()
VGS = - 10 V
0.50
Qg (Max.) (nC)
9.1
Qgs (nC)
3.0
Qgd (nC)
5.9
Configuration
Single
S
DESCRIPTION
DPAK
(TO-252)
IPAK
(TO-251)
The power MOSFET technology is the key to Vishay’s
advanced line of power MOSFET transistors. The efficient
geometry and unique processing of this latest “State of the
Art” design achieves: very low on-state resistance
combined with high transconductance; superior reverse
energy and diode recovery dV/dt capability.
The power MOSFET transistors also feature all of the well
established advantages of MOSFETs such as voltage
control, very fast switching, ease of paralleling and
temperature stability of the electrical parameters.
Surface mount packages enhance circuit performance by
reducing stray inductances and capacitance. The DPAK
(TO-252) surface mount package brings the advantages of
power MOSFETs to high volume applications where PC
Board surface mounting is desirable. The surface mount
option IRFR9010, SiHFR9010 is provided on 16 mm tape.
The straight lead option IRFU9010, SiHFU9010 of the device
is called the IPAK (TO-251).
They are well suited for applications where limited heat
dissipation is required such as, computers and peripherals,
telecommunication equipment, DC/DC converters, and a
wide range of consumer products.
G
D
D
G
S
G
D S
D
P-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free
Lead (Pb)-free
DPAK (TO-252)
SiHFR9010-GE3
IRFR9010PbF
SiHFR9010-E3
DPAK (TO-252)
SiHFR9010TR-GE3a
IRFR9010TRPbFa
SiHFR9010T-E3a
DPAK (TO-252)
SiHFR9010TRL-GE3a
IRFR9010TRLPbFa
SiHFR9010TL-E3a
IPAK (TO-251)
SiHFU9010-GE3
IRFU9010PbF
SiHFU9010-E3
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
VGS at - 10 V
TC = 25 °C
TC = 100 °C
SYMBOL
LIMIT
VDS
VGS
- 50
± 20
- 5.3
- 3.3
- 21
0.20
136
- 5.3
2.5
25
5.8
- 55 to + 150
300
ID
Pulsed Drain Currenta
IDM
Linear Derating Factor
EAS
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
IAR
EAR
Repetitive Avalanche Energya
Maximum Power Dissipation
TC = 25 °C
PD
Peak Diode Recovery dV/dtc
dV/dt
Operating Junction and Storage Temperature Range
TJ, Tstg
Soldering Recommendations (Peak Temperature)d
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 14).
b. VDD = - 25 V, starting TJ = 25 °C, L = 9.7 mH, Rg = 25 , peak IL = - 5.3 A.
c. ISD  - 5.3 A, dI/dt  - 80 A/μs, VDD  40 V, TJ  150 °C, suggested Rg = 24 .
d. 0.063" (1.6 mm) from case.
S13-0167-Rev. D, 04-Feb-13
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
Document Number: 91378
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR9010, IRFU9010, SiHFR9010, SiHFU9010
www.vishay.com
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
MIN.
TYP.
MAX.
110
Maximum Junction-to-Ambient
RthJA
-
-
Case-to-Sink
RthCS
-
1.7
-
Maximum Junction-to-Case (Drain)a
RthJC
-
-
5.0
UNIT
°C/W
Note
a. Mounting pad must cover heatsink surface area.
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = - 250 μA
- 50
-
-
V
Static
Drain-Source Breakdown Voltage
VGS(th)
VDS = VGS, ID = - 250 μA
- 2.0
-
- 4.0
V
Gate-Source Leakage
Gate-Source Threshold Voltage
IGSS
VGS = ± 20 V
-
-
± 500
nA
Zero Gate Voltage Drain Current
IDSS
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
gfs
VDS = max. rating, VGS = 0 V
-
-
- 250
VDS = 0.8 x max. rating, VGS = 0 V, TJ = 125 °C
-
-
- 1000
-
0.35
0.5

VDS  - 50 V, IDS = - 2.8 A
1.1
1.7
-
S
VGS = 0 V,
VDS = - 25 V,
f = 1.0 MHz, see fig. 9
-
240
-
-
160
-
VGS = - 10 V
ID = - 2.8 Ab
μA
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Rise Time
Turn-Off Delay Time
Fall Time
tr
td(off)
ID = - 4.7 A, VDS = 0.8 x max.
rating, see fig. 16
VGS = - 10 V
(Independent operating
temperature)
LD
Internal Source Inductance
LS
30
-
-
6.1
9.1
-
2.0
3.0
-
3.9
5.9
-
6.1
9.2
-
47
71
-
13
20
-
35
59
-
4.5
-
-
7.5
-
-
-
- 5.3
S
-
-
- 18
TJ = 25 °C, IS = - 5.3 A, VGS = 0 Vb
-
-
- 5.5
VDD = - 25 V, ID = - 4.7 A,
Rg = 24 , RD = 5.6 , see fig. 15
(Independent operating temperature)
tf
Internal Drain Inductance
-
Between lead,
6 mm (0.25") from
package and center of
die contact.
pF
nC
ns
D
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IF = - 4,7 A, dI/dt = 100 A/μsb
V
33
75
160
ns
0.090
0.22
0.52
μC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 14).
b. Pulse width  300 μs; duty cycle  2 %.
S13-0167-Rev. D, 04-Feb-13
Document Number: 91378
2
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR9010, IRFU9010, SiHFR9010, SiHFU9010
www.vishay.com
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Maximum Safe Operating Area
Fig. 2 - Typical Transfer Characteristics
Fig. 5 - Typical Transconductance vs. Drain Current
Fig. 3 - Typical Saturation Characteristics
Fig. 6 - Typical Source-Drain Diode Forward Voltage
S13-0167-Rev. D, 04-Feb-13
Document Number: 91378
3
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR9010, IRFU9010, SiHFR9010, SiHFU9010
www.vishay.com
Fig. 7 - Breakdown Voltage vs. Temperature
Fig. 8 - Normalized On-Resistance vs. Temperature
S13-0167-Rev. D, 04-Feb-13
Vishay Siliconix
Fig. 9 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 10 - Typical Gate Charge vs. Gate-to-Source Voltage
Document Number: 91378
4
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR9010, IRFU9010, SiHFR9010, SiHFU9010
www.vishay.com
Fig. 11 - Typical On-Resistance vs. Drain Current
Vishay Siliconix
Fig. 13a - Maximum Avalanche vs. Starting Junction
Temperature
L
Vary tp to obtain
required IL
VDS
D.U.T.
Rg
+ V DD
- 10 V
0.05 Ω
tp
IL
Fig. 13b - Unclamped Inductive Test Circuit
IAS
VDS
IL
VDD
Fig. 12 - Maximum Drain Current vs. Case Temperature
tp
VDS
Fig. 13c - Unclamped Inductive Waveforms
S13-0167-Rev. D, 04-Feb-13
Document Number: 91378
5
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR9010, IRFU9010, SiHFR9010, SiHFU9010
www.vishay.com
Vishay Siliconix
Fig. 14 - Maximum Effective Transient Thermal Impedance, Junction-to-Case vs. Pulse Duration
td(on)
tr
td(off) tf
VGS
QG
- 10 V
10 %
QGS
QGD
VG
90 %
VDS
Charge
Fig. 15a - Switching Time Waveforms
Fig. 16a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
RD
VDS
50 kΩ
VGS
Rg
12 V
D.U.T.
0.2 µF
0.3 µF
+VDD
-
D.U.T.
+ VDS
- 10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
VGS
- 3 mA
IG
ID
Current sampling resistors
Fig. 15b - Switching Time Test Circuit
Fig. 16b - Gate Charge Test Circuit
S13-0167-Rev. D, 04-Feb-13
Document Number: 91378
6
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFR9010, IRFU9010, SiHFR9010, SiHFU9010
www.vishay.com
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
D.U.T.
+
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
+
• dV/dt controlled by Rg
• ISD controlled by duty factor “D”
• D.U.T. - device under test
+
-
VDD
Note
• Compliment N-Channel of D.U.T. for driver
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = - 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = - 5 V for logic level and - 3 V drive devices
Fig. 17 - For P-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91378.
S13-0167-Rev. D, 04-Feb-13
Document Number: 91378
7
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
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Vishay Siliconix
TO-252AA Case Outline
E
MILLIMETERS
A
C2
e
b2
D1
e1
E1
L
gage plane height (0.5 mm)
L4
b
L5
H
D
L3
b3
C
A1
INCHES
DIM.
MIN.
MAX.
MIN.
MAX.
A
2.18
2.38
0.086
0.094
A1
-
0.127
-
0.005
b
0.64
0.88
0.025
0.035
b2
0.76
1.14
0.030
0.045
b3
4.95
5.46
0.195
0.215
0.024
C
0.46
0.61
0.018
C2
0.46
0.89
0.018
0.035
D
5.97
6.22
0.235
0.245
D1
4.10
-
0.161
-
E
6.35
6.73
0.250
0.265
E1
4.32
-
0.170
-
H
9.40
10.41
0.370
0.410
e
2.28 BSC
e1
0.090 BSC
4.56 BSC
0.180 BSC
L
1.40
1.78
0.055
0.070
L3
0.89
1.27
0.035
0.050
L4
-
1.02
-
0.040
L5
1.01
1.52
0.040
0.060
ECN: T16-0236-Rev. P, 16-May-16
DWG: 5347
Notes
• Dimension L3 is for reference only.
Revision: 16-May-16
Document Number: 71197
1
For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR DPAK (TO-252)
0.224
0.243
0.087
(2.202)
0.090
(2.286)
(10.668)
0.420
(6.180)
(5.690)
0.180
0.055
(4.572)
(1.397)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
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APPLICATION NOTE
Document Number: 72594
Revision: 21-Jan-08
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Revision: 02-Oct-12
1
Document Number: 91000