IRFR9020, IRFU9020, SiHFR9020, SiHFU9020 www.vishay.com Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Surface Mountable (Order As IRFR9020, SiHFR9020) • Straight Lead Option (Order As IRFU9020, SiHFU9020) • Repetitive Avalanche Ratings • Dynamic dV/dt Rating • Simple Drive Requirements • Ease of Paralleling • Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 - 50 RDS(on) () VGS = - 10 V 0.28 Qg (Max.) (nC) 14 Qgs (nC) 6.5 Qgd (nC) 6.5 Configuration Single S DESCRIPTION DPAK (TO-252) The power MOSFET technology is the key to Vishay’s advanced line of power MOSFET transistors. The efficient geometry and unique processing of this latest “State of the Art” design achieves: very low on-state resistance combined with high transconductance; superior reverse energy and diode recovery dV/dt. The power MOSFET transistors also feature all of the well established advantages of MOSFET’S such as voltage control, very fast switching, ease of paralleling and temperature stability of the electrical parameters. Surface mount packages enhance circuit performance by reducing stray inductances and capacitance. The TO-252 surface mount package brings the advantages of power MOSFET’s to high volume applications where PC board surface mounting is desirable. The surface mount option IRFR9020, SiHFR9020 is provided on 16mm tape. The straight lead option IRFU9020, SiHFU9020 of the device is called the IPAK (TO-251). They are well suited for applications where limited heat dissipation is required such as, computers and peripherals, telecommunication equipment, DC/DC converters, and a wide range of consumer products. IPAK (TO-251) G D D G S G D S D P-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free Lead (Pb)-free DPAK (TO-252) SiHFR9020-GE3 IRFR9020PbF SiHFR9020-E3 DPAK (TO-252) SiHFR9020TR-GE3a IRFR9020TRPbFa SiHFR9020T-E3a DPAK (TO-252) SiHFR9020TRL-GE3a IRFR9020TRLPbFa SiHFR9020TL-E3a IPAK (TO-251) SiHFU9020-GE3 IRFU9020PbF SiHFU9020-E3 Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT VDS VGS - 50 ± 20 - 9.9 - 6.3 - 40 0.33 250 - 9.9 4.2 42 5.8 - 55 to + 150 Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature)d VGS at - 10 V TC = 25 °C TC = 100 °C ID IDM TC = 25 °C for 10 s EAS IAR EAR PD dV/dt TJ, Tstg 300 UNIT V A W/°C mJ A mJ W V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 16). b. VDD = - 25 V, Starting TJ = 25 °C, L = 5.1 mH, Rg = 25 , Peak IL = - 9.9 A c. ISD - 9.9 A, dI/dt -120 A/μs, VDD 40 V, TJ 150 °C. d. 0.063" (1.6 mm) from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). S13-0169-Rev. D, 04-Feb-13 Document Number: 90350 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR9020, IRFU9020, SiHFR9020, SiHFU9020 www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS SYMBOL MIN. TYP. MAX. Maximum Junction-to-Ambient PARAMETER RthJA - - 110 Case-to-Sink RthCS - 1.7 - Maximum Junction-to-Case (Drain) RthJC - - 3.0 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT V Static Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = - 250 μA - 50 - - VGS(th) VDS = VGS, ID = - 250 μA - 2.0 - - 4.0 V Gate-Source Leakage IGSS VGS = ± 20 V - - ± 500 nA Zero Gate Voltage Drain Current IDSS VDS = max. rating, VGS = 0 V - - 250 VDS = 0.8 x max. rating, VGS = 0 V, TJ = 125 °C - - 1000 Gate-Source Threshold Voltage μA - 0.20 0.28 gfs VDS - 50 V, IDS = - 5.7 A 2.3 3.5 - S Input Capacitance Ciss 490 - Coss - 320 - Reverse Transfer Capacitance Crss VGS = 0 V, VDS = - 25 V, f = 1.0 MHz, see fig. 9 - Output Capacitance - 70 - Total Gate Charge Qg - 9.4 14 - 4.3 6.5 - 4.3 6.5 Drain-Source On-State Resistance Forward Transconductance RDS(on) VGS = - 10 V ID = 5.7 Ab Dynamic Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Rise Time Turn-Off Delay Time tr td(off) Fall Time tf Internal Drain Inductance LD Internal Source Inductance LS ID = - 9.7 A, VDS = 0.8 x max. rating, see fig. 18 VGS = - 10 V (Independent operating temperature) VDD = - 25 V, ID = - 9.7 A, Rg = 18 , RD = 2.4 , see fig. 17 (Independent operating temperature) Between lead, 6 mm (0.25") from package and center of die contact. D G - 8.2 12 - 57 66 - 12 18 - 25 38 - 4.5 - - 7.5 - - - - 9.9 - - - 40 pF nC ns nH S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage IS ISM VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = - 9.9 A, VGS = 0 Vb TJ = 25 °C, IF = - 9,7 A, dI/dt = 100 A/μsb - - - 6.3 V 56 110 280 ns 0.17 0.34 0.85 nC Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 16). b. Pulse width 300 μs; duty cycle 2 %. S13-0169-Rev. D, 04-Feb-13 Document Number: 90350 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR9020, IRFU9020, SiHFR9020, SiHFU9020 www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics Fig. 2 - Typical Transfer Characteristics Fig. 3 - Typical Saturation Characteristics S13-0169-Rev. D, 04-Feb-13 Fig. 4 - Maximum Safe Operating Area Fig. 5 - Typical Transconductance vs. Drain Current Fig. 6 - Typical Source-Drain Diode Forward Voltage Document Number: 90350 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR9020, IRFU9020, SiHFR9020, SiHFU9020 www.vishay.com Fig. 7 - Breakdown Voltage vs. Temperature Fig. 8 - Normalized On-Resistance vs. Temperature S13-0169-Rev. D, 04-Feb-13 Vishay Siliconix Fig. 9 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 10 - Typical Gate Charge vs. Gate-to-Source Voltage Document Number: 90350 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR9020, IRFU9020, SiHFR9020, SiHFU9020 www.vishay.com Fig. 11 - Typical On-Resistance vs. Drain Current Vishay Siliconix Fig. 13 - Maximum Avalanche vs. Starting Junction Temperature Fig. 14 - Unclamped Inductive Test Circuit IAS VDS IL VDD Fig. 12 - Maximum Drain Current vs. Case Temperature tp VDS Fig. 15 - Unclamped Inductive Waveforms S13-0169-Rev. D, 04-Feb-13 Document Number: 90350 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR9020, IRFU9020, SiHFR9020, SiHFU9020 www.vishay.com Vishay Siliconix Fig. 16 - Maximum Effective Transient Thermal Impedance, Junction-to-Case vs. Pulse Duration td(on) tr td(off) tf VGS 10 % QG - 10 V QGS 90 % VDS QGD VG Charge Fig. 17 - Switching Time Waveforms Fig. 19 - Basic Gate Charge Waveform Fig. 18 - Switching Time Test Circuit Fig. 20 - Gate Charge Test Circuit S13-0169-Rev. D, 04-Feb-13 Document Number: 90350 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFR9020, IRFU9020, SiHFR9020, SiHFU9020 www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T. + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg + • dV/dt controlled by Rg • ISD controlled by duty factor “D” • D.U.T. - device under test + - VDD Note • Compliment N-Channel of D.U.T. for driver Driver gate drive P.W. Period D= P.W. Period VGS = - 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = - 5 V for logic level and - 3 V drive devices Fig. 21 - For P-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?90350. S13-0169-Rev. D, 04-Feb-13 Document Number: 90350 7 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-252AA Case Outline E MILLIMETERS A C2 e b2 D1 e1 E1 L gage plane height (0.5 mm) L4 b L5 H D L3 b3 C A1 INCHES DIM. MIN. MAX. MIN. MAX. A 2.18 2.38 0.086 0.094 A1 - 0.127 - 0.005 b 0.64 0.88 0.025 0.035 b2 0.76 1.14 0.030 0.045 b3 4.95 5.46 0.195 0.215 0.024 C 0.46 0.61 0.018 C2 0.46 0.89 0.018 0.035 D 5.97 6.22 0.235 0.245 D1 4.10 - 0.161 - E 6.35 6.73 0.250 0.265 E1 4.32 - 0.170 - H 9.40 10.41 0.370 0.410 e 2.28 BSC e1 0.090 BSC 4.56 BSC 0.180 BSC L 1.40 1.78 0.055 0.070 L3 0.89 1.27 0.035 0.050 L4 - 1.02 - 0.040 L5 1.01 1.52 0.040 0.060 ECN: T16-0236-Rev. P, 16-May-16 DWG: 5347 Notes • Dimension L3 is for reference only. Revision: 16-May-16 Document Number: 71197 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TO-251AA (HIGH VOLTAGE) 4 3 E1 E Thermal PAD 4 b4 θ2 4 A 0.010 0.25 M C A B L2 4 c2 A θ1 B D D1 A C 3 Seating plane 5 C L1 L3 (Datum A) C L B B A A1 3 x b2 View A - A 2xe c 3xb 0.010 0.25 M C A B Plating 5 b1, b3 Base metal Lead tip c1 (c) 5 (b, b2) Section B - B and C - C MILLIMETERS DIM. MIN. MAX. INCHES MIN. MILLIMETERS MAX. DIM. MIN. INCHES MAX. MIN. MAX. A 2.18 2.39 0.086 0.094 D1 5.21 - 0.205 - A1 0.89 1.14 0.035 0.045 E 6.35 6.73 0.250 0.265 4.32 - 0.170 - b 0.64 0.89 0.025 0.035 E1 b1 0.65 0.79 0.026 0.031 e b2 0.76 1.14 0.030 0.045 L 8.89 9.65 0.350 0.380 b3 0.76 1.04 0.030 0.041 L1 1.91 2.29 0.075 0.090 b4 4.95 5.46 0.195 0.215 L2 0.89 1.27 0.035 0.050 2.29 BSC 2.29 BSC c 0.46 0.61 0.018 0.024 L3 1.14 1.52 0.045 0.060 c1 0.41 0.56 0.016 0.022 θ1 0' 15' 0' 15' c2 0.46 0.86 0.018 0.034 θ2 25' 35' 25' 35' D 5.97 6.22 0.235 0.245 ECN: S-82111-Rev. A, 15-Sep-08 DWG: 5968 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimension are shown in inches and millimeters. 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.13 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body. 4. Thermal pad contour optional with dimensions b4, L2, E1 and D1. 5. Lead dimension uncontrolled in L3. 6. Dimension b1, b3 and c1 apply to base metal only. 7. Outline conforms to JEDEC outline TO-251AA. Document Number: 91362 Revision: 15-Sep-08 www.vishay.com 1 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR DPAK (TO-252) 0.224 0.243 0.087 (2.202) 0.090 (2.286) (10.668) 0.420 (6.180) (5.690) 0.180 0.055 (4.572) (1.397) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE Document Number: 72594 Revision: 21-Jan-08 www.vishay.com 3 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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We confirm that all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU. Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000