KGF10N30

DATASHEET
N-Channel 30V Power MOSFET
KGF10N30
Features
The KGF10N30 is a 30V, 17mΩ, chip scale, N-channel lateral
MOSFET. The device uses technology that uniquely integrates
low cost CMOS and WLCSP fabrication processes. The chip
scale package offers small area, low vertical profile and is fully
compatible with standard SMT assembly processes. The
KGF10N30 device offers unprecedented low on-resistance and
total gate charge, outperforming conventional trench MOSFETs
and enabling high frequency, low voltage switching. The device
offers extremely high power density, reducing the board size of
DC/DC converters and other power management systems.
• Industry leading figures of merit:
rDS(ON) × Qg and rDS(ON) × Qgd
• <0.75mm package hight
• Logic level gate drive
• High frequency switching
• Low thermal resistance
Applications
• Point-of-load DC/DC converters
PRODUCT SUMMARY
• Portable electronics
ID
TA = +25°C
10A
Maximum
V(BR)DSS
ID = 250µA
30V
Minimum
rDS(ON)
VGS = 5V
17mΩ
Typical
Qg
ID = 6A
3.4nC
Typical
0.7nC
Typical
Qgd
• 1.47mmx1.47mm footprint
• Motor Control
• OR’ing diodes
D
G
S
FIGURE 1. EQUIVALENT CIRCUIT
February 9, 2016
FN8816.0
1
FIGURE 2. N-CHANNEL MOSFET CHIP SCALE WLCSP PACKAGE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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KGF10N30
Ordering Information
PART NUMBER
TEMP RANGE
(°C)
PART MARKING
KGF10N30
B
Pin Configuration
6 Bump WLCSP
Pin Descriptions
KGF10N30
(6 BUMP WLCSP)
LAND GRID ARRAY VIEW
5
S
1
G
-55 to +150
PACKAGE
(RoHS Compliant)
PIN #
PIN NAME
DESCRIPTION
1
G
Gate of MOSFET
2, 3, 4, 5
S
Source of MOSFET
6
D
Drain of MOSFET
6
4
S
D
S
2
S
3
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KGF10N30
Absolute Maximum Ratings (Note 1)
Thermal Information
Drain-to-Source Voltage (VDS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V
Gate-to-Source Voltage (VGS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V
Drain Current
Continuous (ID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10A
Pulsed (IDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75A
Single Pulse Avalanche Energy (EAS)
ID = 10A, RG ≤ 1Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100mJ
Thermal Resistance (Typical) (Note 2)
JA (°C/W) JC (°C/W)
WLCSP Package . . . . . . . . . . . . . . . . . . . . . .
50
10
Maximum Power Dissipation (PD) (Note 2)
TA = +25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5W
TA = +70°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6W
Junction and Storage Temperature Range (TJ, Tstg). . . . .-55°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
1. TJ = +25°C unless otherwise noted.
2. When mounted on 1 inch square 2oz copper clad FR-4.
Electrical Characteristics
SYMBOL
V(BR)DSS
IDSS
TJ = +25°C unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
(Note 3)
TYP
(Note 4)
MAX
(Note 3)
UNIT
Drain-to-Source Breakdown Voltage
VGS = 0V, ID = 250µA
Zero Gate Voltage Drain Current
VDS = 24V, VGS = 0V, TJ = +25°C
30
1
µA
V
VDS = 30V, VGS = 0V, TJ = +25°C
25
µA
VDS = 30V, VGS = 0V, TJ = +125°C
250
µA
150
nA
IGSS
Gate-to-Body Leakage
VGS = 15V, VDS = 0V
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250µA
1.5
V
rDS(ON)
Drain-to-Source On-State Resistance
VGS = 5V, ID = 6A
17
mΩ
Ciss
Input Capacitance
VDS = 30V, VGS = 0V, f = 1MHz
323
pF
Coss
Output Capacitance
357
pF
Crss
Reverse Transfer Capacitance
19
pF
Gate Resistance
VDS = 0V, f = 1MHz
2.9
Ω
Turn-On Delay Time
VDD = 15V, RL= 15Ω, ID = 1A, VGEN = 10V,
rg = 6Ω
15
ns
4
ns
Turn-Off Delay Time
33
ns
tf
Fall Time
8
ns
Qg
Total Gate Charge
3.4
nC
Qgs
Gate-to-Source Charge
1.1
nC
Qgd
Gate-to-Drain Charge
0.7
nC
ns
rg
td(on)
tr
td(off)
trr
VSD
Rise Time
VGS = 5V, ID = 6A, VDS = 24V
Source-to-Drain Reverse Recovery Time
IS = 6A, di/dt = 100A/µs
35
Diode Forward Voltage
IS = 6A, VGS = 0V
0.8
1.0
V
NOTES:
3. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
4. Typical values are for TA = +25°C.
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KGF10N30
Typical Performance Curves
40
40
VG S = 5 TO 4V
35
ID - DRAIN CURRENT (A)
ID - DRAIN CURRENT (A)
35
VGS = 3.5V
30
25
20
VGS = 3.0V
15
10
VGS = 2.5V
5
30
25
20
15
0.5
1.0
1.5
0
2.0
0.0
0.5
1.0
FIGURE 3. OUTPUT CHARACTERISTICS
rDS(ON) - ON-STATE RESISTANCE
(NORMALIZED)
rDS(ON) - ON-STATE RESISTANCE (mΩ)
22
20
V GS = 5V
18
16
14
12
10
10
15
20
25
70
I D = 6A
50
40
30
20
10
0
3.0
3.5
4.0
4.5
VGS - GATE-TO-SOURCE VOLTAGE (V)
FIGURE 7. DRAIN-TO-SOURCE ON-STATE RESISTANCE vs
GATE-TO-SOURCE VOLTAGE
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4.5
5.0
140
160
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
-40
-20
0
20
40
60
80
100
120
FIGURE 6. DRAIN-TO-SOURCE ON-STATE RESISTANCE vs JUNCTION
TEMPERATURE
VGS(th) - GATE THRESHOLD VOLTAGE
(NORMALIZED)
rDS(ON) - ON-STATE RESISTANCE (mΩ)
80
2.5
4.0
TJ - JUNCTION TEMPERATURE ( C)
90
2.0
3.5
o
100
1.5
3.0
VGS = 5V
I D = 6A
1.4
I D - DR AIN CU R REN T (A)
1.0
2.5
1.5
- 60
30
FIGURE 5. DRAIN-TO-SOURCE ON-STATE RESISTANCE vs DRAIN
CURRENT
60
2.0
FIGURE 4. TRANSFER CHARACTERISTICS
24
5
1.5
V GS - GATE-TO-SOURCE (V)
VDS - DRAIN-TO-S OURCE VOLTAGE (V)
0
TJ = -55o C
TJ = +25o C
5
0
0.0
TJ = +125o C
10
5.0
1.5
1.4
1.3
1.2
I D = 250µA
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
-60
-40
-20
0
20
40
60
80
100
120 140
160
T J - JUNCTION TEMPERATURE ( oC)
FIGURE 8. GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
FN8816.0
February 9, 2016
KGF10N30
Typical Performance Curves (Continued)
1.20
TJ = +125o C
V(BR)DSS - DRAIN-TO-SOURCE
VOLTAGE (NORMALIZED)
IS - SOURCE CURRENT (A)
10.0
TJ = +2 5o C
1.0
1.15
1.10
I D = 250µA
1.05
1.00
0.95
0.90
0.85
0.80
-60
0.1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
-20
0
20
40
60
80
TJ - JUNCTION TEMPERATURE
VSD - SOURCE-TO-DRAIN VOLTAGE (V)
100
120 140
160
(o C)
FIGURE 10. DRAIN-TO-SOURCE BREAKDOWN VOLTAGE vs JUNCTION
TEMPERATURE
FIGURE 9. SOURCE-TO-DRAIN DIODE FORWARD VOLTAGE
1000
5
Ciss
V DS =24V
I D = 6A
4
C - CAPACITANCE (pF)
VGS - GATE-TO-SOURCE VOLTAGE (V)
-40
3
2
1
Coss
100
Crss
10
1
0
0
1
QG
2
3
- TO TAL G ATE CH ARG E (nC )
4
0
5
10
15
20
25
30
VDS - DRAIN-TO-SOURCE VOLTAGE (V)
FIGURE 11. GATE CHARGE
FIGURE 12. CAPACITANCE
ID - DRAIN CURRENT (A)
100
rDS(ON) LIMITED
VGS = 5V
100µs
10
1ms
+25oC,
TA =
SINGLE PULSE
1
10ms
100ms
rDS(ON) LIMIT
0.1
DC
PACKAGE LIMIT
THERMAL LIMIT
0.01
0.1
1
10
100
VDS - DRAIN-TO-SOURCE VOLTAGE (V)
FIGURE 13. MAXIMUM RATED FORWARD BIASED SAFE OPERATING AREA
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KGF10N30
r(t) - TRANSIENT THERMAL RESISTANCE
(NORMALIZED)
Typical Performance Curves (Continued)
1.00
0.50
0.20
0.10
0.10
0.05
0.02
SINGLE PU LSE
0.01
100 E-6
10E -3
1E+0
100 E+0
t - Tim e (s)
FIGURE 14. TRANSIENT THERMAL RESPONSE, JUNCTION-TO-AMBIENT
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
REVISION
February 9, 2016
FN8816.0
CHANGE
Initial release
About Intersil
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address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
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KGF10N30
Dimensional Outline and Pad Layout
DIE SIZE = 1.47mm ±0.005mm (SQUARE)
PAD THICKNESS = 3µm ±1µm NiAu
DIE THICKNESS = 740µm ±30µm
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