LT3065 - 45V VIN, 500mA Low Noise, Linear Regulator with Programmable Current Limit and Power Good

LT3065 Series
45V VIN, 500mA Low Noise,
Linear Regulator with Programmable
Current Limit and Power Good
DESCRIPTION
FEATURES
Input Voltage Range: 1.8V to 45V
Output Current: 500mA
Dropout Voltage: 300mV
Programmable Precision Current Limit: ±10%
Power Good Flag
Low Noise: 25µVRMS (10Hz to 100kHz)
Adjustable Output (VREF = VOUT(MIN) = 600mV)
Output Tolerance: ±2% Over Line, Load and
Temperature
n Stable with Low ESR, Ceramic Output Capacitors
(3.3µF Minimum)
n Single Capacitor Soft-Starts Reference and Lowers
Output Noise
n Current Limit Foldback Protection
n Shutdown Current: <1µA
n Reverse Battery and Thermal Limit Protection
n10-Lead 3mm × 3mm DFN and 12-lead MSOP
Packages
n
n
n
n
n
n
n
The LT®3065 Series are micropower, low noise, low dropout
voltage (LDO) linear regulators that operate over a 1.8V
to 45V input voltage range. The devices supply 500mA of
output current with a typical dropout voltage of 300mV. A
single external capacitor provides programmable low noise
reference performance and output soft-start functionality.
n
A single external resistor programs the LT3065’s current
limit, accurate to ±10% over a wide input voltage and temperature range. A PWRGD flag indicates output regulation.
The LT3065 optimizes stability and transient response
with low ESR ceramic capacitors, requiring a minimum of
3.3µF. Internal protection circuitry includes current limiting
with foldback, thermal limiting, reverse battery protection,
reverse current protection and reverse output protection.
The LT3065 is available in fixed output voltages of 1.2V,
1.5V, 1.8V, 2.5V, 3.3V, and 5V, and as an adjustable device with an output voltage range from 0.6V to 40V. The
LT3065 is available in the thermally-enhanced 10-lead
3mm × 3mm DFN and 12-lead MSOP packages.
APPLICATIONS
n
n
n
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Battery-Powered Systems
Automotive Power Supplies
Industrial Power Supplies
Avionic Power Supplies
Portable Instruments
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property
of their respective owners.
TYPICAL APPLICATION
Precision Current Limit, RIMAX = 1.5k
220
5V Supply with 200mA Precision Current Limit
IN
3.3µF
500k
LT3065-5
REF/BYP
1nF
3.3µF
5V
OUT
200mA
SENSE
SHDN
ADJ
PWRGD
10nF
OUT
GND
IMAX
1.5k
VOUT(NOMINAL) = 5V
212
CURRENT LIMIT (mA)
5.6V TO 13V
IN
216
208
204
200
VIN = 10V
VIN = 5.6V
196
192
188
22nF
3065 TA01a
184
180
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3065 TA01b
3065fb
For more information www.linear.com/LT3065
1
LT3065 Series
ABSOLUTE MAXIMUM RATINGS
(Note 1)
IN Pin Voltage..........................................................±50V
OUT Pin Voltage............................................ +40V, –50V
Input-to-Output Differential Voltage (Note 2)...+50V, –40V
ADJ Pin Voltage.......................................................±50V
SENSE Pin Voltage...................................................±50V
SHDN Pin Voltage....................................................±50V
PWRGD Pin Voltage........................................–0.3V, 50V
IMAX Pin Voltage...............................................–0.3V, 7V
REF/BYP Pin Voltage....................................................1V
Output Short-Circuit Duration........................... Indefinite
Operating Junction Temperature Range (Notes 3, 5, 14)
E-, I-Grades........................................ –40°C to 125°C
MP-Grade........................................... –55°C to 150°C
H-Grade.............................................. –40°C to 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP Package Only.......................................... 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
IN
1
10 OUT
IN
2
9 OUT
SHDN
3
PWRGD
4
IMAX
5
11
GND
IN
IN
SHDN
PWRGD
IMAX
NC
8 ADJ/SENSE*
7 GND/ADJ*
6 REF/BYP
1
2
3
4
5
6
13
GND
12
11
10
9
8
7
OUT
OUT
ADJ/SENSE*
GND/ADJ*
REF/BYP
NC
MSE PACKAGE
12-LEAD PLASTIC MSOP
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 28°C/W, θJC = 6°C/W
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
TJMAX = 150°C, θJA = 31°C/W, θJC = 9°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
*Pin 7: GND for LT3065, ADJ for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5,
LT3065-3.3, LT3065-5
*Pin 8: ADJ for LT3065, SENSE for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5,
LT3065-3.3, LT3065-5
*Pin 9: GND for LT3065, ADJ for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5,
LT3065-3.3, LT3065-5
*Pin 10: ADJ for LT3065, SENSE for LT3065-1.2, LT3065-1.5, LT3065-1.8, LT3065-2.5,
LT3065-3.3, LT3065-5
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3065EDD#PBF
LT3065EDD#TRPBF
LGKS
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065IDD#PBF
LT3065IDD#TRPBF
LGKS
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065HDD#PBF
LT3065HDD#TRPBF
LGKS
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 150°C
LT3065MPDD#PBF
LT3065MPDD#TRPBF
LGKS
10-Lead (3mm x 3mm) Plastic DFN
–55°c to 150°C
LT3065EDD-1.2#PBF
LT3065EDD-1.2#TRPBF
LGQV
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065IDD-1.2#PBF
LT3065IDD-1.2#TRPBF
LGQV
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065HDD-1.2#PBF
LT3065HDD-1.2#TRPBF
LGQV
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 150°C
LT3065MPDD-1.2#PBF
LT3065MPDD-1.2#TRPBF
LGQV
10-Lead (3mm x 3mm) Plastic DFN
–55°C to 150°C
LT3065EDD-1.5#PBF
LT3065EDD-1.5#TRPBF
LGQW
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065IDD-1.5#PBF
LT3065IDD-1.5#TRPBF
LGQW
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065HDD-1.5#PBF
LT3065HDD-1.5#TRPBF
LGQW
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 150°C
LT3065MPDD-1.5#PBF
LT3065MPDD-1.5#TRPBF
LGQW
10-Lead (3mm x 3mm) Plastic DFN
–55°C to 150°C
LT3065EDD-1.8#PBF
LT3065EDD-1.8#TRPBF
LGQX
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065IDD-1.8#PBF
LT3065IDD-1.8#TRPBF
LGQX
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065HDD-1.8#PBF
LT3065HDD-1.8#TRPBF
LGQX
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 150°C
LT3065MPDD-1.8#PBF
LT3065MPDD-1.8#TRPBF
LGQX
10-Lead (3mm x 3mm) Plastic DFN
–55°C to 150°C
LT3065EDD-2.5#PBF
LT3065EDD-2.5#TRPBF
LGQY
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
3065fb
2
For more information www.linear.com/LT3065
LT3065 Series
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3065IDD-2.5#PBF
LT3065IDD-2.5#TRPBF
LGQY
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065HDD-2.5#PBF
LT3065HDD-2.5#TRPBF
LGQY
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 150°C
LT3065MPDD-2.5#PBF
LT3065MPDD-2.5#TRPBF
LGQY
10-Lead (3mm x 3mm) Plastic DFN
–55°C to 150°C
LT3065EDD-3.3#PBF
LT3065EDD-3.3#TRPBF
LGQZ
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065IDD-3.3#PBF
LT3065IDD-3.3#TRPBF
LGQZ
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065HDD-3.3#PBF
LT3065HDD-3.3#TRPBF
LGQZ
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 150°C
LT3065MPDD-3.3#PBF
LT3065MPDD-3.3#TRPBF
LGQZ
10-Lead (3mm x 3mm) Plastic DFN
–55°C to 150°C
LT3065EDD-5#PBF
LT3065EDD-5#TRPBF
LGRB
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065IDD-5#PBF
LT3065IDD-5#TRPBF
LGRB
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 125°C
LT3065HDD-5#PBF
LT3065HDD-5#TRPBF
LGRB
10-Lead (3mm x 3mm) Plastic DFN
–40°C to 150°C
LT3065MPDD-5#PBF
LT3065MPDD-5#TRPBF
LGRB
10-Lead (3mm x 3mm) Plastic DFN
–55°C to 150°C
LT3065EMSE#PBF
LT3065EMSE#TRPBF
3065
12-Lead Plastic MSOP
–40°C to 125°C
LT3065IMSE#PBF
LT3065IMSE#TRPBF
3065
12-Lead Plastic MSOP
–40°C to 125°C
LT3065HMSE#PBF
LT3065HMSE#TRPBF
3065
12-Lead Plastic MSOP
–40°C to 150°C
LT3065MPMSE#PBF
LT3065MPMSE#TRPBF
3065
12-Lead Plastic MSOP
–55°C to 150°C
LT3065EMSE-1.2#PBF
LT3065EMSE-1.2#TRPBF
306512
12-Lead Plastic MSOP
–40°C to 125°C
LT3065IMSE-1.2#PBF
LT3065IMSE-1.2#TRPBF
306512
12-Lead Plastic MSOP
–40°C to 125°C
LT3065HMSE-1.2#PBF
LT3065HMSE-1.2#TRPBF
306512
12-Lead Plastic MSOP
–40°C to 150°C
LT3065MPMSE-1.2#PBF
LT3065MPMSE-1.2#TRPBF
306512
12-Lead Plastic MSOP
–55°C to 150°C
LT3065EMSE-1.5#PBF
LT3065EMSE-1.5#TRPBF
306515
12-Lead Plastic MSOP
–40°C to 125°C
LT3065IMSE-1.5#PBF
LT3065IMSE-1.5#TRPBF
306515
12-Lead Plastic MSOP
–40°C to 125°C
LT3065HMSE-1.5#PBF
LT3065HMSE-1.5#TRPBF
306515
12-Lead Plastic MSOP
–40°C to 150°C
LT3065MPMSE-1.5#PBF
LT3065MPMSE-1.5#TRPBF
306515
12-Lead Plastic MSOP
–55°C to 150°C
LT3065EMSE-1.8#PBF
LT3065EMSE-1.8#TRPBF
306518
12-Lead Plastic MSOP
–40°C to 125°C
LT3065IMSE-1.8#PBF
LT3065IMSE-1.8#TRPBF
306518
12-Lead Plastic MSOP
–40°C to 125°C
LT3065HMSE-1.8#PBF
LT3065HMSE-1.8#TRPBF
306518
12-Lead Plastic MSOP
–40°C to 150°C
LT3065MPMSE-1.8#PBF
LT3065MPMSE-1.8#TRPBF
306518
12-Lead Plastic MSOP
–55°C to 150°C
LT3065EMSE-2.5#PBF
LT3065EMSE-2.5#TRPBF
306525
12-Lead Plastic MSOP
–40°C to 125°C
LT3065IMSE-2.5#PBF
LT3065IMSE-2.5#TRPBF
306525
12-Lead Plastic MSOP
–40°C to 125°C
LT3065HMSE-2.5#PBF
LT3065HMSE-2.5#TRPBF
306525
12-Lead Plastic MSOP
–40°C to 150°C
LT3065MPMSE-2.5#PBF
LT3065MPMSE-2.5#TRPBF
306525
12-Lead Plastic MSOP
–55°C to 150°C
LT3065EMSE-3.3#PBF
LT3065EMSE-3.3#TRPBF
306533
12-Lead Plastic MSOP
–40°C to 125°C
LT3065IMSE-3.3#PBF
LT3065IMSE-3.3#TRPBF
306533
12-Lead Plastic MSOP
–40°C to 125°C
LT3065HMSE-3.3#PBF
LT3065HMSE-3.3#TRPBF
306533
12-Lead Plastic MSOP
–40°C to 150°C
LT3065MPMSE-3.3#PBF
LT3065MPMSE-3.3#TRPBF
306533
12-Lead Plastic MSOP
–55°C to 150°C
LT3065EMSE-5#PBF
LT3065EMSE-5#TRPBF
30655
12-Lead Plastic MSOP
–40°C to 125°C
LT3065IMSE-5#PBF
LT3065IMSE-5#TRPBF
30655
12-Lead Plastic MSOP
–40°C to 125°C
LT3065HMSE-5#PBF
LT3065HMSE-5#TRPBF
30655
12-Lead Plastic MSOP
–40°C to 150°C
LT3065MPMSE-5#PBF
LT3065MPMSE-5#TRPBF
30655
12-Lead Plastic MSOP
–55°C to 150°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping
container.Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3065fb
For more information www.linear.com/LT3065
3
LT3065 Series
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 3).
PARAMETER
CONDITIONS
MIN
TYP
Minimum Input Voltage (Notes 4, 9)
ILOAD = 500mA
Regulated Output Voltage
LT3065-1.2: VIN = 2.2V, ILOAD = 1mA
2.2V < VIN < 45V, 1mA < ILOAD < 500mA
LT3065-1.5: VIN = 2.2V, ILOAD = 1mA
2.2V < VIN < 45V, 1mA < ILOAD < 500mA
LT3065-1.8: VIN = 2.4V, ILOAD = 1mA
2.4V < VIN < 45V, 1mA < ILOAD < 500mA
LT3065-2.5: VIN = 3.1V, ILOAD = 1mA
3.1V < VIN < 45V, 1mA < ILOAD < 500mA
LT3065-3.3: VIN = 3.9V, ILOAD = 1mA
3.9V < VIN < 45V, 1mA < ILOAD < 500mA
LT3065-5: VIN = 5.6V, ILOAD = 1mA
5.6V < VIN < 45V, 1mA < ILOAD < 500mA
1.8
2.2
V
1.2
l
1.188
1.176
1.485
1.470
1.782
1.764
2.475
2.450
3.267
3.234
4.950
4.900
1.212
1.224
1.515
1.530
1.818
1.836
2.525
2.550
3.333
3.366
5.050
5.100
V
V
V
V
V
V
V
V
V
V
V
V
LT3065: VIN = 2.2V, ILOAD = 1mA
2.2V < VIN < 45V, 1mA < ILOAD < 500mA
594
588
600
l
606
612
mV
mV
Line Regulation
ILOAD = 1mA
LT3065-1.2: ΔVIN = 2.2V to 45V
LT3065-1.5: ΔVIN = 2.2V to 45V
LT3065-1.8: ΔVIN = 2.4V to 45V
LT3065-2.5: ΔVIN = 3.1V to 45V
LT3065-3.3: ΔVIN = 3.9V to 45V
LT3065-5: ΔVIN = 5.6V to 45V
LT3065: ΔVIN = 2.2V to 45V (Note 4)
l
l
l
l
l
l
l
0.7
0.9
1.1
1.6
2.0
3.1
0.1
7
8.8
10.5
14.6
19.3
29.2
3
mV
mV
mV
mV
mV
mV
mV
Load Regulation
∆ILOAD = 1mA to 500mA
LT3065-1.2, VIN = 2.2V
LT3065-1.5, VIN = 2.2V
LT3065-1.8, VIN = 2.4V
LT3065-2.5 VIN = 3.1V
LT3065-3.3, VIN = 3.9V
LT3065-5, VIN = 5.6V
LT3065, VIN = 2.2V (Note 4)
l
l
l
l
l
l
l
0.5
0.7
0.9
1.2
1.6
2.4
0.1
8
10
12
16.7
11
33.4
4
mV
mV
mV
mV
mV
mV
mV
110
150
210
mV
mV
145
200
310
mV
mV
175
220
330
mV
mV
300
350
510
mV
mV
55
100
270
1.8
11
110
200
550
4.5
25
µA
µA
µA
mA
mA
0.2
1
µA
16
60
nA
ADJ Pin Voltage (Notes 4, 5)
l
Dropout Voltage, VIN = VOUT(NOMINAL) ILOAD = 10mA
(Notes 6, 7)
l
l
l
l
l
1.5
1.8
2.5
3.3
5
l
ILOAD = 50mA
l
ILOAD = 100mA
l
ILOAD = 500mA
l
GND Pin Current,
VIN = VOUT(NOMINAL) + 0.6V
(Notes 7, 8)
ILOAD = 0mA
ILOAD = 1mA
ILOAD = 10mA
ILOAD = 100mA
ILOAD = 500mA
l
l
l
l
l
MAX
UNITS
Quiescent Current in Shutdown
VIN = 45V, VSHDN = 0V
ADJ Pin Bias Current (Notes 4, 10)
VIN = 2.2V
Output Voltage Noise
COUT = 10µF, ILOAD = 500mA, VOUT = 600mV,
BW = 10Hz to 100kHz
90
µVRMS
COUT = 10µF, CBYP = 10nF, ILOAD = 500mA,
VOUT = 600mV, BW = 10Hz to 100kHz
25
µVRMS
Shutdown Threshold
l
VOUT = Off to On
VOUT = On to Off
l
l
0.9
1. 3
1.1
1.42
V
V
3065fb
4
For more information www.linear.com/LT3065
LT3065 Series
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C (Note 3).
SHDN Pin Current (Note 11)
VSHDN = 0V, VIN = 45V
VSHDN = 45V, VIN = 45V
Ripple Rejection
VIN – VOUT = 2V, VRIPPLE = 0.5VP-P,
fRIPPLE = 120Hz, ILOAD = 500mA
LT3065-1.2
LT3065-1.5
LT3065-1.8
LT3065-2.5
LT3065-3.3
LT3065-5
LT3065
Input Reverse Leakage Current
VIN = –45V, VOUT = 0
Reverse Output Current (Note 12)
VOUT = 1.2V, VIN = VSHDN = 0
Internal Current Limit (Note 4)
VIN = 2.2V, VOUT = 0, VIMAX = 0
VIN = 2.2V, ∆VOUT = –5%
l
520
External Programmed Current Limit
(Notes 7, 13)
5.6V < VIN < 10V, VOUT = 95% of VOUT (Nominal), RIMAX = 1.5k
5.6V < VIN < 7V, VOUT = 95% of VOUT (Nominal), RIMAX = 604Ω
l
l
180
445
PWRGD Logic Low Voltage
Pull-Up Current = 50µA
l
PWRGD Leakage Current
VPWRGD = 45V
l
l
0.5
63
63
59
57
56
55
70
PWRGD Trip Point
% of Nominal Output Voltage, Output Rising
% of Nominal Output Voltage
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Absolute maximum input-to-output differential voltage is not
achievable with all combinations of rated IN pin and OUT pin voltages.
With IN at 50V, do not pull OUT below 0V. The total differential voltage
from IN to OUT must not exceed +50V, –40V. If OUT is pulled above IN
and GND, the OUT to IN differential voltage must not exceed 40V.
Note 3: The LT3065 regulator is tested and specified under pulse
load conditions such that TJ ≅ TA. The LT3065E regulators are 100%
tested at TA = 25°C and performance is guaranteed from 0°C to 125°C.
Performance at –40°C to 125°C is assured by design, characterization and
correlation with statistical process controls. The LT3065I regulators are
guaranteed over the full –40°C to 125°C operating junction temperature
range. The LT3065MP regulators are 100% tested over the –55°C to
150°C operating junction temperature range. The LT3065H regulators are
100% tested at the 150°C operating junction temperature. High junction
temperatures degrade operating lifetimes. Operating lifetime is derated at
junction temperatures greater than 125°C.
Note 4: The LT3065 adjustable version is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 5: Maximum junction temperature limits operating conditions.
Regulated output voltage specifications do not apply for all possible
combinations of input voltage and output current. If operating at the
maximum input voltage, limit the output current range. If operating at
the maximum output current, limit the input voltage range. Current limit
foldback limits the maximum output current as a function of input-tooutput voltage. See Current Limit vs VIN – VOUT in the Typical Performance
Characteristics section.
300
0
l
86
µA
µA
dB
dB
dB
dB
dB
dB
dB
78
78
74
72
71
70
85
l
PWRGD Trip Point Hysteresis
±1
3
10
900
µA
µA
mA
mA
200
495
220
545
mA
mA
0.07
0.25
V
0.01
1
µA
90
94
%
1.6
%
Note 6: Dropout voltage is the minimum IN-to-OUT differential voltage
needed to maintain regulation at a specified output current. In dropout,
the output voltage equals (VIN – VDROPOUT). For some output voltages,
minimum input voltage requirements limit dropout voltage.
Note 7: To satisfy minimum input voltage requirements, the LT3065 is
tested and specified for these conditions with an external resistor divider
(60.4k bottom, 442k top) which sets VOUT to 5V. The divider adds 10uA of
output DC load. This external current is not factored into GND pin current.
Note 8: GND pin current is tested with VIN = VOUT(NOMINAL) + 0.6V and a
current source load. GND pin current increases in dropout. See GND pin
current curves in the Typical Performance Characteristics section.
Note 9: To satisfy requirements for minimum input voltage, current limit is
tested at VIN = VOUT(NOMINAL) + 1V or VIN = 2.2V, whichever is greater.
Note 10: ADJ pin bias current flows out of the ADJ pin.
Note 11: SHDN pin current flows into the SHDN pin.
Note 12: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the specified voltage. This current flows into the OUT
pin and out of the GND pin.
Note 13: Current limit varies inversely with the external resistor value tied
from the IMAX pin to GND. For detailed information on selecting the IMAX
resistor value, see the Operation section. If the externally programmed
current limit feature is unused, tie the IMAX pin to GND. The internal
current limit circuitry implements short-circuit protection as specified.
Note 14: This IC includes over temperature protection that protects the
device during overload conditions. Junction temperature exceeds 125°C
(LT3065E, LT3065I) or 150°C (LT3065MP, LT3065H) when the over
temperature circuitry is active. Continuous operation above the specified
maximum junction temperature may impair device reliability.
3065fb
For more information www.linear.com/LT3065
5
LT3065 Series
TYPICAL PERFORMANCE CHARACTERISTICS
Guaranteed Dropout Voltage
600
550
450
TJ = 150°C
TJ = 125°C
300
250
200
TJ = 25°C
150
100
50
0
0
50 100 150 200 250 300 350 400 450 500
OUTPUT CURRENT (mA)
= TEST POINTS
550
500
TJ = 150°C
TJ = 25°C
1.224
1.220
0
200
LT3065-1.5 Output Voltage
1.530
IL = 1mA
1.525
1.520
1.515
1.208
1.204
1.200
1.196
1.192
1.188
1.505
1.500
1.495
1.490
1.485
1.184
1.480
1.180
1.475
1.176
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
1.470
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3065 G05
IL = 1mA
2.54
1.824
3065 G06
LT3065-3.3 Output Voltage
3.366
IL = 1mA
3.355
OUTPUT VOLTAGE (V)
1.788
1.782
2.52
2.51
2.50
2.49
2.48
2.47
1.776
IL = 1mA
3.344
2.53
1.794
IL = 1mA
1.510
LT3065-2.5 Output Voltage
1.800
IL = 10mA
3065 G03
1.212
2.55
1.806
IL = 100mA
150
1.216
LT3065-1.8 Output Voltage
1.812
IL = 50mA
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
50 100 150 200 250 300 350 400 450 500
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
QUIESCENT CURRENT (µA)
250
LT3065-1.2 Output Voltage
1.818
IL = 500mA
300
50
3065 G04
OUTPUT VOLTAGE (V)
400
350
3065 G02
Quiescent Current
130
VIN = VSHDN = 12V
120
VOUT = 5V
110 I = 10µA
L
100
90
80
70
60
50
40
30
20
VIN = 12V
10 ALL
OTHER PINS = 0V
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
1.830
450
100
3065 G01
1.836
Dropout Voltage
600
OUTPUT VOLTAGE (V)
400
350
DROPOUT VOLTAGE (mV)
DROPOUT VOLTAGE (mV)
500
700
650
600
550
500
450
400
350
300
250
200
150
100
50
0
DROPOUT VOLTAGE (mV)
Typical Dropout Voltage
TJ = 25°C, unless otherwise noted.
3.333
3.322
3.311
3.300
3.289
3.278
3.267
3.256
1.770
2.46
3.245
1.764
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
2.45
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3.234
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3065 G07
3065 G08
3065 G09
3065fb
6
For more information www.linear.com/LT3065
LT3065 Series
TYPICAL PERFORMANCE CHARACTERISTICS
LT3065-5 Output Voltage
5.10
ADJ Pin Voltage
612
IL = 1mA
5.08
LT3065-1.2 Quiescent Current
200
IL = 1mA
610
5.02
5.00
4.98
4.96
4.94
QUIESCENT CURRENT (µA)
ADJ PIN VOLTAGE (mV)
5.04
606
604
602
600
598
596
594
592
590
4.90
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
588
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3065 G10
VSHDN = VIN
50
25
0
1
2
3
4 5 6 7 8
INPUT VOLTAGE (V)
125
100
VSHDN = VIN
75
50
0
9 10 11
VSHDN = VIN
75
50
0
1
2
3
4 5 6 7 8
INPUT VOLTAGE (V)
9 10 11
0
VSHDN = 0V
0
1
2
3
4 5 6 7 8
INPUT VOLTAGE (V)
9 10 11
3065 G16
TJ = 25°C
RL = 500k
VOUT = 2.5V
100
VSHDN = VIN
75
50
VSHDN = 0V
0
1
2
3
4 5 6 7 8
INPUT VOLTAGE (V)
9 10 11
3065 G15
Quiescent Current
TJ = 25°C
RL = 1M
VOUT = 5V
150
125
100
VSHDN = VIN
75
50
25
25
9 10 11
125
0
QUIESCENT CURRENT (µA)
QUIESCENT CURRENT (µA)
QUIESCENT CURRENT (µA)
100
4 5 6 7 8
INPUT VOLTAGE (V)
25
175
125
3
150
LT3065-5 Quiescent Current
150
2
3065 G12
VSHDN = 0V
200
TJ = 25°C
RL = 660k
VOUT = 3.3V
1
3065 G14
LT3065-3.3 Quiescent Current
175
0
175
3065 G13
200
VSHDN = 0V
LT3065-2.5 Quiescent Current
150
25
VSHDN = 0V
0
50
0
QUIESCENT CURRENT (µA)
125
VSHDN = VIN
75
200
TJ = 25°C
RL = 360k
VOUT = 1.8V
175
QUIESCENT CURRENT (µA)
QUIESCENT CURRENT (µA)
200
150
75
100
LT3065-1.8 Quiescent Current
TJ = 25°C
RL = 300k
VOUT = 1.5V
100
125
3065 G11
LT3065-1.5 Quiescent Current
175
150
25
4.92
200
TJ = 25°C
RL = 240k
VOUT = 1.2V
175
608
5.06
OUTPUT VOLTAGE (V)
TJ = 25°C, unless otherwise noted.
0
VSHDN = 0V
0
1
2
3
4 5 6 7 8
INPUT VOLTAGE (V)
9 10 11
3065 G17
130
120
110
100
90
80
70
60
50
40
30
20
10
0
TJ = 25°C
VOUT = 5V
IL = 10µA
VSHDN = VIN
VSHDN = 0V
0
5
10
15
20 25
VIN (V)
30
35
40
45
3065 G18
3065fb
For more information www.linear.com/LT3065
7
LT3065 Series
TYPICAL PERFORMANCE CHARACTERISTICS
TJ = 25°C
*FOR VOUT = 1.2V
VSHDN = VIN
20
18
RL = 2.4Ω
IL = 500mA*
16
14
20
RL = 12Ω
IL = 100mA*
RL = 4.8Ω
IL = 250mA*
12
10
RL = 120Ω
IL = 10mA*
8
6
18
RL = 3Ω
IL = 500mA*
16
14
20
RL = 15Ω
IL = 100mA*
RL = 6Ω
IL = 250mA*
12
10
RL = 150Ω
IL = 10mA*
8
6
14
10
6
4
2
0
0
4 5 6 7 8 9 10 11 12
INPUT VOLTAGE (V)
0
1
2
3
RL = 5Ω
IL = 500mA*
16
14
RL = 25Ω
IL = 100mA*
12
10
RL = 10Ω
IL = 250mA*
8
6
4
RL = 250Ω
IL = 10mA*
20
18
16
14
RL = 33Ω
IL = 100mA*
12
10
RL = 13.2Ω
IL = 250mA*
8
6
RL = 330Ω
IL = 10mA*
20
14
10
6
2
0
0
1
2
3
3065 G22
14
12
10
8
6
4
2
0
0
50 100 150 200 250 300 350 400 450 500
ILOAD (mA)
3065 G25
2
3
4 5 6 7 8 9 10 11 12
INPUT VOLTAGE (V)
SHDN Pin Current
1.5
1.4
OFF TO ON
1.3
1.2
1.1
ON TO OFF
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3065 G26
3.0
SHDN = 45V
2.5
SHDN PIN CURRENT (µA)
SHDN PIN THRESHOLD (V)
16
1
3065 G24
SHDN Pin Threshold
VIN = 5.6V
VOUT = 5V
18
0
3065 G23
GND Pin Current vs ILOAD
20
0
4 5 6 7 8 9 10 11 12
INPUT VOLTAGE (V)
RL = 500Ω
IL = 10mA*
8
0
4 5 6 7 8 9 10 11 12
INPUT VOLTAGE (V)
RL = 50Ω
IL = 100mA*
12
4
3
TJ = 25°C
*FOR VOUT = 5V
VSHDN = VIN
RL = 20Ω
IL = 250mA*
16
2
2
4 5 6 7 8 9 10 11 12
INPUT VOLTAGE (V)
18
4
1
3
RL = 10Ω
IL = 500mA*
22
2
0
2
LT3065-5 GND Pin Current
24
TJ = 25°C
RL = 6.6Ω
IL = 500mA* *FOR VOUT = 3.3V
VSHDN = VIN
22
GND PIN CURRENT (mA)
18
1
3065 G21
LT3065-3.3 GND Pin Current
24
TJ = 25°C
*FOR VOUT = 2.5V
VSHDN = VIN
20
0
RL = 180Ω
IL = 10mA*
3065 G20
LT3065-2.5 GND Pin Current
22
0
4 5 6 7 8 9 10 11 12
INPUT VOLTAGE (V)
GND PIN CURRENT (mA)
3
RL = 7.2Ω
IL = 250mA*
8
2
2
RL = 18Ω
IL = 100mA*
12
4
1
RL = 3.6Ω
IL = 100mA*
16
2
24
GND PIN CURRENT (mA)
18
4
0
TJ = 25°C
*FOR VOUT = 1.8V
VSHDN = VIN
22
3065 G19
GND PIN CURRENT (mA)
LT3065-1.8 GND Pin Current
24
TJ = 25°C
*FOR VOUT = 1.5V
VSHDN = VIN
22
GND PIN CURRENT (mA)
22
GND PIN CURRENT (mA)
LT3065-1.5 GND Pin Current
24
GND PIN CURRENT (mA)
LT3065-1.2 GND Pin Current
24
2.0
1.5
1.0
0.5
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3065 G27
3065fb
8
For more information www.linear.com/LT3065
LT3065 Series
TYPICAL PERFORMANCE CHARACTERISTICS
ADJ Pin Bias Current
SHDN Pin Input Current
Internal Current Limit
50
3.0
45
2.5
40
2.0
1.5
1.0
35
CURRENT LIMIT (A)
ADJ PIN CURRENT (nA)
SHDN PIN CURRENT (µA)
TJ = 25°C, unless otherwise noted.
30
25
20
15
10
0.5
5
0
0
5
10 15 20 25 30 35
SHDN PIN VOLTAGE (V)
40
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
45
3065 G29
3065 G28
Internal Current Limit
1.2
125°C
1.1
1.0
160
–40°C
–55°C
0.6
0.5
0.4
25°C
0.3
0.2
0.1
0
0
5
10
15 20 25 30
VIN – VOUT (V)
35
40
OUTPUT CURRENT (µA)
OUTPUT CURRENT (µA)
CURRENT LIMIT (A)
VIN = 0
0.9
150°C
Reverse Output Current
180
0.8
0.7
0.7
0.6
0.5
0.4
0.3
5
10
15
20 25
VOUT (V)
30
35
50
CREF/BYP = 0nF
CREF/BYP = 100nF
ILOAD = 500mA
COUT = 10µF
VOUT = 3.3V
VIN = 4.3V + 50mVRMS RIPPLE
20
10
10
100
1k
10k 100k
FREQUENCY (Hz)
10M
3065 G34
80
70
70
60
60
50
50
40
30
0
40
30
ILOAD = 500mA
CREF/BYP = 10nF
VOUT = 3.3V
VIN = 4.3V + 50mVRMS RIPPLE
20
10
1M
Input Ripple Rejection
90
PSRR
RIPPLE REJECTION (dB)
RIPPLE REJECTION (dB)
CREF/BYP = 1nF
40
3065 G33
COUT = 10µF
COUT = 3.3µF
80
60
IADJ
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
40
Input Ripple Rejection
90
CREF/BYP = 10nF
30
60
20
0
IOUT
80
0.1
Input Ripple Rejection
70
100
3065 G32
90
80
120
40
0
45
VOUT = VADJ = 1.2V
VIN = 0V
140
0.2
3065 G31
0
3065 G30
Reverse Output Current
1.0
0.9
0.8
1.5
1.4 VIN = 6V
1.3 VOUT = 0V
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
10
100
1k
10k 100k
FREQUENCY (Hz)
20
10
1M
10M
3065 G35
ILOAD = 500mA
CREF/BYP = 10nF
VOUT = 3.3V
VIN = 4.3V + 50mVRMS RIPPLE
f = 120Hz
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3065 G36
3065fb
For more information www.linear.com/LT3065
9
LT3065 Series
TYPICAL PERFORMANCE CHARACTERISTICS
4
IL = 500mA
2.0
3
1.8
2
LOAD REGULATION (mV)
MINIMUM INPUT VOLTAGE (V)
∆IL = 1mA TO 500mA
VOUT = 0.6V
VIN = 2.2V
1.6
1.4
1.2
1.0
0.8
0.6
1
0
–1
–2
0.4
–3
0.2
0
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
–4
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
COUT = 10µF
IL = 500mA
VOUT = 5V
1
VOUT = 0.6V
0.1
0.01
CREF/BYP = 100pF
CREF/BYP = 1nF
CREF/BYP = 10nF
10
100
1k
10k
FREQUENCY (Hz)
100k
10
VOUT = 5V
COUT = 10µF
IL = 500mA
0.1
0.01
CFF = 0pF
CFF = 100pF
CFF = 1nF
CFF = 10nF
10
20
0
0.01
VOUT = 0.6V
0.1
1
10
100
LOAD CURRENT (mA)
1000
3065 G43
100
1k
10k
FREQUENCY (Hz)
100
1k
10k
FREQUENCY (Hz)
VOUT = 5V
100
VOUT = 3.3V
90
80
110
f = 10Hz TO 100kHz
100 C
OUT = 10µF
90
CREF/BYP = 0pF
80
70
CREF/BYP = 100pF
60
50
40
CREF/BYP = 1nF
30
20
CREF/BYP = 10nF
0
0.01
100k
0.1
1
10
100
LOAD CURRENT (mA)
f = 10Hz TO 100kHz
CREF/BYP = 10nF
COUT = 10µF
IFB-DIVIDER = 10µA
ILOAD = 500mA
60
50
40
30 VOUT = 1.2V
20
10
1000
3065 G42
Start-Up Time
vs REF/BYP Capacitor
VOUT = 2.5V
70
100k
3065 G39
10
RMS Output Noise,
vs Feedforward Capacitor (CFF)
110
OUTPUT NOISE VOLTAGE (µVRMS)
OUTPUT VOLTAGE NOISE (µVRMS)
120
VOUT = 1.2V
40
10
3065 G41
200
60
0.01
VOUT = 5V
VOUT = 3.3V
VOUT = 2.5V
VOUT = 1.2V
VOUT = 0.6V
RMS Output Noise,
VOUT = 0.6V, CFF = 0
1
RMS Output Noise vs Load Current
vs CREF/BYP = 10nF, CFF = 0
80
0.1
Output Noise Spectral Density
vs CFF, CREF/BYP = 10nF
3065 G40
VOUT = 5V
f = 10Hz TO 100kHz
180 COUT = 10µF
VOUT = 3.3V
160
VOUT = 2.5V
140
VOUT = 1.8V
120
VOUT = 1.5V
100
1
OUTPUT NOISE VOLTAGE (µVRMS)
Output Noise Spectral Density
vs CREF/BYP, CFF = 0
10
COUT = 10µF
IL = 500mA
3065 G38
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
3065 G37
10
1000
START-UP TIME (ms)
2.2
Output Noise Spectral Density
CREF/BYP = 0, CFF = 0
Load Regulation
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
Minimum Input Voltage
TJ = 25°C, unless otherwise noted.
CFF = OPEN
100
10
1
VOUT = 0.6V
0
0.01
0.1
1
FEEDFORWARD CAPACITOR, CFF (nF)
10
3065 G44
0.1
1
100
10
REF/BYP CAPACITOR (nF)
1000
3065 G45
3065fb
10
For more information www.linear.com/LT3065
LT3065 Series
TYPICAL PERFORMANCE CHARACTERISTICS
TJ = 25°C, unless otherwise noted.
10Hz to 100kHz Output Noise
CREF/BYP = 10nF, CFF = 10nF
10Hz to 100kHz Output Noise
CREF/BYP = 10nF, CFF = 0
VOUT
200µV/DIV
5V Transient Response
CFF = 0, IOUT = 50mA to 500mA
VOUT
100mV/DIV
VOUT
200µV/DIV
IOUT
500mA/DIV
COUT = 10µF
ILOAD = 500mA
VOUT = 5V
2ms/DIV
3065 G46
COUT = 10µF
ILOAD = 500mA
VOUT = 5V
3065 G47
2ms/DIV
5V Transient Response
CFF = 10nF, IOUT = 50mA to 500mA
VIN = 6V
100µs/DIV
COUT = 10µF
IFB-DIVIDER = 10µA
VOUT = 5V
3065 G48
Transient Response (Load Dump)
VOUT
20mV/DIV
45V
VOUT
100mV/DIV
VIN
10V/DIV
12V
IOUT
500mA/DIV
VOUT = 5V
IOUT = 100mA
COUT = 10µF
3065 G49
VIN = 6V
20µs/DIV
COUT = 10µF
IFB-DIVIDER = 10µA
VOUT = 5V
1ms/DIV
3065 G50
SHDN Transient Response
CREF/BYP = 10nF
SHDN Transient Response
CREF/BYP = 0
OUT
5V/DIV
IL = 500mA
OUT
5V/DIV
IL = 500mA
REF/BYP
500mV/DIV
REF/BYP
500mV/DIV
SHDN
2V/DIV
SHDN
2V/DIV
2ms/DIV
3065 G51
2ms/DIV
3065 G52
3065fb
For more information www.linear.com/LT3065
11
LT3065 Series
TYPICAL PERFORMANCE CHARACTERISTICS
216
550
VOUT(NOMINAL) = 5V
540
208
204
PWRGD Threshold Voltage
590
VOUT(NOMINAL) = 5V
580
530
CURRENT LIMIT (mA)
CURRENT LIMIT (mA)
212
Precision Current Limit,
RIMAX = 604Ω
VIN = 10V
200
VIN = 5.6V
196
192
520
570
ADJ PIN VOLTAGE (mV)
220
Precision Current Limit,
RIMAX = 1.5k
TJ = 25°C, unless otherwise noted.
5.6V
510
500
490
10V
7V
480
560
550
ADJ PIN RISING THRESHOLD
540
530
520
ADJ PIN FALLING THRESHOLD
188
470
510
184
460
500
180
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
450
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
490
–75 –50 –25 0 25 50 75 100 125 150 175
TEMPERATURE (°C)
3065 G53
PIN FUNCTIONS
3065 G54
3065 G55
(DFN/MSOP)
IN (Pins 1, 2/Pins 1, 2): Input. These pin(s) supply power to
the device. The LT3065 requires a local IN bypass capacitor
if it is located more than six inches from the main input
filter capacitor. In general, battery output impedance rises
with frequency, so adding a bypass capacitor in batterypowered circuits is advisable. An input bypass capacitor
in the range of 1µF to 10µF generally suffices. See Input
Capacitance and Stability in the Applications Information
section for more information.
The LT3065 withstands reverse voltages on the IN pin
with respect to its GND and OUT pins. In such case, such
as a battery plugged in backwards, the LT3065 behaves
as if a diode is in series with its input. No reverse current
flows into the LT3065 and no reverse voltage appears at
the load. The device protects itself and the load.
SHDN (Pin 3/Pin 3): Shutdown. Pulling the SHDN pin
low puts the LT3065 into a low power state and turns
the output off. Drive the SHDN pin with either logic or an
open collector/drain with a pull-up resistor. The resistor
supplies the pull-up current to the open collector/drain
logic, normally several microamperes, and the SHDN
pin current, typically less than 2µA. If unused, connect
the SHDN pin to IN. The LT3065 does not function if the
SHDN pin is not connected.
PWRGD (Pin 4/Pin 4): Power Good. The PWRGD pin is an
open-drain output that actively pulls low if the output is
less than 90% of the nominal output value. The PWRGD
pin is capable of sinking 50µA. There is no internal pull-up
resistor; an external pull-up resistor must be used.
IMAX (Pin 5/Pin 5): Precision Current Limit Programming.
This pin is the collector of a current mirror PNP that is
1/500th the size of the output power PNP. This pin is also
the input to the current limit amplifier. The current limit
threshold is set by connecting a resistor between the IMAX
pin and GND.
For detailed information on how to set the IMAX pin resistor
value, see the Applications Information section. The IMAX
pin requires a 22nF de-coupling capacitor to ground. If
not used, tie IMAX to GND.
NC (Pins 6, 7, MSE Package Only): No Connect. These
pins have no connection to internal circuitry. These pins
may be floated or connected to GND.
REF/BYP (Pin 6/Pin 8): Bypass/Soft Start. Connecting a
capacitor from this pin to GND bypasses the LT3065’s reference noise and soft-starts the reference. A 10nF bypass
capacitor typically reduces output voltage noise to 25µVRMS
in a 10Hz to 100kHz bandwidth. Soft-start time is directly
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LT3065 Series
PIN FUNCTIONS
(DFN/MSOP)
proportional to the BYP capacitor value. If the LT3065
is placed in shutdown, BYP is actively pulled low by an
internal device to reset soft-start. If low noise or soft-start
performance is not required, this pin must be left floating
(unconnected). Do not drive this pin with any active circuitry.
Because the REF/BYP pin is the reference input to the
error amplifier, stray capacitance at this point should be
minimized. Special attention should be given to any stray
capacitances that can couple external signals onto the
REF/BYP pin producing undesirable output transients or
ripple. A minimum capacitance of 100pF from REF/BYP
to GND is recommended.
OUTPUT (Pins 9,10/Pins 11,12): Output. These pins supply power to the load. Stability requirements demand a
minimum 3.3µF ceramic output capacitor with an ESR < 1Ω
to prevent oscillations. Applications with output voltages
less than 1.2V require a minimum 4.7µF ceramic output
capacitor. Large load transient applications require larger
output capacitors to limit peak voltage transients. See the
Applications Information section for details on transient
response and reverse output characteristics. Permissible
output voltage range is 600mV to 40V.
Adjustable Version Only
GND (Pin 7, Exposed Pad Pin 11/Pin 9, Exposed Pad
Pin 13): Ground. The exposed pad of the DFN and MSOP
packages is an electrical connection to GND. To ensure
proper electrical and thermal performance, solder Pin
11/Pin 13 to the PCB GND and tie it directly to Pin 7/Pin
9. For the adjustable LT3065, connect the bottom of the
external resistor divider that sets output voltage directly
to GND (Pin 7/Pin 9)for optimum load regulation.
ADJ (Pin 8/Pin 10): Adjust. This pin is the error amplifier’s inverting terminal. It’s typical bias current of 16nA
flows out of the pin (see curve of ADJ Pin Bias Current vs
Temperature in the Typical Performance Characteristics
section). The ADJ pin voltage is 600mV referenced to GND.
Connecting a capacitor from OUT to ADJ reduces output
noise and improves transient response for output voltages
greater than 600mV. See the Applications Information section for calculating the value of the feedforward capacitor.
At output voltages above 0.6V, the resistor divider
connected to the ADJ pin is used to regulate voltage at
the load. Parasitic resistances of PCB traces or cables can
therefore result in load regulation errors at high output
currents. To eliminate these, connect the resistor divider
directly to the load for a Kelvin sense connection, as
shown in Figure 1.
Fixed Voltage Version Only
GND (Exposed Pad Pin 11, Exposed Pad Pin 13): Ground.
The exposed pad of the DFN and MSOP packages is an
electrical connection to GND. To ensure proper electrical
and thermal performance, solder Pin 11/Pin 13 to the
PCB ground.
SENSE (Pin 8/Pin 10): Sense. This pin is the top of the
internal resistor divider network, and should be connected
directly to the load, as a Kelvin sense, for optimum load
regulation and transient performance. Connecting this
pin to the output pin at the package, rather than directly
to the load, can result in load regulation errors due to the
current across the parasitic resistance of the PCB trace.
ADJ (Pin 7/Pin 9): Adjust. This pin is the midpoint of the
internal resistor divider network and the inverting input
to the error amplifier. Connecting a capacitor from the
OUT to ADJ reduces output noise and improves transient
response. See the Applications Information section for
calculating the value of the feedforward capacitor; the
internal divider current is 5µA. This pin should not be
used for any other purpose.
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13
LT3065 Series
PIN FUNCTIONS
ADJUSTABLE VERSION
IN
OUT
VIN
+
IN
R2
LT3065
+
FIXED VOLTAGE VERSION
RP
+
LOAD
R1
GND
RP
LT3065-X
ADJ
SHDN
OUT
VIN
+
SENSE
SHDN
LOAD
GND
RP
RP
3065 F01
Figure 1. Kelvin Sense Connection
BLOCK DIAGRAM
Table 2. Fixed Voltage Option Resistor Values
VOUT (V)
R1 (kΩ)
R2 (kΩ)
5
120
880
3.3
120
540
2.5
120
380
1.8
120
240
1.5
120
180
1.2
120
120
IN
SENSE*
R5
ADJ
QIMAX
1/500X
D1
R2*
30k
R4
–
+
Q2
SHDN
Q3
100k
R3
+
–
D2
+
–
QPOWER
1X
OUT
CURRENT
LIMIT
AMPLIFIER
ERROR
AMPLIFIER
R1*
IDEAL
DIODE
D3
THERMAL/
CURRENT LIMIT
IMAX
600mV
REFERENCE
PWRGD
–
+
+
–
REF/BYP
QPWRGD
540mV
REFERENCE
GND
3065 F02
*FIXED VOLTAGE OPTIONS ONLY
Figure 2. System Block Diagram
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LT3065 Series
APPLICATIONS INFORMATION
The LT3065 are micropower, low noise and low drop-out
voltage, 500mA linear regulators with micropower shutdown, programmable current limit, and a Power-good flag.
The devices supply up to 500mA at a typical dropout voltage
of 300mV and operates over a 1.8V to 45V input range.
A single external capacitor provides low noise reference
performance and output soft-start functionality. For example, connecting a 10nF capacitor from the REF/BYP
pin to GND lowers output noise to 25μVRMS over a 10Hz
to 100kHz bandwidth. This capacitor also soft starts the
reference and prevents output voltage overshoot at turn-on.
The LT3065’s quiescent current is merely 55μA but provides
fast transient response with a low ESR, minimum value
3.3μF ceramic output capacitor. In shutdown, quiescent
current is less than 1μA and the reference soft-start capacitor is reset.
The LT3065 optimizes stability and transient response with
low ESR, ceramic output capacitors. The regulator does
not require the addition of ESR as is common with other
regulators. The LT3065 typically provides better than 0.1%
line regulation and 0.1% load regulation. Internal protection circuitry includes reverse battery protection, reverse
output protection, reverse current protection, current limit
with foldback and thermal shutdown.
This “bullet-proof” protection set makes it ideal for use
in battery-powered, automotive and industrial systems.In
battery backup applications where the output is held up
by a backup battery and the input is pulled to ground, the
LT3065 acts like it has a diode in series with its output
and prevents reverse current.
Adjustable Operation
The adjustable LT3065 has an output voltage range of 0.6V
to 40V. Output voltage is set by the ratio of two external
resistors, as shown in Figure 3. The device regulates the
output to maintain the ADJ pin voltage at 0.6V referenced
to ground. The current in R1 equals 0.6V/R1, and R2’s
current is R1’s current minus the ADJ pin bias current.
The ADJ pin bias current, 16nA at 25°C, flows from the
ADJ pin through R1 to GND. Calculate the output voltage
using the formula in Figure 3. R1’s value should not be
greater than 62k to provide a minimum 10μA load current
so that output voltage errors, caused by the ADJ pin bias
current, are minimized. Note that in shutdown, the output
is turned off and the divider current is zero. Curves of ADJ
Pin Voltage vs Temperature and ADJ Pin Bias Current vs
Temperature appear in the Typical Performance Characteristics section.
+
IN
VIN
VOUT
OUT
LT3065
SHDN
R2
ADJ
GND
R1
3065 F03
⎛ R2 ⎞
VOUT = 0.6V ⎜1+ ⎟ – (IADJ • R2)
⎝ R1⎠
VADJ = 0.6V
IADJ = 16nA AT 25°C
OUTPUT RANGE = 0.6V TO 40V
Figure 3. Adjustable Operation
The LT3065 is tested and specified with the ADJ pin tied
to the OUT pin, yielding VOUT = 0.6V. Specifications for
output voltages greater than 0.6V are proportional to the
ratio of the desired output voltage to 0.6V: VOUT/0.6V. For
example, load regulation for an output current change of
1mA to 500mA is 0.1mV (typical) at VOUT = 0.6V. At VOUT
= 12V, load regulation is:
12V
• (0.1mV) = 2mV
0.6V
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15
LT3065 Series
APPLICATIONS INFORMATION
Table 3. Output Voltage Resistor Divider Values
VOUT (V)
R1 (kΩ)
R2 (kΩ)
1.2
60.4
60.4
1.5
59
88.7
1.8
59
118
2.5
60.4
191
3
59
237
3.3
61.9
280
5
59
432
Bypass Capacitance and Output Voltage Noise
The LT3065 regulator provides low output voltage noise
over a 10Hz to 100kHz bandwidth while operating at full
load with the addition of a bypass capacitor (CREF/BYP)
from the REF/BYP pin to GND. A high quality low leakage capacitor is recommended. This capacitor bypasses
the internal reference of the regulator, providing a low
frequency noise pole for the internal reference. With the
use of 10nF for CREF/BYP, output voltage noise decreases
to as low as 25μVRMS when the output voltage is set for
0.6V. For higher output voltages (generated by using a
feedback resistor divider), the output voltage noise gains
up proportionately when using CREF/BYP.
Feedforward capacitance can also be used in fixed-voltage
parts; the feedforward capacitor is connected from OUT
to ADJ in the same manner. In this case, the current in
the internal feedback resistor divider is 5μA.
Using a feedforward capacitor (CFF) connected between
VOUT and ADJ has the added benefit of improving transient
response for output voltages greater than 0.6V. With no
feedforward capacitor, the settling time increases as the
output voltage increases above 0.6V. Use the equation
in Figure 4 to determine the minimum value of CFF to
achieve a transient response that is similar to the 0.6V
output voltage performance regardless of the chosen
output voltage (See Figure 5 and Transient Response in
the Typical Performance Characteristics section).
IN
+
VIN
OUT
LT3065
SHDN
ADJ
GND REF/BYP
R2
CFF
VOUT
COUT
R1
CREF/BYP
3065 F04
CFF ≥
10nF
• (IFB _DIVIDER)
10µA
IFB _DIVIDER =
VOUT
R1+R2
Figure 4. Feedforward Capacitor for Fast Transient Response
0
VOUT
100mV/DIV
To lower the higher output voltage noise, connect a
feedforward capacitor (CFF) from VOUT to the ADJ pin. A
high quality, low leakage capacitor is recommended. This
capacitor bypasses the error amplifier of the regulator,
providing an additional low frequency noise pole. With
the use of 10nF for both CFF and CREF/BYP, output voltage
noise decreases to 25μVRMS when the output voltage is
set to 5V by a 10μA feedback resistor divider. If the current in the feedback resistor divider is doubled, CFF must
also be doubled to achieve equivalent noise performance.
onto the LT3065’s output. Power supply ripple rejection
must also be considered. The LT3065 regulator does not
have unlimited power supply rejection and passes a small
portion of the input noise through to the output.
FEEDFORWARD
CAPACITOR, CFF
Table 3 shows 1% resistor divider values for some common
output voltages with a resistor divider current of 10μA.
100pF
1nF
10nF
LOAD CURRENT
500mA/DIV
100µs/DIV
VOUT = 5V
COUT = 10µF
IFB-DIVIDER = 10µA
3065 F05
Figure 5. Transient Response vs Feedforward Capacitor
Higher values of output voltage noise can occur if care
is not exercised with regard to circuit layout and testing.
Crosstalk from nearby traces induces unwanted noise
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Output Capacitance and Transient Response
The LT3065 regulator is stable with a wide range of output
capacitors. The ESR of the output capacitor affects stability,
most notably with small capacitors. Use a minimum output
capacitor of 3.3μF with an ESR of 1Ω or less to prevent
oscillations. For VOUT less than 1.2V, use a minimum COUT
of 4.7µF. If a feedforward capacitor is used with output
voltages set for greater than 24V, use a minimum output
capacitor of 10μF. The LT3065 is a micropower device
and output load transient response is a function of output
capacitance. Larger values of output capacitance decrease
the peak deviations and provide improved transient response for larger load current changes. Bypass capacitors,
used to decouple individual components powered by the
LT3065, increase the effective output capacitor value. For
applications with large load current transients, a low ESR
ceramic capacitor in parallel with a bulk tantalum capacitor
often provides an optimally damped response.
Give extra consideration to the use of ceramic capacitors.
Manufacturers make ceramic capacitors with a variety of
dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics
are specified with EIA temperature characteristic codes
of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics
provide high C-V products in a small package at low cost,
but exhibit strong voltage and temperature coefficients, as
shown in Figures 6 and 7. When used with a 5V regulator,
a 16V 10μF Y5V capacitor can exhibit an effective value
The X7R type works over a wider temperature range and
has better temperature stability, while the X5R is less
expensive and is available in higher values. Care still must
be exercised when using X5R and X7R capacitors; the X5R
and X7R codes only specify operating temperature range
and maximum capacitance change over temperature.
Capacitance change due to DC bias with X5R and X7R
capacitors is better than Y5V and Z5U capacitors, but can
still be significant enough to drop capacitor values below
appropriate levels. Capacitor DC bias characteristics tend
to improve as component case size increases, but expected
capacitance at operating voltage should be verified.
20
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
0
CHANGE IN VALUE (%)
Using a feedforward capacitor also affects start-up time.
Start-up time is directly proportional to the size of the
feedforward capacitor and the output voltage, and is
inversely proportional to the feedback resistor divider current, slowing to 15ms with a 10nF feedforward capacitor
and a 10μF output capacitor for an output voltage set to
5V by a 10μA feedback resistor divider.
as low as 1μF to 2μF for the DC bias voltage applied, and
over the operating temperature range. The X5R and X7R
dielectrics yield much more stable characteristics and are
more suitable for use as the output capacitor.
X5R
–20
–40
–60
Y5V
–80
–100
0
2
4
14
8
6
10 12
DC BIAS VOLTAGE (V)
16
3065 F06
Figure 6. Ceramic Capacitor DC Bias Characteristics
40
20
CHANGE IN VALUE (%)
During start-up, the internal reference soft-starts when
a REF/BYP capacitor is used. Regulator start-up time is
directly proportional to the size of the bypass capacitor
(see Start-Up Time vs REF/BYP Capacitor in the Typical
Performance Characteristics section). The reference bypass capacitor is actively pulled low during shutdown to
reset the internal reference.
X5R
0
–20
–40
Y5V
–60
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
3065 F07
Figure 7. Ceramic Capacitor Temperature Characteristics
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17
LT3065 Series
APPLICATIONS INFORMATION
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress is induced
by vibrations in the system or thermal transients. The
resulting voltages produced cause appreciable amounts
of noise. A ceramic capacitor produced the trace in Figure 8 in response to light tapping from a pencil. Similar
vibration induced behavior can masquerade as increased
output voltage noise.
VOUT
1mV/DIV
VOUT = 5V
COUT = 10µF
CREF/BYP = 10nF
10ms/DIV
3065 F08
Figure 8. Noise Resulting from Tapping On a Ceramic Capacitor
Stability and Input Capacitance
Low ESR, ceramic input bypass capacitors are acceptable
for applications without long input leads. However, applications connecting a power supply to an LT3065 circuit’s
IN and GND pins with long input wires combined with a
low ESR, ceramic input capacitors are prone to voltage
spikes, reliability concerns and application-specific board
oscillations.
The input wire inductance found in many battery-powered
applications, combined with the low ESR ceramic input
capacitor, forms a high Q LC resonant tank circuit. In
some instances this resonant frequency beats against the
output current dependent LDO bandwidth and interferes
with proper operation. Simple circuit modifications/solutions are then required. This behavior is not indicative of
LT3065 instability, but is a common ceramic input bypass
capacitor application issue.
The self-inductance, or isolated inductance, of a wire is
directly proportional to its length. Wire diameter is not a
major factor on its self-inductance. For example, the selfinductance of a 2-AWG isolated wire (diameter = 0.26") is
about half the self-inductance of a 30-AWG wire (diameter
= 0.01"). One foot of 30-AWG wire has approximately
465nH of self-inductance.
Two methods can reduce wire self-inductance. One method
divides the current flowing towards the LT3065 between
two parallel conductors. In this case, the farther apart the
wires are from each other, the more the self-inductance is
reduced; up to a 50% reduction when placed a few inches
apart. Splitting the wires connects two equal inductors in
parallel, but placing them in close proximity creates mutual
inductance adding to the self-inductance. The second and
most effective way to reduce overall inductance is to place
both forward and return current conductors (the input
and GND wires) in very close proximity. Two 30-AWG
wires separated by only 0.02", used as forward and return
current conductors, reduce the overall self-inductance
to approximately one-fifth that of a single isolated wire.
If a battery, mounted in close proximity, powers the LT3065,
a 10µF input capacitor suffices for stability. However, if a
distant supply powers the LT3065, use a larger value input
capacitor. Use a rough guideline of 1µF (in addition to the
10µF minimum) per 8 inches of wire length. The minimum
input capacitance needed to stabilize the application also
varies with power supply output impedance variations.
Placing additional capacitance on the LT3065’s output
also helps. However, this requires an order of magnitude
more capacitance in comparison with additional LT3065
input bypassing. Series resistance between the supply and
the LT3065 input also helps stabilize the application; as
little as 0.1Ω to 0.5Ω suffices. This impedance dampens
the LC tank circuit at the expense of dropout voltage. A
better alternative is to use higher ESR tantalum or electrolytic capacitors at the LT3065 input in place of ceramic
capacitors.
IMAX Pin Operation
The IMAX pin is the collector of a PNP that sources a current equal to 1/500th of output load current (see Block
Diagram). The IMAX pin is also the input to the precision
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current limit amplifier. Connecting a resistor (RIMAX) from
IMAX to GND sets the current limit threshold. If the output
load increases to a level such that the IMAX pin voltage
reaches 0.6V, the current limit amplifier takes control
and regulates the IMAX voltage to 0.6V, regardless of the
output voltage. Calculate the required RIMAX value for a
given current limit from the following formula:
RIMAX = 500 •
0.6V
ILIMIT
In cases where the IN to OUT differential voltage exceeds
10V, current limit foldback lowers the internal current
limit level, possibly causing it to override the external
programmable current limit. See the Internal Current
Limit vs VIN – VOUT graph in the Typical Performance
Characteristics section.
The IMAX pin requires a 22nF decoupling capacitor. If the
external programmable current limit is not used, connect
the IMAX pin directly to GND. LT3065 power dissipation
increases the IMAX threshold at a rate of approximately
0.5 percent per watt.
PWRGD Pin Operation
The PWRGD pin is an open-drain high voltage NMOS digital
output capable of sinking 50µA. The PWRGD pin de-asserts
and becomes high impedance if the output rises above
90% of its nominal value. If the output falls below 88.4%
of its nominal value for more than 25μs, the PWRGD pin
asserts low. The PWRGD comparator has 1.6% hysteresis
and 25μs of deglitching. The PWRGD comparator has a
dedicated reference that does not soft-start if a capacitor
is used on the REF/BYP pin.
The use of a feed-forward capacitor, CFF, as shown in
Figure 4, can result in the ADJ pin being pulled artificially
high during startup transients, which causes the PWRGD
flag to assert early. To avoid this problem, ensure that
the REF/BYP capacitor is significantly larger than the
feed-forward capacitor, causing REF/BYP time constant
to dominate over the time constant of the resistor divider
network.
Operation in Dropout
Some degradation of the IMAX current mirror accuracy
occurs for output currents less than 50mA when operating in dropout.
Overload Recovery
Like many IC power regulators, the LT3065 has safe operating area protection. The safe area protection decreases
current limit as input-to-output voltage increases, and
keeps the power transistor inside a safe operating region
for all values of input-to-output voltage. The LT3065 provides some output current at all values of input-to-output
voltage up to the device’s Absolute Maximum Rating.
When power is first applied, the input voltage rises and the
output follows the input; allowing the regulator to start-up
into very heavy loads. During start-up, as the input voltage
is rising, the input-to-output voltage differential is small,
allowing the regulator to supply large output currents.
With a high input voltage, a problem can occur wherein
the removal of an output short will not allow the output
to recover. Other regulators, such as the LT1083/LT1084/
LT1085 family and LT1764A also exhibit this phenomenon,
so it is not unique to the LT3065. The problem occurs with
a heavy output load when the input voltage is high and the
output voltage is low. Common situations are immediately
after the removal of a short circuit or if the shutdown pin
is pulled high after the input voltage is already turned on.
The load line intersects the output current curve at two
points. If this happens, there are two stable output operating points for the regulator. With this double intersection,
the input power supply needs to be cycled down to zero
and back up again to recover the output.
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Thermal Considerations
The LT3065’s maximum rated junction temperature of
125°C (E-, I-grades) or 150°C (MP-, H-grades) limits its
power handling capability. Two components comprise the
power dissipated by the device:
1.Output current multiplied by the input/output voltage
differential:
IOUT • (VIN – VOUT),
Tables 4 and 5 list thermal resistance as a function of copper
area in a fixed board size. All measurements were taken
in still air on a 4-layer FR-4 board with 1oz solid internal
planes, and 2oz external trace planes with a total board
thickness of 1.6mm. For further information on thermal
resistance and using thermal information, refer to JEDEC
standard JESD51, notably JESD51-12.
Table 4. MSOP Measured Thermal Resistance
COPPER AREA
and
TOPSIDE
2.GND pin current multiplied by the input voltage:
IGND • VIN
GND pin current is determined using the GND Pin Current
curves in the Typical Performance Characteristics section.
Power dissipation equals the sum of the two components
listed above.
The LT3065 regulator has internal thermal limiting
that protects the device during overload conditions.
For continuous normal conditions, do not exceed the
maximum junction temperature of 125°C (E-, I-grades)
or 150°C (MP-, H-grades). Carefully consider all sources
of thermal resistance from junction-to-ambient including
other heat sources mounted in proximity to the LT3065.
The undersides of the LT3065 DFN and MSE packages have
exposed metal from the lead frame to the die attachment.
These packages allow heat to directly transfer from the
die junction to the printed circuit board metal to control
maximum operating junction temperature. The dual-inline
pin arrangement allows metal to extend beyond the ends
of the package on the topside (component side) of a PCB.
Connect this metal to GND on the PCB. The multiple IN
and OUT pins of the LT3065 also assist in spreading heat
to the PCB.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes also can spread the heat generated by
power devices.
BACKSIDE
THERMAL RESISTANCE
BOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm 2500 sq mm
28°C/W
1000 sq mm 2500 sq mm 2500 sq mm
31°C/W
225 sq mm 2500 sq mm 2500 sq mm
32°C/W
100 sq mm 2500 sq mm 2500 sq mm
33°C/W
Table 5. DFN Measured Thermal Resistance
COPPER AREA
TOPSIDE
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
2500 sq mm
2500 sq mm
31°C/W
1000 sq mm
2500 sq mm
32°C/W
225 sq mm
2500 sq mm
34°C/W
100 sq mm
2500 sq mm
35°C/W
Calculating Junction Temperature
Example: Given an output voltage of 5V, an input voltage
range of 12V ±5%, a maximum output current range of
75mA and a maximum ambient temperature of 85°C, what
is the maximum junction temperature?
The power dissipated by the device equals:
IOUT(MAX) • (VIN(MAX) – VOUT) + IGND • VIN(MAX)
where:
IOUT(MAX) = 75mA
VIN(MAX) = 12.6V
IGND at (IOUT = 75mA, VIN = 12V) = 3.5mA
So:
P = 75mA • (12.6V – 5V) + 3.5mA • 12.6V = 0.614W
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0.614W • 35°C/W = 21.5°C
The maximum junction temperature equals the maximum ambient temperature plus the maximum junction
temperature rise above ambient or:
TJMAX = 85°C + 21.5°C = 106.5°C
Protection Features
The LT3065 incorporates several protection features that
make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal
limiting, the device also protects against reverse input
voltages, reverse output voltages and reverse output-toinput voltages.
Current limit protection and thermal overload protection
protect the device against current overload conditions
at the LT3065’s output. The typical thermal shutdown
temperature is 165°C with about 7°C of hysteresis. For
normal operation, do not exceed a junction temperature
of 125°C (E-, I-grades) or 150°C (MP-, H-grades).
The LT3065 incurs no damage if its output is pulled below ground. If the input is left open circuit or grounded,
the output can be pulled below ground by 50V. No current flows through the pass transistor from the output.
However, current flows in (but is limited by) the feedback
resistor divider that sets the output voltage. Current flows
from the bottom resistor in the divider and from the ADJ
pin’s internal clamp through the top resistor in the divider
to the external circuitry pulling OUT below ground. If a
voltage source powers the input, the output sources current equal to its current limit capability and the LT3065
protects itself by thermal limiting. In this case, grounding
the SHDN pin turns off the device and stops the output
from sourcing current.
1.0
VIN = 0
0.9
0.8
OUTPUT CURRENT (µA)
Using a DFN package, the thermal resistance ranges from
31°C/W to 35°C/W depending on the copper area. So the
junction temperature rise above ambient approximately
equals:
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
The LT3065 IN pin withstands reverse voltages of 50V. The
device limits current flow to less than 1μA (typically less
than 25nA) and no negative voltage appears at OUT. The
device protects both itself and the load against batteries
that are plugged in backwards.
5
10
15
20 25
VOUT (V)
30
35
40
3055 F09
Figure 9. Reverse Output Current
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For more information www.linear.com/LT3065
21
LT3065 Series
TYPICAL APPLICATIONS
Programming Undervoltage Lockout
IN
VIN > VUVLO
IN
R1
LT3065
SHDN
R2
3065 TA02
VUVLO =
R1+R2
• 1.1V
R2
Power Supply Sequencing Using PWRGD
IN
IN
SHDN
LT3065
PWRGD
500k
IN
LT3065
SHDN
3065 TA03
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22
For more information www.linear.com/LT3065
LT3065 Series
TYPICAL APPLICATIONS
Current Monitor
⎛ 600mV ⎞
⎟ • 500
RIMAX = ⎜⎜
⎟
⎝IOUT(MAX) ⎠
LT3065
VLIM =
IMAX
IOUT
• RIMAX
500
TO ADC
RIMAX
3065 TA04
LED Driver/Current Source
5V
IN
IN
OPEN-LED
INDICATOR
LED
I = 100mA
ADJ
PWRGD
SHDN
22nF
OUT
LT3065
100k
SHDN
ILIM = 150mA
IMAX
2k
6Ω
GND
REF/BYP
10nF
3065 TA05
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For more information www.linear.com/LT3065
23
LT3065 Series
TYPICAL APPLICATIONS
Paralleling Regulators for Higher Output Current
VIN > 3V
IN
10µF
PWRGD
OUT
500k
19.1k
1%
LT3065
PWRGD
10µF
2.5V
1A
ADJ
6.04k
1%
SHDN
SHDN
GND
IMAX
REF/BYP
10nF
49.9Ω
IN
OUT
10µF
21k
1%
10µF
LT3065
PWRGD
ADJ
6.04k
1%
SHDN
GND
IMAX
REF/BYP
10nF
49.9Ω
1k
1k
0.1µF
10k
+
LT1637
–
33nF
6.8k
3065 TA06
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24
For more information www.linear.com/LT3065
LT3065 Series
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DD Package
DD Package
10-Lead10-Lead
Plastic DFN
(3mm
Plastic
DFN× 3mm)
(3mm × 3mm)
(Reference
LTC DWGLTC
# 05-08-1669
Rev C) Rev C)
(Reference
DWG # 05-08-1699
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ±0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ±0.10
(4 SIDES)
R = 0.125
TYP
6
0.40 ±0.10
10
1.65 ±0.10
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
5
0.75 ±0.05
0.00 – 0.05
1
(DD) DFN REV C 0310
0.25 ±0.05
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
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For more information www.linear.com/LT3065
25
LT3065 Series
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
12-Lead Plastic
, Exposed Die Pad
MSEMSOP
Package
(Reference
LTC DWG
# 05-08-1666
12-Lead
Plastic
MSOP,
Exposed Rev
Die G)
Pad
(Reference LTC DWG # 05-08-1666 Rev G)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
6
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
12
0.65
0.42 ±0.038
(.0256)
(.0165 ±.0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
7
NO MEASUREMENT PURPOSE
0.406 ±0.076
(.016 ±.003)
REF
12 11 10 9 8 7
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
1 2 3 4 5 6
0.650
(.0256)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE12) 0213 REV G
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26
For more information www.linear.com/LT3065
LT3065 Series
REVISION HISTORY
REV
DATE
DESCRIPTION
A
7/14
Added fixed voltage options and related specs, curves, pin functions, text
PAGE NUMBER
Modified pinouts to accommodate new fixed voltage options
B
11/14
Throughout
2
Added specification for Absolute Maximum SENSE pin voltage
2
Modified Bypass Capacitance section
10
Fixed pin function description
13
3065fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LT3065
27
LT3065 Series
TYPICAL APPLICATION
Adjustable High Efficiency Regulator
CMDSH-4E
4.5V TO
25V
VIN
1µF
10µF
100k
BOOST
0.1µF
LT3493
SHDN
10µH
SW
IN
0.1µF
47µF
×2
MBRM140
255k
4.7µF
LT3065
SHDN
10nF
GND
FB
TP0610L
10k
OUT
ADJ
100k
10µF
61.9k
1%
PWRGD
REF/BYP
* DIFFERENTIAL VOLTAGE ON LT3065
≈ 1.4V SET BY THE TP0610L P-CHANNEL THRESHOLD.
1M
0.6V TO
10VOUT
200mA
10nF
IMAX
GND
1.2k
22nF
3065 TA07
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1761
100mA, Low Noise LDO
300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, ThinSOT™ Package
LT1762
150mA, Low Noise LDO
300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, MS8 Package
LT1763
500mA, Low Noise LDO
300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, SO-8 and 3mm × 4mm DFN
Packages
LT1962
300mA, Low Noise LDO
270mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, MS8 Package
LT1964
200mA, Low Noise Negative LDO
VIN = –2.2V to –20V, VOUT(MIN) = –1.21V, VDO = 0.34V, IQ = 30μA, ISD = 3μA, Low Noise
<30μVRMS, Stable with Ceramic Capacitors, ThinSOT and 3mm × 3mm DFN Packages
LT1965
1.1A, Low Noise LDO
290mV Dropout Voltage, Low Noise: 40μVRMS, VIN = 1.8V to 20V, VOUT = 1.2V to 19.5V,
Stable with Ceramic Capacitors, TO-220, DD-Pak, MSOP and 3mm × 3mm DFN Packages
LT3050
100mA LDO with Diagnostics and
Precision Current Limit
340mV Dropout Voltage, Low Noise: 30μVRMS, VIN = 1.8V to 45V, 3mm × 2mm DFN and
MSOP Packages
LT3055
500mA LDO with Diagnostics and
Precision Current Limit
350mV Dropout Voltage, Low Noise: 25μVRMS, VIN = 1.8V to 45V, 4mm × 3mm DFN and
MSOP Packages
LT3060
100mA Low Noise LDO with Soft-Start 300mV Dropout Voltage, Low Noise: 30μVRMS, VIN = 1.8V to 45V, 2mm × 2mm DFN and
ThinSOT Packages
LT3080/
LT3080-1
1.1A, Parallelable, Low Noise LDO
300mV Dropout Voltage (2-Supply Operation), Low Noise 40µVRMS, VIN = 1.2V to 36V,
VOUT = 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set, Directly Parallelable,
Stable with Ceramic Capacitors, TO-220, SOT-223, MSOP and 3mm × 3mm DFN
LT3082
200mA, Parallelable, Low Noise LDO
Outputs may be Paralleled for Higher Output Current or Heat Spreading, Wide Input Voltage
Range: 1.2V to 40V, Low Value Input/Output Capacitors Required: 2.2µF, Single Resistor Sets
Output Voltage, 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages
LT3085
500mA, Parallelable, Low Noise LDO
275mV Dropout Voltage (2-Supply Operation), Low Noise 40µVRMS, VIN = 1.2V to 36V,
VOUT = 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set, Directly Parallelable,
Stable with Ceramic Capacitors, MS8E and 2mm × 3mm DFN-6 Packages
3065fb
28 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LT3065
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LT3065
LT 1114 REV B • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2014