Datasheet

AOZ1019
EZBuck™ 2A Simple Regulator
General Description
Features
The AOZ1019 is a high efficiency, simple to use, 2A buck
regulator. The AOZ1019 works from a 4.5V to 16V input
voltage range, and provides up to 2A of continuous
output current with an output voltage adjustable down to
0.8V.
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The AOZ1019 comes in an SO-8 package and is rated
over a -40°C to +85°C ambient temperature range.
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4.5V to 16V operating input voltage range
130mΩ internal PFET switch for high efficiency:
up to 95%
Internal soft start
Output voltage adjustable to 0.8V
2A continuous output current
Fixed 500kHz PWM operation
Cycle-by-cycle current limit
Short-circuit protection
Under voltage lockout
Output over voltage protection
Thermal shutdown
Small size SO-8 package
Applications
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Point of load DC/DC conversion
PCIe graphics cards
Set top boxes
DVD drives and HDD
LCD panels
Cable modems
Telecom/Networking/Datacom equipment
Typical Application
VIN
C1
22µF
Ceramic
VIN
L1
4.7µH
VOUT
LX
EN
AOZ1019
R2
COMP
C5
1nF
C4, C6
22µF
Ceramic
FB
R2
20kΩ
C2
AGND
PGND
R3
Figure 1. 3.3V/2A Buck Regulator
Rev. 1.0 September 2007
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Page 1 of 14
AOZ1019
Ordering Information
Part Number
Ambient Temperature Range
Package
Environmental
AOZ1019AI
-40°C to +85°C
SO-8
RoHS
Pin Configuration
NC
1
8
PGND
VIN
2
7
LX
AGND
3
6
EN
FB
4
5
COMP
SO-8
(Top View)
Pin Description
Pin Number
Pin Name
Pin Function
1
NC
Not connected.
2
VIN
Supply voltage input. When VIN rises above the UVLO threshold the device starts up.
3
AGND
4
FB
5
COMP
6
EN
The enable pin is active high. Connect EN pin to VIN if not used. Do not leave the EN pin floating.
7
LX
PWM output connection to inductor. Thermal connection for output stage.
8
PGND
Reference connection for controller section. Also used as thermal connection for controller
section. Electrically needs to be connected to PGND.
The FB pin is used to determine the output voltage via a resistor divider between the output and GND.
External loop compensation pin.
Power ground. Electrically needs to be connected to AGND.
Block Diagram
VIN
UVLO
& POR
EN
Internal
+5V
5V LDO
Regulator
OTP
+
ISen
–
Reference
& Bias
Softstart
Q1
ILimit
+
+
0.8V
EAmp
FB
–
–
PWM
Comp
PWM
Control
Logic
+
Level
Shifter
+
FET
Driver
LX
COMP
+
0.2V
0.96V
Frequency
Foldback
Comparator
500kHz/63kHz
Oscillator
–
+
Over Voltage
Protection
Comparator
–
AGND
Rev. 1.0 September 2007
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PGND
Page 2 of 14
µ
AOZ1019
Absolute Maximum Ratings
Recommend Operating Ratings
Exceeding the Absolute Maximum ratings may damage the device.
The device is not guaranteed to operate beyond the Maximum
Operating Ratings.
Parameter
Rating
Supply Voltage (VIN)
LX to AGND
-0.7V to VIN+0.3V
EN to AGND
-0.3V to VIN+0.3V
FB to AGND
-0.3V to 6V
COMP to AGND
-0.3V to 6V
PGND to AGND
-0.3V to +0.3V
Junction Temperature (TJ)
-65°C to +150°C
(1)
Human Body Model
Machine Model
2kV
200V
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model rating: 1.5kΩ in series with 100pF.
Rating
Supply Voltage (VIN)
4.5V to 16V
Output Voltage Range
0.8V to VIN
Ambient Temperature (TA)
-40°C to +85°C
Package Thermal Resistance SO-8
(ΘJA)(2)
+150°C
Storage Temperature (TS)
ESD Rating:
Parameter
18V
87°C/W
Note:
2. The value of ΘJA is measured with the device mounted on 1-in2
FR-4 board with 2oz. Copper, in a still air environment with TA = 25°C.
The value in any given application depends on the user's specific
board design.
Electrical Characteristics
TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified(3)
Symbol
VIN
VUVLO
IIN
Parameter
Conditions
Supply Voltage
Min.
Typ.
4.5
Input Under-Voltage Lockout Threshold
VIN Rising
VIN Falling
Max.
Units
16
V
4.00
3.70
V
Supply Current (Quiescent)
IOUT = 0, VFB = 1.2V, VEN >1.2V
2
3
mA
IOFF
Shutdown Supply Current
VEN = 0V
1
10
µA
VFB
Feedback Voltage
0.8
0.818
0.5
Line Regulation
0.5
IFB
Feedback Voltage Input Current
VEN
EN Input Threshold
VHYS
IEN
0.782
Load Regulation
%
200
Off Threshold
On Threshold
0.6
2.0
EN Input Hysteresis
100
EN Input Current
V
%
nA
V
mV
1
µA
600
kHz
6
%
MODULATOR
fO
Frequency
400
DMAX
Maximum Duty Cycle
100
DMIN
Minimum Duty Cycle
500
%
Error Amplifier Voltage Gain
500
V/V
Error Amplifier Transconductance
200
µA / V
PROTECTION
ILIM
Current Limit
VPR
Output Over-Voltage Protection Threshold
tSS
2.5
Off Threshold
On Threshold
920
820
960
860
3.6
A
1000
900
mV
Over-Temperature Shutdown Limit
150
°C
Soft Start Interval
2.2
ms
OUTPUT STAGE
High-Side Switch On-Resistance
VIN = 12V
VIN = 5V
97
166
130
200
mΩ
Note:
3. Specification in BOLD indicate an ambient temperature range of -40°C to +85°C. These specifications are guaranteed by design.
Rev. 1.0 September 2007
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Page 3 of 14
AOZ1019
Typical Performance Characteristics
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Light Load (DCM) Operation
Full Load (CCM) Operation
Vin ripple
0.1V/div
Vin ripple
0.1V/div
Vo ripple
20mV/div
Vo ripple
20mV/div
IL
1A/div
IL
1A/div
LX
10V/div
LX
10V/div
1µs/div
1µs/div
Startup to Full Load
Full Load to Turnoff
Vin
10V/div
Vin
10V/div
Vo
1V/div
Vo
1V/div
lin
0.5A/div
lin
0.5A/div
400µs/div
400µs/div
50% to 100% Load Transient
Light Load to Turnoff
Vin
5V/div
Vo Ripple
50mV/div
Vo
1V/div
lo
1A/div
100µs/div
Rev. 1.0 September 2007
lin
0.5A/div
1s/div
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Page 4 of 14
AOZ1019
Typical Performance Characteristics (Continued)
Circuit of Figure 1. TA = 25°C, VIN = VEN = 12V, VOUT = 3.3V unless otherwise specified.
Short Circuit Protection
Short Circuit Recovery
Vo
2V/div
Vo
2V/div
IL
1A/div
IL
1A/div
100µs/div
1ms/div
AOZ1019AI Efficiency
Efficiency (VIN = 12V) vs. Load Current
100
8.0V OUTPUT
Efficieny (%)
95
5.0V OUTPUT
90
3.3V OUTPUT
85
80
75
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Load Current (A)
Note:
4. Thermal de-rating curves for SO-8 package part under typical input and output condition
based on the evaluation board. 25°C ambient temperature and natural convection
(air speed <50LFM) unless otherwise specified.
Derating Curve at 5V Input
Derating Curve at 12V Input
2.5
Output Current (IO)
Output Current (IO)
2.5
1.8V, 3.3V, 5V OUTPUT
2.0
1.5
1.0
0.5
air speed less than 50lfm
0
25
35
45
55
65
75
85
1.5
1.0
0.5
air speed less than 50lfm
0
25
Ambient Temperature (TA)
Rev. 1.0 September 2007
1.8V, 3.3V, 5V, 8V OUTPUT
2.0
35
45
55
65
75
85
Ambient Temperature (TA)
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AOZ1019
Detailed Description
The AOZ1019 is a current-mode step down regulator with
integrated high side PMOS switch. It operates from a
4.5V to 16V input voltage range and supplies up to 2A of
load current. The duty cycle can be adjusted from 6% to
100% allowing a wide range of output voltage. Features
include enable control, Power-On Reset, input under
voltage lockout, fixed internal soft-start and thermal shut
down.
The AOZ1019 uses a P-Channel MOSFET as the high
side switch. It saves the bootstrap capacitor normally
seen in a circuit using an NMOS switch. It allows 100%
turn-on of the upper switch to achieve linear regulation
mode of operation. The minimum voltage drop from VIN to
VO is the load current x DC resistance of MOSFET +
DC resistance of buck inductor. It can be calculated by
equation below:
The AOZ1019 is available in SO-8 package.
V O _MAX = V IN – I O × ( R DS ( ON ) + R inductor )
Enable and Soft Start
where;
The AOZ1019 has an internal soft start feature to limit
in-rush current and ensure the output voltage ramps up
smoothly to regulation voltage. A soft start process
begins when the input voltage rises to 4.0V and voltage
on EN pin is HIGH. In soft start process, the output
voltage is ramped to regulation voltage in typically 2.2ms.
The 2.2ms soft start time is set internally.
The EN pin of the AOZ1019 is active HIGH. Connect the
EN pin to VIN if enable function is not used. Pulling EN to
ground will disable the AOZ1019. Do not leave it open.
The voltage on EN pin must be above 2.0 V to enable the
AOZ1019. When voltage on EN pin falls below 0.6V, the
AOZ1019 is disabled. If an application circuit requires the
AOZ1019 to be disabled, an open drain or open collector
circuit should be used to interface to the EN pin.
Steady-State Operation
Under steady-state conditions, the converter operates in
fixed frequency and Continuous-Conduction Mode
(CCM).
The AOZ1019 integrates an internal P-MOSFET as the
high-side switch. Inductor current is sensed by amplifying
the voltage drop across the drain to source of the high
side power MOSFET. Output voltage is divided down by
the external voltage divider at the FB pin. The difference
of the FB pin voltage and reference is amplified by the
internal transconductance error amplifier. The error voltage, which shows on the COMP pin, is compared against
the current signal, which is sum of inductor current signal
and ramp compensation signal, at PWM comparator
input. If the current signal is less than the error voltage,
the internal high-side switch is on. The inductor current
flows from the input through the inductor to the output.
When the current signal exceeds the error voltage, the
high-side switch is off. The inductor current is freewheeling through the internal Schottky diode to output.
Rev. 1.0 September 2007
VO_MAX is the maximum output voltage,
VIN is the input voltage from 4.5V to 16V,
IO is the output current from 0A to 2A,
RDS(ON) is the on resistance of internal MOSFET, the value is
between 97mΩ and 200mΩ depending on input voltage and
junction temperature, and
Rinductor is the inductor DC resistance.
Switching Frequency
The AOZ1019 switching frequency is fixed and set by an
internal oscillator. The actual switching frequency ranges
from 400kHz to 600kHz due to device variation.
Output Voltage Programming
Output voltage can be set by feeding back the output to
the FB pin with a resistor divider network as shown in
Figure 1. The resistor divider network includes R2 and
R3. Typically, a design is started by picking a fixed R3
value and calculating the required R2 with equation below.
R 

V O = 0.8 ×  1 + ------2-
R 3

Some standard value of R2, R3 for most commonly used
output voltage values are listed in Table 1.
Table 1.
VO (V)
R2 (kΩ)
R3 (kΩ)
0.8
1.0
1.2
4.99
10
1.5
10
11.5
1.8
12.7
10.2
2.5
21.5
10
3.3
31.6
10
5.0
52.3
10
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Open
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AOZ1019
The combination of R2 and R3 should be large enough to
avoid drawing excessive current from the output, which
will cause power loss.
Since the switch duty cycle can be as high as 100%, the
maximum output voltage can be set as high as the input
voltage minus the voltage drop on upper PMOS and
inductor.
Protection Features
The AOZ1019 has multiple protection features to prevent
system circuit damage under abnormal conditions.
Over Current Protection (OCP)
The sensed inductor current signal is also used for over
current protection. Since the AOZ1019 employs peak
current mode control, the COMP pin voltage is proportional to the peak inductor current. The COMP pin voltage
is limited to be between 0.4V and 2.5V internally. The
peak inductor current is automatically limited cycle by
cycle.
The cycle by cycle current limit threshold is set between
2.5A and 3.6A. When the load current reaches the current limit threshold, the cycle by cycle current limit circuit
turns off the high side switch immediately to terminate
the current duty cycle. The inductor current stop rising.
The cycle by cycle current limit protection directly limits
inductor peak current. The average inductor current is
also limited due to the limitation on peak inductor current.
When cycle by cycle current limit circuit is triggered, the
output voltage drops as the duty cycle decreasing.
The AOZ1019 has internal short circuit protection to
protect itself from catastrophic failure under output short
circuit conditions. The FB pin voltage is proportional to
the output voltage. Whenever FB pin voltage is below
0.2V, the short circuit protection circuit is triggered.
As a result, the converter is shut down and hiccups at a
frequency equals to 1/8 of normal switching frequency.
The converter will start up via a soft start once the short
circuit condition disappears. In short circuit protection
mode, the inductor average current is greatly reduced
because of the low hiccup frequency.
Output Over Voltage Protection (OVP)
The AOZ1019 monitors the feedback voltage: when the
feedback voltage is higher than 960mV, it immediate
turns-off the PMOS to protect the output voltage overshoot at fault condition. When feedback voltage is lower
than 860mV, the PMOS is allowed to turn on in the next
cycle.
Rev. 1.0 September 2007
Power-On Reset (POR)
A power-on reset circuit monitors the input voltage.
When the input voltage exceeds 4V, the converter starts
operation. When input voltage falls below 3.7V, the
converter will stop switching.
Schottky Diode Selection
The external freewheeling diode supplies the current to
the inductor when the high side PMOS switch is off. To
reduce the losses due to the forward voltage drop and
recovery of diode, Schottky diode is recommended to
use. The maximum reverse voltage rating of the chosen
Schottky diode should be greater than the maximum
input voltage, and the current rating should be greater
than the maximum load current.
Thermal Protection
An internal temperature sensor monitors the junction
temperature. It shuts down the internal control circuit and
high side PMOS if the junction temperature exceeds
150°C.
Application Information
The basic AOZ1019 application circuit is shown in
Figure 1. Component selection is explained below.
Input Capacitor
The input capacitor (C1 in Figure 1) must be connected
to the VIN pin and PGND pin of the AOZ1019 to maintain
steady input voltage and filter out the pulsing input
current. A small decoupling capacitor (Cd in Figure 1),
usually 1µF, should be connected to the VIN pin and
AGND pin for stable operation of the AOZ1019. The
voltage rating of input capacitor must be greater than
maximum input voltage plus ripple voltage.
The input ripple voltage can be approximated by equation
below:
IO
VO VO

∆V IN = ------------------ ×  1 – ---------- × ---------V IN  V IN
f × C IN 
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a buck
circuit, the RMS value of input capacitor current can be
calculated by:
VO 
VO
I CIN _RMS = I O × ---------  1 – ----------
V IN 
V IN 
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Page 7 of 14
AOZ1019
reduces RMS current through the inductor and switches,
which results in less conduction loss. Usually, peak to
peak ripple current on inductor is designed to be 20% to
30% of output current.
if let m equal the conversion ratio:
VO
---------- = m
V IN
The relation between the input capacitor RMS current
and voltage conversion ratio is calculated and shown in
Figure 2 below. It can be seen that when VO is half of VIN,
CIN is under the worst current stress. The worst current
stress on CIN is 0.5 x IO.
0.5
The inductor takes the highest current in a buck circuit.
The conduction loss on the inductor needs to be checked
for thermal and efficiency requirements.
Surface mount inductors in different shape and styles are
available from Coilcraft, Elytone and Murata. Shielded
inductors are small and radiate less EMI noise. However,
they cost more than unshielded inductors. The choice
depends on EMI requirement, price and size.
0.4
ICIN_RMS(m) 0.3
IO
0.2
Output Capacitor
The output capacitor is selected based on the DC output
voltage rating, output ripple voltage specification and
ripple current rating.
0.1
0
When selecting the inductor, make sure it is able to
handle the peak current without saturation, even at the
highest operating temperature.
0
0.5
m
1
Figure 2. ICIN vs. Voltage Conversion Ratio
For reliable operation and best performance, the input
capacitors must have current rating higher than ICIN_RMS
at worst operating conditions. Ceramic capacitors are
preferred for input capacitors because of their low
ESR and high ripple current rating. Depending on the
application circuits, other low ESR tantalum capacitor
or aluminum electrolytic capacitor may also be used.
When selecting ceramic capacitors, X5R or X7R type
dielectric ceramic capacitors are preferred for their better
temperature and voltage characteristics. Note that the
ripple current rating from capacitor manufactures is
based on certain amount of life time. Further de-rating
may be necessary for practical design requirement.
Inductor
The inductor is used to supply constant current to output
when it is driven by a switching voltage. For a given input
and output voltage, inductance and switching frequency
together decide the inductor ripple current, which is,
The selected output capacitor must have a higher rated
voltage specification than the maximum desired output
voltage including ripple. De-rating needs to be considered for long term reliability.
Output ripple voltage specification is another important
factor for selecting the output capacitor. In a buck
converter circuit, output ripple voltage is determined by
inductor value, switching frequency, output capacitor
value and ESR. It can be calculated by the equation
below:
1
∆V O = ∆I L ×  ES R CO + ---------------------------

8 × f × C O
where;
CO is output capacitor value and
ESRCO is the Equivalent Series Resistor of output capacitor.
VO 
VO
∆I L = ----------- ×  1 – ----------
V IN 
f ×L 
When low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the switching
frequency dominates. Output ripple is mainly caused by
capacitor value and inductor ripple current. The output
ripple voltage calculation can be simplified to:
The peak inductor current is:
∆V O = ∆I L × ES R CO
∆I
I Lpeak = I O + --------L2
High inductance gives low inductor ripple current but
requires larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
Rev. 1.0 September 2007
If the impedance of ESR at switching frequency dominates, the output ripple voltage is mainly decided by
capacitor ESR and inductor ripple current. The output
ripple voltage calculation can be further simplified to:
∆V O = ∆I L × ES R CO
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AOZ1019
For lower output ripple voltage across the entire operating temperature range, X5R or X7R dielectric type of
ceramic, or other low ESR tantalum are recommended
to be used as output capacitors.
In a buck converter, output capacitor current is continuous. The RMS current of output capacitor is decided
by the peak to peak inductor ripple current. It can be
calculated by:
∆I L
I CO _RMS = ---------12
G EA
f p2 = -----------------------------------------2π × C C × G VEA
where;
GEA is the error amplifier transconductance, which is 200 x 10-6
A/V,
Usually, the ripple current rating of the output capacitor
is a smaller issue because of the low current stress.
When the buck inductor is selected to be very small and
inductor ripple current is high, output capacitor could be
overstressed.
Loop Compensation
The AOZ1019 employs peak current mode control for
easy use and fast transient response. Peak current mode
control eliminates the double pole effect of the output
L&C filter. It greatly simplifies the compensation loop
design.
With peak current mode control, the buck power stage
can be simplified to be a one-pole and one-zero system
in frequency domain. The pole is dominant pole and can
be calculated by:
1
f p1 = -----------------------------------2π × C O × R L
The zero is a ESR zero due to output capacitor and its
ESR. It is can be calculated by:
1
f Z 1 = -------------------------------------------------2π × C O × ESR CO
GVEA is the error amplifier voltage gain, which is 500 V/V, and
CC is compensation capacitor.
The zero given by the external compensation network,
capacitor CC (C5 in Figure 1) and resistor RC (R1 in
Figure 1), is located at:
1
f Z 2 = ------------------------------------2π × C C × R C
To design the compensation circuit, a target crossover
frequency fC for close loop must be selected. The system
crossover frequency is where control loop has unity gain.
The crossover frequency is also called the converter
bandwidth. Generally a higher bandwidth means faster
response to load transient. However, the bandwidth
should not be too high due to system stability concern.
When designing the compensation loop, converter stability under all line and load condition must be considered.
Usually, it is recommended to set the bandwidth to be
less than 1/10 of switching frequency. The AOZ1019
operates at a fixed switching frequency range from
400kHz to 600kHz. It is recommended to choose a
crossover frequency less than 50kHz.
The strategy for choosing RC and CC is to set the cross
over frequency with RC and set the compensator zero
with CC. Using selected crossover frequency, fC, to
calculate RC:
where;
CO is the output filter capacitor,
RL is load resistor value, and
ESRCO is the equivalent series resistance of output capacitor.
The compensation design is actually to shape the converter close loop transfer function to get desired gain and
phase. Several different types of compensation network
can be used for AOZ1019. For most cases, a series
capacitor and resistor network connected to the COMP
pin sets the pole-zero and is adequate for a stable
high-bandwidth control loop.
Rev. 1.0 September 2007
In the AOZ1019, the FB and COMP pins are the inverting
input and the output of internal transconductance error
amplifier. A series R and C compensation network
connected to COMP provides one pole and one zero.
The pole is:
2π × C O
VO
R C = f C × ----------× ----------------------------V
G ×G
FB
EA
CS
where;
fC is desired crossover frequency,
VFB is 0.8V,
GEA is the error amplifier transconductance, which is 200x10-6
A/V, and
GCS is the current sense circuit transconductance, which is
5.64 A/V.
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Page 9 of 14
AOZ1019
The compensation capacitor CC and resistor RC together
make a zero. This zero is put somewhere close to the
dominate pole fp1 but lower than 1/5 of selected crossover frequency. CC can is selected by:
1.5
C C = -----------------------------------2π × R C × f p1
The actual AOZ1019 junction temperature can be
calculated with power dissipation in the AOZ1019 and
thermal impedance from junction to ambient.
T junction = ( P total _loss – P inductor _loss ) × Θ JA
+ + T ambient
The maximum junction temperature of AOZ1019 is
150°C, which limits the maximum load current capability.
Please see the thermal de-rating curves for the maximum
load current of the AOZ1019 under different ambient
temperature.
The equation above can also be simplified to:
CO × RL
C C = ---------------------RC
An easy-to-use application software which helps to
design and simulate the compensation loop can be found
at www.aosmd.com.
Thermal Management and Layout
Consideration
In the AOZ1019 buck regulator circuit, high pulsing current flows through two circuit loops. The first loop starts
from the input capacitors, to the VIN pin, to the LX pins, to
the filter inductor, to the output capacitor and load, and
then return to the input capacitor through ground. Current
flows in the first loop when the high side switch is on. The
second loop starts from inductor, to the output capacitors
and load, to the PGND pin of the AOZ1019, to the LX
pins of the AOZ1019. Current flows in the second loop
when the low side diode is on.
In PCB layout, minimizing the two loops area reduces the
noise of this circuit and improves efficiency. A ground
plane is recommended to connect input capacitor, output
capacitor, and PGND pin of the AOZ1019.
In the AOZ1019 buck regulator circuit, the two major
power dissipating components are the AOZ1019 and
output inductor. The total power dissipation of converter
circuit can be measured by input power minus output
power.
P total _loss = V IN × I IN – V O × I O
The power dissipation of inductor can be approximately
calculated by output current and DCR of inductor.
P inductor _loss = IO2 × R inductor × 1.1
The power dissipation in Schottky can be approximated
as:
The thermal performance of the AOZ1019 is strongly
affected by the PCB layout. Extra care should be taken
by users during design process to ensure that the IC
will operate under the recommended environmental
conditions.
Several layout tips are listed below for the best electric
and thermal performance. Figure 3 illustrates a single
layer PCB layout example as reference.
1. Do not use thermal relief connection to the VIN and
the PGND pin. Pour a maximized copper area to the
PGND pin and the VIN pin to help thermal dissipation.
2. Input capacitor should be connected to the VIN pin
and the PGND pin as close as possible.
3. A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect them
only at one point to avoid the PGND pin noise
coupling to the AGND pin. In this case, a decoupling
capacitor should be connected between VIN pin and
AGND pin.
4. Make the current trace from LX pins to L to Co to the
PGND as short as possible.
5. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or VOUT.
6. The two LX pins are connected to internal PFET
drain. They are low resistance thermal conduction
path and most noisy switching node. Connected a
copper plane to LX pin to help thermal dissipation.
This copper plane should not be too larger otherwise
switching noise may be coupled to other part of
circuit.
7. Keep sensitive signal trace such as trace connected
with FB pin and COMP pin far away form the LX pins.
P diode_loss = I O × ( 1 – D ) × V FWSchottky
Rev. 1.0 September 2007
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Page 10 of 14
AOZ1019
Figure 3. AOZ1019 PCB Layout
Rev. 1.0 September 2007
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Page 11 of 14
AOZ1019
Package Dimensions
D
Gauge Plane
Seating Plane
e
0.25
8
L
E
E1
h x 45°
1
C
θ
7° (4x)
A2 A
0.1
b
A1
Dimensions in millimeters
2.20
5.74
1.27
0.80
Unit: mm
Symbols
A
A1
A2
b
c
D
E1
e
E
h
L
θ
Min.
1.35
0.10
1.25
0.31
0.17
4.80
3.80
Nom.
1.65
—
1.50
—
—
4.90
3.90
1.27 BSC
5.80
6.00
0.25
—
0.40
—
0°
—
Max.
1.75
0.25
1.65
0.51
0.25
5.00
4.00
6.20
0.50
1.27
8°
Dimensions in inches
Symbols
A
A1
A2
b
c
D
E1
e
E
h
L
θ
Min.
0.053
0.004
0.049
0.012
0.007
0.189
0.150
Nom. Max.
0.065 0.069
—
0.010
0.059 0.065
—
0.020
—
0.010
0.193 0.197
0.154 0.157
0.050 BSC
0.228 0.236 0.244
0.010
—
0.020
0.016
—
0.050
0°
—
8°
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Rev. 1.0 September 2007
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Page 12 of 14
AOZ1019
Tape and Reel Dimensions
SO-8 Carrier Tape
P1
D1
See Note 3
P2
T
See Note 5
E1
E2
E
See Note 3
B0
K0
A0
D0
P0
Feeding Direction
Unit: mm
Package
SO-8
(12mm)
A0
6.40
±0.10
B0
5.20
±0.10
K0
2.10
±0.10
D0
1.60
±0.10
D1
1.50
±0.10
E
12.00
±0.10
SO-8 Reel
E1
1.75
±0.10
E2
5.50
±0.10
P0
8.00
±0.10
P2
2.00
±0.10
P1
4.00
±0.10
T
0.25
±0.10
W1
S
G
N
M
K
V
R
H
W
W
N
Tape Size Reel Size
M
12mm
ø330
ø330.00 ø97.00 13.00
±0.10 ±0.30
±0.50
W1
17.40
±1.00
K
H
10.60
ø13.00
+0.50/-0.20
S
2.00
±0.50
G
—
R
—
V
—
SO-8 Tape
Leader/Trailer
& Orientation
Trailer Tape
300mm min. or
75 empty pockets
Rev. 1.0 September 2007
Components Tape
Orientation in Pocket
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Leader Tape
500mm min. or
125 empty pockets
Page 13 of 14
AOZ1019
AOZ1019 Package Marking
Z1019AI
FAYWLT
Part Number
Assembly Lot Code
Fab & Assembly Location
Year & Week Code
This datasheet contains preliminary data; supplementary data may be published at a later date.
Alpha & Omega Semiconductor reserves the right to make changes at any time without notice.
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
Rev. 1.0 September 2007
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Page 14 of 14