IRF9610, SiHF9610 Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Dynamic dV/dt Rating - 200 RDS(on) (Ω) VGS = - 10 V Qg (Max.) (nC) 11 Qgs (nC) 7.0 Qgd (nC) 4.0 Configuration • P-Channel 3.0 RoHS* • Ease of Paralleling COMPLIANT • Simple Drive Requirements • Lead (Pb)-free Available Single DESCRIPTION S The Power MOSFETs technology is the key to Vishay’s advanced line of Power MOSFET transistors. The efficient geometry and unique processing of the Power MOSFETs design achieve very low on-state resistance combined with high transconductance and extreme device ruggedness. TO-220 G The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. S G Available • Fast Switching D D P-Channel MOSFET ORDERING INFORMATION Package TO-220 IRF9610PbF SiHF9610-E3 IRF9610 SiHF9610 Lead (Pb)-free SnPb ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS - 200 Gate-Source Voltage VGS ± 20 Continuous Drain Current Pulsed Drain VGS at - 10 V TC = 25 TC = 100 Currenta ID IDM Linear Derating Factor Maximum Power Dissipation TC = 25 °C Inductive Current, Clamp Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque for 10 s 6-32 or M3 screw PD UNIT V - 1.8 - 1.0 A - 7.0 0.16 W/°C 20 W ILM - 7.0 A dV/dt - 5.0 V/ns TJ, Tstg - 55 to + 150 300d °C 10 lbf · in 1.1 N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 5). b. Not applicable. c. ISD ≤ - 1.8 A, dI/dt ≤ 70 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91080 S09-0046-Rev. A, 19-Jan-09 www.vishay.com 1 IRF9610, SiHF9610 Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Case-to-Sink, Flat, Greased Surface RthCS 0.50 - Maximum Junction-to-Case (Drain) RthJC - 6.4 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = - 250 µA - 200 - - V ΔVDS/TJ Reference to 25 °C, ID = - 1 mA - - 0.23 - V/°C VGS(th) VDS = VGS, ID = - 250 µA - 2.0 - - 4.0 V Gate-Source Leakage IGSS VGS = ± 20 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = - 200 V, VGS = 0 V - - - 100 VDS = - 160 V, VGS = 0 V, TJ = 125 °C - - - 500 Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Drain-Source On-State Resistance Forward Transconductance RDS(on) gfs ID = -0.90 Ab VGS = - 10 V VDS = - 50 V, ID = - 0.90 Ab µA - - 3.0 Ω 0.90 - - S - 170 - Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg VGS = 0 V, VDS = - 25 V, f = 1.0 MHz, see fig. 10 VGS = - 10 V ID = - 3.5 A, VDS = - 160 V, see fig. 11 and 18b - 50 - - 15 - - - 11 - - 7.0 Gate-Source Charge Qgs Gate-Drain Charge Qgd - - 4.0 Turn-On Delay Time td(on) - 8.0 - Rise Time Turn-Off Delay Time Fall Time tr td(off) VDD = - 100 V, ID = - 0.90 A, RG = 50 Ω, RD = 110 Ω, see fig. 17b tf Internal Drain Inductance LD Internal Source Inductance LS Between lead, 6 mm (0.25") from package and center of die contact D pF nC - 15 - - 10 - - 8.0 - - 4.5 - - 7.5 - - - - 1.8 - - - 7.0 - - - 5.8 - 240 360 ns - 1.7 2.6 µC ns nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = - 1.8 A, VGS = 0 Vb TJ = 25 °C, IF = - 1.8 A, dI/dt = 100 A/µsb V Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 5). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91080 S09-0046-Rev. A, 19-Jan-09 IRF9610, SiHF9610 Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted - 2.40 - 2.40 -7V VGS = - 10, - 9, - 8 V VGS = - 10, - 9, - 8, - 7 V - 1.92 - 1.44 ID, Drain Current (A) ID, Drain Current (A) - 1.92 -6V - 0.96 -5V - 0.48 80 µs Pulse Test - 1.44 - 0.96 -5V - 0.48 80 µs Pulse Test -4V -4V 0.00 0.00 - 10 0 - 30 - 20 - 40 0 - 50 VDS, Drain-to-Source Voltage (V) 91080_01 Negative ID, Drain Current (A) TJ = 25 °C TJ = 125 °C - 0.96 - 0.48 80 µs Pulse Test VDS > ID(on) x RDS(on) max. 0.00 0 -2 -4 -6 -8 2 10 5 100 µs 2 1 ms 1 5 10 ms TC = 25 °C TJ = 150 °C Single Pulse 2 0.1 2 1 5 10 2 5 2 102 5 103 Negative VDS, Drain-to-Source Voltage (V) 91080_04 Fig. 2 - Typical Transfer Characteristics ZthJC(t)/RthJC, Normalized Effective Transient Thermal Impedence (Per Unit) - 10 Operation in this area limited by RDS(on) 5 - 10 VGS, Gate-to-Source Voltage (V) 91080_02 -8 VDS, Drain-to-Source Voltage (V) 102 TJ = - 55 °C - 1.44 -6 Fig. 3 - Typical Saturation Characteristics - 2.40 - 1.92 -4 -2 91080_03 Fig. 1 - Typical Output Characteristics ID, Drain Current (A) -6V Fig. 4 - Maximum Safe Operating Area 2.0 1.0 0.5 D = 0.5 0.2 0.2 0.1 0.1 0.05 0.02 PDM t1 t2 0.05 0.02 0.01 0.01 10-5 Notes: 1. Duty Factor, D = t1/t2 2. Per Unit Base = RthJC = 6.4 °C/W 3. TJM - TC = PDM ZthJC(t) Single Pulse (Transient Thermal Impedence) 2 5 10-4 2 5 10-3 2 5 10-2 2 5 0.1 2 5 1.0 2 5 10 t1, Square Wave Pulse Duration (s) 91080_05 Fig. 5 - Maximum Effective Transient Thermal Impedance, Junction-to-Case vs. Pulse Duration Document Number: 91080 S09-0046-Rev. A, 19-Jan-09 www.vishay.com 3 IRF9610, SiHF9610 2.0 gfs,Transconductance (S) 80 µs Pulse Test VDS > ID(on) x RDS(on) max. 1.6 TJ = - 55 °C 1.2 TJ = 25 °C TJ = 125 °C 0.8 0.4 0.0 0 - 0.48 - 0.96 - 1.44 - 1.92 2.5 ID = - 0.6 A VGS = - 10 V 2.0 1.5 1.0 0.5 0.0 - 40 - 2.40 ID, Drain Current (A) 91080_06 RDS(on), Drain-to-Source On Resistance (Normalized) Vishay Siliconix 40 500 C, Capacitance (pF) ID, Drain Current (A) 400 TJ = 150 °C TJ = 25 °C - 0.5 - 4.4 - 5.6 - 6.8 0.95 0.85 40 80 120 160 TJ, Junction Temperature (°C) Fig. 8 - Breakdown Voltage vs. Temperature www.vishay.com 4 - 20 - 30 - 40 - 50 Fig. 10 - Typical Capacitance vs. Drain-to-Source Voltage Negative VGS, Gate-to-Source Voltage (V) BVDSS, Drain-to-Source Breakdown Voltage (Normalized) 1.05 - 10 VDS, Drain-to-Source Voltage (V) 91080_10 1.15 0 0 - 8.0 1.25 91080_08 Coss 0 - 3.2 Fig. 7 - Typical Source-Drain Diode Forward Voltage 0.75 - 40 Ciss 200 Crss VSD, Source-to-Drain Voltage (V) 91080_07 ≈ Cgs + Cgd 300 100 - 0.2 - 0.1 - 2.0 160 VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd C ,C Coss = Cds + gs gd Cgs + Cgd - 5.0 - 1.0 120 Fig. 9 - Normalized On-Resistance vs. Temperature - 10.0 - 2.0 80 TJ, Junction Temperature (°C) 91080_09 Fig. 6 - Typical Transconductance vs. Drain Current 0 91080_11 20 ID = - 1.8 A VDS = - 100 V 16 VDS = - 60 V VDS = - 40 V 12 8 4 For test circuit see figure 18 0 0 2 4 6 8 QG, Total Gate Charge (nC) Fig. 11 - Typical Gate Charge vs. Gate-to-Source Voltage Document Number: 91080 S09-0046-Rev. A, 19-Jan-09 IRF9610, SiHF9610 Vishay Siliconix 7 5 Negative ID, Drain Current (A) 6 RDS(on), Drain-to-Source On Resistance (Ω) 2.0 RDS(on) measured with current pulse of 2.0 µs duration. Initial TJ = 25 °C. (Heating effect of 2.0 µs pulse is minimal.) VGS = - 10 V 4 3 VGS = - 20 V 2 1 1.6 1.2 0.8 0.4 0 0.0 -1 0 -2 -3 -4 -5 -6 ID, Drain Current (A) 91080_12 50 25 -7 100 125 150 TC, Case Temperature (°C) 91080_13 Fig. 12 - Typical On-Resistance vs. Drain Current 75 Fig. 13 - Maximum Drain Current vs. Case Temperature PD, Power Dissipation (W) 20 15 10 5 0 0 20 40 60 80 100 120 140 TC, Case Temperature (°C) 91080_14 Fig. 14 - Power vs. Temperature Derating Curve L VDD Vary tp to obtain required IL VGS = - 10 V tp VDS D.U.T. V DD + EC IL 0.05 Ω IL VDD = 0.5 VDS tp EC = 0.75 VDS Fig. 15 - Clamped Inductive Test Circult Document Number: 91080 S09-0046-Rev. A, 19-Jan-09 VDS EC Fig. 16 - Clamped Inductive Waveforms www.vishay.com 5 IRF9610, SiHF9610 Vishay Siliconix RD VDS QG 15 V VGS D.U.T. RG QGS +VDD QGD VG - 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Charge Fig. 17a - Switching Time Test Circuit Fig. 18a - Basic Gate Charge Waveform Current regulator Same type as D.U.T. td(on) tr td(off) tf VGS 50 kΩ 12 V 0.2 µF 0.3 µF 10 % - D.U.T. 90 % VDS + VDS VGS - 3 mA IG ID Current sampling resistors Fig. 17b - Switching Time Waveforms www.vishay.com 6 Fig. 18b - Gate Charge Test Circuit Document Number: 91080 S09-0046-Rev. A, 19-Jan-09 IRF9610, SiHF9610 Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T. + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - RG + • dV/dt controlled by RG • ISD controlled by duty factor "D" • D.U.T. - device under test + - VDD Compliment N-Channel of D.U.T. for driver Driver gate drive P.W. Period D= P.W. Period VGS = - 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage VDD Body diode forward drop Inductor current Ripple ≤ 5 % * ISD VGS = - 5 V for logic level and - 3 V drive devices Fig. 19 - For P-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91080. Document Number: 91080 S09-0046-Rev. A, 19-Jan-09 www.vishay.com 7 Package Information www.vishay.com Vishay Siliconix TO-220-1 A E DIM. Q H(1) D 3 2 L(1) 1 M* L b(1) INCHES MIN. MAX. MIN. MAX. A 4.24 4.65 0.167 0.183 b 0.69 1.02 0.027 0.040 b(1) 1.14 1.78 0.045 0.070 F ØP MILLIMETERS c 0.36 0.61 0.014 0.024 D 14.33 15.85 0.564 0.624 E 9.96 10.52 0.392 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.10 6.71 0.240 0.264 0.115 J(1) 2.41 2.92 0.095 L 13.36 14.40 0.526 0.567 L(1) 3.33 4.04 0.131 0.159 ØP 3.53 3.94 0.139 0.155 Q 2.54 3.00 0.100 0.118 ECN: X15-0364-Rev. C, 14-Dec-15 DWG: 6031 Note • M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM C b e J(1) e(1) Package Picture ASE Revison: 14-Dec-15 Xi’an Document Number: 66542 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000