IRFD320, SiHFD320 www.vishay.com Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Dynamic dV/dt rating 400 RDS(on) (Ω) VGS = 10 V • Repetitive avalanche rated 1.8 20 Qgs (nC) 3.3 • End stackable Qgd (nC) 11 • Fast switching Configuration RoHS • For automatic insertion Qg (Max.) (nC) COMPLIANT • Ease of paralleling Single • Simple drive requirements D • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 HVMDIP DESCRIPTION G S Third generation power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The 4 pin DIP package is a low cost machine-insertiable case style which can be stacked in multiple combinations on standard 0.1" pin centers. The dual drain servers as a thermal link to the mounting surface for power dissipation levels up to 1 W. G D S N-Channel MOSFET ORDERING INFORMATION Package HVMDIP IRFD320PbF Lead (Pb)-free SiHFD320-E3 IRFD320 SnPb SiHFD320 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 400 Gate-Source Voltage VGS ± 20 Continuous Drain Current VGS at 10 V TA = 25 °C TA = 100 °C Pulsed Drain Current a ID IDM Linear Derating Factor UNIT V 0.49 0.31 A 3.9 0.0083 W/°C Single Pulse Avalanche Energy b EAS 48 mJ Avalanche Current a IAR 0.49 A Repetitive Avalanche Energy a EAR 0.10 mJ Maximum Power Dissipation TA = 25 °C Peak Diode Recovery dV/dt c Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) d for 10 s PD 1.0 W dV/dt 4.0 V/ns TJ, Tstg -55 to +150 300 °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 21 mH, Rg = 25 Ω, IAS = 2.0 A (see fig. 12). c. ISD ≤ 2.0 A, dI/dt ≤ 40 A/μs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. S14-2355-Rev. D, 08-Dec-14 Document Number: 91134 1 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD320, SiHFD320 www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient SYMBOL TYP. MAX. UNIT RthJA - 120 °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance VDS VGS = 0 V, ID = 250 μA 400 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.51 - V/°C VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V nA VGS = ± 20 V - - ± 100 VDS = 400 V, VGS = 0 V - - 25 VDS = 320 V, VGS = 0 V, TJ = 125 °C - - 250 - - 1.8 Ω 1.7 - - S - 410 - - 120 - - 47 - - - 20 - - 3.3 IGSS IDSS RDS(on) gfs ID = 0.21 A b VGS = 10 V VDS = 50 V, ID = 1.2 A μA Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd - - 11 Turn-On Delay Time td(on) - 10 - Rise Time Turn-Off Delay Time Fall Time tr td(off) VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 10 V ID = 2.0 A, VDS = 320 V, see fig. 6 and 13 b VDD = 200 V, ID = 3.3 A, Rg = 18 Ω, RD = 56 Ω, see fig. 10 b tf Internal Drain Inductance LD Internal Source Inductance LS Between lead, 6 mm (0.25") from package and center of die contact D pF nC - 14 - - 30 - - 13 - - 4.0 - - 6.0 - - - 0.49 - - 3.9 - - 1.6 - 270 600 ns - 1.4 3.0 μC ns nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 0.49 A, VGS = 0 V b TJ = 25 °C, IF = 3.3 A, dI/dt = 100 A/μs b V Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %. S14-2355-Rev. D, 08-Dec-14 Document Number: 91134 2 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD320, SiHFD320 www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) 10 TJ = 25 °C ID, Drain-to-Source Current (A) TJ = 150 °C TA = 25 °C 1 0.1 VDS = 26.2V 0.01 4 Fig. 1 - Typical Output Characteristics, TA = 25 °C 5 6 7 8 9 VGS, Gate-to-Source Voltage (V) 10 Fig. 3 - Typical Transfer Characteristics TA = 150 °C Fig. 2 - Typical Output Characteristics, TA = 150 °C S14-2355-Rev. D, 08-Dec-14 Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91134 3 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD320, SiHFD320 www.vishay.com Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Vishay Siliconix Fig. 7 - Typical Source-Drain Diode Forward Voltage TA = 25 °C TJ = 150 °C SINGLE PULSE Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage S14-2355-Rev. D, 08-Dec-14 Fig. 8 - Maximum Safe Operating Area Document Number: 91134 4 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD320, SiHFD320 www.vishay.com Vishay Siliconix VDS VGS RD D.U.T. Rg + - VDD ID, Drain Current (A) 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS TA, Ambient Temperature (°C) td(on) tr td(off) tf Fig. 10b - Switching Time Waveforms Thermal Response (ZthJA) Fig. 9 - Maximum Drain Current vs. Ambient Temperature t1, Rectangular Pulse Duration (s) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Ambient S14-2355-Rev. D, 08-Dec-14 Document Number: 91134 5 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD320, SiHFD320 www.vishay.com Vishay Siliconix L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T. Rg + - I AS V DD VDS 10 V 0.01 W tp Fig. 12a - Unclamped Inductive Test Circuit IAS Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 10 V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform S14-2355-Rev. D, 08-Dec-14 Fig. 13b - Gate Charge Test Circuit Document Number: 91134 6 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRFD320, SiHFD320 www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + - VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current VDD Body diode forward drop Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91134. S14-2355-Rev. D, 08-Dec-14 Document Number: 91134 7 For technical questions, contact: [email protected] THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix HVM DIP (High voltage) 0.248 [6.29] 0.240 [6.10] 0.043 [1.09] 0.035 [0.89] 0.197 [5.00] 0.189 [4.80] 0.133 [3.37] 0.125 [3.18] 0.180 [4.57] 0.160 [4.06] 0.094 [2.38] 0.086 [2.18] A L 0.160 [4.06] 0.140 [3.56] 0° to 15° 2x 0.017 [0.43] 0.013 [0.33] 0.045 [1.14] 2 x 0.035 [0.89] E min. 0.024 [0.60] 4x 0.020 [0.51] 0.100 [2.54] typ. E max. INCHES MILLIMETERS DIM. MIN. MAX. MIN. A 0.310 0.330 7.87 MAX. 8.38 E 0.300 0.425 7.62 10.79 L 0.270 0.290 6.86 7.36 ECN: X10-0386-Rev. B, 06-Sep-10 DWG: 5974 Note 1. Package length does not include mold flash, protrusions or gate burrs. Package width does not include interlead flash or protrusions. Document Number: 91361 Revision: 06-Sep-10 www.vishay.com 1 Legal Disclaimer Notice www.vishay.com Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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