VISHAY IRLD014

IRLD014, SiHLD014
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Dynamic dV/dt Rating
60
RDS(on) ()
VGS = 5 V
Available
• For Automatic Insertion
0.20
RoHS*
Qg (Max.) (nC)
8.4
• End Stackable
Qgs (nC)
2.6
• Logic-Level Gate Drive
6.4
• RDS(on) Specified at VGS = 4 V and 5 V
Qgd (nC)
Configuration
Single
COMPLIANT
• 175 °C Operating Temperature
• Fast Switching
D
HVMDIP
• Compliant to RoHS Directive 2002/95/EC
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The 4 pin DIP package is a low cost machine-insertiable
case style which can be stacked in multiple combinations on
standard 0.1" pin centers. The dual drain servers as a
thermal link to the mounting surface for power dissipation
levels up to 1 W.
G
S
G
D
S
N-Channel MOSFET
ORDERING INFORMATION
Package
HVMDIP
IRLD014PbF
SiHLD014-E3
IRLD014
SiHLD014
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
Drain-Source Voltage
VDS
60
Gate-Source Voltage
VGS
± 10
Continuous Drain Current
VGS at 5.0 V
TA = 25 °C
TA = 100 °C
Pulsed Drain Currenta
ID
IDM
Linear Derating Factor
Single Pulse Avalanche Energyb
Maximum Power Dissipation
Peak Diode Recovery
TA = 25 °C
dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
for 10 s
UNIT
V
1.7
1.2
A
14
0.0083
W/°C
EAS
490
mJ
PD
1.3
W
dV/dt
4.5
V/ns
TJ, Tstg
- 55 to + 175
300d
°C
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, starting TJ = 25 °C, L = 197 mH, Rg = 25 , IAS = 1.7 A (see fig. 12).
c. ISD  10 A, dI/dt  90 A/µs, VDD  VDS, TJ  175 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91307
S10-2465-Rev. D, 08-Nov-10
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IRLD014, SiHLD014
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
Maximum Junction-to-Ambient
SYMBOL
TYP.
MAX.
UNIT
RthJA
-
120
°C/W
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
VDS
VGS = 0 V, ID = 250 µA
60
-
-
V
VDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.070
-
V/°C
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
VGS(th)
VDS = VGS, ID = 250 µA
1.0
-
2.0
V
Gate-Source Leakage
IGSS
VGS = ± 10 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 60 V, VGS = 0 V
-
-
25
VDS = 48 V, VGS = 0 V, TJ = 150 °C
-
-
250
Gate-Source Threshold Voltage
Drain-Source On-State Resistance
Forward Transconductance
RDS(on)
gfs
VGS = 5.0 V
ID = 1.0 Ab
-
-
0.20
VGS = 4.0 V
ID = 0.85 Ab
-
-
0.28
1.9
-
-
-
400
-
-
170
-
-
42
-
VDS = 25 V, ID = 1.0 Ab
µA

S
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
VGS = 0 V
VDS = 25 V
f = 1.0 MHz, see fig. 5
VGS = 5.0 V
ID = 10 A, VDS = 48 V
see fig. 6 and 13b
-
-
8.4
-
-
2.6
Gate-Drain Charge
Qgd
-
-
6.4
Turn-On Delay Time
td(on)
-
9.3
-
-
110
-
-
17
-
-
26
-
-
4.0
-
-
6.0
-
D
-
-
1.7
S
-
-
14
TJ = 25 °C, IS = 1.7 A, VGS = 0 Vb
-
-
1.6
Rise Time
Turn-Off Delay Time
Fall Time
tr
td(off)
VDD = 30 V, ID = 10 A
Rg = 12 , RD = 2.8 , see fig. 10b
tf
Internal Drain Inductance
LD
Internal Source Inductance
LS
Between lead,
6 mm (0.25") from
package and center of
die contact
D
pF
nC
ns
nH
G
S
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
IS
Pulsed Diode Forward Currenta
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Forward Turn-On Time
ton
MOSFET symbol
showing the
integral reverse
p - n junction diode
A
G
TJ = 25 °C, IF = 10 A, dI/dt = 100 A/µsb
V
-
93
130
ns
-
0.34
0.65
µC
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width  300 µs; duty cycle  2 %.
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Document Number: 91307
S10-2465-Rev. D, 08-Nov-10
IRLD014, SiHLD014
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
20 µs PULSE WIDTH
TA = 25 °C
Fig. 1 - Typical Output Characteristics, TA = 25 °C
Fig. 3 - Typical Transfer Characteristics
20 µs PULSE WIDTH
TA = 175 °C
Fig. 2 - Typical Output Characteristics, TA = 175 °C
Document Number: 91307
S10-2465-Rev. D, 08-Nov-10
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRLD014, SiHLD014
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
TA = 25 °C
TJ = 175 °C
SINGLE PULSE
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
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Fig. 8 - Maximum Safe Operating Area
Document Number: 91307
S10-2465-Rev. D, 08-Nov-10
IRLD014, SiHLD014
Vishay Siliconix
RD
VDS
VGS
D.U.T.
ID, Drain Current (A)
Rg
+
- VDD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
TA, Ambient Temperature (°C)
td(on)
td(off) tf
Fig. 10b - Switching Time Waveforms
Thermal Response (ZthJA)
Fig. 9 - Maximum Drain Current vs. Ambient Temperature
tr
t1, Rectangular Pulse Duration (s)
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Document Number: 91307
S10-2465-Rev. D, 08-Nov-10
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IRLD014, SiHLD014
Vishay Siliconix
L
Vary tp to obtain
required IAS
VDS
VDS
tp
VDD
D.U.T.
Rg
+
-
I AS
V DD
VDS
10 V
0.01 W
tp
Fig. 12a - Unclamped Inductive Test Circuit
IAS
Fig. 12b - Unclamped Inductive Waveforms
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
VGS
12 V
0.2 µF
0.3 µF
QGS
QGD
+
D.U.T.
VG
-
VDS
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
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Fig. 13b - Gate Charge Test Circuit
Document Number: 91307
S10-2465-Rev. D, 08-Nov-10
IRLD014, SiHLD014
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
Rg
•
•
•
•
+
dV/dt controlled by Rg
Driver same type as D.U.T.
ISD controlled by duty factor “D”
D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
Period
D=
P.W.
Period
VGS = 10 Va
D.U.T. lSD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
Inductor current
VDD
Body diode forward drop
Ripple ≤ 5 %
ISD
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91307.
Document Number: 91307
S10-2465-Rev. D, 08-Nov-10
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Vishay
Disclaimer
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including but not limited to the warranty expressed therein.
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Document Number: 91000
Revision: 11-Mar-11
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