5962-98613

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
A
Add device class T device and requirements. - ro
98-12-04
R. MONNIN
B
Make changes to 1.5. - ro
99-01-05
R. MONNIN
C
Add level P to table I. Make changes to 1.5 and glassivation as specified
under APPENDIX A. - ro
99-04-13
R. MONNIN
D
Drawing updated to reflect current requirements. – gt
03-03-11
R. MONNIN
E
Add device type 02. Make changes to 1.2.2, table I, figure 1, figure 4, 4.4,
and A4.3.1. - ro
04-01-06
R. MONNIN
F
Add enhanced low dose rate effects (ELDRS) paragraph to 1.5 and
table I. - rrp
05-10-14
R. MONNIN
G
Add 30 V test conditions to Table I. Add a date code sentence to footnote 1/
as specified under Table I. Add CMRR and IOZ tests under Table I.
Make change to Table IIB. Delete Accelerated aging test. - ro
07-06-25
R. HEBER
H
Make correction by deleting the minimum limit from the IIO test as specified
under Table I. - ro
09-10-15
C. SAFFLE
J
Add device type 03. Delete dose rate upset from paragraph 1.5.
Add ASTM F1192 information under section 2. Delete radiation exposure
circuit. - ro
12-10-01
C. SAFFLE
REV
SHEET
REV
J
J
J
J
J
J
J
SHEET
15
16
17
18
19
20
21
REV STATUS
REV
J
J
J
J
J
J
J
J
J
J
J
J
J
J
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
RICK OFFICER
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
CHECKED BY
RAJESH PITHADIA
APPROVED BY
RAYMOND MONNIN
DRAWING APPROVAL DATE
98-06-26
REVISION LEVEL
J
MICROCIRCUIT, LINEAR, RADIATION
HARDENED, QUAD VOLTAGE COMPARATOR,
MONOLITHIC SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
5962-98613
1 OF 21
5962-E453-12
1. SCOPE
1.1 Scope. This drawing documents three product assurance class levels consisting of high reliability (device classes Q),
space application (device class V) and for appropriate satellite and similar applications (device class T). A choice of case
outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of
Radiation Hardness Assurance (RHA) levels is reflected in the PIN. For device class T, the user is encouraged to review the
manufacturer’s Quality Management (QM) plan as part of their evaluation of these parts and their acceptability in the intended
application.
1.2 PIN. The PIN is as shown in the following example:
5962
-
Federal
stock class
designator
\
98613
RHA
designator
(see 1.2.1)
01
V
C
C
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q, T and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and
are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
02
03
Generic number
Circuit function
HS-139RH
HS-139BRH
HS-139EH
Radiation hardened quad voltage comparator
Radiation hardened quad voltage comparator
Radiation hardened quad voltage comparator
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
Device requirements documentation
Q, V
Certification and qualification to MIL-PRF-38535
T
Certification and qualification to MIL-PRF-38535 with performance as specified
in the device manufacturers approved quality management plan.
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
C
X
Descriptive designator
Terminals
CDIP2-T14
CDFP3-F14
14
14
Package style
Dual-in-line
Flat pack
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q, T and V.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-98613
A
REVISION LEVEL
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SHEET
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1.3 Absolute maximum ratings. 1/
Supply voltage range (+V) ............................................................................................ 36 V dc
Input voltage range (VIN) .............................................................................................. -0.3 V dc to 36 V dc
Input current (IIN) (VIN < -0.3 V) ...................................................................................
Output short circuit duration (single supply) ..................................................................
Maximum storage temperature range ...........................................................................
Maximum power dissipation (PD):
Case outline C ...........................................................................................................
Case outline X ...........................................................................................................
Lead temperature (soldering, 10 seconds) ....................................................................
Junction temperature (TJ) .............................................................................................
Thermal resistance, junction-to-case (θJC):
Case outline C ...........................................................................................................
Case outline X ...........................................................................................................
Thermal resistance, junction-to-ambient (θJA): 4/
Case outline C ...........................................................................................................
Case outline X ...........................................................................................................
50 mA 2/
Continuous 3/
-65°C to +150°C
0.67 W
0.43 W
+265°C maximum
+175°C maximum
22°C/W
28°C/W
75°C/W
115°C/W
1.4 Recommended operating conditions.
Supply voltage range (+V) ............................................................................................ 5 V dc to 30 V dc
Ambient operating temperature range (TA) ................................................................... -55°C to +125°C
1.5 Radiation features.
Maximum total dose available (dose rate = 50 – 300 rads(Si)/s):
Device type 01:
Classes Q or V .......................................................................................................
Class T ...................................................................................................................
Device type 02 ...........................................................................................................
Device type 03 ...........................................................................................................
Maximum total dose available (dose rate < 0.01 rads(Si)/s):
Device type 03 ........................................................................................................
Single event phenomenon (SEP) :
300 krads(Si)
100 krads(Si)
300 krads(Si)
300 krads(Si)
5/
5/
5/
6/
50 krads(Si) 6/
2
No Single event upset (SEU) occurs at effective LET (see 4.4.4.3) .......................... ≤ 20 MeV / (mg/cm ) 7/
Single event latch up (SEL) ....................................................................................... No latch up 8/
______
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ Inputs must not go more negative than -0.3 V.
3/ Short circuit from the output to +V can cause excessive heating and eventual destruction. The maximum output current
independent of +V is approximately 20 mA.
4/ θJA is measured with the component mounted on an evaluation PC board in free air.
5/ Device types 01 and 02 may be dose rate sensitive in a space environment and may demonstrate enhanced low dose rate
effects. The radiation end point limits for the noted parameters are guaranteed only for the conditions as specified in
MIL-STD-883, method 1019, condition A to a maximum total dose of 300 krads(Si) for device classes V and Q, and
100 krads(Si) for device class T.
6/ Device type 03 radiation end point limits for the noted parameters are guaranteed only for the conditions as specified
in MIL-STD-883, method 1019, condition A to a maximum total dose of 300 krads(Si), and condition D to a maximum total
dose of 50 krads(Si).
7/ Limits are guaranteed by process or design but not production test.
8/ Device types 01, 02, and 03 used dielectrically isolated (DI) technology and latch-up is physically not possible.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-98613
A
REVISION LEVEL
J
SHEET
3
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at https://assist.dla.mil/quicksearch/ or from the Standardization Document
Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation or contract.
ASTM INTERNATIONAL (ASTM)
ASTM F1192
-
Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion
Irradiation of semiconductor Devices.
(Copies of these documents are available online at http://www.astm.org or from ASTM International, 100 Barr Harbor Drive,
P.O. Box C700, West Conshohocken, PA, 19428-2959).
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q, T and V shall be in accordance with
MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein.
3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q, T and V.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Block diagram. The block diagram shall be as specified on figure 2.
3.2.4 Timing diagrams. The timing diagrams shall be as specified on figure 3.
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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REVISION LEVEL
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SHEET
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3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing and acquiring activity upon request.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the
full ambient operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table IA.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q, T and V shall be in accordance with MIL-PRF-38535.
3.5.1 Certification/compliance mark. The certification mark for device classes Q, T and V shall be a "QML" or "Q" as required
in MIL-PRF-38535.
3.6 Certificate of compliance. For device classes Q, T and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance
submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this drawing shall affirm that the
manufacturer's product meets, for device classes Q, T and V, the requirements of MIL-PRF-38535 and herein or for device class
M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q, T and V in MIL-PRF-38535
shall be provided with each lot of microcircuits delivered to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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REVISION LEVEL
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TABLE IA. Electrical performance characteristics.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
+V = 5 V
Group A
subgroups
Device
type
Limits
unless otherwise specified
Input offset voltage
VIO
VREF = 1.4 V, RS = 0 Ω,
1
output switch point = 1.4 V,
+V = 5 V, +V = 30 V
2,3
M,D,P,L,R,F
Saturation voltage
VSAT1
ISINK ≤ 1 mA
M,D,P,L,R,F
Saturation voltage
VSAT2
-VIN = 1 V, +VIN = 0 V,
ISINK ≤ 4 mA
M,D,P,L,R,F
Common mode input 3/
voltage range
VICR
+V = 30 V
IIO
-2
2
02
-3
3
All
-5
5
-8
8
All
400
1
01,03
400
02
600
1,2,3
All
800
1
01,03
800
02
1000
All
0
+VS
mV
mV
mV
V
+VS
1
1
+IIN - -IIN
M,D,P,L,R,F
IIB
01,03
-2.5
+V = 5 V, +V = 30 V
Input bias current
Max
1,2,3
1,2,3
M,D,P,L,R,F
Input offset current
Min
1
-VIN = 1 V, +VIN = 0 V,
Unit
-25
25
2,3
-100
100
1
-600
600
-100
100
2,3
-300
300
1
-1000
1000
1
+IIN or -IIN with output in
linear range,
-2.5
All
All
nA
nA
+V = 5 V, +V = 30 V
M,D,P,L,R,F
Total supply current
+IS
1
RL = infinite on all
comparators, +V = 30 V
M,D,P,L,R,F
All
2
2,3
3
1
3
mA
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
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DSCC FORM 2234
APR 97
SIZE
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REVISION LEVEL
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SHEET
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TABLE IA. Electrical performance characteristics - Continued.
Test
Symbol
Conditions 1/ 2/
-55°C ≤ TA ≤ +125°C
+V = 5 V
Group A
subgroups
Device
type
unless otherwise specified
Input voltage common
mode rejection ratio
CMRR
Min
+V = +30 V, RL > 15 kΩ,
1,2,3
All
Unit
Max
60
dB
VCM = 0 V to 27.5 V
M,D,P,L,R,F
Output leakage current
Limits
IOZ
1
+V = +30 V,
1,2,3
60
All
-0.5
0.5
-0.5
0.5
µA
VOUT = 30 V dc
M,D,P,L,R,F
Output sink current
IOSK
1
-VIN > 1 V, +VIN = 0 V,
1,2,3
VOUT < 1.5 V
M,D,P,L,R,F
AOL
Voltage gain
tPHL
RL > 15 kΩ, +VS = 15 V
1,2,3
1
4
VIN = VIO + 5 mV,
VREF = 1.4 V, VRL = 5 V,
5,6
RL = 5.1 kΩ, see figure 3
M,D,P,L,R,F
tPLH
6
1
M,D,P,L,R,F
Response time 4/
All
4
4
VIN = VIO + 5 mV,
VREF = 1.4 V, VRL = 5 V,
5,6
RL = 5.1 kΩ, see figure 3
M,D,P,L,R,F
4
mA
6
01,03
50
02
25
01,03
50
02
25
V/mV
01,03
5
02
7
01,03
7
02
12
01,03
7
02
12
01,03
5
02
7
01,03
7
02
12
01,03
7
02
12
µs
µs
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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REVISION LEVEL
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TABLE IA. Electrical performance characteristics - Continued.
1/
RHA device types 01 and 02 (device classes Q and V) supplied to this drawing will meet all levels L, R and F of irradiation,
and device type 01 (device class T) will meet all levels L and R of irradiation. However, device types 01 and 02 (device
classes Q and V) are only tested at the “F” level, and device type 01 (device class T) is only tested at the “R” level in
accordance with MIL-STD-883 method 1019 condition A (see 1.5 herein). Device types 01 and 02 may be dose rate
sensitive in a space environment and may demonstrate enhanced low dose rate effects.
RHA device type 03 supplied to this drawing will meet all levels L, R, and F of irradiation for condition A and “L” level for
condition D. However, device type 03 is only tested at the “F” level in accordance with MIL-STD-883, method 1019,
condition A and tested at the “L” level in accordance with MIL-STD-883, method 1019, condition D (see 1.5 herein).
Pre and post irradiation values are identical unless otherwise specified in table IA. When performing post irradiation
electrical measurements for any RHA level, TA = +25°C.
All material beginning with a lot date code of “0710” and after will have been screened to the revised table IA electrical
limits for the implementation of the 30 V test conditions.
2/
The comparator will provide a proper output state even if the positive swing of the inputs exceeds the power supply
voltage level, if the other input remains within the common mode voltage range. The low input voltage state must not be
less than -0.3 V (or 0.3 V below the magnitude of the negative power supply, if used).
3/
The upper end of the common mode voltage range is (+V) - 2.5 V, but either or both inputs can go to +30 V without
damage.
4/
If not tested, shall be guaranteed to the limits specified in table IA herein.
TABLE IB. SEP test limits. 1/ 2/
Device
type
Supply voltage V+ = 5.0 V 3/
2
No SEU at effective LET [MeV/(mg/cm )]
All
1/
2/
3/
For single event phenomena (SEP) test conditions, see 4.4.4.3 herein.
Technology characterization and model verification supplemented by in-line data
may be used in lieu of end-of-line testing. Test plan must be approved by technical
review board and qualifying activity.
Tested for upsets at worse case temperature, TA = +25°C ± 10°C.
STANDARD
MICROCIRCUIT DRAWING
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APR 97
LET ≤ 20
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REVISION LEVEL
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Device types
01, 02, and 03
Case outlines
C and X
Terminal number
Terminal symbol
1
OUTPUT 2
2
OUTPUT 1
3
+V
4
-INPUT 1
5
+INPUT 1
6
-INPUT 2
7
+INPUT 2
8
-INPUT 3
9
+INPUT 3
10
-INPUT 4
11
+INPUT 4
12
GND
13
OUTPUT 4
14
OUTPUT 3
FIGURE 1. Terminal connections.
STANDARD
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DSCC FORM 2234
APR 97
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REVISION LEVEL
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FIGURE 2. Block diagram.
STANDARD
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APR 97
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REVISION LEVEL
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FIGURE 3. Timing waveforms.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
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4. VERIFICATION
4.1 Sampling and inspection. For device classes Q, and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan, including screening (4.2),
qualification (4.3), and conformance inspection (4.4). The modification in the QM plan shall not affect the form, fit, or function as
described herein. For device class T, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 and the
device manufacturer’s QM plan including screening, qualification, and conformance inspection. The performance envelope and
reliability information shall be as specified in the manufacturer’s QM plan.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class T, screening shall be in
accordance with the device manufacturer’s Quality Management (QM) plan, and shall be conducted on all devices prior to
qualification and technology conformance inspection.
4.2.1 Additional criteria for device classes Q, T and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b.
For device classes Q, T and V interim and final electrical test parameters shall be as specified in table IIA herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, Appendix B.
4.3 Qualification inspection for device classes Q, T and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Qualification inspection for device class T shall be in accordance with the device
manufacturer’s Quality Management (QM) plan. Inspections to be performed shall be those specified in MIL-PRF-38535 and
herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections, and as specified herein. Inspections to be performed for device
class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1
through 4.4.4). Technology conformance inspection for class T shall be in accordance with the device manufacturer’s Quality
Management (QM) plan.
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
Subgroups 7, 8, 9, 10, and 11 in table I, method 5005 of MIL-STD-883 shall be omitted.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device classes Q, T and V. The steady-state life test duration, test condition and test
temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with
MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in
accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test
circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1005 of MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
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DSCC FORM 2234
APR 97
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REVISION LEVEL
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TABLE IIA. Electrical test requirements.
Test requirements
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Device
class Q
Interim electrical
parameters (see 4.2)
Final electrical
parameters (see 4.2)
Group A test
requirements (see 4.4)
Group C end-point electrical
parameters (see 4.4)
Group D end-point electrical
parameters (see 4.4)
Group E end-point electrical
parameters (see 4.4)
Device
class V
Device
class T
As specified
in QM plan
1,4
1,4
1,2,3,4,5,6 1/
As specified
in QM plan
1,2,3,4,5,6
1,2,3, 1/ 2/
4,5,6
1,2,3,4,5,6
1,2,3,4,5,6
1,2,3,4,5,6 2/
As specified
in QM plan
1,4
1,4
As specified
in QM plan
1,4
1,4
As specified
in QM plan
As specified
in QM plan
1/ PDA applies to subgroup 1 for class Q. For class V, PDA applies to subgroup 1 and deltas.
2/ Delta limits as specified in table IIB shall be required and the delta values shall be
computed with reference to the zero hour electrical parameters (see table IA).
TABLE IIB. Burn-in and life test delta parameters. (TA = +25°C). 1/
Parameters
Symbol
Min
Max
Units
Input offset voltage (+V = 5 V)
VIO
-1
+1
mV
Input bias current (+V = 5 V)
±IIB
-15
+15
nA
Input offset current (+V = 5 V)
IIO
-10
+10
nA
1/ If device is tested at or below delta limits, no deltas are required.
Deltas are performed at room temperature.
STANDARD
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4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End-point electrical
parameters shall be as specified in table IIA herein.
4.4.4.1 Group E inspection for device class T. For device class T, the RHA requirements shall be in accordance with the
class T radiation requirements of MIL-PRF-38535. End-point electrical parameters shall be as specified in table IIA herein.
4.4.4.2 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019, condition A and as specified herein for device types 01, 02, and 03. In addition, for device type 03 a low dose
rate test shall be performed in accordance with MIL-STD-883 method 1019, condition D and as specified herein.
4.4.4.3 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be performed on
class V devices. SEP testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as
approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or
latchup characteristics. Test four devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP
testing. The recommended test conditions for SEP are as follows:
a.
The ion beam angle of incidence shall be between normal to the die surface and 60° to the normal, inclusive
(i.e. 0° ≤ angle ≤ 60°). No shadowing of the ion beam due to fixturing or package related affects is allowed.
b.
The fluence shall be ≥ 100 errors or ≥ 10 ions/cm .
c.
The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d.
The particle range shall be ≥ 20 micron in silicon.
e.
The test temperature shall be +125°C ±10% for SEL and 25°C ±10% for SEU.
f.
Bias conditions for VCC shall be as listed in Table IB.
g.
For SEU test limits, see Table IB herein.
7
2
5
2
2
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q, T and V.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires
configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and
this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic
devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990,
or telephone (614) 692-0540.
STANDARD
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6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q, T and V. Sources of supply for device classes Q, T and V are listed in
QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and
Maritime -VA and have agreed to this drawing.
6.7 Additional information. When applicable, a copy of the following additional data shall be maintained and available from
the device manufacturer:
a. RHA upset levels.
b. Test conditions (SEP).
c. Number of upsets (SEU).
STANDARD
MICROCIRCUIT DRAWING
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-98613
A.1 SCOPE
A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified
Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers
approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using
chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of
military high reliability (device class Q) and space application (device class V) are reflected in the Part or Identification Number
(PIN). When available, a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN.
A.1.2 PIN. The PIN is as shown in the following example:
5962
F
Federal
stock class
designator
\
RHA
designator
(see A.1.2.1)
98513
01
V
9
A
Device
type
(see A.1.2.2)
Device
class
designator
(see A.1.2.3)
Die
code
Die
details
(see A.1.2.4)
/
\/
Drawing number
A.1.2.1 RHA designator. Device classes Q and V RHA identified die meet the MIL-PRF-38535 specified RHA levels. A dash
(-) indicates a non-RHA die.
A.1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
01
02
03
Circuit function
HS-139RH
HS-139BRH
HS-139EH
Radiation hardened quad voltage comparator
Radiation hardened quad voltage comparator
Radiation hardened quad voltage comparator
A.1.2.3 Device class designator.
Device class
Q or V
STANDARD
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Device requirements documentation
Certification and qualification to the die requirements of MIL-PRF-38535
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-98613
A.1.2.4 Die details. The die details designation is a unique letter which designates the die's physical dimensions, bonding
pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product
and variant supplied to this appendix.
A.1.2.4.1 Die physical dimensions.
Die type
Figure number
01, 02, 03
A-1
A.1.2.4.2 Die bonding pad locations and electrical functions.
Die type
Figure number
01, 02, 03
A-1
A.1.2.4.3 Interface materials.
Die type
Figure number
01, 02, 03
A-1
A.1.2.4.4 Assembly related information.
Die type
Figure number
01, 02, 03
A-1
A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details.
A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details.
A.1.5 Radiation features. See paragraph 1.5 herein for details.
STANDARD
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-98613
A.2 APPLICABLE DOCUMENTS.
A.2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARD
MIL-STD-883 - Test Method Standard Microcircuits.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at https://assist.dla.mil/quicksearch/ or from the Standardization Document
Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
A.3 REQUIREMENTS
A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein.
A.3.2 Design, construction and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein and the manufacturer’s QM plan for device classes Q and V.
A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figure A-1.
A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as
specified in A.1.2.4.2 and on figure A-1.
A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figure A-1.
A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and on figure A-1.
A.3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.5 herein.
A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and post-irradiation parameter limits are as specified in table IA of the body of this
document.
A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing
sufficient to make the packaged die capable of meeting the electrical performance requirements in table IA.
A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a
customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed
in A.1.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535.
STANDARD
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-98613
A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of
compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this appendix shall
affirm that the manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the
requirements herein.
A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535
shall be provided with each lot of microcircuit die delivered to this drawing.
A.4 VERIFICATION
A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance
with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM
plan shall not affect the form, fit, or function as described herein.
A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the
manufacturer’s QM plan. As a minimum, it shall consist of:
a.
Wafer lot acceptance for class V product using the criteria defined in MIL-STD-883, method 5007.
b.
100% wafer probe (see paragraph A.3.4 herein).
c.
100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883, method 2010 or the
alternate procedures allowed in MIL-STD-883, method 5004.
A.4.3 Conformance inspection.
A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see
A.3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of
packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified in paragraphs 4.4.4,
4.4.4.1, 4.4.4.2, and 4.4.4.3 herein.
A.5 DIE CARRIER
A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or
as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and
electrostatic protection.
A.6 NOTES
A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with
MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications, and
logistics purposes.
A.6.2 Comments. Comments on this appendix should be directed to DLA Land and Maritime -VA, Columbus, Ohio,
43218-3990 or telephone (614) 692-0540.
A.6.3 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed within QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DLA Land and
Maritime -VA and have agreed to this drawing.
STANDARD
MICROCIRCUIT DRAWING
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-98613
NOTE: Pad numbers reflect terminal numbers when placed in case outlines C and X (see figure 1).
FIGURE A-1. Die bonding pad locations and electrical functions.
STANDARD
MICROCIRCUIT DRAWING
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APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-98613
Die physical dimensions.
Die size: 3750 microns x 2820 microns
Die thickness: 19 ±1 mils
Interface materials.
Top metallization: Al Si Cu
Thickness: 16.0 kÅ ±2 kÅ
Backside metallization: None
Glassivation.
Type: PSG
Thickness: 8.0 kÅ ±1.0 kÅ
Substrate: Dielectrically Isolated (D.I.)
Assembly related information.
Substrate potential: Unbiased
Special assembly instructions: None
FIGURE A-1. Die bonding pad locations and electrical functions – Continued.
STANDARD
MICROCIRCUIT DRAWING
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STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 12-10-01
Approved sources of supply for SMD 5962-98613 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DLA Land and Maritime -VA. This information
bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime
maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962F9861301QCC
34371
HS1-139RH-8
5962F9861301QXC
34371
HS9-139RH-8
5962F9861301V9A
34371
HS0-139RH-Q
5962F9861301VCC
34371
HS1-139RH-Q
5962F9861301VXC
34371
HS9-139RH-Q
5962R9861301TCC
3/
HS1-139RH-T
5962R9861301TXC
3/
HS9-139RH-T
5962F9861302QCC
34371
HS1-139BRH-8
5962F9861302QXC
34371
HS9-139BRH-8
5962F9861302V9A
34371
HS0-139BRH-Q
5962F9861302VCC
34371
HS1-139BRH-Q
5962F9861302VXC
34371
HS9-139BRH-Q
5962F9861303V9A
34371
HS0-139EH-Q
5962F9861303VCC
34371
HS1-139EH-Q
5962F9861303VXC
34371
HS9-139EH-Q
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
3/ Not available from an approved source of supply.
Vendor CAGE
number
34371
Vendor name
and address
Intersil Corporation
1001 Murphy Ranch Road
Milpitas, CA 95035-6803
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.