Datasheet
Three-Phase Brushless Motor Predriver
BD63001AMUV
General Description
Key Specifications
BD63001AMUV is a Three-Phase Brushless Motor
Predriver that uses upper Pch and lower Nch MOS
transistor for an external output power transistor. It
generates a driving signal from the Hall sensor and
drives PWM through the input control signal. In addition,
the supply voltage that can be applied is 12V or 24V, it
has various controls and built-in protection functions,
making it useful for a variety of purposes. Since the IC
adopts small packages, it can be used on small diameter
motors.
Power Supply Voltage Rating:
3 3 V
Operating temperature range:
-40°C to +85°C
Predriver Output Current Rating(Continuous) : ±30mA
(Note 1)
Predriver Output Current Rating(Peak)
: ±200mA
The Current Limit Detect Voltage:
0.2V±10%
UVLO Lockout Voltage:
3.7V(Typ)
(Note1) tw≤1µs, 50kHz
Package
W(Typ) x D(Typ) x H(Max)
Features
Built-in 120° Commutation Logic Circuit
Drives Upper Pch, Lower Nch MOS transistor
PWM control system /DC control system
CW/CCW Function
FG Output (1FG Output)
Current Limit Protection Circuit (CL)
Overheat Protection Circuit (TSD)
Under Voltage Protection Circuit (UVLO)
Over Voltage Protection Circuit (OVLO)
Motor Lock Protection (MLP)
VQFN024V4040
4.00mm x 4.00mm x 1.00mm
Application
OA apparatus
Other general public welfare apparatus
Typical Application Circuits
0.1µF
VCC
VREG
VCC=24V
VM
1
8
19
7
HV
0.01µF
0.01µF
HUP
13
HUN
14
HVP
15
HVN
16
HWP
HW
0.01µF
HWN
R1
UH
Q1
R2
0.1µF
HU
R4
UL
R5
C2
C1
R3
R1
10
VH
9
VL
12
WH
11
WL
Q1
R2
17
18
R5
C2
C1
R3
R1
2
M
3～
R4
Q1
R2
CW
C1
R3
R4
R5
C2
HLSW
BRKB
24
3
6
RCL
R6
C2
PWMB
Rref
22
VREG
FGO
DCIN
10k
23
21
PWM
OSC
20
20k
4
LPE
5
GND
Figure 1. Application Circuit in HLSW=OPEN ("H")
〇Product structure : Silicon monolithic integrated circuit
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Typical Application Circuits - continued
VM
0.1µF
VCC
VREG
19
HUP
13
HUN
14
HVP
15
HVN
16
1
8
0.1µF
7
HU
0.01µF
HV
0.01µF
HWP
HW
0.01µF
HWN
17
18
CW
UH
R1
UL
R2
C1
C2
10
VH
R1
9
VL
R2
C1
M
3～
C2
2
12
WH
R1
11
WL
R2
C1
C2
HLSW
BRKB
24
3
6
RCL
R3
C3
PWMB
Rref
22
VREG
10k
FGO
DCIN
23
21
PWM
OSC
20
20k
4
LPE
5
GND
Figure 2. Application Circuit in HLSW="L"
0.1µF
VCC
VREG
VCC=5V
VM
1
R1
8
19
HV
0.01µF
0.01µF
HUP
13
HUN
14
HVP
15
HVN
16
HWP
HW
0.01µF
HWN
R4
UH
R2
UL
R3
C1
R1
10
VH
9
VL
R4
Q1
R5
17
18
2
M
3～
R2
R3
C1
R1
12
WH
11
WL
R4
R5
CW
Q1
R5
7
HU
C1
Q1
R2
R3
HLSW
BRKB
24
3
6
RCL
R6
C2
PWMB
Rref
22
VREG
FGO
DCIN
10k
23
21
PWM
OSC
20
20k
4
LPE
5
GND
Figure 3. Application Circuit in VCC=VREG
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Contents
General Description ........................................................................................................................................................................ 1
Features.......................................................................................................................................................................................... 1
Application ...................................................................................................................................................................................... 1
Key Specifications........................................................................................................................................................................... 1
Package .......................................................................................................................................................................................... 1
Typical Application Circuits ............................................................................................................................................................. 1
Pin Configuration/Block Diagram .................................................................................................................................................... 4
Pin Description................................................................................................................................................................................ 4
Absolute Maximum Ratings ............................................................................................................................................................ 5
Recommended Operating Conditions ............................................................................................................................................. 5
)
Thermal Resistance ....................................................................................................................................................................... 6
Function Description ....................................................................................................................................................................... 7
Protection Circuit .......................................................................................................................................................................... 10
Electrical Characteristic ................................................................................................................................................................ 11
Typical Performance Curves ......................................................................................................................................................... 12
Timing Chart ................................................................................................................................................................................. 13
State Transition Diagram............................................................................................................................................................... 15
I/O Equivalent Circuits .................................................................................................................................................................. 16
Attention for Operation .................................................................................................................................................................. 17
Operational Notes ......................................................................................................................................................................... 18
Ordering Information ..................................................................................................................................................................... 20
Marking Diagram .......................................................................................................................................................................... 20
Physical Dimension, Tape and Reel Information ........................................................................................................................... 21
Revision History ............................................................................................................................................................................ 22
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Pin Configuration
Block Diagram
VCC
(TOP VIEW)
1
VREG
VREG
19
VREG
HWN
HWP
HVN
HVP
HUN
HUP
Internal
Reg
18
17
16
15
14
13
VREG 19
HUP
12 WH
PWMOSC 20
11 WL
DCIN 21
10 VH
9
PWMB 22
3
4
5
6
GND
RCL
UL
LPE
7
BRKB
HLSW 24
CW
UH
VCC
8
2
14
HVP
15
16
HWP
17
HWN
18
PRE
DRIVER
LOGIC
UH
7
UL
10
VH
9
VL
12
WH
11
WL
6
CW
2
BRKB
3
24
HLSW
VL
FGO 23
1
13
HUN
HVN
8
6
RCL
23
FGO
4
LPE
PWMB
22
PWM
OSC
20
TSD
UVLO
Internal OSC
21
DCIN
Figure 4. Pin Configuration
OVLO
PWM
OSC
5
GND
Figure 5. Block Diagram
Pin Description
Pin
No.
Pin Name
1
VCC
Power Supply
13
HUP
U Phase Hall Input＋
2
CW
CW/CCW Input (H:CW, L:CCW)
14
HUN
U Phase Hall Input－
3
BRKB
Brake Input (negative logic)
15
HVP
V Phase Hall Input＋
4
LPE
Motor Lock Protection Setting (H/M/L
input)
16
HVN
V Phase Hall Input－
5
GND
Ground
17
HWP
W Phase Hall Input＋
6
RCL
Detect Voltage Input for Over-Current
18
HWN
W Phase Hall Input－
7
UL
Output UL
19
VREG
Regulator Output
8
UH
Output UH
20
PWMOSC
9
VL
Output VL
21
DCIN
10
VH
Output VH
22
PWMB
11
WL
Output WL
23
FGO
12
WH
Output WH
24
HLSW
Function
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Pin Name
Function
Setting PWM Oscillator Frequency
DC Input
PWM Input (negative logic)
FG(1 phase output)
Upper MOS Gate Output Switch
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Absolute Maximum Ratings (Ta = 25°C)
Parameter
Symbol
Limit
Unit
VCC
-0.3 to +33.0
V
Predriver Output Voltage
V(UH,VH,WH)
-0.3 to +VCC
V
Predriver Output Voltage
V(UL,VL,WL)
-0.3 to +10.5
V
FGO Terminal Voltage
VFGO
-0.3 to +7.0
V
Other Input and Output Terminal Voltages
VI/O
-0.3 to +5.5
V
Predriver Output Current (Continuous)
IOUT1
±30
mA
Power Supply Voltage
Predriver Output Current (Peak)
IOUT2
FGO Output Current
IFGO
5
mA
VREG Output Current
IVREG
-30
mA
Operating Temperature Range
Topr
-40 to +85
°C
Storage Temperature Range
Tstg
-55 to +150
°C
Tjmax
150
°C
Junction Temperature
±200
(Note 1)
mA
(Note 1) tw≤1µs,50kHz
Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions (Ta= -40°C to +85°C)
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage
VCC1
6
24
28
V
Supply Voltage(VREG=VCC)
VCC2
4.5
5
5.5
V
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Thermal Resistance
(Note 1)
Parameter
Symbol
Thermal Resistance (Typ)
1s
(Note 3)
2s2p
(Note 4)
Unit
VQFN024V4040
Junction to Ambient
Junction to Top Characterization Parameter
(Note 2)
θJA
150.6
37.9
°C/W
ΨJT
20
9
°C/W
(Note 1) Based on JESD51-2A(Still-Air)
(Note 2) The thermal characterization parameter to report the difference between junction temperature and the temperature at the top center of the outside
surface of the component package.
(Note 3) Using a PCB board based on JESD51-3.
Layer Number of
Measurement Board
Single
Material
Board Size
FR-4
114.3mm x 76.2mm x 1.57mmt
Top
Copper Pattern
Thickness
Footprints and Traces
70µm
(Note 4)Using a PCB board based on JESD51-7.
Layer Number of
Measurement Board
Material
Board Size
4 Layers
FR-4
114.3mm x 76.2mm x 1.6mmt
Top
2 Internal Layers
Bottom
Copper Pattern
Thickness
Copper Pattern
Thickness
Copper Pattern
Thickness
Footprints and Traces
70µm
74.2mm x 74.2mm
35µm
74.2mm x 74.2mm
70µm
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Function Description
1.
Commutation Logic
This IC adopts a 120° commutation mode, and the truth table is as follows:
(1) HLSW=”H” or OPEN
CW (CW=”H” or OPEN)
HU
HV
CCW (CW=”L”)
HW
UH
UL
VH
VL
WH
WL
UH
UL
VH
VL
WH
WL
FGO
H
L
H
L
PWM
H
L
L
L
H
L
L
PWM
L
L
L
H
L
L
L
PWM
L
L
H
L
H
L
L
L
L
PWM
L
H
H
L
L
L
L
PWM
H
L
L
L
H
L
L
PWM
L
L
H
L
H
L
L
PWM
L
L
L
PWM
H
L
L
L
Hi-z
L
H
H
H
L
L
L
L
PWM
L
PWM
L
L
H
L
Hi-z
L
L
H
L
L
H
L
L
PWM
L
L
L
PWM
H
L
Hi-z
WL
FGO
(2) HLSW=”L”
CW (CW=”H” or OPEN)
HU
HV
CCW (CW=”L”)
HW
UH
UL
VH
VL
WH
WL
UH
UL
VH
VL
WH
H
L
H
H
PWM
L
L
H
L
L
L
H
PWM
H
L
L
H
L
L
H
PWM
H
L
L
L
L
L
H
L
H
PWM
L
H
H
L
H
L
H
PWM
L
L
H
L
L
L
H
PWM
L
L
H
L
L
L
H
PWM
H
L
H
PWM
L
L
H
L
Hi-z
L
H
H
L
L
H
L
H
PWM
H
PWM
H
L
L
L
Hi-z
L
L
H
H
L
L
L
H
PWM
H
L
H
PWM
L
L
Hi-z
(Note) When PWMB=”H”, PWM=”L”, When PWMB=”L”, PWM=”H”
Caution: In the following sentence, Upper side predriver output is under the condition of HLSW=OPEN (or “H”).
In HLSW=”L”, the output H/L of Upper side predriver becomes the reverse.
2.
Regulator Output Terminal (VREG)
This is a constant output voltage terminal of 5V (Typ). It is recommended to connect capacitors of 0.01µF to 1µF.
Please be careful that VREG current should not exceed the maximum ratings in case it will be used for supply voltage
of hall elements.
3.
PWM Input Terminal (PWMB)
Speed can be controlled by inputting Duty of PWM signal into PWMB (negative logic). When PWMB=”L”, lower side
predriver output that corresponds to the Hall input logic is “H”. In addition, PWMB terminal is pulled up to VREG
through a resistance of 100kΩ(Typ) ±30kΩ. When using PWM input, please use it with DC input under 1V (Typ) or
short to GND.
PWMB
4.
H or OPEN
L
L
H
DC Input Terminal (DCIN)
Speed can be controlled by the DC signal to input into DCIN.
PWM signal becomes 100% duty at DCIN=3.0V (Typ) and becomes 0% duty at DCIN= 1.0V (Typ). When using DC
input, please use it with PWMB input “H” or OPEN.
DCIN
5.
Lower Side Predriver Output Logic
Duty
1V(Typ)
0%
3V(Typ)
100%
PWMOSC Input Terminal (PWMOSC)
When using DC input, the PWM frequency fPWM [kHz] is fixed by an external resistor R [kΩ] connected to PWMOSC.
FPWM [kHz] = 400/R
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Function Description – continued
6.
7.
8.
CW/CCW Input Terminal (CW)
Rotation direction can be switched with CW terminal. When CW=”H” or OPEN, the direction is CW. When CW=”L”, the
direction is CCW. However, we do not recommend changing the direction of rotation while the motor is rotating. This is
because if direction of rotation is changed while rotating, the rotation speed becomes equal to the hall frequency, which
is less than approximately 40Hz (Typ). After a short brake, the rotation direction will switch to a new setting. In addition,
CW terminal is pulled up to VREG through a resistance of 1010kΩ (Typ) ±300kΩ.
CW
Direction
H or OPEN
CW
L
CCW
Brake Input Terminal (BRKB)
Motor rotation can be quickly stopped by BRKB terminal (negative logic). When BRKB=”L”, all upper side predriver
outputs are “H” and all lower side predriver outputs are “L” (short brake). When BRKB=”H” or OPEN, then the short
brake action is released. In addition, BRKB terminal is pulled up to VREG through a resistance of 100kΩ (Typ) ±30kΩ.
BRKB
Operation
H or OPEN
Normal
L
Short brake
Hall Input (HALL: HUP, HUN, HVP, HVN, HWP, HWN)
Hall input amplifier inside the IC is designed with a hysteresis (±12mV(Typ)) in order to prevent false trigger due to
noise. Always set correct bias current for the Hall element so that the amplitude of Hall input voltage will be over the
minimum input voltage (VHALLMIN). It is recommended to connect a ceramic capacitor with about 100pF to 0.01µF value
between the input terminals of the Hall amplifier. The in-phase input voltage range (VHALLCM1:0V to VREG-1.7V,
VHALLCM2:0V to VREG) is designed for Hall input amplifier, set within this range when applying bias to the Hall element.
Moreover, “H” or “L” of HU, HV ,HW in Commutation Logic means the following.
HU
HV
HW
HUP
HUL
HVP
HVN
HWP
HWN
H
L
H
H
L
L
H
H
L
H
L
L
H
L
L
H
L
H
H
H
L
H
L
H
L
L
H
L
H
L
L
H
H
L
L
H
L
H
H
L
H
H
L
H
L
L
L
H
L
H
L
H
H
L
When HU, HV ,HW become all “H” or all “L”, a circuit will detect these Hall input abnormalities and make all upper side
predriver outputs “L” and all lower side predriver output “L”.
9.
FG Output Terminal (FGO)
1FG signal that is controlled by hall signal is output from FGO terminal. In addition, because FG terminal is an open
drain terminal, use a resistor of about 10kΩ to 100kΩ pulled up to supply voltage. In that case, please be careful that
FGO voltage or current should never exceed rating.
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Function Description – continued
10. Power Supply Terminal (VCC)
(1) When IC is operated in 4.5V to 5.5V, VCC is short to VREG and connected to the power supply. In 6V to 28V,
connect a power source only to VCC.
(2) Stabilize VCC voltage by placing a bypass capacitor near the terminal, as much as possible, in case VCC voltage
might change considerably by motor BEMF and PWM switching. Increase capacitance of the capacitor as
necessary when drawing large current and motor with large BEMF. Please be careful that VCC voltage never
exceeds ratings.
(3) It is recommended to place a laminated ceramic capacitor of around 0.01µF to 0.1µF in parallel in order to
decrease the impedance of power supply broadband.
(4) VCC terminal has a clamp element for preventing ESD damage. If applying a steep pulse signal and voltage such
as it surges more than the ratings, this clamp element operates, which might be a cause of destruction. It is
effective to put a ener diode that corresponds to VCC absolute maximum ratings. Please note that IC might be
destroyed when the backward voltage is applied to VCC and GND terminals.
11. Ground Terminal (GND)
Wiring impedance from this terminal should be as low as possible to reduce noise of switching current and stabilizing
basic voltage inside the IC; and the impedance should also be the lowest potential in any operating condition. In
addition, please do pattern design to not have the common impedance as the other GND pattern
12. Predriver Output Terminal (UH, UL, VH, VL, WH, WL)
By a driving signal produced with internal logic, the driving signal to an external output power transistor is output.
Upper Gate functional voltage is VCC and Lower Gate functional voltage is 9.5V (Typ). Also when VCC=5V, Lower Gate
functional voltage is VCC-0.2V (Typ). Additionally, When driver output converts “L” to “H” or “H” to “L”, dead time
(1µs(Typ)) can be set to prevent simultaneous ON of external upper and lower FET.
13. Comparator Input Terminal for Detecting Output Current (RCL)
When operating with current limit, please be sure to connect RNF and RCL. In addition, please do not have the same
impedance as other GND patterns by using low impedance wiring, since motor drive current flows into the RCL
terminal resistor for detecting current to GND. Please design pattern considering wiring that is less influenced by noise.
Additionally, when RCL terminal is shorted to GND, large current might flow due to a lack of normal current limit
operation.
14. H Side Output Logic Switching Terminal (HLSW)
By changing HLSW, the gate logic of the upper output is changed. In HLSW=”L”, the gate logic of upper output is
inverted. In addition, HLSW terminal is pulled up to VREG through a resistance of 200kΩ (Typ) ±60kΩ.
15. Control Signal Sequence
It is recommended that input control signals DCIN, PWMB, CW terminals are turned ON after inputting VCC. If LPE
terminal is set to “H” or “M” at startup, please take note that if motor rotation cannot be detected within the set time
(edge of FG signal cannot be input), then the MLP circuit starts and motor fails to start. The order of priority is to set
control signal and IC internal signal. Please refer to the following table.
Priority of Control Signal
Priority
Input / Internal Signals
st
UVLO
nd
BRKB,CW,PWMB↓ ,DCIN
rd
TSD,MLP,HALLERR
4
th
OVLO
5
th
BRKB
th
CL
1
2
3
6
th
7
PWM,CW,HLSW,DCIN
(Note) means rising and falling edges of signal.
For signal name, please refer to state transition diagram.
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Protection Circuit
(1) Current Limit Circuit (CL Circuit)
Current limit of output (Current limit: CL) can be realized by changing the voltage of the output current with a
resistor, and then by inputting the voltage into the RCL terminal. In order to avoid error detection of current
detection comparator by RCL spike noise that occurs at output ON, mask time is set. Current detection is invalid
during mask time after RCL voltage becomes more than 0.2V (Typ). Then all lower side predriver outputs are “L”,
and they are returned automatically after the specified time (32µs (Typ)). This operation is not synchronized with
PWM signal that is input into PWMB terminal. Moreover, if it happens that the noise is longer than the 0.5µs (Typ)
internal mask time, set mask time using external low pass filter.
(2) Thermal Shutdown Circuit (TSD Circuit)
When chip temperature of driver IC rises and exceeds the set temperature (175°C (Typ)), the thermal shut down
circuit (Thermal Shut Down: TSD) activates. At this time, all the upper side predriver outputs become “L” and all
the lower side predriver outputs become “L”. In addition, the TSD circuit is designed with a hysteresis (25°C (Typ)),
therefore, when the chip temperature drops, it will return to normal working condition. However, the purpose of the
TSD circuit is to protect driver IC from a thermal breakdown, therefore, temperature of this circuit will be over
working temperature when it is started up. Thus, thermal design should have sufficient margin, avoid continuous
use and action of the circuit as a precaution.
(3) Under Voltage Lock Out Circuit (UVLO Circuit)
There is a built-in under voltage lock out circuit (Under Voltage Lock Out: UVLO circuit) used to ensure the lowest
power supply voltage for drive IC to work and to prevent error action of the IC. When VCC voltage declines to VUVL
(3.7V (Typ)), all the upper side predriver outputs become “L” and all the lower side predriver outputs become “L”.
At the same time, UVLO circuit is designed with hysteresis, so when VCC voltage reaches more than V UVH (4.15V
(Typ)), it will operate at normal working condition.
(4) Over Voltage Lock Out Circuit (OVLO Circuit)
There is a built-in over voltage lock out circuit (Over Voltage Lock Out: OVLO) used to prevent rise of VCC when
motor is decelerating. When VCC is over VOVH (31V (Typ)), a certain time (4ms (Typ)) of short brake action is
conducted. What’s more, because OVLO circuit is designed with hysteresis, when VCC is below VOVL (30V (Typ)), it
can return to normal working condition after a certain time of short brake action.
(5) Motor Lock Protection Circuit (MLP Circuit)
There is a built-in motor lock protection circuit (Motor Lock Protection: MLP). The ON/OFF of MLP circuit and
monitoring time can be set by the LPE terminal.
In monitoring Hall signals, when the LPE = “H” and Hall signal logic does not change in more than 1.1sec (Typ) or
LPE =”M” and Hall signal logic does not change in more than 2.2sec (Typ), all the upper side predriver outputs are
locked “L” and all the lower side predriver outputs are locked “L”.
There are four ways to release the latch
(a) The latch is released by Switching BRKB logic
(b) The latch is released by Switching CW logic.
(c) After PWMB = “H” or OPEN state and is detected for 15ms (Typ), latch can be released by falling edges of
subsequent PWMB.
(d) After DCIN = GND or under 1V (Typ) state is detected for 15ms (Typ), latch can be released by rising edges
of subsequent PWMB.
However, when LPE = “L”, MLP circuit does not work during short brake action (including switching rotation
direction) or TSD.
LPE terminal is pulled up to VREG through a resistance of 100kΩ (Typ) ±30 kΩ.
LPE
Monitoring Time
H or OPEN
1.1sec(Typ)±30%
M
2.2sec(Typ)±30%
L
Disable
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BD63001AMUV
Electrical Characteristic (Unless otherwise specified Ta=25°C, VCC=24V)
Parameter
Symbol
Limit
Min
Typ
Max
Unit
Conditions
[Whole]
Circuit Current
ICC
-
2.5
5.0
mA
VREG Voltage
VREG
4.5
5.0
5.5
V
IVREG = -10mA
Upper Side High Voltage
VOHH
VCC-0.6
VCC-0.2
VCC
V
IOUT = -5mA
Upper Side Low Voltage
VOHL
0
0.2
0.6
V
Lower Side High Voltage1
VOLH1
8.1
9.5
10.5
V
Lower Side High Voltage2
VOLH2
VCC-0.6
VCC-0.2
VCC
V
IOUT = 5mA
IOUT = -5mA,
No load capacitance
VCC = 5V, IOUT = 5mA
Lower Side Low Voltage
VOLL
0
0.2
0.6
V
IOUT = 5mA
IHALL
-2.0
-0.1
+2.0
µA
VHALL = 0V
Phase Input Voltage Range 1
VHALLCM
0
-
VREG-1.7
V
Phase Input Voltage Range 2
VHALLCM
0
-
VREG
V
Minimum Input Voltage
VHALLMIN
50
-
-
mVP-P
Hysteresis
ΔVHALL
15
24
40
mV
HYS Level +
VHALLHY+
5
12
22
mV
HYS Level -
VHALLHY-
-22
-12
-5
mV
[Predriver Output]
[Hall Input]
Input Bias Current
In one side bias
(When Hall IC is used)
[Input of Control : BRKB]
Input Current
IBRKB
-80
-50
-30
µA
Voltage Input H
VBRKBH
2.0
-
VREG
V
Voltage Input L
VBRKBL
0
-
0.8
V
Minimum Input Pulse Width
tPLSMIN1
1
-
-
msec
VBRKB = 0V
[Input of Control : CW]
Input Current
ICW
-8
-5
-3
µA
Voltage Input H
VCWH
2.0
-
VREG
V
Voltage Input L
VCWL
0
-
0.8
V
tPLSMIN2
1
-
-
msec
IIN
-40
-25
-15
µA
Voltage Input H
VHLWSHH
2.0
-
VREG
V
Voltage Input L
VHLSWL
0
-
0.8
V
Input Current
ILPE
-80
-50
-30
µA
Input Voltage “H”
VLPH
0.8×VREG
-
VREG
V
Input Voltage “M”
VLPM
0.4×VREG
-
0.6×VREG
V
Input Voltage “L”
VLPL
0
-
0.2×VREG
V
External R Inflow Current
IRHG
-30
-20
-10
µA
R = 20kΩ
Oscillator Frequency
fPWM
14
20
26
kHz
R = 20kΩ
IPWMB
-80
-50
-30
µA
VPWMB = 0V
Voltage Input H
VPWMBH
2.0
-
VREG
V
Voltage Input L
VPWMBL
0
-
0.8
V
Minimum Input Pulse Width
VCW = 0V
[Input of Control : HLSW]
Input Current
VHLSW = 0V
[Input of Control : LPE]
VLPE = 0V
[Input of Control : PWMOSC]
[Input of Control : PWMB]
Input Current
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BD63001AMUV
Electrical Characteristic – continued (Unless otherwise specified Ta=25°C, VCC=24V)
Parameter
Symbol
Limit
Min
Typ
Max
Unit
Conditions
[Input of Control : DCIN]
Input Bias Voltage
VBIAS
-1
0
1
µA
VDCIN = 0V
Input Voltage 1
VDCIN1
0.75
1
1.25
V
0% Output duty cycle
Input Voltage 2
VDCIN2
2.75
3
3.25
V
100% Output duty cycle
VICM
0
-
VREG-1.7
V
VFGOL
0
0.1
0.3
V
VCL
0.18
0.20
0.22
V
Release Voltage
VUVH
3.95
4.15
4.35
V
Lock Out Voltage
VUVL
3.5
3.7
3.9
V
Release Voltage
VOVL
28.0
30.0
32.0
V
Lockout Voltage
VOVH
29.0
31.0
33.0
V
Phase Input Voltage Range
[FGO]
Output Voltage L
I = 2mA
[Current Limit : RCL]
Detect Voltage
[UVLO]
[OVLO]
Typical Performance Curves
Lower Side H Voltage (Maximum) [V]
Lower side H Voltage(Maximum)[V]
12.0
11.5
11.0
10.5
10.0
9.5
9.0
1
10
100
1,000
10,000
ExternalFET
FETInput
InputCapacitance
capacitance Value
value[pF]
External
[pF]
Figure 6. Predriver Lower Side H Voltage (Maximum) vs
External FET Input Capacitance Value
(VCC=24V, PWMB: 20 kHz, 50%)
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BD63001AMUV
Timing Chart
CW Direction (CW="H" or OPEN) HLSW="H"
HU
HV
HW
UH
UL
PWM
PWM
PWM
PWM
VH
PWM
VL
PWM
PWM
PWM
WH
PWM
WL
External
FET U
PWM
External
FET V
External
FET W
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
FG OUTPUT
FGO
Figure 7. Timing Chart 1
*In HLSW=”L”, the output H/L of UH, VH, WH becomes the reverse.
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BD63001AMUV
Timing Chart – continued
CCW Direction (CW="L") HLSW="H"
HU
HV
HW
UH
PWM
UL
PWM
PWM
PWM
VH
VL
PW
M
PWM
PWM
PW
M
PWM
WH
WL
PWM
External
FET U
PWM
PWM
External PW
FET V M
External
FET W
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PW
M
PWM
PWM
PWM
FG OUTPUT
FGO
Figure 8. Timing Chart 2
*In HLSW=”L”, the output H/L of UH, VH, WH becomes the reverse.
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BD63001AMUV
State Transition Diagram
CW
BRKB
DIR change
Short brake
UH/VH/WH : H
UL/VL/WL : L
fHALL>40Hz
UH/VH/WH : L
UL/VL/WL : L
(MLP=RESET)
(MLP=RESET)
fHALL<40Hz
fHALL<40Hz and BRK
BRK
BRK
TSD
DIR
MLP
RESET
TSD
LPE
Short brake
UH/VH/WH : H
UL/VL/WL : L
after 4ms
OVLO
Hall edge undetected
MLP timer
RUN
Detect hall edge
Hall error
UH/VH/WH : L
UL/VL/WL : L
Hall error
MLP over time
DIR change
+
BRK
+
PWMB fall edge
after PWMB=H
over 15ms
UVLO
after 32us
UVLO
Over
Current
UH/VH/WH : L
UL/VL/WL : L
with latch
UVLO
UH/VH/WH : L
UL/VL/WL : L
UL/VL/WL : L
(MLP=RESET)
State transition
Command signal
Figure 9. State Transition Diagram
*In HLSW=”L”, the output H/L of UH, VH, WH become the reverse.
Legend:
DIR: motor rotational direction
MLP: motor lock protection
State transition
fHALL: hall signal frequency
Hall error: HU=HV=HW
&: logical “AND”
+: logical “OR”
(Note) all values are typical
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BD63001AMUV
I/O Equivalent Circuits
VREG
VREG
VREG
100kΩ
200kΩ
10kΩ
DCIN
10kΩ
PWMB
BRKB
10kΩ
HLSW
VCC
VREG
VREG
1000kΩ
VREG
10kΩ
100kΩ
10kΩ
10kΩ
CW
LPE
145kΩ
10kΩ
50kΩ
VREG
VREG
HUP
HUN
HVP
HVN
HWP
HWN
FGO
5Ω
PWMOSC
2kΩ
Internal
Reg
VCC
10kΩ
VREG
UH
VH
WH
UL
VL
WL
30Ω
RCL
2kΩ
1000kΩ
Figure 10. I/O Equivalence Circuits
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BD63001AMUV
Attention for Operation
1.
Precaution when Current is Pulled from VREG
When current-feed is performed in HALL from VREG, please be careful about the temperature. When the temperature
greatly increases, high current flows to HALL, please consider the following circuitry.
VCC
VCC
VREG
HU
HV
HW
HU
HV
HW
Figure 11. HALL Supply Voltage Reference
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BD63001AMUV
Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at
all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic
capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the maximum junction temperature rating be exceeded the rise in temperature of the chip may
result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the
board size and copper area to prevent exceeding the maximum junction temperature rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately
obtained. The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may
flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power
supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring,
and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment)
and unintentional solder bridge deposited in between pins during assembly to name a few.
11. Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
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BD63001AMUV
Operational Notes – continued
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Resistor
Transistor (NPN)
Pin A
Pin B
C
E
Pin A
N
P+
P
N
N
P+
N
Pin B
B
Parasitic
Elements
N
P+
N P
N
P+
B
N
C
E
Parasitic
Elements
P Substrate
P Substrate
GND
GND
Parasitic
Elements
GND
Parasitic
Elements
GND
N Region
close-by
Figure 12. Example of monolithic IC structure
13. Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all
within the Area of Safe Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s maximum junction temperature rating. If however the rating is exceeded for a continued period, the
junction temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. The IC should
be powered down and turned ON again to resume normal operation because the TSD circuit keeps the outputs at the
OFF state even if the TJ falls below the TSD threshold.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
16. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
17. Disturbance light
In a device where a portion of silicon is exposed to light such as in a WL-CSP, IC characteristics may be affected due
to photoelectric effect. For this reason, it is recommended to come up with countermeasures that will prevent the chip
from being exposed to light.
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BD63001AMUV
Ordering Information
B
D
6
3
0
0
1
A
M
U
V
-
Package
MUV: VQFN024V4040
Part Number
E2
Packaging and forming specification
E2: Embossed tape and reel
Marking Diagram
VQFN024V4040 (TOP VIEW)
Part Number Marking
63001
LOT Number
1PIN MARK
Part Number Marking
63001
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Package
Orderable Part Number
VQFN024V4040
20/22
BD63001AMUV-E2
TSZ02201-0P1P0B001390-1-2
30.May.2016 Rev.002
BD63001AMUV
Physical Dimension, Tape and Reel Information
Package Name
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BD63001AMUV
Revision History
Date
Revision
23.Mar.2016
001
30.May.2016
002
Changes
New Release
P6
Notation change of Thermal resistance
“Footprints and Traces”
2
74.2mm (Square)
⇒
74.2mm x 74.2mm
P18
Thermal Consideration
Pd ⇒ maximum junction temperature
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Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation depending on ambient temperature. When used in sealed area, confirm that it is the use in
the range that does not exceed the maximum junction temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must
be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products,
please consult with the ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
A two-dimensional barcode printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since concerned goods might be fallen under listed items of export control prescribed by Foreign exchange and Foreign
trade act, please consult with ROHM in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data.
2.
ROHM shall not have any obligations where the claims, actions or demands arising from the combination of the
Products with other articles such as components, circuits, systems or external equipment (including software).
3.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the Products or the information contained in this document. Provided, however, that ROHM
will not assert its intellectual property rights or other rights against you or your customers to the extent necessary to
manufacture or sell products containing the Products, subject to the terms and conditions herein.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice-PGA-E
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.003
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2015 ROHM Co., Ltd. All rights reserved.
Rev.001