08230

REVISIONS
LTR
DESCRIPTION
DATE (YR-MO-DA)
APPROVED
09-10-20
C. SAFFLE
Add a footnote and make clarification changes to SET as specified under
A
1.5 and Table IB. Add “TC = +25C” to SEL, SEB, and SET as specified
under 1.5 - ro
REV
SHEET
REV
A
A
A
A
A
A
A
A
A
A
SHEET
15
16
17
18
19
20
21
22
23
24
REV STATUS
REV
A
A
A
A
A
A
A
A
A
A
A
A
A
A
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
RICK OFFICER
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
CHECKED BY
RAJESH PITHADIA
APPROVED BY
JOSEPH D. RODENBECK
DRAWING APPROVAL DATE
09-04-01
REVISION LEVEL
A
MICROCIRCUIT, DIGITAL-LINEAR, BiCMOS,
RADIATION HARDENED, NON-INVERTING QUAD
DRIVER, MONOLITHIC SILICON
SIZE
CAGE CODE
A
67268
SHEET
DSCC FORM 2233
APR 97
1 OF
5962-08230
24
5962-E508-09
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and
M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part
or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
D
08230
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
01
V
X
C
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
/
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01
Generic number
ISL7457SRH
Circuit function
BiCMOS, radiation hardened, non-inverting quad driver
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device requirements documentation
Device class
M
Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Q or V
Certification and qualification to MIL-PRF-38535
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
X
Descriptive designator
Terminals
CDFP4-F16
16
Package style
Flat pack
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
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APR 97
SIZE
5962-08230
A
REVISION LEVEL
A
SHEET
2
1.3 Absolute maximum ratings. 1/
Supply voltage ( +VS to -VS ) .............................................................................. +18 V
Input voltage ....................................................................................................... -VS - 0.3 V, +VS + 0.3 V
Input current ........................................................................................................ 10 mA
Continuous output current ................................................................................... 100 mA
Power dissipation (PD) :
TA = +25C ...................................................................................................... 1.26 W 2/
TA = +125C .................................................................................................... 0.25 W 3/
TC = +25C ...................................................................................................... 8.33 W 4/
TC = +125C .................................................................................................... 1.66 W 5/
Operating junction temperature (TJ) ................................................................... +150C
Lead temperature (soldering, 10 seconds) .......................................................... +260C
Storage temperature range ................................................................................. -65C to +150C
Thermal resistance, junction-to-case (JC) ......................................................... 15C/W
Thermal resistance, junction-to-ambient (JA) .................................................... 99C/W 6/
1.4 Recommended operating conditions.
Supply voltage ( +VS to -VS ) .............................................................................. +5 V 10% or +15 V 10%
Ambient operating temperature range (TA) ......................................................... -55C to +125C
1.5 Radiation features.
Maximum total dose available (dose rate = 50 – 300 rads(Si)/s) ........................ 10 krads(Si) 7/
Single event phenomenon (SEP) effective linear energy threshold (LET):
2
Single event latchup (SEL) (TC = +25C) ........................................................  40 MeV/mg/cm 8/
2
Single event burnout (SEB) (TC = +25C) .......................................................  40 MeV/mg/cm
2
Single event transient (SET) (TC = +25C) (VOUT  15 V, t  500 ns) ........ = 40 MeV/mg/cm
8/
8/ 9/
______
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ Derate linearly at 10.1 mW/C above TA = +25C.
3/
Derate linearly at 10.1 mW/C above TA = +125C.
4/
Derate linearly at 66.7 mW/C above TC = +25C.
5/
Derate linearly at 66.7 mW/C above TC = +125C.
6/ JA is measured in free air with the component mounted on a high effective thermal conductivity test board.
7/ These parts may be dose rate sensitive in a space environment and may demonstrate enhanced low dose rate effects.
Radiation end point limits for the noted parameters are guaranteed only for the conditions specified in MIL-STD-883,
method 1019, condition A.
8/ Limits are guaranteed by design or process but, not production tested unless specified by the customer through the
purchase order or contract.
2
9/ SETs of 15 V magnitude and 500 ns duration were experienced for LET = 40 MeV/mg/cm . SET behavior for LETs other
2
than 40 MeV/mg/cm were not investigated.
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APR 97
SIZE
5962-08230
A
REVISION LEVEL
A
SHEET
3
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation or contract.
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)
ASTM F1192 – Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion
Irradiation of Semiconductor Devices.
(Copies of this document is available online at http://www.astm.org/ or from ASTM International, P.O. Box C700,
100 Bar Harbor Drive, West Conshohocken, PA 19428-2959).
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Block diagram. The block diagram shall be as specified on figure 2.
3.2.4 Timing diagram. The timing diagram shall be as specified on figure 3.
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APR 97
SIZE
5962-08230
A
REVISION LEVEL
A
SHEET
4
3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as specified on figure 4.
3.2.6 Truth table. The truth table shall be as specified on figure 5.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the
full ambient operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table IA.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN is not feasible due to space limitations, the manufacturer has the
option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked.
Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in
accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this
drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and
herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2
herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made
available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 91 (see MIL-PRF-38535, appendix A).
STANDARD
MICROCIRCUIT DRAWING
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DSCC FORM 2234
APR 97
SIZE
5962-08230
A
REVISION LEVEL
A
SHEET
5
TABLE IA. Electrical performance characteristics.
Test
Symbol
Conditions 1/ 2/ 3/
-55C  TA +125C
Group A
subgroups
+VS = VH = +5 V 10%
Device
type
unless otherwise specified
Limits
Min
Unit
Max
Input section
Logic “1” input voltage
1,2,3
VIH
M, D
Logic “1” input current
IIH
1,2,3
INx = +VS
1,2,3
VIL
IIL
01
-10
10
-10
10
01
0.8
1
INx = 0 V
1,2,3
M, D
V
2.0
1
M, D
Logic “0” input current
2.0
1
M, D
Logic “0” input voltage
01
A
V
0.6
01
1
-10
10
-10
10
A
Output section
ON resistance VH to OUTx
ROH
INx = +VS
ON resistance VL to OUTx
ROL
+ILEAK
Negative output leakage
current
-ILEAK
M, D
4,5,6,
M, D
1,2,3
M, D
1,2,3
M, D

12
01
12

7
01
1
INx = +VS, OUTx = -VS
OE = 0 V
15
4
INx = +VS, OUTx = +VS
OE = 0 V
01
4
IOUTx = +100 mA
INx = 0 V
Positive output leakage
current
4,5,6,
IOUTx = -100 mA,
01
10
A
1.2
mA
A
-10
1
-50
Power supply section
+VS supply current
+IS
1,2,3
INx = 0 V and +VS
M, D
-VS supply current
-IS
IH
1,2,3
INx = 0 V and +VS
1,2,3
INx = 0 V and +VS
IL
01
-1.5
1,2,3
M, D
mA
-5
01
1
INx = 0 V and +VS
mA
5
1
M, D
VL supply current
1.5
1
M, D
VH supply current
01
A
2.2
mA
-10
A
-2.2
mA
01
1
10
See footnotes at end of table.
STANDARD
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A
REVISION LEVEL
A
SHEET
6
TABLE IA. Electrical performance characteristics – Continued.
Test
Symbol
Conditions 1/ 2/ 3/
-55C  TA +125C
Group A
subgroups
+VS = VH = +5 V 10%
Device
type
unless otherwise specified
Limits
Min
Unit
Max
Switching characteristics section
Rise time
tR
INx = 0 V to 4.5 V step,
CL = 1 nF
Fall time
tF
tRF
M, D
+tD
M, D
Turn off delay time
-tD
+tD, -tD mismatch
tDD
tENABLE
01
5
01
38
9
INx = 4.5 V to 0 V step,
01
40
9
01
4
9
ns
ns
12
9,10,11
OE = 0 V to 4.5 V step,
ns
40
9,10,11
CL = 1 nF
ns
30
9,10,11
M, D
ns
5
9,10,11
M, D
Enable delay time
36
9
M, D
ns
30
9,10,11
INx = 0 V to 4.5 V step,
CL = 1 nF
01
9
CL = 1 nF
CL = 1 nF
47
40
9,10,11
M, D
Turn on delay time
01
9
INx = 4.5 V to 0 V step,
CL = 1 nF
tR, tF mismatch
9,10,11
01
68
ns
INx = +VS, RL = 1 k
M, D
Disable delay time
tDISABLE
9
35
9,10,11
OE = 4.5 V to 0 V step,
01
70
ns
INx = +VS, RL = 1 k
M, D
9
50
See footnotes at end of table.
STANDARD
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REVISION LEVEL
A
SHEET
7
TABLE IA. Electrical performance characteristics – Continued.
Test
Symbol
Conditions 1/ 2/ 3/
-55C  TA +125C
Group A
subgroups
+VS = VH = +15 V 10%
Device
type
unless otherwise specified
Limits
Min
Unit
Max
Input section
Logic “1” input voltage
1,2,3
VIH
M, D
Logic “1” input current
IIH
1,2,3
INx = +VS
1,2,3
VIL
IIL
01
-10
10
-10
10
01
0.8
1
INx = 0 V
1,2,3
M, D
V
2.4
1
M, D
Logic “0” input current
2.4
1
M, D
Logic “0” input voltage
01
A
V
0.6
01
1
-10
10
-10
10
A
Output section
ON resistance VH to OUTx
ROH
INx = +VS
ON resistance VL to OUTx
ROL
+ILEAK
Negative output leakage
current
-ILEAK
M, D
4,5,6,
M, D
1,2,3
M, D
OE = 0 V
5
01
1,2,3
M, D

6
5
01
1
INx = +VS, OUTx = -VS,

6
4
INx = +VS, OUTx = +VS,
OE = 0 V
01
4
IOUTx = +100 mA,
INx = 0 V
Positive output leakage
current
4,5,6,
IOUTx = -100 mA,
01
10
A
1.2
mA
A
-10
1
-50
Power supply section
+VS supply current
+IS
1,2,3
INx = 0 V and +VS
M, D
-VS supply current
-IS
IH
1,2,3
INx = 0 V and +VS
1,2,3
INx = 0 V and +VS
IL
01
-5
1,2,3
M, D
mA
-5
01
1
INx = 0 V and +VS
mA
5
1
M, D
VL supply current
5
1
M, D
VH supply current
01
A
2.4
mA
-10
A
-2.4
mA
01
1
13
See footnotes at end of table.
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REVISION LEVEL
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SHEET
8
TABLE IA. Electrical performance characteristics – Continued.
Test
Symbol
Conditions 1/ 2/ 3/
-55C  TA +125C
Group A
subgroups
+VS = VH = +15 V 10%
Device
type
unless otherwise specified
Limits
Min
Unit
Max
Switching characteristics section
Rise time
tR
INx = 0 V to 5 V step,
CL = 1 nF
Fall time
tF
tRF
M, D
+tD
M, D
Turn off delay time
-tD
+tD, -tD mismatch
tDD
tENABLE
01
3
01
30
9
INx = 5 V to 0 V step,
01
24
9
01
5
9
ns
ns
5
9,10,11
OE = 0 V to 5 V step,
ns
20
9,10,11
CL = 1 nF
ns
20
9,10,11
M, D
ns
3
9,10,11
M, D
Enable delay time
20
9
M, D
ns
20
9,10,11
INx = 0 V to 5 V step,
CL = 1 nF
01
9
CL = 1 nF
CL = 1 nF
20
20
9,10,11
M, D
Turn on delay time
01
9
INx = 5 V to 0 V step,
CL = 1 nF
tR, tF mismatch
9,10,11
01
30
ns
INx = +VS, RL = 1 k
M, D
Disable delay time
tDISABLE
9
25
9,10,11
OE = 5 V to 0 V step,
01
70
ns
INx = +VS, RL = 1 k
M, D
9
65
1/
Unless otherwise specified, -VS = VL = 0 V, and OE = +VS.
2/
RHA devices supplied to this drawing have been characterized through all levels M and D of irradiation.
However, this device is tested only at the “D” level. Pre and Post irradiation values are identical unless otherwise
specified in Table IA. When performing post irradiation electrical measurements for any RHA level, TA = +25C.
3/
These parts may be dose rate sensitive in a space environment and may demonstrate enhanced low dose rate effects.
Radiation end point limits for the noted parameters are guaranteed only for the conditions specified in MIL-STD-883,
method 1019, condition A.
STANDARD
MICROCIRCUIT DRAWING
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REVISION LEVEL
A
SHEET
9
Device type
01
Case outline
X
Terminal
number
Terminal
symbol
1
IN A
Input channel A
2
OE
Output enable
3
IN B
Input channel B
4
VL
5
GND
6
NC
No connection
7
IN C
Input channel C
8
IN D
Input channel D
9
-VS
Negative supply voltage
10
OUT D
Output channel D
11
OUT C
Output channel C
12
VH
High voltage input pin
13
NC
No connection
14
OUT B
Output channel B
15
OUT A
Output channel A
16
+VS
Description
Low voltage input pin
Input logic ground
Positive supply voltage
FIGURE 1. Terminal connections.
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FIGURE 2. Block diagram.
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FIGURE 3. Timing waveforms.
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VS = 15 V
C1 = 100 nF
R1 = 15 k
R2 = 10 k
FIGURE 4. Radiation exposure circuit.
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INx =
OE =
OUTx
0
0
High - Z
1
0
High - Z
0
1
VL
1
1
VH
Undefined
0
High - Z
Undefined
1
Undefined
0 or 1
Undefined
Undefined
FIGURE 5. Truth table.
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TABLE IB. SEP test limits. 1/ 2/
Device type
SEP
Temperature (TC)
VCC
Effective linear energy
transfer (LET)
01
SEL
+25C
15 V
 40 MeV-cm /mg
SEB
+25C
15 V
 40 MeV-cm /mg
SET (VOUT  15 V,
t  500 ns)
+25C
15 V
= 40 MeV-cm /mg 3/
2
2
2
1/ For SEP test conditions, see 4.4.4.2 herein.
2/ Technology characterization and model verification supplemented by in-line data may be used in lieu of
end of line testing. Test plan must be approved by the technical review board and qualifying activity.
2
3/ SETs of 15 V magnitude and 500 ns duration were experienced for LET = 40 MeV/mg/cm .
2
SET behavior for LETs other than 40 MeV/mg/cm were not investigated.
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted
on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in
accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a.
Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015.
(2) TA = +125C, minimum.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
4.2.2 Additional criteria for device classes Q and V.
a.
The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b.
Interim and final electrical test parameters shall be as specified in table IIA herein.
c.
Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-08230
A
REVISION LEVEL
A
SHEET
15
TABLE IIA. Electrical test requirements.
Test requirements
Interim electrical
parameters (see 4.2)
Final electrical
parameters (see 4.2)
Group A test
requirements (see 4.4)
Group C end-point electrical
parameters (see 4.4)
Group D end-point electrical
parameters (see 4.4)
Group E end-point electrical
parameters (see 4.4)
1/
2/
Subgroups
(in accordance with
MIL-PRF-38535, table III)
Subgroups
(in accordance with
MIL-STD-883,
method 5005, table I)
Device
class M
---
Device
class Q
---
---
Device
class V
1,4,9
---
1,2,3,4,5, 1/
6,9,10,11
1,2,3,4,5,6,
9,10,11
1,2,3,4,5,6,
9,10,11
1,4,9
1,2,3,4, 1/ 2/
5,6,9,10,11
1,2,3,4,5,6,
9,10,11
1,2,3,4,5, 2/
6,9,10,11
1,4,9
---
1,4,9
1,4,9
-----
PDA applies to subgroup 1.
Delta limits as specified in table IIB shall be required where specified, and the delta limits
shall be completed with reference to the zero hour electrical parameters (see table IA).
TABLE IIB. Burn-in and operating life test delta parameters. TA = +25C. 1/
Parameters
Symbol
Limits
Min
Delta limits
Units
Max
Min
Max
+1.5
-0.150
+0.150
mA
-0.150
+0.150
mA
-0.500
+0.500
mA
-0.500
+0.500
mA
Supply current, +VS = 5 V
+IS
Supply current, -VS = 0 V
-IS
Supply current, +VS = 15 V
+IS
Supply current, -VS = 0 V
-IS
-5
Logic “1” input current
IIH
-10
+10
-0.100
+0.100
A
Logic “0” input current
IIL
-10
+10
-0.100
+0.100
A
-1.5
+5
1/ If device is tested at or below delta limits, no deltas are required.
Deltas are performed at room temperature.
STANDARD
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APR 97
SIZE
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A
REVISION LEVEL
A
SHEET
16
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for
device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed
for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
4.4.1 Group A inspection.
a.
Tests shall be as specified in table IIA herein.
b.
Subgroups 7 and 8 in table IA, method 5005 of MIL-STD-883 shall be omitted.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a.
Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of
MIL-STD-883.
b.
TA = +125C, minimum.
c.
Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The
test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of
MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein).
a.
End-point electrical parameters shall be as specified in table IIA herein.
b.
For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device
classes must meet the postirradiation end-point electrical parameter limits as defined in table I at
TA = +25C 5C, after exposure, to the subgroups specified in table IIA herein.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019, condition A and as specified herein.
4.4.4.1.1 Accelerated annealing test. Accelerated annealing tests shall be performed on all devices requiring a RHA level
greater than 5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall
be the pre-irradiation end-point electrical parameter limit at 25C ±5C. Testing shall be performed at initial qualification and
after any design or process changes which may affect the RHA response of the device.
STANDARD
MICROCIRCUIT DRAWING
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APR 97
SIZE
5962-08230
A
REVISION LEVEL
A
SHEET
17
4.4.4.2 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be performed on
class V devices. SEP testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as
approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or
latchup characteristics. Test four devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP
testing. The recommended test conditions for SEP are as follows:
a.
The ion beam angle of incidence shall be between normal to the die surface and 60 to the normal, inclusive
(i.e. 0  angle  60). No shadowing of the ion beam due to fixturing or package related affects is allowed.
b.
The fluence shall be  100 errors or  10 ions/cm .
c.
The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d.
The particle range shall be  35 micron in silicon.
e.
The test temperature shall be +125C for the latchup measurements.
f.
Bias conditions shall be VCC = 15 V for the latchup measurements.
g.
For SEL, SEB, and SET test limits, see Table IB herein.
7
2
5
2
2
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q and V or MIL-PRF-38535, appendix A for device class M.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system
application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users
and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering
microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone
(614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
STANDARD
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DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
A
SHEET
18
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to
this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103.
The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been
submitted to and accepted by DSCC-VA.
6.7 Additional information. When applicable, a copy of the following additional data shall be maintained and available from
the device manufacturer:
a. RHA upset levels.
b. Test conditions (SEP).
c. Number of transients (SEP).
d. Occurrence of latchup (SEL).
STANDARD
MICROCIRCUIT DRAWING
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COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
A
SHEET
19
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-08230
A.1 SCOPE
A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified
Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers
approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using
chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of
military high reliability (device class Q) and space application (device class V) are reflected in the Part or Identification Number
(PIN). When available, a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN.
A.1.2 PIN. The PIN is as shown in the following example:
5962
D
Federal
stock class
designator
\
RHA
designator
(see A.1.2.1)
08230
01
V
9
A
Device
type
(see A.1.2.2)
Device
class
designator
(see A.1.2.3)
Die
code
Die
details
(see A.1.2.4)
/
\/
Drawing number
A.1.2.1 RHA designator. Device classes Q and V RHA identified die meet the MIL-PRF-38535 specified RHA levels. A dash
(-) indicates a non-RHA die.
A.1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
Circuit function
01
ISL7457SRH
BiCMOS, radiation hardened, non-inverting quad driver
A.1.2.3 Device class designator.
Device class
Q or V
STANDARD
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APR 97
Device requirements documentation
Certification and qualification to the die requirements of MIL-PRF-38535
SIZE
5962-08230
A
REVISION LEVEL
A
SHEET
20
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-08230
A.1.2.4 Die details. The die details designation is a unique letter which designates the die's physical dimensions, bonding
pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product
and variant supplied to this appendix.
A.1.2.4.1 Die physical dimensions.
Die type
Figure number
01
A-1
A.1.2.4.2 Die bonding pad locations and electrical functions.
Die type
Figure number
01
A-1
A.1.2.4.3 Interface materials.
Die type
Figure number
01
A-1
A.1.2.4.4 Assembly related information.
Die type
Figure number
01
A-1
A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details.
A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
A
SHEET
21
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-08230
A.2 APPLICABLE DOCUMENTS.
A.2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a
part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in
the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARD
MIL-STD-883 - Test Method Standard Microcircuits.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the
text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
A.3 REQUIREMENTS
A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer’s Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein.
A.3.2 Design, construction and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein and the manufacturer’s QM plan for device classes Q and V.
A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figure A-1.
A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as
specified in A.1.2.4.2 and on figure A-1.
A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figure A-1.
A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and on figure A-1.
A.3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.4 herein.
A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and post-irradiation parameter limits are as specified in table IA of the body of this
document.
A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing
sufficient to make the packaged die capable of meeting the electrical performance requirements in table IA.
A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a
customer, shall be identified with the wafer lot number, the certification mark, the manufacturer’s identification and the PIN listed
in A.1.2 herein. The certification mark shall be a “QML” or “Q” as required by MIL-PRF-38535.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
5962-08230
A
REVISION LEVEL
A
SHEET
22
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-08230
A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a
QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of
compliance submitted to DSCC-VA prior to listing as an approved source of supply for this appendix shall affirm that the
manufacturer’s product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein.
A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535
shall be provided with each lot of microcircuit die delivered to this drawing.
A.4 VERIFICATION
A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance
with MIL-PRF-38535 or as modified in the device manufacturer’s Quality Management (QM) plan. The modifications in the QM
plan shall not affect the form, fit, or function as described herein.
A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the
manufacturer’s QM plan. As a minimum, it shall consist of:
a.
Wafer lot acceptance for class V product using the criteria defined in MIL-STD-883, method 5007.
b.
100% wafer probe (see paragraph A.3.4 herein).
c.
100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883, method 2010 or the
alternate procedures allowed in MIL-STD-883, method 5004.
A.4.3 Conformance inspection.
A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see
A.3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of
packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified in paragraphs 4.4.4,
4.4.4.1, and 4.4.4.1.1 herein.
A.5 DIE CARRIER
A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer’s QM plan or
as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and
electrostatic protection.
A.6 NOTES
A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with
MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications, and
logistics purposes.
A.6.2 Comments. Comments on this appendix should be directed to DSCC-VA, Columbus, Ohio, 43218-3990 or telephone
(614)-692-0547.
A.6.3 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed within QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DSCC-VA and have
agreed to this drawing.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
A
SHEET
23
APPENDIX A
APPENDIX A FORMS A PART OF SMD 5962-08230
INA
VS +
OE
OUTA
INB
OUTB
VL
VH
GND
OUT C
DELAY
OUTD
INC
IND
VS -
Die bonding pad locations and electrical functions
Die physical dimensions.
Die size: 2390 m x 2445 m
Die thickness: 13.0 0.5 mils
Interface materials.
Top metallization: AlCuSi (1% / 0.5%) 1.0 m 0.1 m
Backside metallization: None
Glassivation.
Type: PSG and silicon nitride
Thickness: 0.5 m 0.05 m to 0.7 m 0.05 m
Substrate: Silicon, junction isolated
Assembly related information.
Substrate potential: -VS
Special assembly instructions: The DELAY pad is not bonded
FIGURE A-1. Die bonding pad locations and electrical functions.
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
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A
REVISION LEVEL
A
SHEET
24
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 09-10-20
Approved sources of supply for SMD 5962-08230 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded
by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current
sources of supply at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962D0823001QXC
34371
ISL7457SRHQF
5962D0823001VXC
34371
ISL7457SRHVF
5962D0823001V9A
34371
ISL7457SRHVX
1/ The lead finish shown for each PIN representing
a hermetic package is the most readily available
from the manufacturer listed for that part. If the
desired lead finish is not listed contact the vendor
to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
Vendor CAGE
number
34371
Vendor name
and address
Intersil Corporation
1001 Murphy Ranch Road
Milpitas, CA 95035-6803
Point of contact: 1650 Robert J. Conlan Blvd.
Palm Bay, FL 32905
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.