TSOP752..W, TSOP754..W www.vishay.com Vishay Semiconductors IR Receiver Modules for Remote Control Systems FEATURES • Very low supply current • Photo detector and preamplifier in one package • Internal filter for PCM frequency • Supply voltage: 2.5 V to 5.5 V • Improved immunity against ambient light • Capable of side or top view • Low profile 2.35 mm • Insensitive to supply voltage ripple and noise • Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 DESCRIPTION 1, 4 = GND, 2 = VS, 3 = OUT The TSOP75...W series are miniaturized SMD IR receiver modules for infrared remote control systems. Two PIN diodes and a preamplifier are assembled on a leadframe, the epoxy package contains an IR filter. ORDERING CODE The demodulated output signal can be directly connected to a microprocessor for decoding. MECHANICAL DATA Pinning: Taping: The TSOP754..W series devices are optimized to suppress almost all spurious pulses from energy saving lamps like CFLs. The AGC4 used in the TSOP754..W may suppress some data signals. The TSOP752..W series are provided primarily for compatibility with old AGC2 designs. New designs should prefer the TSOP754..W series containing the newer AGC4. TSOP75...WTT - top view taped TSOP75...WTR - side view taped These components have not been qualified according to automotive specifications. PARTS TABLE AGC LEGACY, FOR LONG BURST REMOTE CONTROLS (AGC2) RECOMMENDED FOR LONG BURST CODES (AGC4) TSOP75230W TSOP75430W 30 kHz Carrier frequency 33 kHz TSOP75233W TSOP75433W 36 kHz TSOP75236W TSOP75436W (1)(2)(3) 38 kHz TSOP75238W TSOP75438W (4)(5) 40 kHz TSOP75240W TSOP75440W 56 kHz TSOP75256W TSOP75456W (6)(7) Package Heimdall no lens Pinning 1, 4 = GND, 2 = VS, 3 = OUT Dimensions (mm) 6.8 W x 3.0 H x 2.35 D Mounting SMD Application Best remote control code Rev. 1.5, 11-Nov-15 Remote control (1) RC-5 (2) RC-6 (3) Panasonic 1 (4) NEC (5) Sharp (6) r-step (7) Thomson RCA Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP752..W, TSOP754..W www.vishay.com Vishay Semiconductors BLOCK DIAGRAM APPLICATION CIRCUIT 17170_5 2 IR receiver VS 3 Input Band pass AGC OUT Demodulator VO GND GND Control circuit µC OUT 1, 4 PIN + VS C1 Circuit VS 30 k Ω R1 Transmitter with TSALxxxx GND R1 and C1 are recommended for protection against EOS. Components should be in the range of 33 Ω < R1 < 1 kΩ, C1 > 0.1 µF. 20445-1 ABSOLUTE MAXIMUM RATINGS PARAMETER Supply voltage Supply current Output voltage Output current Junction temperature Storage temperature range Operating temperature range Power consumption TEST CONDITION SYMBOL VS IS VO IO Tj Tstg Tamb Ptot Tamb ≤ 85 °C VALUE -0.3 to +6 3 -0.3 to (VS + 0.3) 5 100 -25 to +85 -25 to +85 10 UNIT V mA V mA °C °C °C mW Note • Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect the device reliability. ELECTRICAL AND OPTICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) PARAMETER Supply voltage TEST CONDITION Ev = 0, VS = 3.3 V Ev = 40 klx, sunlight Ev = 0, test signal see fig. 1, IR diode TSAL6200, IF = 200 mA IOSL = 0.5 mA, Ee = 0.7 mW/m2, test signal see fig. 1 Pulse width tolerance: tpi - 5/fo < tpo < tpi + 6/fo, test signal see fig. 1 tpi - 5/fo < tpo < tpi + 6/fo, test signal see fig. 1 Angle of half transmission distance Supply current Transmission distance Output voltage low Minimum irradiance Maximum irradiance Directivity SYMBOL VS ISD ISH MIN. 2.5 0.27 - TYP. 0.35 0.45 MAX. 5.5 0.45 - UNIT V mA mA d - 30 - m VOSL - - 100 mV Ee min. - 0.25 0.5 mW/m2 Ee max. ϕ1/2 30 - ± 75 - W/m2 deg TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) Optical Test Signal 1 (IR diode TSAL6200, IF = 0.4 A, 30 pulses, f = f0, t = 10 ms) tpo - Output Pulse Width (ms) Ee t tpi * * tpi VO T 10/f0 is recommended for optimal function Output Signal 1) VOH 2) 16110 7/f0 < td < 15/f0 tpi - 5/f0 < tpo < tpi + 6/f0 Output Pulse Width 0.9 0.8 Input Burst Length 0.7 0.6 0.5 0.4 0.3 λ = 950 nm, Optical Test Signal, Fig.1 0.2 0.1 0 0.1 VOL td 1) tpo 2) t 21583 Fig. 1 - Output Active Low Rev. 1.5, 11-Nov-15 1 10 102 103 104 105 Ee - Irradiance (mW/m²) Fig. 2 - Pulse Length and Sensitivity in Dark Ambient 2 Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP752..W, TSOP754..W www.vishay.com Optical Test Signal 600 µs Ee min. - Threshold Irradiance (mW/m²) Ee Vishay Semiconductors t 600 µs t = 60 ms 94 8134 Output Signal, (see fig. 4) VO VOH VOL Correlation with Ambient Light Sources: 3.5 10 W/m² = 1.4 kLx (Std. illum. A, T = 2855 K) 10 W/m² = 8.2 kLx (Daylight, T = 5900 K) 3 2.5 2 1 0.5 0 0.01 0.6 Toff 0.4 0.3 λ = 950 nm, Optical Test Signal, Fig. 3 0.1 0 0.1 21584 1 10 102 103 104 105 Ee - Irradiance (mW/m²) 100 2.5 f = f0 f = 30 kHz f = 10 kHz f = 100 Hz 2.0 1.5 1.0 0.5 0 1 10 100 1000 ΔVS RMS - AC Voltage on DC Supply Voltage (mV) Fig. 4 - Output Pulse Diagram Fig. 7 - Sensitivity vs. Supply Voltage Disturbances 1.2 1 0.9 1.0 Max. Envelope Duty Cycle Ee min./Ee - Relative Responsivity 10 3.0 Ee min. - Threshold Irradiance (mW/m2) Ton, Toff - Output Pulse Width (ms) Ton 0.2 1 Fig. 6 - Sensitivity in Bright Ambient 0.8 0.5 0.1 Ee - Ambient DC Irradiance (W/m²) 21585 Fig. 3 - Output Function 0.7 Wavelength of Ambient Illumination: λ = 950 nm 1.5 t t off t on 4 0.8 0.6 0.4 f = f0 ± 5 % Δf(3 dB) = f0/10 0.2 0.8 0.7 0.6 0.5 TSOP752..W 0.4 0.3 TSOP754..W 0.2 0.1 0.0 f = 38 kHz, Ee = 2 mW/m² 0 0.7 16925 0.9 1.1 0 1.3 21588 f/f0 - Relative Frequency Fig. 5 - Frequency Dependence of Responsivity Rev. 1.5, 11-Nov-15 20 40 60 80 100 120 Burst Length (number of cycles/burst) Fig. 8 - Max. Envelope Duty Cycle vs. Burst Length 3 Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP752..W, TSOP754..W Vishay Semiconductors 0.6 0° d rel - Relative Transmission Distance Ee min. - Threshold Irradiance (mW/m2) www.vishay.com 0.5 0.4 0.3 0.2 0.1 0 -30 -10 10 30 50 70 40° 0.9 50° 0.8 60° 70° 0.7 80° 0.6 21580 0.4 0.2 0 Fig. 12 - Vertical Directivity 0.60 1.0 0.9 Ee min. - Sensitivity (mW/m2) S (λ) rel - Relative Spectral Sensitivity 30° 1.0 Fig. 9 - Sensitivity vs. Ambient Temperature 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 750 0.50 0.40 0.30 0.20 0.10 0.00 800 850 900 950 1000 1050 1100 1150 1 λ- Wavelength (nm) 21425 0° 10° 2 3 4 5 VS - Supply Voltage (V) Fig. 10 - Relative Spectral Sensitivity vs. Wavelength d rel - Relative Transmission Distance 20° 90 Tamb - Ambient Temperature (°C) 21581 10° 20° Fig. 13 - Sensitivity vs. Supply Voltage 30° 40° 1.0 50° 0.9 60° 0.8 70° 80° 0.7 0.6 0.4 0.2 0 Fig. 11 - Horizontal Directivity Rev. 1.5, 11-Nov-15 4 Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP752..W, TSOP754..W www.vishay.com Vishay Semiconductors SUITABLE DATA FORMAT IR Signal This series is designed to suppress spurious output pulses due to noise or disturbance signals. The devices can distinguish data signals from noise due to differences in frequency, burst length, and envelope duty cycle. The data signal should be close to the device’s band-pass center frequency (e.g. 38 kHz) and fulfill the conditions in the table below. When a data signal is applied to the product in the presence of a disturbance, the sensitivity of the receiver is automatically reduced by the AGC to insure that no spurious pulses are present at the receiver’s output. 0 Some examples which are suppressed are: 5 • DC light (e.g. from tungsten bulbs sunlight) 10 15 20 Time (ms) 16920 Fig. 14 - IR Disturbance from Fluorescent Lamp with Low Modulation • Continuous signals at any frequency IR Signal • Strongly or weakly modulated patterns from fluorescent lamps with electronic ballasts (see fig. 14 or fig. 15) 0 16921 5 10 15 20 Time (ms) Fig. 15 - IR Disturbance from Fluorescent Lamp with High Modulation TSOP752..W TSOP754..W Minimum burst length 10 cycles/burst 10 cycles/burst After each burst of length a minimum gap time is required of 10 to 70 cycles ≥ 10 cycles 10 to 35 cycles ≥ 10 cycles For bursts greater than a minimum gap time in the data stream is needed of 70 cycles > 4 x burst length 35 cycles > 10 x burst length Maximum number of continuous short bursts/second 1800 1500 NEC code Yes Preferred RC5/RC6 code Yes Preferred Thomson 56 kHz code Yes Preferred Sharp code Yes Preferred Mild disturbance patterns are suppressed (example: signal pattern of fig. 14) Complex and critical disturbance patterns are suppressed (example: signal pattern of fig. 15 or highly dimmed LCDs) Suppression of interference from fluorescent lamps Notes • For data formats with short bursts please see the datasheet for TSOP753..W • For Sony 12, 15, and 20 bit IR codes please see the datasheet of TSOP75S40FW Rev. 1.5, 11-Nov-15 5 Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP752..W, TSOP754..W www.vishay.com Vishay Semiconductors PACKAGE DIMENSIONS in millimeters 6.8 6.6 ± 0.1 Center of sensitive area (3.25) Mold residue 2.35 (1.8) 1.2 ± 0.2 3 0.8 Mold residue (0.635) (1) 1.27 (3 x) 0.5 ± 0.1 (4 x) technical drawings according to DIN specifications 3 x 1.27 = 3.81 Marking area 2.05 Not indicated tolerances ± 0.15 (1.5) Tool separation line (2.2) Proposed pad layout from component side (for reference only) 3 x 1.27 = 3.81 Pick and place area 1.8 1.27 Drawing-No.: 6.550-5300.01-4 Issue: 4; 13.09.11 0.8 22609 ASSEMBLY INSTRUCTIONS Reflow Soldering Manual Soldering • Reflow soldering must be done within 72 h while stored under a max. temperature of 30 °C, 60 % RH after opening the dry pack envelope • Use a soldering iron of 25 W or less. Adjust the temperature of the soldering iron below 300 °C • Set the furnace temperatures for pre-heating and heating in accordance with the reflow temperature profile as shown in the diagram. Exercise extreme care to keep the maximum temperature below 260 °C. The temperature shown in the profile means the temperature at the device surface. Since there is a temperature difference between the component and the circuit board, it should be verified that the temperature of the device is accurately being measured • Handle products only after the temperature has cooled off • Finish soldering within 3 s • Handling after reflow should be done only after the work surface has been cooled off Rev. 1.5, 11-Nov-15 6 Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP752..W, TSOP754..W www.vishay.com Vishay Semiconductors VISHAY LEAD (Pb)-FREE REFLOW SOLDER PROFILE 300 max. 260 °C 245 °C 255 °C 240 °C 217 °C 250 T (°C) 200 max. 20 s 150 max. 100 s max. 120 s 100 max. Ramp Up 3 °C/s max. Ramp Down 6 °C/s 50 0 0 50 100 150 t (s) 19800 200 250 300 max. 2 cycles allowed 3.6 0.3 TAPING VERSION TSOP..TR DIMENSIONS in millimeters 16 1.75 7.5 Ø 1.5 4 Direction of feed 8 2 Ø 1.5 technical drawings according to DIN specifications Drawing-No.: 9.700-5342.01-4 Issue: 2; 12.06.13 Rev. 1.5, 11-Nov-15 7 Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP752..W, TSOP754..W www.vishay.com Vishay Semiconductors 3 0.3 TAPING VERSION TSOP..TT DIMENSIONS in millimeters 16 1.75 7.5 Ø 1.5 4 Direction of feed 8 2 Ø 1.5 min. technical drawings according to DIN specifications Drawing-No.: 9.700-5341.01-4 Issue: 3; 06.10.15 Rev. 1.5, 11-Nov-15 8 Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP752..W, TSOP754..W www.vishay.com Vishay Semiconductors REEL DIMENSIONS in millimeters 16734 LEADER AND TRAILER DIMENSIONS in millimeters Trailer no devices Leader devices no devices End Start min. 200 min. 400 96 11818 COVER TAPE PEEL STRENGTH LABEL According to DIN EN 60286-3 Standard bar code labels for finished goods 0.1 N to 1.3 N The standard bar code labels are product labels and used for identification of goods. The finished goods are packed in final packing area. The standard packing units are labeled with standard bar code labels before transported as finished goods to warehouses. The labels are on each packing unit and contain Vishay Semiconductor GmbH specific data. 300 ± 10 mm/min. 165° to 180° peel angle Rev. 1.5, 11-Nov-15 9 Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP752..W, TSOP754..W www.vishay.com Vishay Semiconductors VISHAY SEMICONDUCTOR GmbH STANDARD BAR CODE PRODUCT LABEL (finished goods) PLAIN WRITING ABBREVIATION LENGTH INO SEL BATCH COD PTC QTY ACC PCK MIXED CODE xxxxxxx+ TYPE N N X N TYPE X N X - 18 8 3 10 3 (YWW) 2 8 Company logo LENGTH 8 2 3 8 21 LENGTH 3 3 10 1 17 Item-description Item-number Selection-code LOT-/serial-number Data-code Plant-code Quantity Accepted by Packed by Mixed code indicator Origin LONG BAR CODE TOP Item-number Plant-code Sequence-number Quantity Total length SHORT BAR CODE BOTTOM Selection-code Data-code Batch-number Filter Total length DRY PACKING In case of moisture absorption, the devices will recover to the former condition by drying under the following condition: The reel is packed in an anti-humidity bag to protect the devices from absorbing moisture during transportation and storage. 192 h at 40 °C + 5 °C / - 0 °C and < 5 % RH (dry air / nitrogen) or 96 h at 60 °C + 5 °C and < 5 % RH for all device containers or 24 h at 125 °C + 5 °C not suitable for reel or tubes. Aluminum bag Label An EIA JEDEC® standard J-STD-020 level 4 label is included on all dry bags. LEVEL CAUTION Reel This bag contains MOISTURE-SENSITIVE DEVICES 4 15973 1. Shelf life in sealed bag: 12 months at < 40 °C and < 90 % relative humidity (RH) FINAL PACKING The sealed reel is packed into a cardboard box. A secondary cardboard box is used for shipping purposes. 2. After this bag is opened, devices that will be subjected to soldering reflow or equivalent processing (peak package body temp. 260 °C) must be 2a. Mounted within 72 hours at factory condition of < 30 °C/60 % RH or 2b. Stored at < 5 % RH RECOMMENDED METHOD OF STORAGE 3. Devices require baking befor mounting if: Humidity Indicator Card is > 10 % when read at 23 °C ± 5 °C or 2a. or 2b. are not met. Dry box storage is recommended as soon as the aluminum bag has been opened to prevent moisture absorption. The following conditions should be observed, if dry boxes are not available: 4. If baking is required, devices may be baked for: 192 hours at 40 °C + 5 °C/- 0 °C and < 5 % RH (dry air/nitrogen) or 96 hours at 60 °C ± 5 °C and < 5 % RH for all device containers or 24 hours at 125 °C ± 5 °C not suitable for reels or tubes Bag Seal Date: (If blank, see barcode label) • Storage temperature 10 °C to 30 °C Note: Level and body temperature defined by EIA JEDEC Standard J-STD-020 • Storage humidity ≤ 60 % RH max. 22522 After more than 72 h under these conditions moisture content will be too high for reflow soldering. Rev. 1.5, 11-Nov-15 EIA JEDEC standard J-STD-020 level 4 label is included on all dry bags 10 Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TSOP752..W, TSOP754..W www.vishay.com Vishay Semiconductors VISHAY SEMICONDUCTORS STANDARD BAR CODE LABELS ESD PRECAUTION Proper storage and handling procedures should be followed to prevent ESD damage to the devices especially when they are removed from the antistatic shielding bag. Electrostatic sensitive devices warning labels are on the packaging. The Vishay Semiconductors standard bar code labels are printed at final packing areas. The labels are on each packing unit and contain Vishay Semiconductors specific data. 22178 Rev. 1.5, 11-Nov-15 11 Document Number: 82496 THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as Halogen-Free follow Halogen-Free requirements as per JEDEC JS709A standards. Please note that some Vishay documentation may still make reference to the IEC 61249-2-21 definition. We confirm that all the products identified as being compliant to IEC 61249-2-21 conform to JEDEC JS709A standards. Revision: 02-Oct-12 1 Document Number: 91000