83B PESD5V0U2BMB SO T8 Ultra low capacitance bidirectional double ESD protection array Rev. 1 — 13 March 2012 Product data sheet 1. Product profile 1.1 General description Ultra low capacitance bidirectional double ElectroStatic Discharge (ESD) protection array designed to protect up to two signal lines from the damage caused by ESD and other transients. The device is housed in a leadless ultra small SOT883B (DFN1006B-3) Surface-Mounted Device (SMD) plastic package. 1.2 Features and benefits ESD protection of up to two lines AEC-Q101 qualified Ultra low diode capacitance Cd = 2.9 pF ESD protection up to 10 kV IEC 61000-4-2; level 4 (ESD) Ultra low leakage current IRM = 5 nA 1.3 Applications Computers and peripherals Audio and video equipment Cellular handsets and accessories Communication systems Portable electronics SIM card protection FireWire High-speed data lines 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit - - 5 V - 2.9 3.5 pF Per diode VRWM reverse standoff voltage Cd diode capacitance f = 1 MHz; VR = 0 V PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array 2. Pinning information Table 2. Pinning Pin Description 1 cathode 2 cathode Simplified outline Graphic symbol 1 1 3 3 common cathode 3 2 2 Transparent top view 006aab331 3. Ordering information Table 3. Ordering information Type number Package Name PESD5V0U2BMB Description Version DFN1006B-3 leadless ultra small plastic package; 3 solder lands; body 1.0 0.6 0.37 mm SOT883B 4. Marking Table 4. Marking codes Type number Marking code[1] PESD5V0U2BMB 0001 1010 [1] For SOT883B binary marking code description, see Figure 1. 4.1 Binary marking code description PIN 1 INDICATION READING DIRECTION READING EXAMPLE: 0111 1011 MARKING CODE (EXAMPLE) READING DIRECTION 006aac673 Fig 1. PESD5V0U2BMB Product data sheet SOT883B binary marking code description All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 2 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions rated peak pulse current tp = 8/20 s Min Max Unit - 1.5 A Per diode IPPM [1][2] Per device Tj junction temperature - 150 C Tamb ambient temperature 55 +150 C Tstg storage temperature 65 +150 C [1] Device stressed with ten non-repetitive current pulses (8/20 s exponential decay waveform according to IEC 61000-4-5 and IEC 61643-321). [2] Measured from pin 1 or 2 to 3. Table 6. ESD maximum ratings Tamb = 25 C unless otherwise specified. Symbol Parameter Conditions electrostatic discharge voltage IEC 61000-4-2 (contact discharge) Min Max Unit [1][2] - 10 kV [2] - 400 V - 8 kV Per diode VESD machine model MIL-STD-883 (human body model) [1] Device stressed with ten non-repetitive ESD pulses. [2] Measured from pin 1 or 2 to 3. Table 7. ESD standards compliance Standard Conditions Per diode PESD5V0U2BMB Product data sheet IEC 61000-4-2; level 4 (ESD) > 8 kV (contact) MIL-STD-883; class 3B (human body model) > 8 kV All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 3 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array 001aaa631 IPP 001aaa630 120 100 % 90 % 100 % IPP; 8 μs IPP (%) 80 e−t 50 % IPP; 20 μs 40 10 % 0 10 20 30 30 ns 40 t (μs) Fig 2. t tr = 0.7 ns to 1 ns 0 60 ns 8/20 s pulse waveform according to IEC 61000-4-5 and IEC 61643-321 Fig 3. ESD pulse waveform according to IEC 61000-4-2 6. Characteristics Table 8. Characteristics Tamb = 25 C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit - - 5 V Per diode VRWM reverse standoff voltage IRM reverse leakage current VRWM = 5 V - 5 100 nA VBR breakdown voltage IR = 5 mA 5.5 6.5 9.5 V Cd diode capacitance f = 1 MHz; VR = 0 V - 2.9 3.5 pF - 1.9 - pF - - 10 V - - 12 V - 0.6 - f = 1 MHz; VR = 5 V VCL [1][2] clamping voltage IPP = 1 A IPPM = 1.5 A rdyn [1] PESD5V0U2BMB Product data sheet dynamic resistance IR = 10 A [3] Device stressed with 8/20 s exponential decay waveform according to IEC 61000-4-5 and IEC 61643-321. [2] Measured from pin 1 or 2 to 3. [3] Non-repetitive current pulse, Transmission Line Pulse (TLP) tp = 100 ns; square pulse; ANS/IESD STM5-1-2008. All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 4 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array IPPM IPP 006aab036 3.0 Cd (pF) 2.6 −VCL −VBR −VRWM IR IRM −IRM −IR VRWM VBR VCL 2.2 − −IPP 1.8 0 1 2 3 4 + 5 −IPPM VR (V) 006aab325 f = 1 MHz; Tamb = 25 C Fig 4. Diode capacitance as a function of reverse voltage; typical values PESD5V0U2BMB Product data sheet Fig 5. V-I characteristics for a bidirectional ESD protection diode All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 5 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array ESD TESTER Rd 450 Ω RG 223/U 50 Ω coax 4 GHz DIGITAL OSCILLOSCOPE 10× ATTENUATOR Cs 50 Ω DUT (DEVICE UNDER TEST) IEC 61000-4-2 network Cs = 150 pF; Rd = 330 Ω vertical scale = 10 V/div horizontal scale = 15 ns/div vertical scale = 10 V/div horizontal scale = 100 ns/div GND GND unclamped +8 kV ESD pulse waveform (IEC 61000-4-2 network) clamped +8 kV ESD pulse waveform (IEC 61000-4-2 network) vertical scale = 10 V/div horizontal scale = 15 ns/div GND GND vertical scale = 10 V/div horizontal scale = 100 ns/div unclamped -8 kV ESD pulse waveform (IEC 61000-4-2 network) Fig 6. clamped -8 kV ESD pulse waveform (IEC 61000-4-2 network) 006aab037 ESD clamping test setup and waveforms PESD5V0U2BMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 6 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array 7. Application information The device is designed for the protection of up to two bidirectional data or signal lines from surge pulses and ESD damage. The device is suitable on lines where the signal polarities are both, positive and negative with respect to ground. signal lines PESD5V0U2BMB GND 006aac967 Fig 7. Application diagram Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. Place the device as close to the input terminal or connector as possible. 2. Minimize the path length between the device and the protected line. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Use ground planes whenever possible. For multilayer PCBs, use ground vias. 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. PESD5V0U2BMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 7 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array 9. Package outline 0.65 0.55 0.40 0.34 0.35 0.20 0.12 1 0.04 max 2 0.30 0.22 1.05 0.65 0.95 0.30 0.22 3 0.55 0.47 Dimensions in mm Fig 8. 11-11-02 Package outline SOT883B (DFN1006B-3) 10. Packing information Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number Package Description Packing quantity 10000 PESD5V0U2BMB [1] PESD5V0U2BMB Product data sheet SOT883B 2 mm pitch, 8 mm tape and reel -315 For further information and the availability of packing methods, see Section 14. All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 8 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array 11. Soldering Footprint information for reflow soldering SOT883B 1.3 0.7 R0.05 (8x) 0.9 0.6 0.7 0.25 (2x) 0.3 (2x) 0.3 0.4 (2x) 0.4 solder land solder land plus solder paste solder paste deposit solder resist occupied area Dimensions in mm sot883b_fr Reflow soldering is the only recommended soldering method. Fig 9. Reflow soldering footprint SOT883B (DFN1006B-3) PESD5V0U2BMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 9 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array 12. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes PESD5V0U2BMB v.1 20120313 Product data sheet - - PESD5V0U2BMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 10 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 13.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. PESD5V0U2BMB Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 11 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PESD5V0U2BMB Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 13 March 2012 © NXP B.V. 2012. All rights reserved. 12 of 13 PESD5V0U2BMB NXP Semiconductors Ultra low capacitance bidirectional double ESD protection array 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 4.1 5 6 7 8 8.1 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Binary marking code description. . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Application information. . . . . . . . . . . . . . . . . . . 7 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 7 Quality information . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Packing information . . . . . . . . . . . . . . . . . . . . . 8 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 13 March 2012 Document identifier: PESD5V0U2BMB