STHV800
Octal ±90 V, ±2 A, 3-level RTZ, high-speed ultrasound pulser
Data brief
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•
•
•
TFLGA-56LD(8x8x0.9 mm)
Fully integrated real clamping-to-ground
function
−
8 Ω synchronous active clamp
−
±2 A source and sink current
Fully integrated TR switch
−
8 Ω ON resistance
−
Up to 300 MHz BW
−
Current consumption down to 10 μA in
RX phase
−
Receiver multiplexing function
1.8 V to 3.6 V CMOS logic interface
Auxiliary integrated circuits
−
Noise blocking diodes
−
Anti-leakage on output node
−
Fully self-biasing architecture
−
Thermal protection
Latch-up free due to HV SOI technology
Very few external passive components or
supplies needed
Features
•
•
•
•
•
•
•
Applications
•
•
•
High-density ultrasound transmitter
Two independent half-bridges per channel
0 to ±90 V output voltage
Power-up free
Synchronization of the input signals
(selectable) by an external clock
Up to 20 MHz operating frequency
Low-power, high-voltage, high-speed drivers
2 independently-supplied half bridges
(shorted-option) for each channel, one
dedicated to continuous wave (CW) mode
−
Main half bridge:
−
±2 A source and sink current
−
Down to 20 ps jitter
−
Low 2nd harmonic distortion
−
CW half bridge:
−
±0.3 A source and sink current
−
Down to 10 ps jitter
−
Very low power consumption
April 2014
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•
•
•
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Medical ultrasound imaging
Pulse waveform generator
NDT ultrsound transmission
Piezoelectric transducer drivers
Point-of-care ultrasound imaging equipment
Table 1: Device summary
Order code
Package
Packing
STHV800L
TFLGA-56LD
Tape and reel
DocID026018 Rev 2
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Description
1
STHV800
Description
The STHV800 is an octal, monolithic, high-voltage and high-speed pulse generator. It is
designed for medical ultrasound applications, but can be used for other piezoelectric,
capacitive or MEMS transducers.
The device integrates a controller logic interface circuit (compatible with both 1.8 V and 3.3
V input signals), level translators, MOSFET gate drivers, noise blocking diodes, and high
power P-channel and N-channel MOSFETs as the output stage for each channel. These
MOSFETs are capable of providing more than 2 A of peak output current. Each channel
has a dedicated bridge in order to reduce power dissipation and jitter during continuous
wave mode (peak current is limited to 0.3 A). This CW bridge has dedicated power supplies
(HV_CW) which are fully independent on the main HV supplies.
These HV_CW supplies can be shorted to the HV supplies. The fundamental structure of
each channel also consists of active clamping to ground circuitry, anti-leakage and antimemory block, a thermal sensor to protect the device and an integrated TR-switch (just 8 Ω
as equivalent resistor ) to connect the HV output to its LV output, guaranteeing strong
decoupling during the transmission phase.
The eight independent T/R switches can be used in both a dedicated RX chain per channel
or in a multiplexing configuration.
The clamp circuit has a current capability up to 2 A and works directly on the output pin,
carrying this node exactly to zero. This feature allows minimized injection change during
the transition from clamp to RX state.
In addition, the STHV800 includes self-biasing circuitry which allows very low power
consumption during the RX phase (down to 200 µW global power dissipation) and thermal
shutdown block sensing by an external dedicated pin (THSD).
One of the main benefits of this device is that it requires very few external components:
only decoupling capacitors on the HV and LV supplies, and a resistor to pull up the THSD
pin (moreover, this resistor can be shared by many devices).
Each channel is driven independently by only 2 digital bits, which in CW mode become one
bit. An external clock can be used with the STHV800 to synchronize all the input signals.
This feature, however, is optional: if the CK pin is tied to ground the device works in
asynchronous mode.
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DocID026018 Rev 2
STHV800
Description
Figure 1: STHV800 internal block diagram
V C C_H V
0 to 90 V
V C C_ H V_ C W
0 to 90 V
Cf
V C C_ LV
3.3V
V DD P
DVDD
HV P
C an be
independent
or s horted
H VP _ CW
Cf
CHANNEL_8
Self voltage H V P_ C W – 3.3V
reference H V P – 3 .3 V
STHV800
CHANNEL_7
CHANNEL_6
CHANNEL5
CHANNEL_4
CHANNEL3
V C C_ LV
3.3V
CHANNEL_2
IN8 _1
CHANNEL_1
TX
Anti
memory
IN1 _1
Inp ut lo gic & h ig h v oltag e lev el s hifte r
1 .6V to 3.6V
Input signal
CW
IN1 _0
CW
CK
V C C_D IG
1.8V or 3.3V
f > 100 M H z
Thermal
sensor
Rp
10 k Ω
Thermal
protection
TH S D
X D C R_ 8
Noise blocking
diodes
X D C R_ 1
LV O U T _8
Clamp
TRswitch
LV O U T _ 1
LN A
H V M + 3.3V
Cf
Cf
V S S _H V
0 to - 90V
V S S _H V _C W
0 to -90 V
V D DM
G N D _P W R
A GN D
D GN D
HV M _ CW
C an be
independent
or s horted
H VM
H V M_ C W + 3 .3 V
V S S_ LV
- 3.3V
Figure 2: XDCR output in DUPLEX mode from single channel - PW and CW composition
example
DocID026018 Rev 2
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Revision history
2
STHV800
Revision history
Table 2: Document revision history
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Date
Revision
Changes
21-Mar-2014
1
Initial release.
07-Apr-2014
2
Changed order code from STHV800QTR to STHV800L in Table 1:
Device summary
DocID026018 Rev 2
STHV800
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