® RT2659 6A, 6V, Synchronous Step-Down Converter with REFIN General Description Features The RT2659 in thermally enhanced VQFN-20L 3.5x4 package is a full featured 6V, 6A synchronous step-down DC/DC converter designed specifically for Double Data Rate (DDR) memory termination, which provides a continuous 6A sink and source current and fixed 1/2 DDQ at output. The current mode COT architecture with external compensation allows the transient response to be optimized over a wide range of loads and achieves nearly constant switching frequency over line, load, and output voltage ranges. The multiple sets of over-current limit and switching frequency offer an optimized power chain for application design. Efficiency is maximized through the integrated 20mΩ/ 10mΩ MOSFETs, and cycle-by-cycle current limit provides protection against shorted outputs. Output external tracking function, output soft discharge, power good indicating, output droop support are all featured in the RT2659. In addition, the device is specified from 0°C to 105°C to perform an excellent regulation with an accurate 1% reference voltage over temperature. Continuous 6A Sink or Source Output Current ability and Droop Design for DDR Memory Termination Applications Low RDS(ON) Power N-MOSFET Switches 20mΩ Ω/ 10mΩ Ω Input Voltage Range : 1V to 6V Output Adjustable from 0.6V to 2V Current-Mode Constant On-Time Control Design Enables Fast Transient Response Supports All MLCC Output Capacitor and SP/ POSCAP with Robust Loop Stabilization Selectable 600kHz or 1MHz Switching Frequency Supports Pre-Biased Start-Up Selectable Over-Current Protection Various Operation Mode Selection for Different Application Requirements External Tracking Start-Up Application Enable Input Control and Power Good Indicator Under-Voltage and Over-Voltage Protection Applications DDR-2/3/4 VTT Regulation (1/2VDDQ) for Enterprise Servers, Ethernet Switches and Routers, Global Storage, GSM Base Station, and Industrial equipments Enterprise POL (using precision internal VREF) Simplified Application Circuit VIN VIN CIN Enable November 2015 VOUT VOUT VCC CCOMP VCC CVCC COMP PGOOD R1 REFIN Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS2659-03 L COUT MODE VREF CREF R2 CBOOT SW EN Mode RCOMP BOOT RT2659 RPGOOD PGOOD PGND GND is a registered trademark of Richtek Technology Corporation. www.richtek.com 1 RT2659 Ordering Information Pin Configurations RT2659 (TOP VIEW) VCC PGOOD MODE EN BOOT Package Type QV : VQFN-20L 3.5x4 (V-Type) Lead Plating System G : Green (Halogen Free and Pb Free) 20 19 18 17 16 L : Latched OVP and UVP H : OVP Non-latch, UVP Hiccup PGND PGND PGND VIN VIN Note : Richtek products are : 15 2 14 PGND 3 13 4 12 5 21 RoHS compliant and compatible with the current require- 6 7 8 9 11 SW SW SW SW SW 10 GND VREF COMP REFIN VOUT ments of IPC/JEDEC J-STD-020. 1 Suitable for use in SnPb or Pb-free soldering processes. VQFN-20L 3.5x4 Marking Information RT2659HGQV RT2659LGQV 07= : Product Code 07=YM DNN 06= : Product Code YMDNN : Date Code 06=YM DNN YMDNN : Date Code Functional Pin Description Pin No. Pin Name Pin Function PGND Power Ground. Provide the ground return path for the low-side power MOSFET and positive input of an internal amplifier for current sensing circuit. The exposed pad must be soldered to a large PCB and connected to PGND for minimum power dissipation. 4, 5 VIN Power Input. Supplies the power switches of the device. 6 GND Signal Ground. Provides the return path for control circuitry and internal reference. 7 VREF Reference Output. A specified 1V reference output is supplied by internal linear regulator. Decouple with a 0.22F capacitor between this pin and GND. 8 COMP Compensation Node. The current comparator threshold increases with this control voltage. Connect external compensation elements between this pin and VREF pin to stabilize the control loop. 9 REFIN Reference Input. The output voltage is targeted by reference input, which is applied from 0.6V to 2V. 10 VOUT Output Voltage Monitor Node. A negative input of the gm error amplifier and it is allowed to be a discharge path if any protection is triggered. SW Switch Node. SW is the switching node that supplies power to the output and connect the output LC filter from SW to the output load. BOOT Bootstrap Supply for High-Side Gate Driver. Connect a 100nF or greater capacitor from SW to BOOT to power the high-side switch. 1, 2, 3, 21 (Exposed Pad) 11 to 15 16 Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 2 is a registered trademark of Richtek Technology Corporation. DS2659-03 November 2015 RT2659 Pin No. Pin Name Pin Function 17 EN Enable Control Input. Floating this pin or connecting this pin to logic high can enable the device and connecting this pin to GND can disable the device. 18 MODE Mode Selection Node. There are 8 modes in RT2659. Connect the specified resistance to GND for selecting different modes of switching frequencies, OC limit thresholds, and light-load operations. 19 PGOOD Power Good Indicator Output. This pin is an open-drain logic output that is pulled to ground when the output voltage is lower or higher than its specified threshold under the conditions of OVP, OTP, dropout, EN shutdown, or during slow start. 20 VCC Fixed 3.3V Supply Voltage Input. Supplies the control circuitry and internal reference of the device. Function Block Diagram VREFIN + 16% VREFIN - 30% COMP + + VREFIN - 16% + 15µA VS Amplifier UVP OVP SS DAC PGOOD Delay + OV - VREFIN + 20% REFIN EN + UV - + - Ramp Comp Control Logic On/Off Time Minimum On/Off SKIP/ODA/FPWM OCL/OVP/UVP Discharge On-Time Selection BOOT + PWM - VREF VOUT + Current Sense Amplifier DRVH VIN VBG 8R - MODE R SW XCON tON OneShot + OC - SW Current Sense VCC ZC + DRVL ZC Threshold Modulation PGND Discharge Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS2659-03 November 2015 GND is a registered trademark of Richtek Technology Corporation. www.richtek.com 3 RT2659 Operation The RT2659 is a synchronous low voltage step-down converter that can support the VCC range from 3V to 6V and the output current can be up to 6A. The RT2659 uses a constant on-time, current mode architecture. In steadystate operation, the high-side N-MOSFET is turned on when the current feedback reaches COMP level which is the amplified difference between the reference voltage and the feedback voltage. The switching frequency of 600kHz or 1000kHz allows for efficiency and size optimization when selecting the output filter components. The switching frequency is set using the mode pin. The RT2659 reduces the external component count by integrating the boot recharge MOSFET. The bias voltage for the integrated high-side MOSFET is supplied by a capacitor between the BOOT and SW pins. The boot capacitor voltage is monitored by an BOOT detection circuit and turns off the high-side MOSFET when the voltage falls below a threshold voltage. The SS pin is used to minimize inrush currents or provide power supply sequencing during power up. A small value capacitor should be coupled to the pin for slow start. The SS pin is discharged before the output power up to ensure a repeatable restart after an over-temperature fault, UVLO fault or disable condition. The error amplifier EA adjusts COMP voltage by comparing the output voltage to the REFIN voltage. When the load increases, it causes a drop in the feedback voltage relative to the reference, then the COMP voltage rises to allow higher inductor current to match the load current. Bootstrap Voltage (Boot) and Low Dropout Operation The RT2659 has an integrated boot regulator and requires a small ceramic capacitor between the BOOT and SW pins to provide the gate drive voltage for the high-side MOSFET. The value of the ceramic capacitor should be 0.1μF. A ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of 10V or higher is recommended because of the stable characteristics over temperature and voltage. When the BOOT voltage is lower than the threshold voltage, low-side MOSFET turns on Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 4 and built-in bootstrap MOSFET will recharge the BOOT capacitor. The high-side MOSFET is always turned off when BOOT voltage is lower than threshold voltage. PWM Frequency and Adaptive On-Time Control The on-time can be roughly estimated by the equation : TON = VOUT 1 VIN fSW Error Amplifier The RT2659 has a transconductance amplifier. The error amplifier compares the VOUT voltage to the REFIN voltage The REFIN voltage can comes from external power source or taps off the voltage divider from the 1V VREF. The transconductance of the error amplifier is 1000μA/V during normal operation. The frequency compensation components are placed between the COMP pin and ground. Auto-Zero Current Detector The auto-zero current detector circuit senses the SW waveform to adjust the zero current threshold voltage. When the current of low-side MOSFET decreases to the zero current threshold, the low-side MOSFET turns off to prevent negative inductor current. In this way, the zero current threshold can adjust for different conditions to get better efficiency. Protection Features The RT2659 has many features to protect the device. Under-Voltage Protection (UVLO) The RT2659 continuously monitors the voltage on the VCC pin to ensure that the voltage level is high enough to bias the device properly and to provide sufficient gate drive potential to maintain high efficiency. The converter starts with approximately 2.785V and has a nominal hysteresis of 120mV. If the 3.3V UVLO limit is reached, the converter transitions the phase node into an off function. And the converter remains in the off state until the device is reset by cycling 3.3V until the 3.3V POR is reached (2.3V nominal). The power input does not have an UVLO function. is a registered trademark of Richtek Technology Corporation. DS2659-03 November 2015 RT2659 Power Good Over-Current Protection (OCP) The RT2659 has one open-drain power good (PGOOD) pin. The PGOOD pin de-asserts as soon as the EN pin is pulled low or an under-voltage condition on VCC or any other fault is detected. Both positive and negative over-current protection are provided in the RT2659 : RT2659 has cycle-by-cycle over current limiting protection. The inductor current is monitored during the low-side MOSFET turning on. When the inductor current is larger than the over current trip level, the high-side MOSFET turns off until the current drops below the OCL limit. Because RT2659 uses a valley current limiting scheme, the average output current limit calculation is valley OCL trip level plus half of the inductor ripple current. Output Over-Voltage Protection (OVP) In addition to the power good function described above, the RT2659 has additional OVP and UVP thresholds and protection circuits. An OVP condition is detected when the output voltage is approximately 120% x VREFIN. In this case, the converter de-asserts the PGOOD signals and performs the overvoltage protection function. During OVP, the low-side MOSFET is always on before triggering a negative overcurrent. When a negative OC is also tripped, the low-side MOSFET is no longer continuously on, and pulsed signals are generated to limit the negative inductor current. For RT2659L OVP latch mode, when the VOUT pin voltage drops below 400mV, the low-side MOSFET is turned off and the converter latches off. The converter remains in the off state until the device is reset by cycling 3.3V until the 3.3V POR is reached or when the EN pin is toggled off and on. For RT2659H OVP non-latch, when the VOUT pin voltage drops below 400mV, the low-side MOSFET is turned off (non-latch), recovery until the VOUT pin voltage exceeds 400mV again. Over-Current Limit (OCL) Negative OCL The negative OCL circuit acts when the converter is sinking current from the output capacitor(s). The converter continues to act in a valley mode, the absolute value of the negative OCL set point is typically −9.3A or −7.3A (depending on mode selection). Over-Temperature Protection (OTP) The RT2659 has an over-temperature protection. When the device triggers the OTP, the device shuts down. Until the temperature drops below the low temperature threshold, the OTP relieves and the device re-soft starts. Output Under-Voltage Protection (UVP) Output under-voltage protection works in conjunction with the current protection described in the over-current protection and over-current limit sections. If the output voltage drops below 68% of VREFIN, after approximately a 256μs delay, the device stops switching and enters UVP. For RT2659L UVP latch mode, the device stop switching and enter latch mode. The converter remain in the off state until the device is reset by VIN or EN. For RT2659H UVP hiccup mode, the device stops switching and enters hiccup mode. After a hiccup waiting time, a re-start is attempted. If the fault condition is not cleared, hiccup mode operation may continue indefinitely. Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS2659-03 November 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 5 RT2659 Absolute Maximum Ratings (Note 1) Supply and Boot-to-Switch Input Voltages, VIN, VCC, and (VBOOT − VSW) ----------------------------Boot Pin Input Voltage, VBOOT -----------------------------------------------------------------------------------Switch Node Input Voltage, SW --------------------------------------------------------------------------------Switch Node, SW (<10ns) ----------------------------------------------------------------------------------------EN Pin Input Voltage -----------------------------------------------------------------------------------------------MODE and REFIN Pin Input Voltages -------------------------------------------------------------------------VOUT Pin Input Voltage ------------------------------------------------------------------------------------------COMP and VREF Output Voltages ----------------------------------------------------------------------------PGOOD Output Voltage ------------------------------------------------------------------------------------------PGND Output Voltage ---------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C −0.3V to 7V −0.3V to 14V −2V to 7V −5V to 10V −0.3V to 7V −0.3V to 3.6V −1V to 3.6V −0.3V to 3.6V −0.3V to 7V −0.3V to 0.3V VQFN-20L 3.5x4 ----------------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2) VQFN-20L 3.5x4, θJA ----------------------------------------------------------------------------------------------VQFN-20L 3.5x4, θJC ----------------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------Junction Temperature ----------------------------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------ESD Susceptibility (Note 3) HBM (Human Body Model) ---------------------------------------------------------------------------------------CDM (Charged Device Model) ------------------------------------------------------------------------------------ 3.125W Recommended Operating Conditions 32°C/W 10°C/W 260°C 150°C −65°C to 150°C 2kV 1kV (Note 4) Input Supply Voltage, VIN -----------------------------------------------------------------------------------------Boot Pin Input Voltage, VBOOT -----------------------------------------------------------------------------------Switch Node Input Voltage, VSW --------------------------------------------------------------------------------Boot-to-Switch Input Voltage, (VBOOT − VSW) ----------------------------------------------------------------Input Logic Supply Voltage, VCC --------------------------------------------------------------------------------EN Input Voltage, VEN ---------------------------------------------------------------------------------------------PGOOD Output Voltage, VPGOOD -------------------------------------------------------------------------------VOUT, MODE, and REFIN Pin Input Voltages -----------------------------------------------------------------COMP and VREF Output Voltages ------------------------------------------------------------------------------PGND Output Voltage ---------------------------------------------------------------------------------------------Junction Temperature Range -------------------------------------------------------------------------------------- −1V to 6V (POR) −1V to 12.5V (POR) −1V to 6.5V −0.1V to 5.5V (POR) 3V to 6V −0.1V to 5.5V (POR) −1V to 5.5V −1V to 3.5V −1V to 3.5V −1V to 0.1V −40°C to 125°C Electrical Characteristics (VIN = 5V, PGND = GND, TA = −40°C to 105°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit Supply Voltage VCC Supply Input Operating Voltage VCC (Note 5) 3 3.3 6 V VIN Supply Input Operating Voltage VIN (Note 5) 1 -- 6 V Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 6 is a registered trademark of Richtek Technology Corporation. DS2659-03 November 2015 RT2659 Parameter Symbol VCC Quiescent Current Test Conditions VEN = High VCC Shutdown Current VEN = Low VIN Shutdown Current VCC Under-Voltage Lockout Threshold VCC _UVLO VCC Under-Voltage Lockout Threshold Hysteresis VCC _UVLO VEN = High, VIN Rising OVP latch is reset when VCC < reset threshold VCC Reset Threshold Min Typ Max Unit -- 1.1 2 mA -- 0.2 7 -- 0.2 10 2.635 2.785 2.935 V -- 120 -- mV 1.5 2.3 2.75 V A Enable Voltage VIH VEN Rising 2 -- -- VIL VEN Falling -- -- 0.5 -- -- 1 IVREF = 0A 0.98 1 1.02 IVREF = 50A 0.975 1 1.025 -- 0.88 -- -- 170 -- mV VVREF = 1V -- 2.5 -- mA VIN = 5V, VOUT = 1.05V, f S = 1MHz (Note 5) -- 210 -- VIN = 5V, VOUT = 1.05V, (Note 5) f S = 600kHz -- 310 -- Minimum Off-Time VIN = 5V, VOUT = 1.05V, f S = 1MHz, VOUT < VREFIN -- 270 -- Internal BOOT Switch On-Resistance IBOOT = 10mA, TA = 25°C -- 10 -- Internal BOOT Switch Leakage Current VBOOT = 13V, VSW = 6V -- -- 1 A From VEN = High to VOUT = 95%VREFIN -- 1.6 -- ms From VEN = High to VOUT 0V -- 260 -- s -- 1 -- mA/V 0 -- 2 V Enable Input Voltage Enable Input Current V A Reference Voltage VREF Voltage VVREF VREF Under-Voltage Lockout Threshold VVREF_ UVLO VREF Under-Voltage Lockout Hysteresis UVLO VEN = High, VVREF Rising VVREF_ VREF Sink Current V SW and BOOT Constant On-Time ns Default Soft-Start Soft-Start Time tSS Soft-Start Delay Time Error Amplifier and PWM Comparator Error Amplifier Trans-Conductance gm Common Mode Input Voltage Range VCM (Note 5) Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS2659-03 November 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 7 RT2659 Parameter Differential Mode Input Voltage Range Symbol Test Conditions VDM Min Typ Max Unit 0 -- 80 mV 80 -- Error Amplifier Sinking Current VCOMP = 2V, VOUT VREFIN = 80mV -- Error Amplifier Sourcing Current VCOMP = 2V, VOUT VREFIN = 80mV -- 80 -- Error Amplifier Input Offset TA = 25C -- 0 -- mV Error Amplifier 3dB Frequency (Note 5) 4.5 6 7.5 MHz -- 0 -- mV -- 7.6 -- -- 9.3 -- Low-side current sensing 43 53 57 Power Good Falling Threshold VOUT Falling (Fault) -- 84 -- Power Good Rising Hysteresis VOUT Rising (Good) -- 8 -- Power Good Rising Threshold VOUT Rising (Fault) -- 116 -- Power Good Falling Hysteresis VOUT Falling (Good) -- 8 -- Minimum VIN Voltage for Indicating PGOOD IPGOOD sinks 2mA 0.7 0.9 1.1 Power Good Enable Delay Time External tracking -- 7.1 -- Zero Crossing Comp Internal Offset VZXOFF A Current Limit and Internal Current Sense Low-Side Switch Sourcing Current Limit Valley detection Low-Side Switch Sinking Current Limit Current Sense TransImpedance RCS A m Power Good %VREFIN V ms Power Good Indicating Good Delay Time 0.7 1 1.2 Power Good Indicating Fault Delay Time -- 10 -- s Power Good Pull Low Voltage PGOOD = Fault, VCC = 4.5V, IPGOOD sinks 4mA -- -- 0.3 V Power Good Leakage Current PGOOD = Good, VPGOOD = 5.5V 1 0 1 A VREFIN = 1V, Non-droop application 1 -- 1 %VREFIN -- 42 -- 115 120 125 %VREFIN VOUT VOUT Accuracy VOUT Soft Discharge Resistance Over-Voltage Protection Threshold Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 8 is a registered trademark of Richtek Technology Corporation. DS2659-03 November 2015 RT2659 Parameter Symbol Test Conditions Min Typ Max Unit Under-Voltage Protection Threshold Device latches off and begins to soft discharge 65 68 71 %VREFIN Over-Voltage Protection Delay Time From VOUT > 120%VREFIN to OVP trip -- 10 -- Under-Voltage Protection Delay Time From VOUT < 68%VREFIN to UVP trip -- 256 -- From VEN = High to UVP enable -- 2 -- External tracking application, from VOUT 0V to UVP enable -- 8 -- Under-Voltage Protection Enable Delay Time s ms Over-Temperature Protection Thermal Shutdown Threshold TSD -- 145 -- Thermal Shutdown Hysteresis TSD -- 20 -- 80 130 180 200 250 300 Threshold 3 370 420 470 Threshold 4 1176 1200 1233 -- 15 -- C Mode Selection Threshold 1 MODE Threshold Voltage Threshold 2 (Note 5) MODE Input Current mV A Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may affect device reliability. Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7. θJC is measured at the exposed pad of the package. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Note 5. Guarantee by design. Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS2659-03 November 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 9 RT2659 Typical Application Circuit 4, 5 VIN 1V to 6V CIN 18 Mode BOOT CCOMP CBOOT COUT MODE VOUT VCC 8 L SW 11 to 15 EN PGND R1 9 REFIN VCC 3.3V 20 CVCC PGOOD VOUT 0.6V to 2V 10 COMP 7 VREF CREF R2 16 RT2659 17 Enable RCOMP VIN 19 RPGOOD PGOOD 1, 2, 3, 21 (Exposed Pad) GND 6 Table 1. Mode Definitions Switching Frequency (fSW) Over Current Limit (OCL) Valley (A) 600kHz 7.6 600kHz 5.4 1MHz 5.4 33 1MHz 7.6 5 47 600kHz 7.6 6 68 600kHz 5.4 7 100 1MHz 5.4 8 Open 1MHz 7.6 Mode Mode Resistance (k) 1 0 2 12 3 22 4 Light-Load Power Saving Mode SKIP PWM Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 10 is a registered trademark of Richtek Technology Corporation. DS2659-03 November 2015 RT2659 Typical Operating Characteristics Efficiency vs. Output Current Output Voltage vs. Input Voltage 0.63 95 90 80 Output Voltage (V) Efficiency (%) IOUT = 0A IOUT = 100mA IOUT = 3A IOUT = 6A 0.62 85 VIN = 2.5V VIN = 1.2V 75 70 65 60 55 50 0.61 0.60 0.59 0.58 45 PWM = 1MHz, VPP = 2.5V, VOUT = 0.603V VOUT = 0.603V 40 0 1 2 3 4 5 0.57 4.5 6 4.75 Output Current (A) 5 5.25 5.5 Input Voltage (V) Output Voltage vs. Output Current Frequency vs. Output Current 0.615 1.5 1.4 1.3 Frequency (MHz)1 Output Voltage (V) 0.610 0.605 0.600 VIN = 2.5V VIN = 1.2V 0.595 1.2 1.1 1.0 0.9 0.8 0.7 0.590 0.6 VOUT = 0.603V 0.585 0 1 2 3 4 5 6 0 Output Current (A) 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 Output Current (A) Load Transient Response Frequency vs. Temperature 2.0 VIN = 2.5V, VOUT = 0.603V, IOUT = 0A to 3A, L = 0.25μH 1.8 Frequency (MHz)1 VIN = 2.5V, VOUT = 0.603V, IOUT = 0A to 6A 0.5 1.6 VOUT (20mV/Div) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 VIN = 2.5V, VOUT = 0.603V, F = 1MHz 0.0 -50 -25 0 25 50 75 100 125 IOUT (2A/Div) Time (100μs/Div) Temperature (°C) Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS2659-03 November 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 11 RT2659 Output Ripple Voltage Load Transient Response VIN = 2.5V, VOUT = 0.603V, IOUT = 3A, L = 0.25μH VIN = 2.5V, VOUT = 0.603V, IOUT = 0A to 6A, L = 0.25μH VOUT (20mV/Div) VOUT (10mV/Div) VLX (2V/Div) IOUT (4A/Div) IOUT (2A/Div) Time (1μs/Div) Time (100μs/Div) Output Ripple Voltage EN Threshold vs. Temperature 2.0 VIN = 2.5V, VOUT = 0.603V, IOUT = 6A, L = 0.25μH 1.8 1.6 EN Threshold (V) VOUT (10mV/Div) VLX (2V/Div) 1.4 EN High Level Threshold EN Low Level Threshold 1.2 1.0 0.8 0.6 0.4 IOUT (4A/Div) 0.2 VIN = 2.5V, VOUT = 0.603V, IOUT = 0A 0.0 Time (1μs/Div) -50 -25 0 25 50 75 100 125 Temperature (°C) Shutdown Current vs. Temperature Shutdown Current (µA)1 7 6 5 4 3 2 1 VIN = 2.5V, VOUT = 0.603V, IOUT = 0A 0 -50 -25 0 25 50 75 100 125 Temperature (°C) Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 12 is a registered trademark of Richtek Technology Corporation. DS2659-03 November 2015 RT2659 Application Information The RT2659 employs current mode COT architecture that provides ease of use, low external component count and fast transient response. The Synchronous buck regulator capable of delivering up to 6A continuous current and set switching frequency up to 1MHz. Some feature of Current mode COT Effective bandwidth is very high No slope compensation necessary Double complex zero at half the switching frequency term of fixed frequency peak CM converter disappears. Operation of Current Mode COT Referring to Figure 1, VCOMP is the amplified difference between the reference voltage and the feedback voltage. VCS is valley current sense voltage (sensing the inductor current). The PWM comparator senses where the two waveforms cross and triggers the on time generator. Current Feedback The RT2659 can be configured as a non-droop solution. The benefit of a non-droop approach is that load regulation is flat, therefore, in a system where tight DC tolerance is desired, the non-droop approach is recommended. For the Intel system agent application, non-droop is recommended as the standard configuration. The nondroop approach can be implemented by connecting a resistor and a capacitor between the COMP and the VREF pins. The purpose of the type II compensation is to obtain high DC feedback gain while minimizing the phase delay at unity gain cross over frequency of the converter. The value of the resistor (RC) can be calculated using the desired unity gain bandwidth of the converter, and the value of the capacitor (CC) can be calculated by knowing where the zero location is desired. The capacitor CP is optional, but recommended. Its appropriate capacitance value can be calculated using the desired pole location. Figure 2 shows the basic implementation of the non-droop mode using the RT2659. VCS Voltage (V) Non-Droop Mode Operation CP VCOMP VREF RC CC VIN COMP VREF VOUT tON t Time (µs) Figure 1. Current Mode COT Waveforms Adaptive Constant On-Time Control Adaptive on time generator makes the system operate in fixed frequency when VIN or VOUT change. The technique improves COT by making the one-shot on-time proportional to VOUT and inversely proportional to VIN. In this way, an on-time is chosen as approximately what it would be for an ideal fixed-frequency PWM in similar input/output voltage conditions. The on-time calculates equation of the buck converter as shows as follows : VOUT t ON VIN FSW Where FSW is operate frequency. Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS2659-03 November 2015 - gm + - + + - VREF VREFIN LS RDS(ON) + + PWM Comparator RCS - + - VREF HS SW Driver LS LOUT ESR ROUT COUT Figure 2. Non-Droop Mode Droop Mode Operation The terminology for droop is the same as load line or voltage positioning as defined in the Intel CPU VCORE specification. Based on the actual tolerance requirement of the application, load-line set points can be defined to maximize either cost savings (by reducing output capacitors) or power reduction benefits. Accurate droop voltage response is provided by the finite gain of the droop amplifier. The equation for droop voltage is shown below Equation : is a registered trademark of Richtek Technology Corporation. www.richtek.com 13 RT2659 RCS IOUT RDROOP gm VDROOP external power source. In order for the RT2659 to track mode (see Figure 6). The valid REFIN voltage range is between 0.6 V to 2 V. Where RCS is current sense Trans-Impedance. RDROOP is the value of resistor from the COMP pin to the VREF pin. EN and VCC 600mV REFIN Figure 3 shows the basic implementation of the droop mode using the RT2659. VOUT 260µs minimum PGOOD PGOOD Delay 1ms VIN Figure 6. Tracking Startup Timing VREF VOUT + + VREF - + VREFIN LS RDS(ON) Non-Tracking Mode + + HS PWM Comparator - SW Driver + VREF - LS LOUT ESR ROUT COUT Figure 3. DROOP Mode Power Sequences Tracking Mode In a tracking application, VDDQ can be VIN or it can be an additional voltage rail. Thus, R1 = R2 both in Figure 4 and Figure 5. VIN 4, 5 RT2659 The RT2659 can be configured for non-tracking application. When non-tracking is configured, output voltage is regulated to the REFIN voltage which taps off the voltage dividers from the 1V reference voltage. Either the EN pin or the VCC pin can be used to start up the device. The RT2659 uses internal voltage servo DAC to provide a 1.6ms softstart time during soft-start initialization. (See Figure 7) In a non-tracking application, the output voltage is determined by the resistive divider between the VREF pin and the REFIN pin. VOUT VREF R2 R1+R2 VREF 7 VDDQ R1 REFIN 600mV 8.1ms RDROOP COMP Loop Determined Operation Forced CCM Operation gm is the Error Amplifier Trans-Conductance. RT2659 9 R1 REFIN 9 R2 R2 Figure 7. Non-Tracking Condition Figure 4. Tracking Configuration 1 VIN 4, 5 VIN RT2659 REFIN 9 R1 EN and VCC VDDQ R2 Figure 5. Tracking Configuration 2 RT2659 can be configured for tracking application. When tracking configuration is desired, output voltage is also regulated to the REFIN voltage which comes from an Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 14 100µs 500mV VREFIN Fixed 1.6ms Power good window, Soft-Start Reference to REFIN VOUT PGOOD +16% +8% -8% -16% -5% PGOOD Delay 1ms Figure 8. Non-Tracking Startup Timing is a registered trademark of Richtek Technology Corporation. DS2659-03 November 2015 RT2659 Inductor Selection The inductor value and operating frequency determine the ripple current according to a specific input and output voltage. The ripple current ΔIL increases with higher VIN and decreases with higher inductance. V V IL = OUT 1 OUT VIN f L Having a lower ripple current reduces not only the ESR losses in the output capacitors but also the output voltage ripple. However, it requires a large inductor to achieve this goal. For the ripple current selection, the value of ΔIL = 0.4(IMAX) will be a reasonable starting point. The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below the specified maximum, the inductor value should be chosen according to the following equation : VOUT VOUT L = 1 VIN(MAX) f I L(MAX) The inductor's current rating (caused a 40°C temperature rising from 25°C ambient) should be greater than the maximum load current and its saturation current should be greater than the short circuit peak current limit. CIN and COUT Selection The input capacitance, C IN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by : V IRMS IOUT(MAX) OUT VIN VIN 1 VOUT This formula has a maximum at VIN = 2VOUT, where I RMS = I OUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the Effective Series Resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS2659-03 November 2015 capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, ΔVOUT, is determined by : 1 VOUT IL ESR 8fC OUT Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VDD. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Stability Considerations Setting the crossover frequency should be less than 1/5 of the switching frequency. 1 gm RC 60kHz 2 COUT RS FCO Where RS 53m, gm 1000μA/V, COUT 160μF So RC 60kHz 53m 160μF 2 3.14 3.2k 1000μs Choose RC value of 3.9kΩ. Then determine CC, using the below equation : F 1 fz CO 5 2 RC CC To calculate CC = 3.4nF, Choose the capacitor value of 2.2nF. Then determine CP, set the pole more than the switching frequency, using the below equation : CP 1 1 34pF 2 RC 2FS 2 3.9k 2 600kHz Choose the CP to 33pF. is a registered trademark of Richtek Technology Corporation. www.richtek.com 15 RT2659 Thermal Considerations Layout Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : Follow the PCB layout guidelines for optimal performance of RT2659. A ground plane is recommended. If a ground plane layer is not used, the signal and power grounds should be segregated with all small-signal components returning to the GND pin at one point that is then connected to the PGND pin close to the IC. The exposed pad should be connected to GND. where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and θJA is the junction to ambient thermal resistance. Connect the terminal of the input capacitor(s), CIN, as close as possible to the VIN pin. This capacitor provides the AC current into the internal power MOSFETs. For recommended operating condition specifications, the maximum junction temperature is 125°C. The junction to ambient thermal resistance, θJA, is layout dependent. For VQFN-20L 3.5x4 packages, the thermal resistance, θJA, SW node is with high frequency voltage swing and should be kept within small area. Keep all sensitive small-signal nodes away from the SW node to prevent stray capacitive noise pick-up. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. PD(MAX) = (TJ(MAX) − TA) / θJA is 32°C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by the following formula : PD(MAX) = (125°C − 25°C) / (32°C/W) = 3.125W for VQFN-20L 3.5x4 package The maximum power dissipation depends on the operating ambient temperature for fixed T J(MAX) and thermal resistance, θJA. The derating curve in Figure 9 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Maximum Power Dissipation (W)1 3.5 Four-Layer PCB 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 25 50 75 100 125 Ambient Temperature (°C) Figure 9. Derating Curve of Maximum Power Dissipation Copyright © 2015 Richtek Technology Corporation. All rights reserved. www.richtek.com 16 is a registered trademark of Richtek Technology Corporation. DS2659-03 November 2015 VCC PGOOD MODE EN BOOT RT2659 Input capacitor must be placed as close to the IC as possible. CIN VIN PGND PGND PGND VIN VIN 1 15 2 14 PGND 3 13 12 4 5 21 7 8 9 11 SW SW L SW SW SW COUT 10 GND VREF COMP REFIN VOUT 6 SW should be connected to inductor by wide and short trace. Keep sensitive components away from this trace CBOOT 20 19 18 17 16 CVCC GND VOUT CCOMP RCOMP R1 R2 GND PGND VOUT The feedback and must be connected as close to the device as possible. Keep sensitive component away. Figure 10. PCB Layout Guide Table 2. Inductors Recommended component selection for Typical Application. Component Supplier Series Inductance (H) DCR (m) Current Rating (A) Dimensions (mm) TDK SPM5030T-R35 0.35 2.1 14.9 5x5x3 Pulse PA2509.201NL 0.2 0.35 32 7x8.5x8 WE 744308025 0.25 0.37 25 7x10x6.8 Copyright © 2015 Richtek Technology Corporation. All rights reserved. DS2659-03 November 2015 is a registered trademark of Richtek Technology Corporation. www.richtek.com 17 RT2659 Outline Dimension 1 1 2 2 DETAIL A Pin #1 ID and Tie Bar Mark Options Note : The configuration of the Pin #1 identifier is optional, but must be located within the zone indicated. Symbol Dimensions In Millimeters Dimensions In Inches Min. Max. Min. Max. A 0.800 1.000 0.031 0.039 A1 0.000 0.050 0.000 0.002 A3 0.175 0.250 0.007 0.010 b 0.200 0.300 0.008 0.012 D 3.400 3.600 0.134 0.142 D2 2.050 2.150 0.081 0.085 E 3.900 4.100 0.154 0.161 E2 2.550 2.650 0.100 0.104 e L 0.500 0.350 0.020 0.450 0.014 0.018 V-Type 20L QFN 3.5x4 Package Richtek Technology Corporation 14F, No. 8, Tai Yuen 1st Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries. www.richtek.com 18 DS2659-03 November 2015