Doc No. TT4-EA-12901 Revision. 3 Product Standards MOS FET MTM232230LBF MTM232230LBF Silicon N-channel MOS FET Unit : mm For switching 2.0 0.3 Features 0.15 3 1.25 2.1 Low drain-source On-state resistance : RDS(on) typ = 20 m (VGS = 4.0 V) Low drive voltage: 2.5 V drive Halogen-free / RoHS compliant (EU RoHS / UL-94 V-0 / MSL : Level 1 compliant) 1 2 Marking Symbol : BK 0.9 (0.65)(0.65) 1.3 Packaging Embossed type (Thermo-compression sealing) : 3 000 pcs / reel (standard) 1. 2. 3. Absolute Maximum Ratings Ta = 25 C 項目 記号 Drain-source Voltage Gate-source Voltage Drain current Peak drain current *1 Power dissipation *2 Channel temperature Operating ambient temperature Storage Temperature Range Note) VDS VGS ID IDp PD Tch Topr Tstg 定格 20 10 4.5 18 500 150 -40 to + 85 -55 to +150 単位 V A A mW C C C Panasonic JEITA Code Gate Source Drain SMini3-G1-B SC-70 SOT-323 Internal Connection (D) 3 *1 Pulse width ≦10 s, Duty cycle ≦1 % *2 Measuring on ceramic board at 40 38 0.1 mm Absolute maximum rating PD without heat sink shall be made 150 mW. 1 (G) 2 (S) Pin Name 1. 2. 3. Gate Source Drain Page 1 of 6 Established : 2010-12-15 Revised : 2013-07-01 Doc No. TT4-EA-12901 Revision. 3 Product Standards MOS FET MTM232230LBF Electrical Characteristics Ta = 25 C 3 C 項目 記号 Drain-source surrender voltage Drain-source cutoff current Gate-source cutoff current Gate threshold voltage 条件 ID = 1 mA, VGS = 0 V VDS = 20 V, VGS = 0 V VGS = 8 V, VDS = 0 V ID = 1.0 mA, VDS = 10.0 V RDS(ON)1 ID = 1 A, VGS = 4 V Drain-source ON resistance *1 RDS(ON)2 ID = 0.6 A, VGS = 2.5 V ID = 1 A, VDS = 10 V, f = 1 kHz |Yfs| Forward transfer admittance *1 Short-circuit input capacitance (Common source) Ciss Short-circuit output capacitance (Common source) VDS = 10 V, VGS = 0, f = 1 MHz Coss Reverse transfer capacitance (Common source) Crss VDD = 10 V, VGS = 0 to 4 V ton Turn-on Time *2 ID = 1 A VDD = 10 V, VGS = 4 to 0 V toff Turn-off Time *2 ID = 1 A Note) VDSS IDSS IGSS Vth 最小 標準 最大 20 0.4 0.85 20 26 3.5 1.0 10 1.3 28 40 単位 V A A V m S 1 200 85 80 pF 16 ns 220 ns 1. Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring methods for transistors. 2. *1 Pulse test : Pulse width < 300 s、Duty cycle < 2 % *2 Turn-on and Turn-off test circuit Page 2 of 6 Established : 2010-12-15 Revised : 2013-07-01 Doc No. TT4-EA-12901 Revision. 3 Product Standards MOS FET MTM232230LBF *2 Turn-on and Turn-off test circuit VDD = 10 V ID = 1 A RL = 10 Vin 4V 0V Vout PW = 10 μs D.C. ≦ 1 % D G Vin 50 S 90 % Vin 10 % 90 % Vout 10 % t(on) t(off) Page 3 of 6 Established : 2010-12-15 Revised : 2013-07-01 Doc No. TT4-EA-12901 Revision. 3 Product Standards MOS FET MTM232230LBF Technical Data ( reference ) ID - VDS ID - VGS 0.08 4.5 4.0 V 3.5 0.07 2.5 V Drain current ID (A) Drain current ID (A) 4 3 2.0 V 2.5 2 VGS = 1.5 V 1.5 1 0.5 Ta = 85 ℃ 0.06 0.05 25 ℃ 0.04 0.03 -40 ℃ 0.02 0.01 1.0 V 0 0 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0 0.5 Drain-source Voltage VDS (V) RDS(on) - ID 100 0.5 Drain source On-state Resistance RDS(on) (m) Drain-source Voltage VDS (V) 1.5 Gate-source voltage VGS (V) VDS - VGS 0.4 ID = 2 A 0.3 0.5 A 0.2 1A 0.1 0 0 1 2 3 4 5 2.5 V VGS = 4.0 V 10 0.01 0.1 1 10 Drain current ID (A) Gate-source Voltage VGS (V) Dynamic Input/Output Characteristics Capacitance - VDS 10 Gate-source Voltage VGS (V) 10000 Capacitance C (pF) 1 Ciss 1000 Coss 100 Crss 8 VDD = 10 V 6 4 2 0 10 0.1 1 Drain-source Voltage VDS (V) 10 0 5 10 15 20 25 30 Total Gate Charge Qg (nC) Page 4 of 6 Established : 2010-12-15 Revised : 2013-07-01 Doc No. TT4-EA-12901 Revision. 3 Product Standards MOS FET MTM232230LBF Technical Data ( reference ) Vth - Ta RDS(on) - Ta 50 Drain-source On-resistance RDS(on) (m) Gate-source Threshold Voltage (V) 1.5 1 0.5 VGS = 2.5 V 40 30 4.0 V 20 10 0 0 -50 0 50 100 -50 150 0 50 100 150 Temperature (℃) Temperature Ta (℃) Total Power Dissipation PD (W) PD - Ta 0.8 Mounted on ceramic board (40 x 38 x t0.1 mm) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 50 100 150 Temperature Ta (C) Safe Operating Area 100 1000 IDp = 18 A Drain Current ID (A) Thermal Resistance Rth (C/W) Rth - tsw 100 10 10 1 1 ms 0.1 0.01 10 ms Operation in this area is limited by RDS(on) 100 ms 1s Ta = 25C, Glass epoxy board (25.4×25.4×t0.8 mm) coated with copper foil, DC which has more than 300mm2. 1 0.01 0.1 1 10 Pulse Width tsw (s) 100 1000 0.001 0.01 0.1 1 10 100 Drain-source Voltage VDS (V) Page 5 of 6 Established : 2010-12-15 Revised : 2013-07-01 Doc No. TT4-EA-12901 Revision. 3 Product Standards MOS FET MTM232230LBF SMini3-G1-B 2.0±0.2 +0.10 0.15-0.05 +0.1 0.3 0.0 (8°) 2 1.3±0.1 0.2±0.1 (0.65) (0.65) (0.425) 1 2.1±0.1 1.25±0.10 3 +0.2 0.9-0.1 0 to 0.1 0.9±0.1 (10°) Land Pattern (Reference) (Unit : mm) 1.9 0.8 0.9 1.3 Page 6 of 6 Established : 2010-12-15 Revised : 2013-07-01 Request for your special attention and precautions in using the technical information and semiconductors described in this book (1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. 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