S i 5 x x - E VB Si5 XX S INGLE / D U A L F REQUENCY X O / V C X O E VALUATION B OA RD Description Features The Silicon Laboratories Si5xx evaluation board contains the hardware needed for evaluation of the Si5xx Single/Dual Frequency XO/VCXO. Evaluation of Silicon Laboratories' Si5xx Single/Dual Frequency XO/VCXO Voltage control (VC) input port (Si515, Si516) Supports frequencies up to 1.4 GHz (using Si53x/55x) Dual footprint supports 3.2 x 5 or 5 x 7 mm Note: The Si5xx-EVB is not populated with an Si5xx XO or VCXO. These devices must be ordered separately. Go to www.silabs.com/VCXOPartnumber to configure a device and/or to order samples. Function Block Diagram J1 Power In 6 (4) VDD J12 1 (1) VCO input NC/FS/VC/OE CLKP Filter 2 5 NC/FS/OE J3 4 (3) CLKP Output Conditioner CLKN J2 CLKN GND 3 (2) J4 Rev. 0.2 4/13 Note: pin numbers in parentheses represent pin numbers for the 4-pin device J5 Copyright © 2013 by Silicon Laboratories Si5xx-EVB Si5xx-EVB 1. Introduction This document describes the operation of the Silicon Laboratories Si5xx evaluation kit. The Si5xx-EVB kit refers to the evaluation board hardware intended for customer evaluation of the Si5xx single/dual frequency XO/VCXO. The Si5xx-EVB kit contains the following: Si5xx-EVB Hardware Si5xx-EVB User Guide (this document) The Si5xx-EVB evaluation board can be used to evaluate all the single and dual frequency Si5xx XO/VCXOs offered by Silicon Laboratories: Table 1. Si5xx XO and VCXO Device Evaluation Board Selector Guide Part # Type Devices Supported Packages Supported Output Format, Temp Stability, Tuning Slope Supported Frequency Range Si5XX-EVB Fixed Frequency XO/ VCXO Eval Board Si510/511 Si512/513 Si515/516 Si530/531 Si532/533 Si535/536 Si550/552 Si590/591 5 x 7 mm, 6-pin 3.2 x 5 mm, 6-pin 3.2 x 5 mm, 4-pin LVPECL CML HCSL LVDS CMOS Dual-CMOS 100 kHz to 1417 MHz Note: Si5xx samples must be ordered separately from the Si5xx-EVB. 1.1. Quick Start 1. Install an Si5xx device on the board. 2. Verify the jumper settings are correct. 3. Connect external power cable to the EVB (set voltage according to how the part was ordered). 2 Rev. 0.2 Si5xx-EVB 2. Top/Bottom Views of Board p Figure 1. Top (Left) and Bottom (Right) Board Views Rev. 0.2 3 Si5xx-EVB 3. Functional Description The Si5xx-EVB is the evaluation board assembly for the Si5xx single/dual frequency XO/VCO. This evaluation board assembly provides access to all signals for operating the device. The Si5xx-EVB schematics, bill of material, and PCB layouts are included as sections 4, 5, and 6, respectively. Figure 2 provides a block diagram for the board. J1 Power In 6 (4) VDD J12 1 (1) VCO input NC/FS/VC/OE CLKP Filter 2 5 NC/FS/OE J3 4 (3) CLKP Output Conditioner CLKN J2 CLKN GND 3 (2) J4 Note: pin numbers in parentheses represent pin numbers for the 4-pin device J5 Figure 2. Si5xx-EVB Functional Block Diagram 3.1. Power Supply The Si5xx-EVB accepts either an external supply of 1.8, 2.5, or 3.3 V at connector J1. (Insure the voltage range of the DUT is obeyed, and it is also good practice to set a current limit on the power supply). 3.2. Jumpers There are two jumpers on the Si5xx-EVB as listed in Table 2. The board default is to have no jumpers. Table 2. Si5xx-EVB Jumpers 4 Component Si510 Si511 Si512 Si513 Si515 Si516 R6 remove remove remove remove installed installed R7 remove remove remove remove remove remove J4 No jumper: OE = Hi Jumper: OE = Lo No jumper No jumper: OE = Hi Jumper: OE = Lo No jumper: FS = Hi Jumper: FS = Lo No jumper: OE = Hi Jumper: OE = Lo No jumper: FS = Hi Jumper: FS = Lo J5 No jumper No jumper: OE = Hi Jumper: OE = Lo No jumper: FS = Hi Jumper: FS = Lo No jumper: O E= Hi Jumper: OE = Lo No jumper No jumper Rev. 0.2 Si5xx-EVB 3.3. Si5xx-EVB Voltage Control Signal An external voltage control signal may be applied to the control voltage modulation input at the J12 header (VC). This voltage supplies the control voltage or voltage modulation input to the DUT. See Section 3.2 on how to configure the jumpers and VC enable resistors (R6 and R7). 3.4. Output Terminations The Si5xx-EVB can support four different output formats: CMOS, LVPECL, LVDS, and HCSL. There are output resistors that are needed to accompany each format. Table 3 shows which resistors are needed for each output: Table 3. Output Termination Installation Definition Output Format R2 R12 R8 R1 R11 R3 R13 C1 C7 CMOS NP NP NP NP NP 82 82 100N 100N LVPECL 0 0 NP NP NP 130 130 NP NP LVDS NP NP NP NP NP 82 82 100N 100N HCSL NP NP NP NP NP 82 82 100N 100N Rev. 0.2 5 Si5xx-EVB 4. Configuring the Si5xx-EVB 1.8-3.3 V Power Supply - + - + Frequency Counter - + VC + Optional Voltage Source (for Si515, Si516) - Si5xx-EVB Optional Oscilloscope or other Instrument CLKN CLKP Figure 3. Si5xx-EVB Typical Configuration 6 Rev. 0.2 VC for VCO Power Input 1 2 3 * * J12 J1 1 Rev. 0.2 R10 49.9 R9 1K C6 100N R4 4.99K R7 0 ohm R6 0 ohm Low-Pass Filter POP one for VC input, neither for non-VCOs 1 2 1 2 J5 2 1 SI5306_6_PIN NC/FS/SDA/SCL/VC/SD/OE2 NC/FS/SDA/SCL/VC/SD/OE1 U1 VDD CLK CLK 100N C2 4 5 Figure 4. Si5xx-EVB Schematic Pull Down for FS or OE J4 R5 4.99K 6 VDD GND 3 R8 100 R12 0 100N C5 100N C4 R2 0 C7 100N C1 100N VDD 1 R3 82 R1 127 1 3 R13 82 R11 127 3 J2 J3 2 2 2 VDD CLKOB CLKOB Si5xx-EVB 5. Schematic 7 Si5xx-EVB 6. Bill of Materials Table 4. Si5xx-EVB Bill of Materials Item Catty Reference Value Mfr Manufacturer PN PCB Footprint 1 6 C1,C2,C4,C 5,C6,C7 100N Venkel C0603X7R160104KNE SM_C_0603 2 1 J1 Phoenix_2_screw Phoenix MKDSN 1.5/2-5.08 Phoenix2pinM_p2pitch 3 2 J2,J3 edge mount sma Johnson 142-0701-801 SMA_EDGE_p062 4 2 J4,J5 1by2_M_Hdr Salines Don't care Thru-hole, .1" pitch 5 1 J12 Jmpr_3pin Tyco 146225-3 3pin_p1pitch 6 2 R1, R11 127 Venkel CR0603-16W-127FT SM_R_0603 7 2 R3, R13 82 Venkel CR0603-16W-82R0FT SM_R_0603 8 4 R2, R6, R7, R12 0 ohm Venkel CR0603-16W-000T SM_R_0603 9 1 R10 49.9 Venkel CR0603-16W-49R9FT SM_R_0603 10 2 R4,R5 4.99K Venkel CR0603-16W-4991FT SM_R_0603 11 1 R8 100 Venkel CR0603-16W-1000FT SM_R_0603 12 1 R9 1K Venkel CR0603-16W-1001FT SM_R_0603 13 0 U1 Si53x SiLABS N/A 6_pin_SM 14 0 C3 10UF Venkel C0805X5R6R3106KNE SM_C_0805 No Pop 8 Rev. 0.2 Si5xx-EVB 7. Layout Figure 5. Layer 1: Primary Side Rev. 0.2 9 Si5xx-EVB Figure 6. Layer 2: GND 10 Rev. 0.2 Si5xx-EVB Figure 7. Layer 4: PWR Rev. 0.2 11 Si5xx-EVB Figure 8. Layer 4: Secondary Side 12 Rev. 0.2 Si5xx-EVB Document Change List Revision 0.1 to Revision 0.2 Added Si535/536 part numbers to Table 1. Rev. 0.2 13 ClockBuilder Pro One-click access to Timing tools, documentation, software, source code libraries & more. Available for Windows and iOS (CBGo only). www.silabs.com/CBPro Timing Portfolio www.silabs.com/timing SW/HW Quality Support and Community www.silabs.com/CBPro www.silabs.com/quality community.silabs.com Disclaimer Silicon Laboratories intends to provide customers with the latest, accurate, and in-depth documentation of all peripherals and modules available for system and software implementers using or intending to use the Silicon Laboratories products. Characterization data, available modules and peripherals, memory sizes and memory addresses refer to each specific device, and "Typical" parameters provided can and do vary in different applications. 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