AP6502 340kHz 18V 2A SYNCHRONOUS DC/DC BUCK CONVERTER Description Pin Assignments ( Top View ) The AP6502 is a 340kHz switching frequency external compensated synchronous DC/DC buck converter. It has integrated low RDSON BS 1 8 SS IN 2 7 EN SW 3 6 COMP GND 4 5 FB The AP6502 enables continues load current of up to 2A with efficiency as high as 95%. The AP6502 features current mode control operation, which enables SO-8EP fast transient response times and easy loop stabilization. The AP6502 simplifies board layout and reduces space requirements with its high level of integration and minimal need for external components, making it ideal for distributed power architectures. The AP6502 is available in a standard Green SO-8 and SO-8EP package with exposed PAD for improved thermal performance and is RoHS compliant. Figure 1 Package Pin Out Features • VIN 4.7V to 18V • • 2A Continuous Output Current, 3A Peak VOUT Adjustable from 0.925V to 16V • Gaming Consoles • 340kHz Switching Frequency • Flat Screen TV Sets and Monitors • Programmable Soft-Start • Set Top Boxes • Enable Pin • Distributed power systems • Protection • Home Audio OCP • Consumer Electronics Thermal Shutdown • Network Systems Applications • Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) • FPGA, DSP and ASIC Supplies • Halogen and Antimony Free. “Green” Device (Note 3) • Green Electronics Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. Typical Application Circuit 100 90 VIN = 5V EFFICIENCY (%) NEW PRODUCT high and low side MOSFETs. VIN = 12V 80 70 60 50 VOUT = 3.3V L = 10µH 40 0 0.4 0.8 1.2 1.6 LOAD CURRENT (A) Efficiency vs. Load Current AP6502 Document Number: DS35423 Rev. 9 - 2 2 Figure 2 Typical Application Circuit 1 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 Pin Number Pin Name 1 BS 2 IN 3 SW 4 GND 5 FB 6 COMP 7 EN 8 SS EP EP Function High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel MOSFET switch. Connect a 0.01µF or greater capacitor from SW to BS to power the high side switch. Power Input. IN supplies the power to the IC, as well as the step-down converter switches. Drive IN with a 4.7V to 18V power source. Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC. See Input Capacitor. Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load. Note that a capacitor is required from SW to BS to power the high-side switch. Ground (Connect the exposed pad to Pin 4). Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive voltage divider connected to it from the output voltage. The feedback threshold is 0.925V. See Setting the Output Voltage. Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND. In some cases, an additional capacitor from COMP to GND is required. See Compensation Components. Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator; low to turn it off. Attach to IN with a 100kΩ pull up resistor for automatic startup. Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the softstart period. A 0.1µF capacitor sets the soft-start period to 15ms. To disable the soft-start feature, leave SS floating. EP exposed thermal pad connect to Pin 4 GND, not applicable in the SO-8 package. Functional Block Diagram + OVP RAMP 1.1V E + 5 100/340 KHz CLK - Logic 0.3 V 8 1 BS 3 - + 0.925 V IN 100mΩ + SS 2 - FB OSCILLATOR CURRENT SENSE AMPLIFIER + NEW PRODUCT Pin Descriptions + 6uA ERROR AMPLIFIER CURRENT COMPARATOR 100mΩ 4 COMP SW GND 6 + 2.5V EN OK - disable LOCKOUT COMPARATOR IN < 4.10V IN EN + 7 0.9V - SHUTDOWN COMPARATOR INTERNAL REGULATORS 5V Figure 3 Functional Block Diagram AP6502 Document Number: DS35423 Rev. 9 - 2 2 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 Absolute Maximum Ratings (Note 4) (@TA = +25°C, unless otherwise specified.) NEW PRODUCT Symbol Parameter VIN Supply Voltage VSW Switch Node Voltage Rating -0.3 to +20 V -1.0 to VIN +0.3 V VBS Bootstrap Voltage VSW -0.3 to VSW +6 V VFB Feedback Voltage -0.3 to +6 V VEN Enable/UVLO Voltage -0.3 to +6 V -0.3 to +6 V TST Storage Temperature -65 to +150 °C TJ Junction Temperature +150 °C +260 °C 3 250 kV V VCOMP Comp Voltage Lead Temperature TL ESD Susceptibility (Note 5) HBM Human Body Model MM Machine Model Notes: Unit 4. Stresses greater than the 'Absolute Maximum Ratings' specified above may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time. 5. Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. Thermal Resistance (Note 6) (@TA = +25°C, unless otherwise specified.) Symbol Note: Parameter θJA Junction to Ambient θJC Junction to Case Rating 74 126 16 28 SO-8EP SO-8 SO-8EP SO-8 Unit °C/W 6. Test condition: SO-8: Device mounted on 1"x1" FR-4 substrate PCB, 2oz copper, with minimum recommended pad layout. SO-8EP: Device mounted on 1" x 1" FR-4 substrate PC board, 2oz copper, with minimum recommended pad on top layer and thermal vias to bottom layer ground plane. Recommended Operating Conditions (Note 7) (@TA = +25°C, unless otherwise specified.) Symbol Note: Min Max VIN Supply Voltage Parameter 4.7 18 Unit V TA Operating Ambient Temperature Range -40 +85 °C 7. The device function is not guaranteed outside of the recommended operating conditions. AP6502 Document Number: DS35423 Rev. 9 - 2 3 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 Electrical Characteristics (VIN = 12V, @TA = +25°C, unless otherwise specified.) NEW PRODUCT Symbol Typ Max IIN Shutdown Supply Current Parameter VEN = 0V Test Conditions Min 0.3 3.0 Unit µA IIN Supply Current (Quiescent) VEN = 2.0V, VFB = 1.0V 0.6 1.5 mA RDS(ON)1 High-Side Switch On-Resistance (Note 8) 130 mΩ RDS(ON)2 Low-Side Switch On-Resistance (Note 8) 130 mΩ ILIMIT HS Current Limit Minimum duty cycle 4.4 A ILIMIT LS Current Limit From Drain to Source 0.9 A High-Side Switch Leakage Current VEN = 0V, VSW = 0V, VSW = 12V 0 AVEA Error Amplifier Voltage Gain (Note 8) GEA Error Amplifier Transconductance GCS COMP to Current Sense Transconductance FSW Oscillator Frequency ΔIC = ±10µA VFB = 0.75V FFB Fold-back Frequency VFB = 0V DMAX Maximum Duty Cycle VFB = 800mV TON Minimum On Time VFB Feedback Voltage TA = -40°C to +85°C 300 900 0.7 EN Lockout Threshold Voltage 2.2 EN Lockout Hysteresis INUVVth INUVHYS TSD Note: V/V 1000 µA/V 2.8 A/V 340 380 fSW % 130 ns 925 950 mV 0.8 0.9 V 2.5 2.7 V 220 3.80 VIN Under Voltage Threshold Rising 4.05 250 VIN Under Voltage Threshold Hysteresis kHz 90 1.1 EN Rising Threshold μA 800 0.30 Feedback Overvoltage Threshold VEN_Rising 10 V mV 4.40 V mV Soft-Start Current VSS = 0V 6 μA Soft-Start Period CSS = 0.1µF 15 ms 160 °C Thermal Shutdown (Note 8) 8. Guaranteed by design AP6502 Document Number: DS35423 Rev. 9 - 2 4 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 Typical Performance Graphs (VIN = 12V, @TA = +25°C, unless otherwise specified.) SHUTDOWN SUPPLY CURRENT (µA) QUIESCENT SUPPLY CURRENT (mA) 0.074 0.58 0.56 0.54 0.52 0.5 0.48 0 0.064 0.054 0.044 0.034 0.024 0.014 0.004 5 10 15 20 INPUT VOLTAGE (V) Quiescent Supply Current vs. Input Voltage 0 6.2 5 10 15 20 INPUT VOLTAGE (V) Shutdown Supply Current vs. Input Voltage 3.33 3.329 6 5.8 OUTPUT VOLTAGE (V) CURRENT LIMIT (A) 3.328 5.6 5.4 5.2 5 4.8 -60 3.327 VIN = 12V 3.326 3.325 3.324 3.323 3.322 3.321 -40 -20 0 20 40 60 80 TEMPERATURE (C) Current Limit vs. Temperature 3.32 100 4 10 15 INPUT VOLTAGE (V) Line Regulation 20 375 0.92 OSCILLATOR FREQUENCY (Khz) 0.918 FEEDBACK VOLTAGE (V) NEW PRODUCT 0.6 0.916 0.914 0.912 0.91 0.908 0.906 0.904 0.902 0.9 -60 -40 -20 0 20 40 60 80 TEMPERATURE (°C) Feedback Voltage vs. Temperature AP6502 Document Number: DS35423 Rev. 9 - 2 100 5 of 15 www.diodes.com 370 365 360 355 350 -60 -40 -20 0 20 40 60 80 100 TEMPERATURE (°C) Oscillator Frequency vs. Temperature January 2013 © Diodes Incorporated AP6502 90 85 85 80 80 75 75 EFFICIENCY (%) EFFICIENCY (%) 90 70 VIN = 12V 65 60 55 50 40 VIN = 5V VIN = 12V 70 65 60 55 50 VOUT = 1.2V L = 3.3µH 45 0 0.4 0.8 1.2 1.6 LOAD CURRENT (A) Efficiency vs. Load Current VOUT = 1.8V L = 3.3µH 45 2 40 0 0.4 0.8 1.2 1.6 LOAD CURRENT (A) Efficiency vs. Load Current 2 100 90 EFFICIENCY (%) NEW PRODUCT Typical Performance Graphs (cont.) (VIN = 12V, VOUT = 3.3V, (@TA = +25°C, unless otherwise specified.) 80 70 60 VIN = 12V VOUT = 5V L = 10µH 50 40 0 0.4 0.8 1.2 1.6 LOAD CURRENT (A) Efficiency vs. Load Current AP6502 Document Number: DS35423 Rev. 9 - 2 2 6 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 Typical Performance Characteristics (VIN = 12V, VOUT = 3.3V, L = 10µH, C1 = 22µF, C2 = 47µF, @TA = +25°C, unless otherwise specified.) Steady State Test 2A Startup Through Enable_no load NEW PRODUCT Steady State Test no load Time -2µs/div Startup Through Enable 2A Time -2ms/div Load Transient Test 1.0A to 2.0A Time -100µs/div AP6502 Document Number: DS35423 Rev. 9 - 2 Time -2µs/div Shutdown Through Enable_no load Time -10ms/div Short Circuit Test Time -20µs/div 7 of 15 www.diodes.com Time -10ms/div Shutdown Through Enable 2A Time -5ms/div Short Circuit Recovery Time -20µs/div January 2013 © Diodes Incorporated AP6502 Applications Information Theory of Operation The AP6502 is a 2A current mode control, synchronous buck regulator with built in power MOSFETs. Current mode control assures excellent NEW PRODUCT line and load regulation and a wide loop bandwidth for fast response to load transients. Figure 3 depicts the functional block diagram of AP6502. The operation of one switching cycle can be explained as follows. At the beginning of each cycle, HS (high-side) MOSFET is off. The error amplifier (EA) output voltage is higher than the current sense amplifier output, and the current comparator’s output is low. The rising edge of the 340kHz oscillator clock signal sets the RS Flip-Flop. Its output turns on HS MOSFET. The current sense amplifier is reset for every switching cycle. When the HS MOSFET is on, inductor current starts to increase. The current sense amplifier senses and amplifies the inductor current. Since the current mode control is subject to sub-harmonic oscillations that peak at half the switching frequency, ramp slope compensation is utilized. This will help to stabilize the power supply. This ramp compensation is summed to the current sense amplifier output and compared to the error amplifier output by the PWM comparator. When the sum of the current sense amplifier output and the slope compensation signal exceeds the EA output voltage, the RS Flip-Flop is reset and HS MOSFET is turned off. For one whole cycle, if the sum of the current sense amplifier output and the slope compensation signal does not exceed the EA output, then the falling edge of the oscillator clock resets the Flip-Flop. The output of the error amplifier increases when feedback voltage (VFB) is lower than the reference voltage of 0.925V. This also increases the inductor current as it is proportional to the EA voltage. If in one cycle the current in the power MOSFET does not reach the COMP set current value, the power MOSFET will be forced to turn off. When the HS MOSFET turns off, the synchronous LS MOSFET turns on until the next clock cycle begins. There is a “dead time” between the HS turn off and LS turn on that prevents the switches from “shooting through” from the input supply to ground. The voltage loop is compensated through an internal transconductance amplifier and can be adjusted through the external compensation components. Enable Above the ‘EN Rising Threshold’, the internal regulator is turned on and the quiescent current can be measured above this threshold. The enable (EN) input allows the user to control turning on or off the regulator. To enable the AP6502, EN must be pulled above the ‘EN Lockout Threshold Voltage’ and to disable the AP6502, EN must be pulled below ‘EN Lockout Threshold Voltage - EN Lockout Hysteresis’ (2.2V-0.22V =1.98V). External Soft Start Soft start is traditionally implemented to prevent the excess inrush current. This in turn prevents the converter output voltage from overshooting when it reaches regulation. The AP6502 has an internal current source with a soft start capacitor to ramp the reference voltage from 0V to 0.925V. The soft start current is 6uA. The soft start sequence is reset when there is a Thermal Shutdown, Under Voltage Lockout (UVLO) or when the part is disabled using the EN pin. External Soft Start can be calculated from the formula below: ISS = C * DV DT Where; ISS = Soft Start Current C = External Capacitor DV = change in feedback voltage from 0V to maximum voltage DT = Soft Start Time Current Limit Protection In order to reduce the total power dissipation and to protect the application, AP6502 has cycle-by-cycle current limiting implementation. The voltage drop across the internal high-side MOSFET is sensed and compared with the internally set current limit threshold. This voltage drop is sensed at about 30ns after the HS turns on. When the peak inductor current exceeds the set current limit threshold, current limit protection is activated. During this time the feedback voltage (VFB) drops down. When the voltage at the FB pin reaches 0.3V, the internal oscillator shifts the frequency from the normal operating frequency of 340kHz to a fold-back frequency of 102kHz. The current limit is reduced to 70% of nominal current limit when the part is operating at 102kHz. This low fold-back frequency prevents runaway current. AP6502 Document Number: DS35423 Rev. 9 - 2 8 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 Applications Information (cont.) Under Voltage Lockout (UVLO) Under Voltage Lockout is implemented to prevent the IC from insufficient input voltages. The AP6502 has a UVLO comparator that monitors NEW PRODUCT the input voltage and the internal bandgap reference. If the input voltage falls below 4.0V, the AP6502 will latch an under voltage fault. In this event the output will be pulled low and power has to be re-cycled to reset the UVLO fault. Over Voltage Protection When the AP6502 FB pin exceeds 20% of the nominal regulation voltage of 0.925V, the over voltage comparator is tripped and the COMP pin and the SS pin are discharged to GND, forcing the high-side switch off. Thermal Shutdown The AP6502 has on-chip thermal protection that prevents damage to the IC when the die temperature exceeds safe margins. It implements a thermal sensing to monitor the operating junction temperature of the IC. Once the die temperature rises to approximately +160°C, the thermal protection feature gets activated. The internal thermal sense circuitry turns the IC off thus preventing the power switch from damage. A hysteresis in the thermal sense circuit allows the device to cool down to approximately +120°C before the IC is enabled again through soft start. This thermal hysteresis feature prevents undesirable oscillations of the thermal protection circuit. Setting the Output Voltage The output voltage can be adjusted from 0.925V to 16V using an external resistor divider. Table 1 shows a list of resistor selection for common output voltages. Resistor R1 is selected based on a design tradeoff between efficiency and output voltage accuracy. For high values of R1 there is less current consumption in the feedback network. However the trade off is output voltage accuracy due to the bias current in the error amplifier. R1 can be determined by the following equation: ⎛V ⎞ R1 = R 2 ⋅ ⎜⎜ OUT − 1⎟⎟ ⎝ 0.925 ⎠ Figure 4 Feedback Divider Network When output voltage is low, network as shown in Figure 4 is recommended. Table 1 – Resistor Selection for Common Output Voltages R1 (kΩ) R2 (kΩ) VOUT (V) 5 45.3 10 3.3 26.1 10 2.5 16.9 10 1.8 9.53 10 1.2 3 10 Compensation Components The AP6502 has an external COMP pin through which system stability and transient response can be controlled. COMP pin is the output of the internal trans-conductance error amplifier. A series capacitor-resistor combination sets a pole-zero combination to control the characteristics of the control system. The DC gain of the voltage feedback loop is given by: A VDC = RLOAD × GCS × A VEA × VFB VOUT Where VFB is the feedback voltage (0.925V), RLOAD is the load resistor value, GCS is the current sense trans-conductance and AVEA is the error amplifier voltage gain. AP6502 Document Number: DS35423 Rev. 9 - 2 9 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 Applications Information (cont.) Compensation Components (cont.) The control loop transfer function incorporates two poles one is due to the compensation capacitor (C3) and the output resistor of error NEW PRODUCT amplifier, and the other is due to the output capacitor and the load resistor. These poles are located at: fP1 = fP2 = GEA 2π × C3 × A VEA 1 2π × C2 × RLOAD Where GEA is the error amplifier trans-conductance. One zero is present due to the compensation capacitor (C3) and the compensation resistor (R3). This zero is located at: fZ1 = 1 2π × C3 × R3 The goal of compensation design is to shape the converter transfer function to get a desired loop gain. The system crossover frequency where the feedback loop has the unity gain is crucial. A rule of thumb is to set the crossover frequency to below one-tenth of the switching frequency. Use the following procedure to optimize the compensation components: 1. Choose the compensation resistor (R3) to set the desired crossover frequency. Determine the R3 value by the following equation: R3 = 2π × C2 × fc VOUT 2π × C2 × 0.1× fs VOUT × < × VFB GEA ×GCS VFB GEA × GCS Where fC is the crossover frequency, which is typically less than one tenth of the switching frequency. 2. Choose the compensation capacitor (C3) to achieve the desired phase margin set the compensation zero, fZ1, to below one fourth of the crossover frequency to provide sufficient phase margin. Determine the C3 value by the following equation: C3 > 2 π × R3 × fc Where R3 is the compensation resistor value. VOUT (V) 1.2 1.8 2.5 3.3 5 12 CIN/C1 (µF) 22 22 22 22 22 22 COUT/C2 (µF) 47 47 47 47 47 47 RC/R3 (kΩ) 3.24 6.8 6.8 6.8 6.8 6.8 CC/C3 (nF) 6.8 6.8 6.8 6.8 6.8 6.8 L1 (µH) 3.3 3.3 10 10 10 15 Table 2 – Recommended Component Selection Inductor Calculating the inductor value is a critical factor in designing a buck converter. For most designs, the following equation can be used to calculate the inductor value; L= VOUT ⋅ (VIN − VOUT ) VIN ⋅ ΔIL ⋅ fSW Where ΔIL is the inductor ripple current. And fSW is the buck converter switching frequency. Choose the inductor ripple current to be 30% of the maximum load current. The maximum inductor peak current is calculated from: IL(MAX) = ILOAD + AP6502 Document Number: DS35423 Rev. 9 - 2 ΔIL 2 10 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 Applications Information (cont.) Inductor (cont.) Peak current determines the required saturation current rating, which influences the size of the inductor. Saturating the inductor decreases the converter efficiency while increasing the temperatures of the inductor and the internal MOSFETs. Hence choosing an inductor with NEW PRODUCT appropriate saturation current rating is important. A 1µH to 10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor’s DC resistance should be less than 200mΩ. Use a larger inductance for improved efficiency under light load conditions. Input Capacitor The input capacitor reduces the surge current drawn from the input supply and the switching noise from the device. The input capacitor has to sustain the ripple current produced during the on time on the upper MOSFET. It must hence have a low ESR to minimize the losses. The RMS current rating of the input capacitor is a critical parameter that must be higher than the RMS input current. As a rule of thumb, select an input capacitor which has RMs rating that is greater than half of the maximum load current. Due to large dI/dt through the input capacitors, electrolytic or ceramics should be used. If a tantalum must be used, it must be surge protected. Otherwise, capacitor failure could occur. For most applications, a 4.7µF ceramic capacitor is sufficient. Output Capacitor The output capacitor keeps the output voltage ripple small, ensures feedback loop stability and reduces the overshoot of the output voltage. The output capacitor is a basic component for the fast response of the power supply. In fact, during load transient, for the first few microseconds it supplies the current to the load. The converter recognizes the load transient and sets the duty cycle to maximum, but the current slope is limited by the inductor value. Maximum capacitance required can be calculated from the following equation: ESR of the output capacitor dominates the output voltage ripple. The amount of ripple can be calculated from the equation below: Vout capacitor = ΔI inductor * ESR An output capacitor with ample capacitance and low ESR is the best option. For most applications, a 22µF ceramic capacitor will be sufficient. ΔIinductor 2 ) 2 Co = 2 (Δ V + Vout ) − Vout 2 L(Iout + Where ΔV is the maximum output voltage overshoot. AP6502 Document Number: DS35423 Rev. 9 - 2 11 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 Applications Information (cont.) PC Board Layout This is a high switching frequency converter. Hence attention must be paid to the switching currents interference in the layout. Switching current from one power device to another can generate voltage transients across the impedances of the interconnecting bond wires and NEW PRODUCT circuit traces. These interconnecting impedances should be minimized by using wide, short printed circuit traces. AP6502SP-13 is exposed at the bottom of the package and must be soldered directly to a well designed thermal pad on the PCB. This will help to increase the power dissipation. This is not applicable for the AP6502S-13. External Bootstrap Diode It is recommended that an external bootstrap diode be added when the input voltage is no greater than 5V or the 5V rail is available in the system. This helps to improve the efficiency of the regulator. This solution is also applicable for D > 65%. The bootstrap diode can be a low cost one such as BAT54 or a schottky that has a low Vf. Figure 7—External Bootstrap Compensation Components Recommended Diodes: Part Number Voltage/Current Rating Vendor B130 30V, 1A Diodes Inc SK13 30V, 1A Diodes Inc AP6502 Document Number: DS35423 Rev. 9 - 2 12 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 NEW PRODUCT Ordering Information Device Package Code Packaging SP S SO-8EP SO-8 AP6502SP-13 AP6502S-13 Quantity 2500/Tape & Reel 2500/Tape & Reel 13” Tape and Reel Part Number Suffix -13 -13 Marking Information Package Outline Dimensions (All dimensions in mm.) (1) SO-8EP Exposed Pad 8 5 E1 1 H 4 F b Bottom View 9° (All sides) N 7° A e D A1 AP6502 Document Number: DS35423 Rev. 9 - 2 E 45° Q 4° ± 3° E0 C Gauge Plane Seating Plane L 14 of 15 www.diodes.com SO-8EP (SOP-8L-EP) Dim Min Max Typ A 1.40 1.50 1.45 A1 0.00 0.13 b 0.30 0.50 0.40 C 0.15 0.25 0.20 D 4.85 4.95 4.90 E 3.80 3.90 3.85 E0 3.85 3.95 3.90 E1 5.90 6.10 6.00 e 1.27 F 2.75 3.35 3.05 H 2.11 2.71 2.41 L 0.62 0.82 0.72 N 0.35 Q 0.60 0.70 0.65 All Dimensions in mm January 2013 © Diodes Incorporated AP6502 Package Outline Dimensions (cont.) (All dimensions in mm.) 0.254 (2) SO-8 NEW PRODUCT E1 E A1 L SO-8 Dim Min Max A 1.75 A1 0.10 0.20 A2 1.30 1.50 A3 0.15 0.25 b 0.3 0.5 D 4.85 4.95 E 5.90 6.10 E1 3.85 3.95 e 1.27 Typ h 0.35 L 0.62 0.82 θ 0° 8° All Dimensions in mm Gauge Plane Seating Plane Detail ‘A’ h 7°~9° 45° Detail ‘A’ A2 A A3 b e D Suggested Pad Layout (All dimensions in mm.) (1) SO-8EP X2 Dimensions C X X1 X2 Y Y1 Y2 Y1 Y2 X1 Value (in mm) 1.270 0.802 3.502 4.612 1.505 2.613 6.500 Y C X (2) SO-8 X Dimensions X Y C1 C2 C1 Value (in mm) 0.60 1.55 5.4 1.27 C2 Y AP6502 Document Number: DS35423 Rev. 9 - 2 15 of 15 www.diodes.com January 2013 © Diodes Incorporated AP6502 IMPORTANT NOTICE NEW PRODUCT DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. 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