AP65500 LIGHT LOAD IMPROVED 5A SYNCH DC/DC BUCK CONVERTER Description Pin Assignments The AP65500 is a 340kHz switching frequency external compensated synchronous DC/DC buck converter. It has integrated low RDSON high and low side MOSFETs. The AP65500 enables continues load current of up to 5A with efficiency as high as 96%. The AP65500 implements an automatic custom light load efficiency improvement algorithm. The AP65500 features current mode control operation, which enables fast transient response times and easy loop stabilization. The AP65500 simplifies board layout and reduces space requirements with its high level of integration and minimal need for external components, making it ideal for distributed power architectures. The AP65500 is available in a standard Green SO-8EP package and is RoHS compliant. Features • VIN 4.75V to 18V • 5A Continuous Output Current, 7A Peak • Applications • Gaming Consoles Efficiency Up to 96% • Flat Screen TV sets and Monitors • • Automated Light Load improvement VOUT Adjustable to 0.8 to 16V • Set Top Boxes • Distributed power systems • 340kHz Switching Frequency • Home Audio • External Programmable Soft-Start • Consumer electronics • Enable Pin • Network Systems • OCP with Hiccup and Thermal Protection • FPGA, DSP and ASIC Supplies • Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) • Green Electronics • Halogen and Antimony Free. “Green” Device (Note 3) Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. Typical Applications Circuit Figure 1 Typical Application Circuit AP65500 Document number: DS36112 Rev. 1 - 2 1 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Pin Descriptions Pin Name Pin Number BS 1 IN 2 SW 3 GND 4 FB 5 COMP 6 EN 7 SS 8 EP EP Function High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel MOSFET a 0.01µF or greater capacitor from SW to BS to power the high side switch. Power Input. IN supplies the power to the IC, as well as the step-down converter switches. Drive IN with a 4.75V to 18V power source. Bypass IN to GND with a suitably large capacitor to eliminate noise on the input to the IC. See Input Capacitor. Power Switching Output. SW is the switching node that supplies power to the output. Connect the output LC filter from SW to the output load. Note that a capacitor is required from SW to BS to power the high-side switch. Ground Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive voltage divider connected to it from the output voltage. The feedback threshold is 0.800V. See Setting the Output Voltage. Compensation Node. COMP is used to compensate the regulation control loop. Connect a series RC network from COMP to GND. In some cases, an additional capacitor from COMP to GND is required. See Compensation Components. Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the regulator; low to turn it off. Attach to IN with a 100kΩ pull up resistor for automatic startup. Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND to set the soft-start period. A 0.1µF capacitor sets the soft-start period to 13ms. To disable the soft-start feature, leave SS floating. Exposed Pad is connected to ground Functional Block Diagram Figure 2 Functional Block Diagram AP65500 Document number: DS36112 Rev. 1 - 2 2 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Absolute Maximum Ratings (Note 4) (@TA = +25°C, unless otherwise specified.) Symbol Parameter VIN Supply Voltage VSW Switch Node Voltage VBS Unit -0.3 to 20 V -1.0 to VIN +0.3 V Bootstrap Voltage VSW -0.3 to VSW +6.0 V VFB Feedback Voltage -0.3V to +6.0 V VEN Enable/UVLO Voltage -0.3V to +6.0 V Comp Voltage -0.3V to +6.0 V Storage Temperature -65 to +150 °C TJ Junction Temperature +160 °C TL Lead Temperature +260 °C 1.5 150 kV V VCOMP TST ESD Susceptibility (Note 5) HBM Human Body Model MM Machine Model Notes: Rating 4. Stresses greater than the 'Absolute Maximum Ratings' specified above may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not implied. Device reliability may be affected by exposure to absolute maximum rating conditions for extended periods of time. 5. Semiconductor devices are ESD sensitive and may be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. Thermal Resistance Note: Symbol Parameter θJA Junction to Ambient SO-8EP (Note 6) Rating 43 °C/W Unit θJC Junction to Case SO-8EP (Note 6) 6.3 °C/W 6. Test condition: SO-8EP: Device mounted on FR-4 substrate (2s2p) 2"x2" PCB, with 2oz copper trace thickness and minimum recommended pad on top layer and thermal vias to bottom layer ground plane. Recommended Operating Conditions (Note 7) (@TA = +25°C, unless otherwise specified.) Symbol Note: Min Max Unit VIN Supply Voltage Parameter 4.75 18.0 V TA Operating Ambient Temperature Range -40 +85 °C 7. The device function is not guaranteed outside of the recommended operating conditions. AP65500 Document number: DS36112 Rev. 1 - 2 3 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Electrical Characteristics (@TA = +25°C, VIN = 12V, unless otherwise specified.) Symbol ISHDN IQ Parameter Test Conditions Min Typ Max Unit Shutdown Supply Current VEN = 0V 0.3 3.0 µA Supply Current (Quiescent) VEN = 2.0V, VFB = 1.0V 0.3 1.5 mA RDS(ON)1 High-Side Switch On-Resistance (Note 8) 80 mΩ RDS(ON)2 Low-Side Switch On-Resistance (Note 8) 32 mΩ 7 A ILIMIT HS Current Limit Minimum duty cycle ILIMIT LS Current Limit From Drain to Source High-Side Switch Leakage Current VEN = 0V, VSW = 0V, VSW =12V AVEA 0.9 0 Error Amplifier Voltage Gain (Note 8) GEA Error Amplifier Transconductance GCS COMP to Current Sense Transconductance FSW Oscillator Frequency ∆IC = ±10µA VFB = 0.75V FFB Fold-back Frequency VFB = 0V DMAX Maximum Duty Cycle VFB = 800mV TON Minimum On Time VFB Feedback Voltage 300 TA = -40°C to +85°C 0.7 EN Lockout Threshold Voltage 2.2 EN Lockout Hysteresis INUVVTH VIN Under Voltage Threshold Rising VIN Under Voltage Threshold Hysteresis TSD Note: 800 V/V 1000 µA/V 2.8 A/V 340 380 kHz fSW 90 % 160 ns 800 mV 1.0 EN Rising Threshold INUVHYS μA 0.30 Feedback Overvoltage Threshold VEN_RISING A 10 V 0.8 1.2 2.5 2.7 V V 220 3.80 4.05 250 mV 4.40 V mV Soft-Start Current VSS = 0V 6 μA Soft-Start Period CSS = 0.1µF 13 ms 160 °C Thermal Shutdown (Note 8) 8. Guaranteed by design AP65500 Document number: DS36112 Rev. 1 - 2 4 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Typical Performance Characteristics (@TA = +25°C, VIN = 12V, VOUT = 3.3V, unless otherwise specified.) AP65500 Document number: DS36112 Rev. 1 - 2 5 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Typical Performance Characteristics (cont.) (@TA = +25°C, VIN = 12V, VOUT = 3.3V, unless otherwise specified.) AP65500 Document number: DS36112 Rev. 1 - 2 6 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Typical Performance Characteristics (cont.) (@TA = +25°C, VIN = 12V, VOUT = 3.3V, L = 3.3µH, C1 = 22µF, C2 = 47µF, unless otherwise specified.) Steady State Test 5A Startup Through Vin No Load Startup Through Vin 5A Load Time-2µs/div Time-5ms/div Time-5ms/div Load Transient Test 2.5 to 5A Shutdown Through Vin no load Shutdown Through Vin 5A Load Time-2ms/div Time-200ms/div Time-100ms/div Short Circuit Test Short Circuit Recovery Load Transient Test 2.5 to 5A Time-50µs/div Time-2ms/div Time-50µs/div Load Transient Test 5A to 2.5A Time-50µs/div AP65500 Document number: DS36112 Rev. 1 - 2 7 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Application Information Theory of Operation The AP65500 is a 5A current mode control, synchronous buck regulator with built in power MOSFETs. Current mode control assures excellent line and load regulation and a wide loop bandwidth for fast response to load transients. The Figure 1 depicts the functional block diagram of AP65500. The operation of one switching cycle can be explained as follows. At the beginning of each cycle, HS (high-side) MOSFET is off. The error amplifier (EA) output voltage is higher than the current sense amplifier output, and the current comparator’s output is low. The rising edge of the 340kHz oscillator clock signal sets the RS Flip-Flop. Its output turns on HS MOSFET. The current sense amplifier is reset for every switching cycle. When the HS MOSFET is on, inductor current starts to increase. The current sense amplifier senses and amplifies the inductor current. Since the current mode control is subject to sub-harmonic oscillations that peak at half the switching frequency, ramp slope compensation is utilized. This will help to stabilize the power supply. This ramp compensation is summed to the current sense amplifier output and compared to the error amplifier output by the PWM comparator. When the sum of the current sense amplifier output and the slope compensation signal exceeds the EA output voltage, the RS Flip-Flop is reset and HS MOSFET is turned off. For one whole cycle, if the sum of the current sense amplifier output and the slope compensation signal does not exceed the EA output, then the falling edge of the oscillator clock resets the Flip-Flop. The output of the error amplifier increases when feedback voltage (VFB) is lower than the reference voltage of 0.8V. This also increases the inductor current as it is proportional to the comp voltage. If in one cycle the current in the power MOSFET does not reach the COMP set current value, the power MOSFET will be forced to turn off. When the HS MOSFET turns off, the synchronous LS MOSFET turns on until the next clock cycle begins. There is a “dead time” between the HS turn off and LS turn on that prevents the switches from “shooting through” from the input supply to ground. The voltage loop is compensated through an internal transconductance amplifier and can be adjusted through the external compensation components. Enable Above the ‘EN Rising Threshold’, the internal regulator is turned on and the quiescent current can be measured above this threshold. The enable (EN) input allows the user to control turning on or off the regulator. To enable the AP65500, EN must be pulled above the ‘EN Lockout Threshold Voltage’ and to disable the AP65500, EN must be pulled below ‘EN Lockout Threshold Voltage - EN Lockout Hysteresis’ (2.2V-0.22V =1.98V). Automated No-Load and Light-Load Operation The AP65500 operates in Light load high efficiency mode during light load operation. The advantage of this light load high efficiency mode is low power loss at no-load and light-load conditions. The AP65500 automatically detects the output current and enters the light load high efficiency mode. The output current reaches a critical level at which the transitions between the light-load and heavy current mode occurs. Once the output current exceeds the critical level, the AP65500 transitions from light load high efficiency mode to continuous PWM mode. External Soft Start Soft start is traditionally implemented to prevent the excess inrush current. This in turn prevents the converter output voltage from overshooting when it reaches regulation. The AP65500 has an internal current source with a soft start capacitor to ramp the reference voltage from 0V to 0.800V. The soft start current is 6µA. The soft start sequence is reset when there is a Thermal Shutdown, Under Voltage Lockout (UVLO) or when the part is disabled using the EN pin. External Soft Start can be calculated from the formula below: ISS = C * DV DT Where; ISS = Soft Start Current C = External Capacitor DV=change in feedback voltage from 0V to maximum voltage DT = Soft Start Time AP65500 Document number: DS36112 Rev. 1 - 2 8 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Application Information (cont.) Current Limit Protection In order to reduce the total power dissipation and to protect the application, AP65500 has cycle-by-cycle current limiting implementation. The voltage drop across the internal high-side MOSFET is sensed and compared with the internally set current limit threshold. This voltage drop is sensed at about 30ns after the HS turns on. When the peak inductor current exceeds the set current limit threshold, current limit protection is activated. During this time the feedback voltage (VFB) drops down. When the voltage at the FB pin reaches 0.3V, the internal oscillator shifts the frequency from the normal operating frequency of 340kHz to a fold-back frequency of 102kHz. The current limit is reduced to 70% of nominal current limit when the part is operating at 102kHz. This low fold-back frequency prevents runaway current. Under Voltage Lockout (UVLO) Under Voltage Lockout is implemented to prevent the IC from insufficient input voltages. The AP65500 has a UVLO comparator that monitors the input voltage and the internal bandgap reference. If the input voltage falls below 4.0V, the AP65500 will latch an under voltage fault. In this event the output will be pulled low and power has to be re-cycled to reset the UVLO fault. Over Voltage Protection When the AP65500 FB pin exceeds 20% of the nominal regulation voltage of 0.800V, the over voltage comparator is tripped and the COMP pin and the SS pin are discharged to GND, forcing the high-side switch off. Thermal Shutdown The AP65500 has on-chip thermal protection that prevents damage to the IC when the die temperature exceeds safe margins. It implements a thermal sensing to monitor the operating junction temperature of the IC. Once the die temperature rises to approximately +160°C, the thermal protection feature gets activated. The internal thermal sense circuitry turns the IC off thus preventing the power switch from damage. A hysteresis in the thermal sense circuit allows the device to cool down to approximately +120°C before the IC is enabled again through soft start. This thermal hysteresis feature prevents undesirable oscillations of the thermal protection circuit. Setting the Output Voltage The output voltage can be adjusted from 0.800V to 16V using an external resistor divider. Table 1 shows a list of resistor selection for common output voltages. Resistor R1 is selected based on a design tradeoff between efficiency and output voltage accuracy. For high values of R1 there is less current consumption in the feedback network. However the trade off is output voltage accuracy due to the bias current in the error amplifier. R1 can be determined by the following equation: ⎛V ⎞ R1 = R 2 ⋅ ⎜⎜ OUT − 1⎟⎟ ⎝ 0.8 ⎠ Figure 3 Feedback Divider Network AP65500 Document number: DS36112 Rev. 1 - 2 VOUT (V) R1 (kΩ) R2 (kΩ) 5 3.3 2.5 1.8 52.3 31.6 21.5 12.4 10 10 10 10 1.2 5 10 Table 1 Resistor Selection for Common Output Voltages 9 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Application Information (cont.) Compensation Components The AP65500 has an external COMP pin through which system stability and transient response can be controlled. COMP pin is the output of the internal trans-conductance error amplifier. A series capacitor-resistor combination sets a pole-zero combination to control the characteristics of the control system. The DC gain of the voltage feedback loop is given by: A VDC = RLOAD × GCS × A VEA × VFB VOUT Where VFB is the feedback voltage (0.800V), RLOAD is the load resistor value, GCS is the current sense trans-conductance and AVEA is the error amplifier voltage gain. The control loop transfer function incorporates two poles one is due to the compensation capacitor (C3) and the output resistor of error amplifier, and the other is due to the output capacitor and the load resistor. These poles are located at: fP1 = GEA 2π × C3 × A VEA fP2 = 1 2π × C2 × RLOAD Where GEA is the error amplifier trans-conductance. One zero is present due to the compensation capacitor (C3) and the compensation resistor (R3). This zero is located at: f Z1 = 1 2 π × C3 × R 3 The goal of compensation design is to shape the converter transfer function to get a desired loop gain. The system crossover frequency where the feedback loop has the unity gain is crucial. A rule of thumb is to set the crossover frequency to below one-tenth of the switching frequency. Use the following procedure to optimize the compensation components: 1. Choose the compensation resistor (R3) to set the desired crossover frequency. Determine the R3 value by the following equation: R3 = 2π × C2 × fc VOUT 2π × C2 × 0.1× fs VOUT × < × GEA × GCS VFB G ×GCS VFB EA Where fC is the crossover frequency, which is typically less than one tenth of the switching frequency. 2. Choose the compensation capacitor (C3) to achieve the desired phase margin set the compensation zero, fZ1, to below one fourth of the crossover frequency to provide sufficient phase margin. Determine the C3 value by the following equation: C3 > 2 π × R 3 × fc Where R3 is the compensation resistor value. COUT/C2 (µF) 72 Rc/R3 (kΩ) Cc/C3 (nF) L1 (µH) 1.2 CIN/C1 (µF) 44 3.24 6.8 3.3 1.8 2.5 3.3 5 12 44 44 44 44 44 72 72 72 72 72 6.8 6.8 6.8 6.8 6.8 6.8 6.8 6.8 6.8 6.8 3.3 10 10 10 15 VOUT (V) Table 2 Recommended Component Selection Inductor Calculating the inductor value is a critical factor in designing a buck converter. For most designs, the following equation can be used to calculate the inductor value; L= VOUT ⋅ (VIN − VOUT ) VIN ⋅ ∆IL ⋅ fSW Where ∆IL is the inductor ripple current. And fSW is the buck converter switching frequency. AP65500 Document number: DS36112 Rev. 1 - 2 10 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Application Information (cont.) Inductor (cont.) Choose the inductor ripple current to be 30% of the maximum load current. The maximum inductor peak current is calculated from: IL(MAX) = ILOAD + ∆IL 2 Peak current determines the required saturation current rating, which influences the size of the inductor. Saturating the inductor decreases the converter efficiency while increasing the temperatures of the inductor and the internal MOSFETs. Hence choosing an inductor with appropriate saturation current rating is important. A 1µH to 10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor’s DC resistance should be less than 100mΩ. Use a larger inductance for improved efficiency under light load conditions. Input Capacitor The input capacitor reduces the surge current drawn from the input supply and the switching noise from the device. The input capacitor has to sustain the ripple current produced during the on time on the upper MOSFET. It must hence have a low ESR to minimize the losses. The RMS current rating of the input capacitor is a critical parameter that must be higher than the RMS input current. As a rule of thumb, select an input capacitor which has RMs rating that is greater than half of the maximum load current. Due to large dI/dt through the input capacitors, electrolytic or ceramics should be used. If a tantalum must be used, it must be surge protected. Otherwise, capacitor failure could occur. For most applications, a 44µF ceramic capacitor is sufficient. Output Capacitor The output capacitor keeps the output voltage ripple small, ensures feedback loop stability and reduces the overshoot of the output voltage. The output capacitor is a basic component for the fast response of the power supply. In fact, during load transient, for the first few microseconds it supplies the current to the load. The converter recognizes the load transient and sets the duty cycle to maximum, but the current slope is limited by the inductor value. Maximum capacitance required can be calculated from the following equation: ESR of the output capacitor dominates the output voltage ripple. The amount of ripple can be calculated from the equation below: Vout capacitor = ∆Iinductor * ESR An output capacitor with ample capacitance and low ESR is the best option. For most applications, a 72µF ceramic capacitor will be sufficient. ∆Iinductor 2 ) 2 Co = (∆ V + Vout )2 − Vout2 L(Iout + Where ∆V is the maximum output voltage overshoot. AP65500 Document number: DS36112 Rev. 1 - 2 11 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Application Information (cont.) PC Board Layout This is a high switching frequency converter. Hence attention must be paid to the switching currents interference in the layout. Switching current from one power device to another can generate voltage transients across the impedances of the interconnecting bond wires and circuit traces. These interconnecting impedances should be minimized by using wide, short printed circuit traces. Note that the IN to GND decoupling capacitors need to be immediately adjacent to the IN and GND pins of the device (U1), and 12 thermal vias from the back side thermal pad to the GND plane are essential to achieve the best operation at full load current. Figure 4 PC Board Layout External Bootstrap Diode It is recommended that an external bootstrap diode be added when the input voltage is no greater than 5V or the 5V rail is available in the system. This helps to improve the efficiency of the regulator. This solution is also applicable for D > 65%. The bootstrap diode can be a low cost one such as BAT54 or a Schottky that has a low VF. Figure 5 External Bootstrap Compensation Components Recommended Diodes: Part Number B130 SK13 AP65500 Document number: DS36112 Rev. 1 - 2 Voltage/Current Rating 30V, 1A 30V, 1A 12 of 15 www.diodes.com Vendor Diodes Inc Diodes Inc April 2014 © Diodes Incorporated AP65500 Ordering Information Part Number Package Code Part Marking Identification Code AP65500SP-13 SP SO-8EP NA Tape and Reel Quantity Part Number Suffix 2500 -13 Marking Information SO-8EP ( Top View ) 8 5 Logo Part No AP65500 YY WW X X E 1 AP65500 Document number: DS36112 Rev. 1 - 2 4 YY : Year : 08, 09,10~ WW : Week : 01~52; 52 represents 52 and 53 week E : SO-8EP Blank SO-8 G : Green X : Internal Code 13 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 Package Outline Dimensions (All dimensions in mm.) Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version. SO-8EP Exposed Pad 8 5 E1 1 H 4 F b Bottom View 9° (All sides) N 7° A e D E 45° Q 4° ± 3° E0 A1 C Gauge Plane Seating Plane L SO-8EP (SOP-8L-EP) Dim Min Max Typ A 1.40 1.50 1.45 A1 0.00 0.13 b 0.30 0.50 0.40 C 0.15 0.25 0.20 D 4.85 4.95 4.90 E 3.80 3.90 3.85 E0 3.85 3.95 3.90 E1 5.90 6.10 6.00 e 1.27 F 2.75 3.35 3.05 H 2.11 2.71 2.41 L 0.62 0.82 0.72 N 0.35 Q 0.60 0.70 0.65 All Dimensions in mm Suggested Pad Layout Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version. SO-8EP X2 Dimensions Value(in mm) C 1.270 X 0.802 X1 3.502 X2 4.612 Y 1.505 Y1 2.613 Y2 6.500 Y1 Y2 X1 Y C AP65500 Document number: DS36112 Rev. 1 - 2 X 14 of 15 www.diodes.com April 2014 © Diodes Incorporated AP65500 IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. 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Copyright © 2014, Diodes Incorporated www.diodes.com AP65500 Document number: DS36112 Rev. 1 - 2 15 of 15 www.diodes.com April 2014 © Diodes Incorporated